NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS

This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define

 #define NAND_MAX_CHIPS          CONFIG_SYS_MAX_NAND_DEVICE

but that's bogus and did not work anyhow.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

diff --git a/doc/README.nand b/doc/README.nand
index bf80bc0a5852447acbb4a42ec6d260df70c8c267..fc62f92e08503071d1d2702eb715ca91422f68f3 100644 (file)
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -172,7 +172,7 @@ More Definitions:
    #define ADDR_COLUMN_PAGE 3
    #define NAND_ChipID_UNKNOWN 0x00
    #define NAND_MAX_FLOORS 1
-   #define NAND_MAX_CHIPS 1
+   #define CONFIG_SYS_NAND_MAX_CHIPS 1
 
    #define CONFIG_SYS_DAVINCI_BROKEN_ECC
       Versions of U-Boot <= 1.3.3 and Montavista Linux kernels

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 94a65d4e72b02fa5bc7e981a66a96e72b048c3fe..ef37f97b3394d85b695c1c74e905f1b328f87219 100644 (file)
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2144,7 +2144,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
 {
        int page, len, status, pages_per_block, ret, chipnr;
        struct nand_chip *chip = mtd->priv;
-       int rewrite_bbt[NAND_MAX_CHIPS]={0};
+       int rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS]={0};
        unsigned int bbt_masked_page = 0xffffffff;
 
        MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n",

diff --git a/drivers/mtd/nand_legacy/nand_legacy.c b/drivers/mtd/nand_legacy/nand_legacy.c
index 407e901a37d310cac12314b3a7f3b8f05b1012f4..441780ac21ea4a5c02fc21d8de8f453f34727f2d 100644 (file)
--- a/drivers/mtd/nand_legacy/nand_legacy.c
+++ b/drivers/mtd/nand_legacy/nand_legacy.c
@@ -457,7 +457,7 @@ static void NanD_ScanChips(struct nand_chip *nand)
 {
        int floor, chip;
        int numchips[NAND_MAX_FLOORS];
-       int maxchips = NAND_MAX_CHIPS;
+       int maxchips = CONFIG_SYS_NAND_MAX_CHIPS;
        int ret = 1;
 
        nand->numchips = 0;

diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index a694083d5fb948d0e768b5cdb291673d17d2e8b5..a11a9b8dbaf75335d29cdb9348ba9bc2b8442c01 100644 (file)
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -150,7 +150,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index a44f3e16cc418b623db57784e1446f1817862f25..1e36660771c342d973373659fcbf9d3b3b889df9 100644 (file)
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -219,7 +219,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define CONFIG_SYS_NAND0_CE  (0x80000000 >> 1)  /* our CE is GPIO1 */
 #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2)  /* our CLE is GPIO2 */

diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index d0e246409d1779ba67bcfc3852e705cac0d28403..eebce38e70632f5b489871c09b0dda8ef5ba3634 100644 (file)
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -157,7 +157,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 729153c2efbf5c762ecf80c01172f9300096cb5c..85c0e612b2783e266f59da0b1c422b15425b1117 100644 (file)
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -411,7 +411,6 @@ int du440_phy_addr(int devnum);
  * NAND FLASH
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     2
-#define NAND_MAX_CHIPS         CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips */
 #define CONFIG_SYS_NAND_BASE_LIST      {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \
                                 CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS}

diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index d299044cb244719734129680316f006a22a6b4e7..b445faecba25b20e1749ef847bb5eb4860d7af6b 100644 (file)
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -205,7 +205,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define CONFIG_SYS_NAND_CE  (0x80000000 >> 1)  /* our CE is GPIO1 */
 #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2)  /* our CLE is GPIO2 */

diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index 80e59bb2667a7b32b6dd6540ba85c2af75000bc6..e5de8ef01dc919ed153883d9b4f610295aef729a 100644 (file)
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -209,7 +209,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index b3c7046fc39002a04641cfdb92dfd3c95e829f8b..1106b0dcf0b0f90e4ea301d652125b24dafe2026 100644 (file)
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -149,7 +149,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h
index a610ac9c23688ea8fc2ad6f79c799abe66c9d8df..fbcbddb408de636ac82cfd69441698d0ceed8e33 100644 (file)
--- a/include/configs/IDS8247.h
+++ b/include/configs/IDS8247.h
@@ -275,7 +275,6 @@
 
 #define NAND_ChipID_UNKNOWN     0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define NAND_DISABLE_CE(nand) do \
 { \

diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index c207947ff61f2c5558c5c48d13356a2fe4483762..1f1586a215c87935f4c816339a69bc1392e4b940 100644 (file)
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -215,7 +215,6 @@
 #      define CONFIG_SYS_NAND_BASE             CONFIG_SYS_CS2_BASE
 #      define CONFIG_SYS_NAND_SIZE             1
 #      define CONFIG_SYS_NAND_BASE_LIST        { CONFIG_SYS_NAND_BASE }
-#      define NAND_MAX_CHIPS           1
 #      define NAND_ALLOW_ERASE_ALL     1
 #      define CONFIG_JFFS2_NAND        1
 #      define CONFIG_JFFS2_DEV         "nand0"

diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index a1bc32a6d85526bd50ccf2d8fae69388b5eb30b3..19916876d38dfd40856a6fa837cdf8495c5f512f 100644 (file)
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -215,7 +215,6 @@
 #      define CONFIG_SYS_NAND_BASE             CONFIG_SYS_CS2_BASE
 #      define CONFIG_SYS_NAND_SIZE             1
 #      define CONFIG_SYS_NAND_BASE_LIST        { CONFIG_SYS_NAND_BASE }
-#      define NAND_MAX_CHIPS           1
 #      define NAND_ALLOW_ERASE_ALL     1
 #      define CONFIG_JFFS2_NAND        1
 #      define CONFIG_JFFS2_DEV         "nand0"

diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index fc3fa13c7a3766cdf34a29896344c4eee587201c..58a26e117e32f96172cf6c6a2c12d1abf3063bdb 100644 (file)
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -232,7 +232,6 @@
 #endif
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND 1
 #define CONFIG_NAND_FSL_ELBC 1

diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 48043c493fea89f22d9e3d948d6ee4644f0459d9..e4ada652b593a978af1fb5929a5f7234ea52972a 100644 (file)
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -223,7 +223,6 @@
  */
 #define CONFIG_SYS_NAND_BASE           0xE0600000      /* 0xE0600000 */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_MTD_NAND_VERIFY_WRITE   1
 #define CONFIG_CMD_NAND                        1
 #define CONFIG_NAND_FSL_ELBC           1

diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h
index a4f2862c4dde8072e1f42c4d01a38d02cb2e549c..c20f86aa235791c6b24c540b6d0a034b3b5e3c60 100644 (file)
--- a/include/configs/MPC8360ERDK.h
+++ b/include/configs/MPC8360ERDK.h
@@ -211,7 +211,6 @@
 #define CONFIG_CMD_NAND                1
 #define CONFIG_NAND_FSL_UPM    1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define CONFIG_SYS_LBLAWBAR1_PRELIM    CONFIG_SYS_NAND_BASE

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index d49155fce09993762c3f6fff3190afb86d4d76d0..dbffb7121a51dc1bc404251b53957a491722d6bd 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -271,7 +271,6 @@
 #define CONFIG_CMD_NAND                1
 #define CONFIG_MTD_NAND_VERIFY_WRITE   1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_NAND_FSL_ELBC   1
 
 #define CONFIG_SYS_NAND_BASE           0xE0600000      /* 0xE0600000 */

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 532c3df7730f2b57964b3e78b25a4535dc066c62..505c48be2badce0bc802b158d47c990750638ce0 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -248,7 +248,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
                                CONFIG_SYS_NAND_BASE + 0x80000, \
                                CONFIG_SYS_NAND_BASE + 0xC0000}
 #define CONFIG_SYS_MAX_NAND_DEVICE     4
-#define NAND_MAX_CHIPS         1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND                1
 #define CONFIG_NAND_FSL_ELBC   1

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 6c7a364545ce7a113bb9aeee27fe09869c607e35..f84cc7e9c13c07eef25fc5d3b675f69e8a99182e 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -267,7 +267,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
                                CONFIG_SYS_NAND_BASE + 0x80000,\
                                CONFIG_SYS_NAND_BASE + 0xC0000}
 #define CONFIG_SYS_MAX_NAND_DEVICE    4
-#define NAND_MAX_CHIPS         1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND                1
 #define CONFIG_NAND_FSL_ELBC   1

diff --git a/include/configs/NC650.h b/include/configs/NC650.h
index 423ca71c814c6c2d65e3639b1eb209f87342a818..0b97f0ce666b188b417ff456e3cd562f785eaf2a 100644 (file)
--- a/include/configs/NC650.h
+++ b/include/configs/NC650.h
@@ -250,7 +250,6 @@
  * NAND flash support
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 
 /*-----------------------------------------------------------------------
  * SYPCR - System Protection Control                                   11-9

diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h
index 34de94797c158f50e41f06ba82e9c2954fbf32ce..2d04d89251c18c91b29a7f759d9a0199c89a027a 100644 (file)
--- a/include/configs/NETPHONE.h
+++ b/include/configs/NETPHONE.h
@@ -514,7 +514,6 @@
 #define ADDR_COLUMN_PAGE       3
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
 #define NAND_DISABLE_CE(nand) \

diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index 004b3c8a415bd722f23218bdf825bc9a50d04207..34fdba59c0ac1d909e2ece51928999c7a7e4cae7 100644 (file)
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -633,7 +633,6 @@
 #define ADDR_COLUMN_PAGE       3
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 /* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */
 #define NAND_DISABLE_CE(nand) \

diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h
index 70995faed17526517d3e8d09e757c45fcc582acb..4a2702791285abbc42692f01382567a4b14fdd1c 100644 (file)
--- a/include/configs/NETTA2.h
+++ b/include/configs/NETTA2.h
@@ -515,7 +515,6 @@
 #define ADDR_COLUMN_PAGE       3
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
 #define NAND_DISABLE_CE(nand) \

diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h
index 87c920f421a32984bcf25e3dae06187c5c1e861c..f97bdcb72dd332afacb01a62e805f2fbedcf0f64 100644 (file)
--- a/include/configs/NETVIA.h
+++ b/include/configs/NETVIA.h
@@ -411,7 +411,6 @@
 #define ADDR_COLUMN_PAGE       3
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 #define NAND_DISABLE_CE(nand) \
        do { \

diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 11ce0080f93087850b789228da74d08c07a12dfb..e9f16461ef8d5e68f03e32c03824df0cb4877404 100644 (file)
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -173,7 +173,6 @@
  * NAND-FLASH stuff
  */
 #define CONFIG_SYS_NAND_BASE_LIST      {CONFIG_SYS_NAND_BASE}
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index f9f10021bc2eb6e1ae9650d661087eff9ec38b0c..fc48bc1db65248997f578cc4d2462f66e56699dc 100644 (file)
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -505,7 +505,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1 /* nand driver supports mutipl. chips */
 #define CONFIG_SYS_NAND_QUIET_TEST     1

diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 09a96417f5165a8351461c530b64fa9486799e71..d4322b6bafb8b376767b2c7ca9666356ddb96aa4 100644 (file)
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -224,8 +224,6 @@
 #define NAND_BIG_DELAY_US      25
 #define CONFIG_SYS_MAX_NAND_DEVICE     2       /* Max number of NAND devices */
 
-#define NAND_MAX_CHIPS 1
-
 #define CONFIG_SYS_NAND0_CE  (0x80000000 >> 1)  /* our CE is GPIO1 */
 #define CONFIG_SYS_NAND0_RDY (0x80000000 >> 4)  /* our RDY is GPIO4 */
 #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2)  /* our CLE is GPIO2 */

diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h
index 7fc455b8c918558d95c557673bcb231fc5355d70..9857bf605ce8a7036b272d34b1fc26a451ef222f 100644 (file)
--- a/include/configs/SXNI855T.h
+++ b/include/configs/SXNI855T.h
@@ -206,7 +206,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 /* DFBUSY is available on Port C, bit 12; 0 if busy */
 #define NAND_WAIT_READY(nand)  \

diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h
index 1915a73a609910381396bd6631cd8573fc71f79d..9cac696b981848b4729a102a94d2b6e39c65bf79 100644 (file)
--- a/include/configs/TQM8272.h
+++ b/include/configs/TQM8272.h
@@ -424,7 +424,6 @@
 #define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     4       /* Max number of NAND devices           */
-#define NAND_MAX_CHIPS 1
 
 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \
                             CONFIG_SYS_NAND1_BASE, \

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 6d205a7a142a400da509378cac4dea301177cbe7..f5831ebaffec72efd0091793541fd1d0838c0ba2 100644 (file)
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -363,7 +363,6 @@
 #define CONFIG_SYS_NAND3_BASE          (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     2       /* Max number of NAND devices   */
-#define NAND_MAX_CHIPS         1
 
 #if (CONFIG_SYS_MAX_NAND_DEVICE == 1)
 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE }

diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 0bc2f6889956f6df750f899a589a6d36d40c7a29..83d0d56c1eff9e594e699340bd201103f26946e4 100644 (file)
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -264,7 +264,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define NAND_WAIT_READY(nand)  NF_WaitRB()
 

diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 10ef620d8220d7549dc650bd07cf9d1413e6f43d..f173bcc9be7859f97ac985413b917ffa4bfae712 100644 (file)
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -159,7 +159,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index 01cdf3a6f3b7bc146c3131b1e9dd7a34a45dbcc4..de6e12f5105706d0e0036d21452db813ef3e12c9 100644 (file)
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -147,7 +147,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US      25
 

diff --git a/include/configs/acadia.h b/include/configs/acadia.h
index 52ccdb5b9d3277052a278da2336408aa07c11599..9ffd86b1ac64a11eb841f1f54d381fbba5596e1d 100644 (file)
--- a/include/configs/acadia.h
+++ b/include/configs/acadia.h
@@ -262,7 +262,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips   */
 

diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index d63a1a07fb18c744c02e93932f5c3f510f1d3baf..e996bbd327e68baf2b4767497ac209c395cc1634 100644 (file)
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -97,7 +97,6 @@
 #define DATAFLASH_TCHS                 (0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1

diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 7ce820518e1da41b27cdc39bc1943a51e707f226..e6248e9df7cc961337a7121e6ba6a696774759f6 100644 (file)
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -335,7 +335,6 @@
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     4
-#define NAND_MAX_CHIPS         CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_BASE           0xF0000000      /* NAND FLASH Base Address      */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE + 0, CONFIG_SYS_NAND_BASE + 2,   \
                                  CONFIG_SYS_NAND_BASE + 4, CONFIG_SYS_NAND_BASE + 6 }

diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index b2baf1b34898474103f2939fd12493fd6d74a3d1..f1c5526d67392fd95c625be245a87f19aa41eb76 100644 (file)
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -118,7 +118,6 @@
 #define CONFIG_SYS_MAX_FLASH_BANKS             1
 
 /* NAND flash */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1

diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index c7e83ccfc14e1859986eb73fb2c8ee1f8b67f347..5a980d353e88fbbc4a64262f8216b916071368b0 100644 (file)
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -129,7 +129,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */

diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 15389296f259511a1512b751a0cfc27601462e31..4501cae3c84d53805cb0b08442b00ae50e2a982e 100644 (file)
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -100,7 +100,6 @@
 #define DATAFLASH_TCHS                 (0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1

diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 0016b4fbfb7d2aa6a17daf19ea88d5860b35f6cf..668fe3b08bac7bd1e50a81e2737a6c4a5c1f2c70 100644 (file)
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -111,7 +111,6 @@
 #define DATAFLASH_TCHS                 (0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1

diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index d9ebc87aeacf38c945be93bfd44307021db0f10c..c6603ff1f807c34f8aadc51f93bf2b3aff3f691f 100644 (file)
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -123,7 +123,6 @@
 #endif
 
 /* NAND flash */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1

diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 35fefc4213142e76ebd3e7fb8a8d5f19e8916094..5bef1fe975a18517b721b2ee226e3fa0583feea8 100644 (file)
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -104,7 +104,6 @@
 #define CONFIG_SYS_NO_FLASH                    1
 
 /* NAND flash */
-#define NAND_MAX_CHIPS                 1
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1

diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index f3ffe1ccac4859b4eee67c3c44e8af44ee24b25e..8c4127da085d0c3c86339c5a9b1da7cbcab5f4a6 100644 (file)
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -197,7 +197,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     2
-#define NAND_MAX_CHIPS         CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 }
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips   */

diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 1b54d3b881d0e7ea5fbb32b52ecd535c874340c6..ac5aaa59aed6d636d7459ac023b40571ff7f1e86 100644 (file)
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -278,7 +278,6 @@
 #define ADDR_COLUMN_PAGE       3
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 #define BFIN_NAND_READY                PF3
 
 #define NAND_WAIT_READY(nand)                  \

diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index faf630496dbbad62b5599155610fe2d4102adcc3..d814012c415ee08e952e7397d8eff5b2f18bd902 100644 (file)
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -234,7 +234,6 @@
  * NAND-FLASH related
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips   */
 

diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 2df77cfa7dddfea661592c407cb95196e35110ca..761c0dca397db46226408fefd1eb35356685b057 100644 (file)
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -131,7 +131,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */

diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index 6885b2cbde0110be414ef6fb96f6d8f233571e95..a727f5625e85a9dac38c61fe20f62a41630f0ea9 100644 (file)
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -127,7 +127,6 @@
 #define CONFIG_SYS_NAND_BASE           0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices */
-#define NAND_MAX_CHIPS         1
 #define CONFIG_ENV_OFFSET              0x0     /* Block 0--not used by bootcode */
 #define DEF_BOOTM              ""
 #elif defined(CONFIG_SYS_USE_NOR)

diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 8d7bcf57cc928149893d83f4662a63f57f02363f..22d3808a3d1ce697954bfc11d44633ae13304715 100644 (file)
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -89,7 +89,6 @@
 #define CONFIG_SYS_NAND_BASE           0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices */
-#define NAND_MAX_CHIPS         1
 #define CONFIG_ENV_OFFSET              0x0     /* Block 0--not used by bootcode */
 /*=====================*/
 /* Board related stuff */

diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index e9cd5a6621040807306d5056c5d34103afed3578..875bab6f7dd70759892f5f379201d8077e63b4cf 100644 (file)
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -85,7 +85,6 @@
 #define CONFIG_SYS_NAND_BASE           0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices */
-#define NAND_MAX_CHIPS         1
 #define CONFIG_ENV_OFFSET              0x0     /* Block 0--not used by bootcode */
 /* I2C switch definitions for PCA9543 chip */
 #define CONFIG_SYS_I2C_PCA9543_ADDR            0x70

diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 381eeb7a1f765bc3ef62fb79056f2dd09b2c0f68..47ab27a8701a5143ddc289e4e56730fa82b5ec38 100644 (file)
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -122,7 +122,6 @@
 #define CONFIG_SYS_NAND_BASE           0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices */
-#define NAND_MAX_CHIPS         1
 #define CONFIG_ENV_OFFSET              0x0     /* Block 0--not used by bootcode */
 #define DEF_BOOTM              ""
 #elif defined(CONFIG_SYS_USE_NOR)

diff --git a/include/configs/delta.h b/include/configs/delta.h
index 08b28ca8ac7f3e5809924495c356d76c527ba676..fd97b746f34c29816e6d03a4dcbe608745eeb978 100644 (file)
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -258,7 +258,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 #define CONFIG_SYS_NO_FLASH            1
 

diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index b943f3153b23112a7b548df3d0fe54bdf899f80c..4d3ccf568ba9fbc2fe5d5d43d7f23c6e7d10eeb1 100644 (file)
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -214,7 +214,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips   */
 

diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index dda6597844244062f5a54f44b00d1557f0cee900..fab22d16a745fd0642690bb27382a7014a13a302 100644 (file)
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -120,7 +120,6 @@
  * NAND flash
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE   0x04000000 + (2 << 23)
 #define NAND_ALLOW_ERASE_ALL   1
 

diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index d11868e08b70c92dc2da4f7a742bc841c10e9c3e..92df0b4fdc8c93ff81cec8af5ffd8ae064ccf6c2 100644 (file)
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -163,7 +163,6 @@
 
 #define NAND_ChipID_UNKNOWN 0x00
 #define NAND_MAX_FLOORS     1
-#define NAND_MAX_CHIPS      1
 
 #define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
 #define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)

diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
index 8b7890e2c6b2e8b9bf8fd6d2d912d1d4b2ee37f4..f8aac1aba3ddd453984864444961777cba6667a8 100644 (file)
--- a/include/configs/pdnb3.h
+++ b/include/configs/pdnb3.h
@@ -264,7 +264,6 @@
  * NAND-FLASH stuff
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           0x51000000      /* NAND FLASH Base Address      */
 #endif
 

diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
index 0f7fca38d512a1179e1981b2a607a3f402b91800..3ea854becfd72ac960c502e94f849233135b5c6f 100644 (file)
--- a/include/configs/quad100hd.h
+++ b/include/configs/quad100hd.h
@@ -224,7 +224,6 @@
 #define CONFIG_SYS_NAND_CE     24   /* our CE is GPIO24  */
 #define CONFIG_SYS_NAND_CLE    31   /* our CLE is GPIO31 */
 #define CONFIG_SYS_NAND_ALE    30   /* our ALE is GPIO30 */
-#define NAND_MAX_CHIPS 1
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #endif
 

diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
index d7a6ae46c5b5a66e631900a9604f924d4f75463b..bf4a14e00489fe3e5ca313350420ed1545498374 100644 (file)
--- a/include/configs/sbc2410x.h
+++ b/include/configs/sbc2410x.h
@@ -209,7 +209,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define NAND_WAIT_READY(nand)  NF_WaitRB()
 #define NAND_DISABLE_CE(nand)  NF_SetCE(NFCE_HIGH)

diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index d152a9670d0f9cc2dbecf567ded2bde42d5298bd..515b09789e73ca297113a6a9dc8ef4bafbefd336 100644 (file)
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -424,7 +424,6 @@ extern unsigned long offsetOfEnvironment;
  * NAND-FLASH stuff
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           0x77D00000
 
 

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 9321bdc07b88fceee4df6841997b5943661e7251..a3e2fcef44404ce710c30a6fb86e7d2257ff4d40 100644 (file)
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -373,7 +373,6 @@
  * NAND FLASH
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips */
 

diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h
index 1784cc622ce38c310428223f9fc7674f27749663..57c82d1a1652b890905c99f902f6ff99f846b5cd 100644 (file)
--- a/include/configs/smdk6400.h
+++ b/include/configs/smdk6400.h
@@ -227,7 +227,6 @@
 /* NAND configuration */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x70200010
-#define NAND_MAX_CHIPS         1
 #define CONFIG_SYS_S3C_NAND_HWECC
 
 #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1  /* ".i" read skips bad blocks              */

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index cbf04e3f2d2934f8f3a01fe61ff3d598744e5282..becd13eace3fc55c8fb024e08ec7918edff58c22 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -186,7 +186,6 @@
 
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_FPGA_BASE + 0x70)
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define NAND_MAX_CHIPS         1
 #define CONFIG_CMD_NAND
 
 /* LIME GDC */

diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index bc078cf3762b99497826b7097fb76df7f2ef170a..5a5f7728f58c21ff1adeb93c509c6759c748857c 100644 (file)
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -464,7 +464,6 @@
 #define ADDR_COLUMN_PAGE       3
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 /* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */
 #define NAND_DISABLE_CE(nand) \

diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 53397d807f7d88925ad1ca3589885daf77f92fcd..f30eca1d248ce3efd5256a3913a73be6044933fb 100644 (file)
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -227,7 +227,6 @@
 
 #define NAND_ChipID_UNKNOWN    0x00
 #define NAND_MAX_FLOORS                1
-#define NAND_MAX_CHIPS         1
 
 #define CONFIG_SYS_NO_FLASH            1
 

diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index abf8f1a7e8680a9db5750a7b7ddb1480b972f058..7db25465df1a4a5c06b2ef0ead78d778cfbaad85 100644 (file)
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -18,8 +18,8 @@
 #define __LINUX_MTD_BBM_H
 
 /* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS         8
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS      1
 #endif
 
 /**
@@ -48,10 +48,10 @@
  */
 struct nand_bbt_descr {
        int options;
-       int pages[NAND_MAX_CHIPS];
+       int pages[CONFIG_SYS_NAND_MAX_CHIPS];
        int offs;
        int veroffs;
-       uint8_t version[NAND_MAX_CHIPS];
+       uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS];
        int len;
        int maxblocks;
        int reserved_block_code;

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 24ad2bdaa1883f46a815816f1686a3b4664ea61b..a4ad5711d6c662597f384385986819546c8edbb3 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -46,11 +46,6 @@ extern void nand_release (struct mtd_info *mtd);
 /* Internal helper for board drivers which need to override command function */
 extern void nand_wait_ready(struct mtd_info *mtd);
 
-/* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS         8
-#endif
-
 /* This constant declares the max. oobsize / page, which
  * is supported now. If you add a chip with bigger oobsize/page
  * adjust this accordingly.
@@ -477,10 +472,6 @@ struct nand_manufacturers {
 extern struct nand_flash_dev nand_flash_ids[];
 extern struct nand_manufacturers nand_manuf_ids[];
 
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS 8
-#endif
-
 extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
 extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs);
 extern int nand_default_bbt(struct mtd_info *mtd);

diff --git a/include/linux/mtd/nand_legacy.h b/include/linux/mtd/nand_legacy.h
index 99eafbbcdccde31e808984ac746adc33bda5edb9..43344481462198f360b408135652591f2d78fdfc 100644 (file)
--- a/include/linux/mtd/nand_legacy.h
+++ b/include/linux/mtd/nand_legacy.h
@@ -40,6 +40,11 @@
 #error This module is for the legacy NAND support
 #endif
 
+/* The maximum number of NAND chips in an array */
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS      1
+#endif
+
 /*
  * Standard NAND flash commands
  */