ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk
authorDipen Dudhat <dipen.dudhat@freescale.com>
Tue, 1 Sep 2009 11:57:00 +0000 (17:27 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 8 Sep 2009 14:10:02 +0000 (09:10 -0500)
Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
platform define.  This will enable all the 85xx platforms to use sdhc_clk
based on CONFIG_FSL_ESDHC.

Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cpu/mpc85xx/speed.c

index 3ef49b456fbbf460e3cbb1bde95133453a506bfb..2fdcefb219c92e5136496d293fa6b867f35a6942 100644 (file)
@@ -153,7 +153,7 @@ int get_clocks (void)
 #endif
        gd->i2c2_clk = gd->i2c1_clk;
 
-#if defined(CONFIG_MPC8536)
+#if defined(CONFIG_FSL_ESDHC)
        gd->sdhc_clk = gd->bus_clk / 2;
 #endif