static bool __init
ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data)
{
-@@ -392,6 +410,8 @@ void __init ath79_register_wmac(u8 *cal_
+@@ -392,6 +412,8 @@ void __init ath79_register_wmac(u8 *cal_
qca953x_wmac_setup();
else if (soc_is_qca955x())
qca955x_wmac_setup();
static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
{
-@@ -149,8 +151,7 @@ static void ar934x_ip2_irq_init(void)
+@@ -150,8 +152,7 @@ static void ar934x_ip2_irq_init(void)
for (i = ATH79_IP2_IRQ_BASE;
i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
}
-@@ -182,7 +183,7 @@ static void qca953x_irq_init(void)
+@@ -183,7 +184,7 @@ static void qca953x_irq_init(void)
for (i = ATH79_IP2_IRQ_BASE;
i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch);
}
-@@ -256,15 +257,13 @@ static void qca955x_irq_init(void)
+@@ -257,15 +258,13 @@ static void qca955x_irq_init(void)
for (i = ATH79_IP2_IRQ_BASE;
i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);
}
-@@ -345,13 +344,13 @@ static void qca956x_irq_init(void)
+@@ -346,13 +345,13 @@ static void qca956x_irq_init(void)
for (i = ATH79_IP2_IRQ_BASE;
i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch);
-@@ -466,8 +465,35 @@ static void qca953x_ip3_handler(void)
+@@ -467,8 +466,35 @@ static void qca953x_ip3_handler(void)
do_IRQ(ATH79_CPU_IRQ(3));
}
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
-@@ -398,6 +398,11 @@ void __init ath79_wmac_set_ext_lna_gpio(
+@@ -400,6 +400,11 @@ void __init ath79_wmac_set_ext_lna_gpio(
ar934x_set_ext_lna_gpio(chain, gpio);
}
static void __ath79_gpio_set_value(unsigned gpio, int value)
{
void __iomem *base = ath79_gpio_base;
-@@ -233,6 +245,132 @@ void __init ath79_gpio_output_select(uns
+@@ -235,6 +247,132 @@ void __init ath79_gpio_output_select(uns
spin_unlock_irqrestore(&ath79_gpio_lock, flags);
}
void __init ath79_gpio_init(void)
{
int err;
-@@ -269,6 +407,10 @@ void __init ath79_gpio_init(void)
+@@ -271,6 +409,10 @@ void __init ath79_gpio_init(void)
err = gpiochip_add(&ath79_gpio_chip);
if (err)
panic("cannot add AR71xx GPIO chip, error=%d", err);
}
int gpio_get_value(unsigned gpio)
-@@ -291,14 +433,22 @@ EXPORT_SYMBOL(gpio_set_value);
+@@ -293,14 +435,22 @@ EXPORT_SYMBOL(gpio_set_value);
int gpio_to_irq(unsigned gpio)
{
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
-@@ -221,15 +221,30 @@ void __init ath79_gpio_output_select(uns
+@@ -223,15 +223,30 @@ void __init ath79_gpio_output_select(uns
{
void __iomem *base = ath79_gpio_base;
unsigned long flags;
spin_lock_irqsave(&ath79_gpio_lock, flags);
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -868,6 +868,14 @@
+@@ -875,6 +875,14 @@
#define QCA953X_GPIO_OUT_MUX_LED_LINK4 44
#define QCA953X_GPIO_OUT_MUX_LED_LINK5 45
#define QCA956X_GPIO_REG_OUT_FUNC0 0x2c
#define QCA956X_GPIO_REG_OUT_FUNC1 0x30
#define QCA956X_GPIO_REG_OUT_FUNC2 0x34
-@@ -1007,6 +1015,8 @@
+@@ -1014,6 +1022,8 @@
#define AR934X_GPIO_OUT_EXT_LNA0 46
#define AR934X_GPIO_OUT_EXT_LNA1 47
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -1098,5 +1098,11 @@
-
+@@ -1105,5 +1105,11 @@
+
#define QCA955X_ETH_CFG_RGMII_EN BIT(0)
#define QCA955X_ETH_CFG_GE0_SGMII BIT(6)
+#define QCA955X_ETH_CFG_RXD_DELAY BIT(14)
+#define QCA955X_ETH_CFG_RDV_DELAY BIT(16)
+#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3
+#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16
-
+
#endif /* __ASM_MACH_AR71XX_REGS_H */
void ath79_gpio_init(void);
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
-@@ -193,6 +193,36 @@ static void __iomem *ath79_gpio_get_func
+@@ -195,6 +195,36 @@ static void __iomem *ath79_gpio_get_func
return ath79_gpio_base + reg;
}
void __iomem *reg = ath79_gpio_get_function_reg();
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -840,6 +840,7 @@
+@@ -847,6 +847,7 @@
#define AR71XX_GPIO_REG_INT_PENDING 0x20
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
#define AR71XX_GPIO_REG_FUNC 0x28
#define AR934X_GPIO_REG_OUT_FUNC0 0x2c
#define AR934X_GPIO_REG_OUT_FUNC1 0x30
-@@ -964,6 +965,8 @@
+@@ -971,6 +972,8 @@
#define AR724X_GPIO_FUNC_UART_EN BIT(1)
#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)