arm: dts: ls1088ardb: add DPMAC and PHY nodes
authorIoana Ciornei <ioana.ciornei@nxp.com>
Wed, 18 Mar 2020 14:47:46 +0000 (16:47 +0200)
committerPriyanka Jain <priyanka.jain@nxp.com>
Wed, 29 Apr 2020 05:40:54 +0000 (11:10 +0530)
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.

Also, annotate the external MDIO nodes and describe the PHYs (8 x
VSC8514, AQR105). Also, add phy-handles for the dpmacs to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/dts/fsl-ls1088a-rdb.dts
arch/arm/dts/fsl-ls1088a.dtsi

index 0fe351973dc5987f669949d09987b0a144de8e31..46a5780547fe7439387ae00fa2f1e43b9be78877 100644 (file)
        };
 };
 
+&dpmac1 {
+       status = "okay";
+       phy-connection-type = "xgmii";
+};
+
+&dpmac2 {
+       status = "okay";
+       phy-handle = <&mdio2_phy1>;
+       phy-connection-type = "xgmii";
+};
+
+&dpmac3 {
+       status = "okay";
+       phy-handle = <&mdio1_phy5>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac4 {
+       status = "okay";
+       phy-handle = <&mdio1_phy6>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac5 {
+       status = "okay";
+       phy-handle = <&mdio1_phy7>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac6 {
+       status = "okay";
+       phy-handle = <&mdio1_phy8>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac7 {
+       status = "okay";
+       phy-handle = <&mdio1_phy1>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac8 {
+       status = "okay";
+       phy-handle = <&mdio1_phy2>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac9 {
+       status = "okay";
+       phy-handle = <&mdio1_phy3>;
+       phy-connection-type = "qsgmii";
+};
+
+&dpmac10 {
+       status = "okay";
+       phy-handle = <&mdio1_phy4>;
+       phy-connection-type = "qsgmii";
+};
+
+&emdio1 {
+       status = "okay";
+
+       /* Freescale F104 PHY1 */
+       mdio1_phy1: emdio1_phy@1 {
+               reg = <0x1c>;
+               };
+       mdio1_phy2: emdio1_phy@2 {
+               reg = <0x1d>;
+               };
+       mdio1_phy3: emdio1_phy@3 {
+               reg = <0x1e>;
+               };
+       mdio1_phy4: emdio1_phy@4 {
+               reg = <0x1f>;
+       };
+
+       /* F104 PHY2 */
+       mdio1_phy5: emdio1_phy@5 {
+               reg = <0x0c>;
+       };
+       mdio1_phy6: emdio1_phy@6 {
+               reg = <0x0d>;
+       };
+       mdio1_phy7: emdio1_phy@7 {
+               reg = <0x0e>;
+       };
+       mdio1_phy8: emdio1_phy@8 {
+               reg = <0x0f>;
+       };
+};
+
+&emdio2 {
+       status = "okay";
+
+       /* Aquantia AQR105 10G PHY */
+       mdio2_phy1: emdio2_phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c45";
+               interrupts = <0 2 0x4>;
+               reg = <0x0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
        u-boot,dm-pre-reloc;
index 314961685070430e524d15268fc5e99d86502415..133cacb93e39c1ae516de257aa7724675dacb359 100644 (file)
                interrupts = <0 32 0x1>; /* edge triggered */
        };
 
-       fsl_mc: fsl-mc@80c000000 {
-               compatible = "fsl,qoriq-mc";
-               reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
-                     <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
-       };
-
        dspi: dspi@2100000 {
                compatible = "fsl,vf610-dspi";
                #address-cells = <1>;
                method = "smc";
        };
 
+       fsl_mc: fsl-mc@80c000000 {
+               compatible = "fsl,qoriq-mc", "simple-mfd";
+               reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
+                     <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
+               #address-cells = <3>;
+               #size-cells = <1>;
+
+               /*
+                * Region type 0x0 - MC portals
+                * Region type 0x1 - QBMAN portals
+                */
+               ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
+                         0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
+
+               dpmacs {
+                       compatible = "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       dpmac1: dpmac@1 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x1>;
+                               status = "disabled";
+                       };
+
+                       dpmac2: dpmac@2 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x2>;
+                               status = "disabled";
+                       };
+
+                       dpmac3: dpmac@3 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x3>;
+                               status = "disabled";
+                       };
+
+                       dpmac4: dpmac@4 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x4>;
+                               status = "disabled";
+                       };
+
+                       dpmac5: dpmac@5 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x5>;
+                               status = "disabled";
+                       };
+
+                       dpmac6: dpmac@6 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x6>;
+                               status = "disabled";
+                       };
+
+                       dpmac7: dpmac@7 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x7>;
+                               status = "disabled";
+                       };
+
+                       dpmac8: dpmac@8 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x8>;
+                               status = "disabled";
+                       };
+
+                       dpmac9: dpmac@9 {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0x9>;
+                               status = "disabled";
+                       };
+
+                       dpmac10: dpmac@a {
+                               compatible = "fsl,qoriq-mc-dpmac";
+                               reg = <0xa>;
+                               status = "disabled";
+                       };
+               };
+       };
+
        emdio1: mdio@8B96000 {
                compatible = "fsl,ls-mdio";
                reg = <0x0 0x8B96000 0x0 0x1000>;