arm: dts: socfpga: enables i2c0 in socfpga_de0_nano

Add all the appropriate i2c alias in the base socfpga dtsi and enables
the i2c node on the DE0 NANO board.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 7557aa01e564b5160ab8caf692508990de570f49..f34dd9db97b6776e34cd38a081321405b6b0c03c 100644 (file)
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -14,6 +14,10 @@
        aliases {
                ethernet0 = &gmac0;
                ethernet1 = &gmac1;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
                serial0 = &uart0;
                serial1 = &uart1;
                timer0 = &timer0;

diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
index dc09bed9019a0b03fc43f60743474fcd9447bb29..5e7fe2aa5fc90f0524d9d032a87d55bbc15ba2e6 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
+++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
@@ -56,6 +56,18 @@
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+
+       dxl345: adxl345@0 {
+               compatible = "adi,adxl345";
+               reg = <0x53>;
+
+               interrupt-parent = <&portc>;
+               interrupts = <3 2>;
+       };
+};
+
 &mmc0 {
        status = "okay";
        u-boot,dm-pre-reloc;