The dram initialization sequence should be in order.
This patch add mb for the dram intialization code to make
sure the compiler do not disorder the code.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
#endif
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
extern inline void _insb(volatile u8 * port, void *buf, int ns)
{
u8 *data = (u8 *) buf;
#include <common.h>
#include <asm/immap.h>
#include <netdev.h>
+#include <asm/io.h>
int checkboard(void)
{
__asm__("nop");
mbar_writeLong(MCFSIM_DACR0, 0x0000322c);
+ mb();
__asm__("nop");
/* Write to this block to initiate precharge */
*(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
+ mb();
__asm__("nop");
/* Set RE bit in DACR */
__asm__("nop");
*(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
+ mb();
}
return dramsize;