fsl: csu: add an API to set R/W permission to PCIe
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Tue, 2 Aug 2016 11:03:26 +0000 (19:03 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 14 Sep 2016 21:07:08 +0000 (14:07 -0700)
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
board/freescale/common/ns_access.c
include/fsl_csu.h

index db76066c8078f1aef342b46399a5a8e97129bfca..f46f1d866abf0974bf541fb3acd10e4f317a5aa7 100644 (file)
@@ -6,6 +6,7 @@
 
 #ifndef __FSL_NS_ACCESS_H_
 #define __FSL_NS_ACCESS_H_
+#include <fsl_csu.h>
 
 enum csu_cslx_ind {
        CSU_CSLX_PCIE2_IO = 0,
index c3d7a5e9076a7c4b83dce09ea4213d6ae5e15e68..81c921122e8f65053e7e581426fc8083a62b44e1 100644 (file)
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <fsl_csu.h>
 #include <asm/arch/ns_access.h>
+#include <asm/arch/fsl_serdes.h>
 
 void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
 {
@@ -40,3 +41,30 @@ void enable_layerscape_ns_access(void)
 {
        enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
 }
+
+void set_pcie_ns_access(int pcie, u16 val)
+{
+       switch (pcie) {
+#ifdef CONFIG_PCIE1
+       case PCIE1:
+               set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], val);
+               set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], val);
+               return;
+#endif
+#ifdef CONFIG_PCIE2
+       case PCIE2:
+               set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], val);
+               set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], val);
+               return;
+#endif
+#ifdef CONFIG_PCIE3
+       case PCIE3:
+               set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], val);
+               set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], val);
+               return;
+#endif
+       default:
+               debug("The PCIE%d doesn't exist!\n", pcie);
+               return;
+       }
+}
index 57a99859ee1526ab69f0652a87b9be1f9b12bd75..8582ac0774117a07f8fd023efe78964c363850ca 100644 (file)
@@ -31,5 +31,6 @@ struct csu_ns_dev {
 
 void enable_layerscape_ns_access(void);
 void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
+void set_pcie_ns_access(int pcie, u16 val);
 
 #endif