bcm68360: add initial support

This add the initial support of the broadcom bcm68360 SoC family.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 78cc79a235f3972a025d48dd1fafe477a5f00e0c..94a649f933c801a640c310cb6e956bd1ef431b13 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -633,6 +633,12 @@ config ARCH_BCM63158
        select OF_CONTROL
        imply CMD_DM
 
+config ARCH_BCM68360
+       bool "Broadcom BCM68360 family"
+       select DM
+       select OF_CONTROL
+       imply CMD_DM
+
 config ARCH_BCM6858
        bool "Broadcom BCM6858 family"
        select DM

diff --git a/arch/arm/dts/bcm68360.dtsi b/arch/arm/dts/bcm68360.dtsi
new file mode 100644 (file)
index 0000000..7bbe207
--- /dev/null
+++ b/arch/arm/dts/bcm68360.dtsi
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include "skeleton64.dtsi"
+
+/ {
+       compatible = "brcm,bcm68360";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       aliases {
+               spi0 = &hsspi;
+       };
+
+       cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+               u-boot,dm-pre-reloc;
+
+               cpu0: cpu@0 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0x0 0x0>;
+                       next-level-cache = <&l2>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               cpu1: cpu@1 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0x0 0x1>;
+                       next-level-cache = <&l2>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               l2: l2-cache0 {
+                       compatible = "cache";
+                       u-boot,dm-pre-reloc;
+               };
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               u-boot,dm-pre-reloc;
+
+               periph_osc: periph-osc {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-factor-clock";
+                       #clock-cells = <0>;
+                       clocks = <&periph_osc>;
+                       clock-mult = <2>;
+                       clock-div = <1>;
+               };
+
+               refclk50mhz: refclk50mhz {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <50000000>;
+               };
+       };
+
+       ubus {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               u-boot,dm-pre-reloc;
+
+               wdt1: watchdog@ff800480 {
+                       compatible = "brcm,bcm6345-wdt";
+                       reg = <0x0 0xff800480 0x0 0x14>;
+                       clocks = <&refclk50mhz>;
+               };
+
+               wdt2: watchdog@ff8004c0 {
+                       compatible = "brcm,bcm6345-wdt";
+                       reg = <0x0 0xff8004c0 0x0 0x14>;
+                       clocks = <&refclk50mhz>;
+               };
+
+               wdt-reboot {
+                       compatible = "wdt-reboot";
+                       wdt = <&wdt1>;
+               };
+
+               uart0: serial@ff800640 {
+                       compatible = "brcm,bcm6345-uart";
+                       reg = <0x0 0xff800640 0x0 0x18>;
+                       clocks = <&periph_osc>;
+
+                       status = "disabled";
+               };
+
+               leds: led-controller@ff800800 {
+                       compatible = "brcm,bcm6858-leds";
+                       reg = <0x0 0xff800800 0x0 0xe4>;
+
+                       status = "disabled";
+               };
+
+               gpio0: gpio-controller@0xff800500 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff800500 0x0 0x4>,
+                             <0x0 0xff800520 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio1: gpio-controller@0xff800504 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff800504 0x0 0x4>,
+                             <0x0 0xff800524 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio2: gpio-controller@0xff800508 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff800508 0x0 0x4>,
+                             <0x0 0xff800528 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio3: gpio-controller@0xff80050c {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff80050c 0x0 0x4>,
+                             <0x0 0xff80052c 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio4: gpio-controller@0xff800510 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff800510 0x0 0x4>,
+                             <0x0 0xff800530 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio5: gpio-controller@0xff800514 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff800514 0x0 0x4>,
+                             <0x0 0xff800534 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio6: gpio-controller@0xff800518 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff800518 0x0 0x4>,
+                             <0x0 0xff800538 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               gpio7: gpio-controller@0xff80051c {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x0 0xff80051c 0x0 0x4>,
+                             <0x0 0xff80053c 0x0 0x4>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       status = "disabled";
+               };
+
+               hsspi: spi-controller@ff801000 {
+                       compatible = "brcm,bcm6328-hsspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0xff801000 0x0 0x600>;
+                       clocks = <&hsspi_pll>, <&hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       spi-max-frequency = <100000000>;
+                       num-cs = <8>;
+
+                       status = "disabled";
+               };
+
+               nand: nand-controller@ff801800 {
+                       compatible = "brcm,nand-bcm68360",
+                                    "brcm,brcmnand-v5.0",
+                                    "brcm,brcmnand";
+                       reg-names = "nand", "nand-int-base", "nand-cache";
+                       reg = <0x0 0xff801800 0x0 0x180>,
+                             <0x0 0xff802000 0x0 0x10>,
+                             <0x0 0xff801c00 0x0 0x200>;
+                       parameter-page-big-endian = <0>;
+
+                       status = "disabled";
+               };
+       };
+};