ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data
authorSimon Glass <sjg@chromium.org>
Thu, 13 Dec 2012 20:48:49 +0000 (20:48 +0000)
committerTom Rini <trini@ti.com>
Mon, 4 Feb 2013 14:05:42 +0000 (09:05 -0500)
Move these fields into arch_global_data and tidy up. This is needed for
both ppc and m68k since they share the i2c driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
12 files changed:
arch/m68k/cpu/mcf5227x/speed.c
arch/m68k/cpu/mcf523x/speed.c
arch/m68k/cpu/mcf52x2/speed.c
arch/m68k/cpu/mcf532x/speed.c
arch/m68k/cpu/mcf5445x/speed.c
arch/m68k/cpu/mcf547x_8x/speed.c
arch/m68k/include/asm/global_data.h
arch/powerpc/cpu/mpc83xx/speed.c
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/cpu/mpc86xx/speed.c
arch/powerpc/include/asm/global_data.h
drivers/i2c/fsl_i2c.c

index b94a9eda48266e30e6d4bab3bcb9a81bd589ac27..c1d59309ff3617c0416975721d414ffe1aa39759 100644 (file)
@@ -135,7 +135,7 @@ int get_clocks(void)
        }
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #endif
 
        return (0);
index e2a6ae3a58fd5a9a0ce96b5afaba8a07aa490ad6..ae462579e27d61d147d9d18eb6995794b817a721 100644 (file)
@@ -48,7 +48,7 @@ int get_clocks(void)
        gd->cpu_clk = (gd->bus_clk * 2);
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #endif
 
        return (0);
index 70abed25c4171fa4f7eae52bfed05eb007a39d1a..ba7dbaa1cfc34a1cd4bb3dad218d1deec893e6e2 100644 (file)
@@ -91,9 +91,9 @@ int get_clocks (void)
 #endif
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #ifdef CONFIG_SYS_I2C2_OFFSET
-       gd->i2c2_clk = gd->bus_clk;
+       gd->arch.i2c2_clk = gd->bus_clk;
 #endif
 #endif
 
index cfdcc8b80770d1062d3282e4334531ab2d40886d..8efb451dc133b8659873cc84d3f4b7324e90eec9 100644 (file)
@@ -271,7 +271,7 @@ int get_clocks(void)
        gd->cpu_clk = (gd->bus_clk * 3);
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #endif
 
        return (0);
index 55d1c488a317f5e11e803fb2a2a2f7901062c93d..b7dbc65988d52fcbcd60a383d24aa2473a7beeef 100644 (file)
@@ -274,7 +274,7 @@ void setup_5445x_clocks(void)
        }
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #endif
 }
 #endif
@@ -290,7 +290,7 @@ int get_clocks(void)
 #endif
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #endif
 
        return (0);
index 31130b54115203dfc262aafba2948ed8275934a3..41aae9d9eb27c51ed3da1629683a8df2a6e89868 100644 (file)
@@ -41,7 +41,7 @@ int get_clocks(void)
        gd->cpu_clk = (gd->bus_clk * 2);
 
 #ifdef CONFIG_FSL_I2C
-       gd->i2c1_clk = gd->bus_clk;
+       gd->arch.i2c1_clk = gd->bus_clk;
 #endif
 
        return (0);
index fd8aacb5c8fd067f1eb2fbc42cb89db7822aee22..d9be8b121dd21bf2490d91c3a94dda6e6f2ffa32 100644 (file)
 
 /* Architecture-specific global data */
 struct arch_global_data {
+#ifdef CONFIG_FSL_I2C
+       unsigned long   i2c1_clk;
+       unsigned long   i2c2_clk;
+#endif
 };
 
 /*
@@ -49,10 +53,6 @@ typedef      struct  global_data {
        unsigned long   inp_clk;
        unsigned long   vco_clk;
        unsigned long   flb_clk;
-#endif
-#ifdef CONFIG_FSL_I2C
-       unsigned long   i2c1_clk;
-       unsigned long   i2c2_clk;
 #endif
        phys_size_t     ram_size;       /* RAM size */
        unsigned long   reloc_off;      /* Relocation Offset */
index 7f98ee855807d4acc7bfbb70909cee13c424f341..a40a0552f5ec3be53c2937262367aabffe94e7c1 100644 (file)
@@ -481,9 +481,9 @@ int get_clocks(void)
        gd->sdhc_clk = sdhc_clk;
 #endif
        gd->arch.core_clk = core_clk;
-       gd->i2c1_clk = i2c1_clk;
+       gd->arch.i2c1_clk = i2c1_clk;
 #if !defined(CONFIG_MPC832x)
-       gd->i2c2_clk = i2c2_clk;
+       gd->arch.i2c2_clk = i2c2_clk;
 #endif
 #if !defined(CONFIG_MPC8309)
        gd->arch.enc_clk = enc_clk;
@@ -558,9 +558,11 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        printf("  SEC:                 %-4s MHz\n",
               strmhz(buf, gd->arch.enc_clk));
 #endif
-       printf("  I2C1:                %-4s MHz\n", strmhz(buf, gd->i2c1_clk));
+       printf("  I2C1:                %-4s MHz\n",
+              strmhz(buf, gd->arch.i2c1_clk));
 #if !defined(CONFIG_MPC832x)
-       printf("  I2C2:                %-4s MHz\n", strmhz(buf, gd->i2c2_clk));
+       printf("  I2C2:                %-4s MHz\n",
+              strmhz(buf, gd->arch.i2c2_clk));
 #endif
 #if defined(CONFIG_MPC8315)
        printf("  TDM:                 %-4s MHz\n",
index f3132fbd3666db59a3a3720ae885cb0460d7ad86..81c80e70952506f81f785fcadebc796667111638 100644 (file)
@@ -406,7 +406,7 @@ int get_clocks (void)
         */
 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
        defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
-       gd->i2c1_clk = sys_info.freqSystemBus;
+       gd->arch.i2c1_clk = sys_info.freqSystemBus;
 #elif defined(CONFIG_MPC8544)
        /*
         * On the 8544, the I2C clock is the same as the SEC clock.  This can be
@@ -416,14 +416,14 @@ int get_clocks (void)
         * PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
         */
        if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
-               gd->i2c1_clk = sys_info.freqSystemBus / 3;
+               gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
        else
-               gd->i2c1_clk = sys_info.freqSystemBus / 2;
+               gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
 #else
        /* Most 85xx SOCs use CCB/2, so this is the default behavior. */
-       gd->i2c1_clk = sys_info.freqSystemBus / 2;
+       gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
 #endif
-       gd->i2c2_clk = gd->i2c1_clk;
+       gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
 #if defined(CONFIG_FSL_ESDHC)
 #if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
index e5798eebec6ea9511284c7be2a83c6f016229357..18c1eea0c1ae1b7242051da35170a26e3044eac5 100644 (file)
@@ -130,11 +130,11 @@ int get_clocks(void)
         * AN2919.
         */
 #ifdef CONFIG_MPC8610
-       gd->i2c1_clk = sys_info.freqSystemBus;
+       gd->arch.i2c1_clk = sys_info.freqSystemBus;
 #else
-       gd->i2c1_clk = sys_info.freqSystemBus / 2;
+       gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
 #endif
-       gd->i2c2_clk = gd->i2c1_clk;
+       gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
        if (gd->cpu_clk != 0)
                return 0;
index d924673c18b2b6a4e4755e9fb5608f9e900aec3b..b710f25fc25e0dc09eda9c679c56a6085dd5736e 100644 (file)
@@ -80,6 +80,11 @@ struct arch_global_data {
        u32 lbc_clk;
        void *cpu;
 #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
+               defined(CONFIG_MPC86xx)
+       u32 i2c1_clk;
+       u32 i2c2_clk;
+#endif
 };
 
 /*
@@ -102,10 +107,6 @@ typedef    struct  global_data {
 #if defined(CONFIG_FSL_ESDHC)
        u32 sdhc_clk;
 #endif
-#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
-       u32 i2c1_clk;
-       u32 i2c2_clk;
-#endif
 #if defined(CONFIG_QE)
        u32 qe_clk;
        uint mp_alloc_base;
index 3cb232fdd110c44ab391e38252b707a89c565fa2..1c7265d897eea8f97fbd6254e3da4208ec7a3560 100644 (file)
@@ -217,9 +217,9 @@ static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
 static unsigned int get_i2c_clock(int bus)
 {
        if (bus)
-               return gd->i2c2_clk;    /* I2C2 clock */
+               return gd->arch.i2c2_clk;       /* I2C2 clock */
        else
-               return gd->i2c1_clk;    /* I2C1 clock */
+               return gd->arch.i2c1_clk;       /* I2C1 clock */
 }
 
 void
@@ -468,7 +468,8 @@ int i2c_set_bus_num(unsigned int bus)
 
 int i2c_set_bus_speed(unsigned int speed)
 {
-       unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
+       unsigned int i2c_clk = (i2c_bus_num == 1)
+                       ? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
 
        writeb(0, &i2c_dev[i2c_bus_num]->cr);           /* stop controller */
        i2c_bus_speed[i2c_bus_num] =