-LINUX_VERSION-5.15 = .151
-LINUX_KERNEL_HASH-5.15.151 = 949bf930704cb794e0d282b68cee48e6430a15e865b39a184ce052b3cb1305a9
+LINUX_VERSION-5.15 = .156
+LINUX_KERNEL_HASH-5.15.156 = 9623674a3a866a0d1d81808f973a8528ecdc4d36ec12bcdbe5149bbee51f6390
DEPENDS:=+kmod-fs-nfs-common +kmod-fs-exportfs +kmod-fs-nfs-common-rpcsec
KCONFIG:= \
CONFIG_NFSD \
+ CONFIG_NFSD_V2=n \
CONFIG_NFSD_V4=y \
CONFIG_NFSD_V4_SECURITY_LABEL=n \
CONFIG_NFSD_BLOCKLAYOUT=n \
--- a/kernel/bounds.c
+++ b/kernel/bounds.c
@@ -22,6 +22,11 @@ int main(void)
- DEFINE(NR_CPUS_BITS, ilog2(CONFIG_NR_CPUS));
+ DEFINE(NR_CPUS_BITS, bits_per(CONFIG_NR_CPUS));
#endif
DEFINE(SPINLOCK_SIZE, sizeof(spinlock_t));
+#ifdef CONFIG_LRU_GEN
get_scan_count(lruvec, sc, nr);
/* Record the original scan target for proportional adjustments later */
-@@ -3372,6 +4142,9 @@ static void snapshot_refaults(struct mem
+@@ -3375,6 +4145,9 @@ static void snapshot_refaults(struct mem
struct lruvec *target_lruvec;
unsigned long refaults;
target_lruvec = mem_cgroup_lruvec(target_memcg, pgdat);
refaults = lruvec_page_state(target_lruvec, WORKINGSET_ACTIVATE_ANON);
target_lruvec->refaults[0] = refaults;
-@@ -3736,12 +4509,16 @@ unsigned long try_to_free_mem_cgroup_pag
+@@ -3739,12 +4512,16 @@ unsigned long try_to_free_mem_cgroup_pag
}
#endif
if (!can_age_anon_pages(pgdat, sc))
return;
-@@ -4058,12 +4835,11 @@ restart:
+@@ -4061,12 +4838,11 @@ restart:
sc.may_swap = !nr_boost_reclaim;
/*
--- a/fs/exec.c
+++ b/fs/exec.c
-@@ -1013,6 +1013,7 @@ static int exec_mmap(struct mm_struct *m
+@@ -1014,6 +1014,7 @@ static int exec_mmap(struct mm_struct *m
active_mm = tsk->active_mm;
tsk->active_mm = mm;
tsk->mm = mm;
/*
* This prevents preemption while active_mm is being loaded and
* it and mm are being updated, which could cause problems for
-@@ -1028,6 +1029,7 @@ static int exec_mmap(struct mm_struct *m
+@@ -1029,6 +1030,7 @@ static int exec_mmap(struct mm_struct *m
tsk->mm->vmacache_seqnum = 0;
vmacache_flush(tsk);
task_unlock(tsk);
--- a/fs/exec.c
+++ b/fs/exec.c
-@@ -1013,7 +1013,6 @@ static int exec_mmap(struct mm_struct *m
+@@ -1014,7 +1014,6 @@ static int exec_mmap(struct mm_struct *m
active_mm = tsk->active_mm;
tsk->active_mm = mm;
tsk->mm = mm;
/*
* This prevents preemption while active_mm is being loaded and
* it and mm are being updated, which could cause problems for
-@@ -1028,6 +1027,7 @@ static int exec_mmap(struct mm_struct *m
+@@ -1029,6 +1028,7 @@ static int exec_mmap(struct mm_struct *m
local_irq_enable();
tsk->mm->vmacache_seqnum = 0;
vmacache_flush(tsk);
static void mem_cgroup_css_free(struct cgroup_subsys_state *css)
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
-@@ -7661,6 +7661,7 @@ static void __init free_area_init_node(i
+@@ -7663,6 +7663,7 @@ static void __init free_area_init_node(i
pgdat_set_deferred_range(pgdat);
free_area_init_core(pgdat);
+++ /dev/null
-From 02d6fdecb9c38de19065f6bed8d5214556fd061d Mon Sep 17 00:00:00 2001
-From: Ansuel Smith <ansuelsmth@gmail.com>
-Date: Thu, 4 Nov 2021 16:00:40 +0100
-Subject: regmap: allow to define reg_update_bits for no bus configuration
-
-Some device requires a special handling for reg_update_bits and can't use
-the normal regmap read write logic. An example is when locking is
-handled by the device and rmw operations requires to do atomic operations.
-Allow to declare a dedicated function in regmap_config for
-reg_update_bits in no bus configuration.
-
-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-Link: https://lore.kernel.org/r/20211104150040.1260-1-ansuelsmth@gmail.com
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- drivers/base/regmap/regmap.c | 1 +
- include/linux/regmap.h | 7 +++++++
- 2 files changed, 8 insertions(+)
-
---- a/drivers/base/regmap/regmap.c
-+++ b/drivers/base/regmap/regmap.c
-@@ -877,6 +877,7 @@ struct regmap *__regmap_init(struct devi
- if (!bus) {
- map->reg_read = config->reg_read;
- map->reg_write = config->reg_write;
-+ map->reg_update_bits = config->reg_update_bits;
-
- map->defer_caching = false;
- goto skip_format_initialization;
---- a/include/linux/regmap.h
-+++ b/include/linux/regmap.h
-@@ -290,6 +290,11 @@ typedef void (*regmap_unlock)(void *);
- * read operation on a bus such as SPI, I2C, etc. Most of the
- * devices do not need this.
- * @reg_write: Same as above for writing.
-+ * @reg_update_bits: Optional callback that if filled will be used to perform
-+ * all the update_bits(rmw) operation. Should only be provided
-+ * if the function require special handling with lock and reg
-+ * handling and the operation cannot be represented as a simple
-+ * update_bits operation on a bus such as SPI, I2C, etc.
- * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
- * to perform locking. This field is ignored if custom lock/unlock
- * functions are used (see fields lock/unlock of struct regmap_config).
-@@ -372,6 +377,8 @@ struct regmap_config {
-
- int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
- int (*reg_write)(void *context, unsigned int reg, unsigned int val);
-+ int (*reg_update_bits)(void *context, unsigned int reg,
-+ unsigned int mask, unsigned int val);
-
- bool fast_io;
-
map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
config->val_bits + config->pad_bits, 8);
-@@ -1737,6 +1738,7 @@ static int _regmap_raw_write_impl(struct
+@@ -1750,6 +1751,7 @@ static int _regmap_raw_write_impl(struct
return ret;
}
map->format.format_reg(map->work_buf, reg, map->reg_shift);
regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
map->write_flag_mask);
-@@ -1907,6 +1909,7 @@ static int _regmap_bus_formatted_write(v
+@@ -1920,6 +1922,7 @@ static int _regmap_bus_formatted_write(v
return ret;
}
map->format.format_write(map, reg, val);
trace_regmap_hw_write_start(map, reg, 1);
-@@ -2348,6 +2351,7 @@ static int _regmap_raw_multi_reg_write(s
+@@ -2360,6 +2363,7 @@ static int _regmap_raw_multi_reg_write(s
unsigned int reg = regs[i].reg;
unsigned int val = regs[i].def;
trace_regmap_hw_write_start(map, reg, 1);
map->format.format_reg(u8, reg, map->reg_shift);
u8 += reg_bytes + pad_bytes;
map->format.format_val(u8, val, 0);
-@@ -2675,6 +2679,7 @@ static int _regmap_raw_read(struct regma
+@@ -2685,6 +2689,7 @@ static int _regmap_raw_read(struct regma
return ret;
}
* @pad_bits: Number of bits of padding between register and value.
* @val_bits: Number of bits in a register value, mandatory.
*
-@@ -360,6 +362,7 @@ struct regmap_config {
+@@ -366,6 +368,7 @@ struct regmap_config {
int reg_bits;
int reg_stride;
map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
map->format.pad_bytes = config->pad_bits / 8;
map->format.reg_downshift = config->reg_downshift;
-@@ -1738,6 +1740,7 @@ static int _regmap_raw_write_impl(struct
+@@ -1751,6 +1753,7 @@ static int _regmap_raw_write_impl(struct
return ret;
}
reg >>= map->format.reg_downshift;
map->format.format_reg(map->work_buf, reg, map->reg_shift);
regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
-@@ -1909,6 +1912,7 @@ static int _regmap_bus_formatted_write(v
+@@ -1922,6 +1925,7 @@ static int _regmap_bus_formatted_write(v
return ret;
}
reg >>= map->format.reg_downshift;
map->format.format_write(map, reg, val);
-@@ -2351,6 +2355,7 @@ static int _regmap_raw_multi_reg_write(s
+@@ -2363,6 +2367,7 @@ static int _regmap_raw_multi_reg_write(s
unsigned int reg = regs[i].reg;
unsigned int val = regs[i].def;
trace_regmap_hw_write_start(map, reg, 1);
reg >>= map->format.reg_downshift;
map->format.format_reg(u8, reg, map->reg_shift);
u8 += reg_bytes + pad_bytes;
-@@ -2679,6 +2684,7 @@ static int _regmap_raw_read(struct regma
+@@ -2689,6 +2694,7 @@ static int _regmap_raw_read(struct regma
return ret;
}
* @pad_bits: Number of bits of padding between register and value.
* @val_bits: Number of bits in a register value, mandatory.
*
-@@ -363,6 +365,7 @@ struct regmap_config {
+@@ -369,6 +371,7 @@ struct regmap_config {
int reg_bits;
int reg_stride;
int reg_downshift;
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
-@@ -1931,6 +1931,8 @@ static int _regmap_bus_reg_write(void *c
+@@ -1943,6 +1943,8 @@ static int _regmap_bus_reg_write(void *c
{
struct regmap *map = context;
return map->bus->reg_write(map->bus_context, reg, val);
}
-@@ -2705,6 +2707,8 @@ static int _regmap_bus_reg_read(void *co
+@@ -2715,6 +2717,8 @@ static int _regmap_bus_reg_read(void *co
{
struct regmap *map = context;
return map->bus->reg_read(map->bus_context, reg, val);
}
-@@ -3080,6 +3084,8 @@ static int _regmap_update_bits(struct re
+@@ -3084,6 +3088,8 @@ static int _regmap_update_bits(struct re
*change = false;
if (regmap_volatile(map, reg) && map->reg_update_bits) {
--- a/drivers/net/veth.c
+++ b/drivers/net/veth.c
-@@ -1457,9 +1457,14 @@ static int veth_xdp_set(struct net_devic
+@@ -1455,9 +1455,14 @@ static int veth_xdp_set(struct net_devic
goto err;
}
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/clk.h>
-@@ -840,7 +841,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -850,7 +851,7 @@ static int mtk_init_fq_dma(struct mtk_et
dma_addr_t dma_addr;
int i;
cnt * sizeof(struct mtk_tx_dma),
ð->phy_scratch_ring,
GFP_ATOMIC);
-@@ -852,10 +853,10 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -862,10 +863,10 @@ static int mtk_init_fq_dma(struct mtk_et
if (unlikely(!eth->scratch_head))
return -ENOMEM;
return -ENOMEM;
phy_ring_tail = eth->phy_scratch_ring +
-@@ -909,26 +910,26 @@ static void mtk_tx_unmap(struct mtk_eth
+@@ -919,26 +920,26 @@ static void mtk_tx_unmap(struct mtk_eth
{
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) {
dma_unmap_addr(tx_buf, dma_addr1),
dma_unmap_len(tx_buf, dma_len1),
DMA_TO_DEVICE);
-@@ -1006,9 +1007,9 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1016,9 +1017,9 @@ static int mtk_tx_map(struct sk_buff *sk
if (skb_vlan_tag_present(skb))
txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb);
return -ENOMEM;
WRITE_ONCE(itxd->txd1, mapped_addr);
-@@ -1047,10 +1048,10 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1057,10 +1058,10 @@ static int mtk_tx_map(struct sk_buff *sk
frag_map_size = min(frag_size, MTK_TX_DMA_BUF_LEN);
goto err_dma;
if (i == nr_frags - 1 &&
-@@ -1331,18 +1332,18 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1341,18 +1342,18 @@ static int mtk_poll_rx(struct napi_struc
netdev->stats.rx_dropped++;
goto release_desc;
}
ring->buf_size, DMA_FROM_DEVICE);
/* receive data */
-@@ -1615,7 +1616,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1625,7 +1626,7 @@ static int mtk_tx_alloc(struct mtk_eth *
if (!ring->buf)
goto no_tx_mem;
&ring->phys, GFP_ATOMIC);
if (!ring->dma)
goto no_tx_mem;
-@@ -1633,7 +1634,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1643,7 +1644,7 @@ static int mtk_tx_alloc(struct mtk_eth *
* descriptors in ring->dma_pdma.
*/
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
&ring->phys_pdma,
GFP_ATOMIC);
if (!ring->dma_pdma)
-@@ -1692,7 +1693,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -1702,7 +1703,7 @@ static void mtk_tx_clean(struct mtk_eth
}
if (ring->dma) {
MTK_DMA_SIZE * sizeof(*ring->dma),
ring->dma,
ring->phys);
-@@ -1700,7 +1701,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -1710,7 +1711,7 @@ static void mtk_tx_clean(struct mtk_eth
}
if (ring->dma_pdma) {
MTK_DMA_SIZE * sizeof(*ring->dma_pdma),
ring->dma_pdma,
ring->phys_pdma);
-@@ -1748,18 +1749,18 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1758,18 +1759,18 @@ static int mtk_rx_alloc(struct mtk_eth *
return -ENOMEM;
}
return -ENOMEM;
ring->dma[i].rxd1 = (unsigned int)dma_addr;
-@@ -1795,7 +1796,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -1805,7 +1806,7 @@ static void mtk_rx_clean(struct mtk_eth
continue;
if (!ring->dma[i].rxd1)
continue;
ring->dma[i].rxd1,
ring->buf_size,
DMA_FROM_DEVICE);
-@@ -1806,7 +1807,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -1816,7 +1817,7 @@ static void mtk_rx_clean(struct mtk_eth
}
if (ring->dma) {
ring->dma_size * sizeof(*ring->dma),
ring->dma,
ring->phys);
-@@ -2165,7 +2166,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2175,7 +2176,7 @@ static void mtk_dma_free(struct mtk_eth
if (eth->netdev[i])
netdev_reset_queue(eth->netdev[i]);
if (eth->scratch_ring) {
MTK_DMA_SIZE * sizeof(struct mtk_tx_dma),
eth->scratch_ring,
eth->phy_scratch_ring);
-@@ -2517,6 +2518,8 @@ static void mtk_dim_tx(struct work_struc
+@@ -2527,6 +2528,8 @@ static void mtk_dim_tx(struct work_struc
static int mtk_hw_init(struct mtk_eth *eth)
{
int i, val, ret;
if (test_and_set_bit(MTK_HW_INIT, ð->state))
-@@ -2529,6 +2532,10 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2539,6 +2542,10 @@ static int mtk_hw_init(struct mtk_eth *e
if (ret)
goto err_disable_pm;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
ret = device_reset(eth->dev);
if (ret) {
-@@ -3075,6 +3082,35 @@ free_netdev:
+@@ -3085,6 +3092,35 @@ free_netdev:
return err;
}
static int mtk_probe(struct platform_device *pdev)
{
struct device_node *mac_np;
-@@ -3088,6 +3124,7 @@ static int mtk_probe(struct platform_dev
+@@ -3098,6 +3134,7 @@ static int mtk_probe(struct platform_dev
eth->soc = of_device_get_match_data(&pdev->dev);
eth->dev = &pdev->dev;
eth->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(eth->base))
return PTR_ERR(eth->base);
-@@ -3136,6 +3173,16 @@ static int mtk_probe(struct platform_dev
+@@ -3146,6 +3183,16 @@ static int mtk_probe(struct platform_dev
}
}
static int mtk_msg_level = -1;
module_param_named(msg_level, mtk_msg_level, int, 0);
-@@ -3205,6 +3206,22 @@ static int mtk_probe(struct platform_dev
+@@ -3215,6 +3216,22 @@ static int mtk_probe(struct platform_dev
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2338,7 +2338,7 @@ static int mtk_open(struct net_device *d
+@@ -2348,7 +2348,7 @@ static int mtk_open(struct net_device *d
return err;
}
gdm_config = MTK_GDMA_TO_PPE;
mtk_gdm_config(eth, gdm_config);
-@@ -2412,7 +2412,7 @@ static int mtk_stop(struct net_device *d
+@@ -2422,7 +2422,7 @@ static int mtk_stop(struct net_device *d
mtk_dma_free(eth);
if (eth->soc->offload_version)
return 0;
}
-@@ -3297,10 +3297,11 @@ static int mtk_probe(struct platform_dev
+@@ -3307,10 +3307,11 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
#include <net/dsa.h>
#include "mtk_eth_soc.h"
-@@ -1293,7 +1294,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1303,7 +1304,7 @@ static int mtk_poll_rx(struct napi_struc
struct net_device *netdev;
unsigned int pktlen;
dma_addr_t dma_addr;
int mac;
ring = mtk_get_rx_ring(eth);
-@@ -1372,6 +1373,11 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1382,6 +1383,11 @@ static int mtk_poll_rx(struct napi_struc
skb_set_hash(skb, hash, PKT_HASH_TYPE_L4);
}
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX &&
(trxd.rxd2 & RX_DMA_VTAG))
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
-@@ -3297,7 +3303,7 @@ static int mtk_probe(struct platform_dev
+@@ -3307,7 +3313,7 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
mediatek,hifsys = <&hifsys>;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3184,7 +3184,7 @@ static int mtk_probe(struct platform_dev
+@@ -3194,7 +3194,7 @@ static int mtk_probe(struct platform_dev
struct regmap *cci;
cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -846,7 +846,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -856,7 +856,7 @@ static int mtk_init_fq_dma(struct mtk_et
eth->scratch_ring = dma_alloc_coherent(eth->dma_dev,
cnt * sizeof(struct mtk_tx_dma),
ð->phy_scratch_ring,
if (unlikely(!eth->scratch_ring))
return -ENOMEM;
-@@ -1624,7 +1624,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1634,7 +1634,7 @@ static int mtk_tx_alloc(struct mtk_eth *
goto no_tx_mem;
ring->dma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
if (!ring->dma)
goto no_tx_mem;
-@@ -1642,8 +1642,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1652,8 +1652,7 @@ static int mtk_tx_alloc(struct mtk_eth *
*/
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
if (!ring->dma_pdma)
goto no_tx_mem;
-@@ -1758,7 +1757,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1768,7 +1767,7 @@ static int mtk_rx_alloc(struct mtk_eth *
ring->dma = dma_alloc_coherent(eth->dma_dev,
rx_dma_size * sizeof(*ring->dma),
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -972,18 +972,51 @@ static void setup_tx_buf(struct mtk_eth
+@@ -982,18 +982,51 @@ static void setup_tx_buf(struct mtk_eth
}
}
int k = 0;
itxd = ring->next_free;
-@@ -991,49 +1024,32 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1001,49 +1034,32 @@ static int mtk_tx_map(struct sk_buff *sk
if (itxd == ring->last_free)
return -ENOMEM;
bool new_desc = true;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA) ||
-@@ -1048,23 +1064,17 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1058,23 +1074,17 @@ static int mtk_tx_map(struct sk_buff *sk
new_desc = false;
}
tx_buf = mtk_desc_to_tx_buf(ring, txd);
if (new_desc)
-@@ -1074,20 +1084,17 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1084,20 +1094,17 @@ static int mtk_tx_map(struct sk_buff *sk
tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 :
MTK_TX_FLAGS_FPORT1;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -838,20 +838,20 @@ static void *mtk_max_lro_buf_alloc(gfp_t
+@@ -848,20 +848,20 @@ static void *mtk_max_lro_buf_alloc(gfp_t
/* the qdma core needs scratch memory to be setup */
static int mtk_init_fq_dma(struct mtk_eth *eth)
{
if (unlikely(!eth->scratch_head))
return -ENOMEM;
-@@ -861,16 +861,19 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -871,16 +871,19 @@ static int mtk_init_fq_dma(struct mtk_et
if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
return -ENOMEM;
}
mtk_w32(eth, eth->phy_scratch_ring, MTK_QDMA_FQ_HEAD);
-@@ -2173,6 +2176,7 @@ static int mtk_dma_init(struct mtk_eth *
+@@ -2183,6 +2186,7 @@ static int mtk_dma_init(struct mtk_eth *
static void mtk_dma_free(struct mtk_eth *eth)
{
int i;
for (i = 0; i < MTK_MAC_COUNT; i++)
-@@ -2180,9 +2184,8 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2190,9 +2194,8 @@ static void mtk_dma_free(struct mtk_eth
netdev_reset_queue(eth->netdev[i]);
if (eth->scratch_ring) {
dma_free_coherent(eth->dma_dev,
eth->scratch_ring = NULL;
eth->phy_scratch_ring = 0;
}
-@@ -3387,6 +3390,9 @@ static const struct mtk_soc_data mt2701_
+@@ -3397,6 +3400,9 @@ static const struct mtk_soc_data mt2701_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
};
static const struct mtk_soc_data mt7621_data = {
-@@ -3395,6 +3401,9 @@ static const struct mtk_soc_data mt7621_
+@@ -3405,6 +3411,9 @@ static const struct mtk_soc_data mt7621_
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
};
static const struct mtk_soc_data mt7622_data = {
-@@ -3404,6 +3413,9 @@ static const struct mtk_soc_data mt7622_
+@@ -3414,6 +3423,9 @@ static const struct mtk_soc_data mt7622_
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
};
static const struct mtk_soc_data mt7623_data = {
-@@ -3412,6 +3424,9 @@ static const struct mtk_soc_data mt7623_
+@@ -3422,6 +3434,9 @@ static const struct mtk_soc_data mt7623_
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.offload_version = 2,
};
static const struct mtk_soc_data mt7629_data = {
-@@ -3420,6 +3435,9 @@ static const struct mtk_soc_data mt7629_
+@@ -3430,6 +3445,9 @@ static const struct mtk_soc_data mt7629_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7629_CLKS_BITMAP,
.required_pctl = false,
};
static const struct mtk_soc_data rt5350_data = {
-@@ -3427,6 +3445,9 @@ static const struct mtk_soc_data rt5350_
+@@ -3437,6 +3455,9 @@ static const struct mtk_soc_data rt5350_
.hw_features = MTK_HW_FEATURES_MT7628,
.required_clks = MT7628_CLKS_BITMAP,
.required_pctl = false,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1625,8 +1625,10 @@ static int mtk_napi_rx(struct napi_struc
+@@ -1635,8 +1635,10 @@ static int mtk_napi_rx(struct napi_struc
static int mtk_tx_alloc(struct mtk_eth *eth)
{
ring->buf = kcalloc(MTK_DMA_SIZE, sizeof(*ring->buf),
GFP_KERNEL);
-@@ -1642,8 +1644,10 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1652,8 +1654,10 @@ static int mtk_tx_alloc(struct mtk_eth *
int next = (i + 1) % MTK_DMA_SIZE;
u32 next_ptr = ring->phys + next * sz;
}
/* On MT7688 (PDMA only) this driver uses the ring->dma structs
-@@ -1665,7 +1669,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1675,7 +1679,7 @@ static int mtk_tx_alloc(struct mtk_eth *
ring->dma_size = MTK_DMA_SIZE;
atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
ring->next_free = &ring->dma[0];
ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
ring->thresh = MAX_SKB_FRAGS;
-@@ -1698,6 +1702,7 @@ no_tx_mem:
+@@ -1708,6 +1712,7 @@ no_tx_mem:
static void mtk_tx_clean(struct mtk_eth *eth)
{
struct mtk_tx_ring *ring = ð->tx_ring;
int i;
-@@ -1710,17 +1715,15 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -1720,17 +1725,15 @@ static void mtk_tx_clean(struct mtk_eth
if (ring->dma) {
dma_free_coherent(eth->dma_dev,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -891,10 +891,11 @@ static inline void *mtk_qdma_phys_to_vir
+@@ -901,10 +901,11 @@ static inline void *mtk_qdma_phys_to_vir
return ret + (desc - ring->phys);
}
return &ring->buf[idx];
}
-@@ -1016,6 +1017,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1026,6 +1027,7 @@ static int mtk_tx_map(struct sk_buff *sk
};
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
struct mtk_tx_dma *itxd, *txd;
struct mtk_tx_dma *itxd_pdma, *txd_pdma;
struct mtk_tx_buf *itx_buf, *tx_buf;
-@@ -1027,7 +1029,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1037,7 +1039,7 @@ static int mtk_tx_map(struct sk_buff *sk
if (itxd == ring->last_free)
return -ENOMEM;
memset(itx_buf, 0, sizeof(*itx_buf));
txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size,
-@@ -1055,7 +1057,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1065,7 +1067,7 @@ static int mtk_tx_map(struct sk_buff *sk
while (frag_size) {
bool new_desc = true;
(i & 0x1)) {
txd = mtk_qdma_phys_to_virt(ring, txd->txd2);
txd_pdma = qdma_to_pdma(ring, txd);
-@@ -1079,7 +1081,8 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1089,7 +1091,8 @@ static int mtk_tx_map(struct sk_buff *sk
mtk_tx_set_dma_desc(dev, txd, &txd_info);
if (new_desc)
memset(tx_buf, 0, sizeof(*tx_buf));
tx_buf->skb = (struct sk_buff *)MTK_DMA_DUMMY_DESC;
-@@ -1098,7 +1101,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1108,7 +1111,7 @@ static int mtk_tx_map(struct sk_buff *sk
/* store skb to cleanup */
itx_buf->skb = skb;
if (k & 0x1)
txd_pdma->txd2 |= TX_DMA_LS0;
else
-@@ -1116,7 +1119,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1126,7 +1129,7 @@ static int mtk_tx_map(struct sk_buff *sk
*/
wmb();
if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) ||
!netdev_xmit_more())
mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR);
-@@ -1130,13 +1133,13 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1140,13 +1143,13 @@ static int mtk_tx_map(struct sk_buff *sk
err_dma:
do {
itxd_pdma->txd2 = TX_DMA_DESP2_DEF;
itxd = mtk_qdma_phys_to_virt(ring, itxd->txd2);
-@@ -1450,7 +1453,8 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1460,7 +1463,8 @@ static int mtk_poll_tx_qdma(struct mtk_e
if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
break;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -906,9 +906,10 @@ static struct mtk_tx_dma *qdma_to_pdma(s
+@@ -916,9 +916,10 @@ static struct mtk_tx_dma *qdma_to_pdma(s
return ring->dma_pdma - ring->dma + dma;
}
}
static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
-@@ -1124,8 +1125,10 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1134,8 +1135,10 @@ static int mtk_tx_map(struct sk_buff *sk
!netdev_xmit_more())
mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR);
} else {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1776,7 +1776,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1786,7 +1786,7 @@ static int mtk_rx_alloc(struct mtk_eth *
}
ring->dma = dma_alloc_coherent(eth->dma_dev,
&ring->phys, GFP_KERNEL);
if (!ring->dma)
return -ENOMEM;
-@@ -1834,9 +1834,8 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -1844,9 +1844,8 @@ static void mtk_rx_clean(struct mtk_eth
if (ring->dma) {
dma_free_coherent(eth->dma_dev,
ring->dma = NULL;
}
}
-@@ -3402,6 +3401,7 @@ static const struct mtk_soc_data mt2701_
+@@ -3412,6 +3411,7 @@ static const struct mtk_soc_data mt2701_
.required_pctl = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
},
};
-@@ -3413,6 +3413,7 @@ static const struct mtk_soc_data mt7621_
+@@ -3423,6 +3423,7 @@ static const struct mtk_soc_data mt7621_
.offload_version = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
},
};
-@@ -3425,6 +3426,7 @@ static const struct mtk_soc_data mt7622_
+@@ -3435,6 +3436,7 @@ static const struct mtk_soc_data mt7622_
.offload_version = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
},
};
-@@ -3436,6 +3438,7 @@ static const struct mtk_soc_data mt7623_
+@@ -3446,6 +3448,7 @@ static const struct mtk_soc_data mt7623_
.offload_version = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
},
};
-@@ -3447,6 +3450,7 @@ static const struct mtk_soc_data mt7629_
+@@ -3457,6 +3460,7 @@ static const struct mtk_soc_data mt7629_
.required_pctl = false,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
},
};
-@@ -3457,6 +3461,7 @@ static const struct mtk_soc_data rt5350_
+@@ -3467,6 +3471,7 @@ static const struct mtk_soc_data rt5350_
.required_pctl = false,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1265,9 +1265,12 @@ static struct mtk_rx_ring *mtk_get_rx_ri
+@@ -1275,9 +1275,12 @@ static struct mtk_rx_ring *mtk_get_rx_ri
return ð->rx_ring[0];
for (i = 0; i < MTK_MAX_RX_RING_NUM; i++) {
ring->calc_idx_update = true;
return ring;
}
-@@ -1318,7 +1321,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1328,7 +1331,7 @@ static int mtk_poll_rx(struct napi_struc
goto rx_done;
idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
data = ring->data[idx];
if (!mtk_rx_get_desc(&trxd, rxd))
-@@ -1510,7 +1513,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -1520,7 +1523,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
mtk_tx_unmap(eth, tx_buf, true);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1785,18 +1785,25 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1795,18 +1795,25 @@ static int mtk_rx_alloc(struct mtk_eth *
return -ENOMEM;
for (i = 0; i < rx_dma_size; i++) {
}
ring->dma_size = rx_dma_size;
ring->calc_idx_update = false;
-@@ -1821,14 +1828,17 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -1831,14 +1838,17 @@ static void mtk_rx_clean(struct mtk_eth
if (ring->data && ring->dma) {
for (i = 0; i < ring->dma_size; i++) {
/* strings used by ethtool */
static const struct mtk_ethtool_stats {
char str[ETH_GSTRING_LEN];
-@@ -619,8 +672,8 @@ static inline void mtk_tx_irq_disable(st
+@@ -629,8 +682,8 @@ static inline void mtk_tx_irq_disable(st
u32 val;
spin_lock_irqsave(ð->tx_irq_lock, flags);
spin_unlock_irqrestore(ð->tx_irq_lock, flags);
}
-@@ -630,8 +683,8 @@ static inline void mtk_tx_irq_enable(str
+@@ -640,8 +693,8 @@ static inline void mtk_tx_irq_enable(str
u32 val;
spin_lock_irqsave(ð->tx_irq_lock, flags);
spin_unlock_irqrestore(ð->tx_irq_lock, flags);
}
-@@ -641,8 +694,8 @@ static inline void mtk_rx_irq_disable(st
+@@ -651,8 +704,8 @@ static inline void mtk_rx_irq_disable(st
u32 val;
spin_lock_irqsave(ð->rx_irq_lock, flags);
spin_unlock_irqrestore(ð->rx_irq_lock, flags);
}
-@@ -652,8 +705,8 @@ static inline void mtk_rx_irq_enable(str
+@@ -662,8 +715,8 @@ static inline void mtk_rx_irq_enable(str
u32 val;
spin_lock_irqsave(ð->rx_irq_lock, flags);
spin_unlock_irqrestore(ð->rx_irq_lock, flags);
}
-@@ -704,39 +757,39 @@ void mtk_stats_update_mac(struct mtk_mac
+@@ -714,39 +767,39 @@ void mtk_stats_update_mac(struct mtk_mac
hw_stats->rx_checksum_errors +=
mtk_r32(mac->hw, MT7628_SDM_CS_ERR);
} else {
}
u64_stats_update_end(&hw_stats->syncp);
-@@ -876,10 +929,10 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -886,10 +939,10 @@ static int mtk_init_fq_dma(struct mtk_et
txd->txd4 = 0;
}
return 0;
}
-@@ -1123,7 +1176,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1133,7 +1186,7 @@ static int mtk_tx_map(struct sk_buff *sk
if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) ||
!netdev_xmit_more())
} else {
int next_idx;
-@@ -1440,6 +1493,7 @@ rx_done:
+@@ -1450,6 +1503,7 @@ rx_done:
static int mtk_poll_tx_qdma(struct mtk_eth *eth, int budget,
unsigned int *done, unsigned int *bytes)
{
struct mtk_tx_ring *ring = ð->tx_ring;
struct mtk_tx_dma *desc;
struct sk_buff *skb;
-@@ -1447,7 +1501,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1457,7 +1511,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
u32 cpu, dma;
cpu = ring->last_free_ptr;
desc = mtk_qdma_phys_to_virt(ring, cpu);
-@@ -1482,7 +1536,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1492,7 +1546,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
}
ring->last_free_ptr = cpu;
return budget;
}
-@@ -1575,24 +1629,25 @@ static void mtk_handle_status_irq(struct
+@@ -1585,24 +1639,25 @@ static void mtk_handle_status_irq(struct
static int mtk_napi_tx(struct napi_struct *napi, int budget)
{
struct mtk_eth *eth = container_of(napi, struct mtk_eth, tx_napi);
return budget;
if (napi_complete_done(napi, tx_done))
-@@ -1604,6 +1659,7 @@ static int mtk_napi_tx(struct napi_struc
+@@ -1614,6 +1669,7 @@ static int mtk_napi_tx(struct napi_struc
static int mtk_napi_rx(struct napi_struct *napi, int budget)
{
struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi);
int rx_done_total = 0;
mtk_handle_status_irq(eth);
-@@ -1611,21 +1667,21 @@ static int mtk_napi_rx(struct napi_struc
+@@ -1621,21 +1677,21 @@ static int mtk_napi_rx(struct napi_struc
do {
int rx_done;
if (napi_complete_done(napi, rx_done_total))
mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
-@@ -1688,20 +1744,20 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1698,20 +1754,20 @@ static int mtk_tx_alloc(struct mtk_eth *
*/
wmb();
}
return 0;
-@@ -1740,6 +1796,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -1750,6 +1806,7 @@ static void mtk_tx_clean(struct mtk_eth
static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag)
{
struct mtk_rx_ring *ring;
int rx_data_len, rx_dma_size;
int i;
-@@ -1808,16 +1865,18 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1818,16 +1875,18 @@ static int mtk_rx_alloc(struct mtk_eth *
ring->dma_size = rx_dma_size;
ring->calc_idx_update = false;
ring->calc_idx = rx_dma_size - 1;
return 0;
}
-@@ -2129,9 +2188,9 @@ static int mtk_dma_busy_wait(struct mtk_
+@@ -2139,9 +2198,9 @@ static int mtk_dma_busy_wait(struct mtk_
u32 val;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val,
!(val & (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)),
-@@ -2189,8 +2248,8 @@ static int mtk_dma_init(struct mtk_eth *
+@@ -2199,8 +2258,8 @@ static int mtk_dma_init(struct mtk_eth *
* automatically
*/
mtk_w32(eth, FC_THRES_DROP_MODE | FC_THRES_DROP_EN |
}
return 0;
-@@ -2264,13 +2323,14 @@ static irqreturn_t mtk_handle_irq_tx(int
+@@ -2274,13 +2333,14 @@ static irqreturn_t mtk_handle_irq_tx(int
static irqreturn_t mtk_handle_irq(int irq, void *_eth)
{
struct mtk_eth *eth = _eth;
mtk_handle_irq_tx(irq, _eth);
}
-@@ -2294,6 +2354,7 @@ static void mtk_poll_controller(struct n
+@@ -2304,6 +2364,7 @@ static void mtk_poll_controller(struct n
static int mtk_start_dma(struct mtk_eth *eth)
{
u32 rx_2b_offset = (NET_IP_ALIGN == 2) ? MTK_RX_2B_OFFSET : 0;
int err;
err = mtk_dma_init(eth);
-@@ -2308,16 +2369,15 @@ static int mtk_start_dma(struct mtk_eth
+@@ -2318,16 +2379,15 @@ static int mtk_start_dma(struct mtk_eth
MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
MTK_RX_BT_32DWORDS,
}
return 0;
-@@ -2443,8 +2503,8 @@ static int mtk_stop(struct net_device *d
+@@ -2453,8 +2513,8 @@ static int mtk_stop(struct net_device *d
cancel_work_sync(ð->tx_dim.work);
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
mtk_dma_free(eth);
-@@ -2498,6 +2558,7 @@ static void mtk_dim_rx(struct work_struc
+@@ -2508,6 +2568,7 @@ static void mtk_dim_rx(struct work_struc
{
struct dim *dim = container_of(work, struct dim, work);
struct mtk_eth *eth = container_of(dim, struct mtk_eth, rx_dim);
struct dim_cq_moder cur_profile;
u32 val, cur;
-@@ -2505,7 +2566,7 @@ static void mtk_dim_rx(struct work_struc
+@@ -2515,7 +2576,7 @@ static void mtk_dim_rx(struct work_struc
dim->profile_ix);
spin_lock_bh(ð->dim_lock);
val &= MTK_PDMA_DELAY_TX_MASK;
val |= MTK_PDMA_DELAY_RX_EN;
-@@ -2515,9 +2576,9 @@ static void mtk_dim_rx(struct work_struc
+@@ -2525,9 +2586,9 @@ static void mtk_dim_rx(struct work_struc
cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
val |= cur << MTK_PDMA_DELAY_RX_PINT_SHIFT;
spin_unlock_bh(ð->dim_lock);
-@@ -2528,6 +2589,7 @@ static void mtk_dim_tx(struct work_struc
+@@ -2538,6 +2599,7 @@ static void mtk_dim_tx(struct work_struc
{
struct dim *dim = container_of(work, struct dim, work);
struct mtk_eth *eth = container_of(dim, struct mtk_eth, tx_dim);
struct dim_cq_moder cur_profile;
u32 val, cur;
-@@ -2535,7 +2597,7 @@ static void mtk_dim_tx(struct work_struc
+@@ -2545,7 +2607,7 @@ static void mtk_dim_tx(struct work_struc
dim->profile_ix);
spin_lock_bh(ð->dim_lock);
val &= MTK_PDMA_DELAY_RX_MASK;
val |= MTK_PDMA_DELAY_TX_EN;
-@@ -2545,9 +2607,9 @@ static void mtk_dim_tx(struct work_struc
+@@ -2555,9 +2617,9 @@ static void mtk_dim_tx(struct work_struc
cur = min_t(u32, cur_profile.pkts, MTK_PDMA_DELAY_PINT_MASK);
val |= cur << MTK_PDMA_DELAY_TX_PINT_SHIFT;
spin_unlock_bh(ð->dim_lock);
-@@ -2558,6 +2620,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2568,6 +2630,7 @@ static int mtk_hw_init(struct mtk_eth *e
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
ETHSYS_DMA_AG_MAP_PPE;
int i, val, ret;
if (test_and_set_bit(MTK_HW_INIT, ð->state))
-@@ -2632,10 +2695,10 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2642,10 +2705,10 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_rx_irq_disable(eth, ~0);
/* FE int grouping */
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
return 0;
-@@ -3167,14 +3230,6 @@ static int mtk_probe(struct platform_dev
+@@ -3177,14 +3240,6 @@ static int mtk_probe(struct platform_dev
if (IS_ERR(eth->base))
return PTR_ERR(eth->base);
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
eth->rx_dma_l4_valid = RX_DMA_L4_VALID_PDMA;
eth->ip_align = NET_IP_ALIGN;
-@@ -3408,6 +3463,7 @@ static int mtk_remove(struct platform_de
+@@ -3418,6 +3473,7 @@ static int mtk_remove(struct platform_de
}
static const struct mtk_soc_data mt2701_data = {
.caps = MT7623_CAPS | MTK_HWLRO,
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
-@@ -3419,6 +3475,7 @@ static const struct mtk_soc_data mt2701_
+@@ -3429,6 +3485,7 @@ static const struct mtk_soc_data mt2701_
};
static const struct mtk_soc_data mt7621_data = {
.caps = MT7621_CAPS,
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7621_CLKS_BITMAP,
-@@ -3431,6 +3488,7 @@ static const struct mtk_soc_data mt7621_
+@@ -3441,6 +3498,7 @@ static const struct mtk_soc_data mt7621_
};
static const struct mtk_soc_data mt7622_data = {
.ana_rgc3 = 0x2028,
.caps = MT7622_CAPS | MTK_HWLRO,
.hw_features = MTK_HW_FEATURES,
-@@ -3444,6 +3502,7 @@ static const struct mtk_soc_data mt7622_
+@@ -3454,6 +3512,7 @@ static const struct mtk_soc_data mt7622_
};
static const struct mtk_soc_data mt7623_data = {
.caps = MT7623_CAPS | MTK_HWLRO,
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
-@@ -3456,6 +3515,7 @@ static const struct mtk_soc_data mt7623_
+@@ -3466,6 +3525,7 @@ static const struct mtk_soc_data mt7623_
};
static const struct mtk_soc_data mt7629_data = {
.ana_rgc3 = 0x128,
.caps = MT7629_CAPS | MTK_HWLRO,
.hw_features = MTK_HW_FEATURES,
-@@ -3468,6 +3528,7 @@ static const struct mtk_soc_data mt7629_
+@@ -3478,6 +3538,7 @@ static const struct mtk_soc_data mt7629_
};
static const struct mtk_soc_data rt5350_data = {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -863,8 +863,8 @@ static inline int mtk_max_buf_size(int f
+@@ -873,8 +873,8 @@ static inline int mtk_max_buf_size(int f
return buf_size;
}
{
rxd->rxd2 = READ_ONCE(dma_rxd->rxd2);
if (!(rxd->rxd2 & RX_DMA_DONE))
-@@ -873,6 +873,10 @@ static inline bool mtk_rx_get_desc(struc
+@@ -883,6 +883,10 @@ static inline bool mtk_rx_get_desc(struc
rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
return true;
}
-@@ -917,7 +921,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -927,7 +931,7 @@ static int mtk_init_fq_dma(struct mtk_et
phy_ring_tail = eth->phy_scratch_ring + soc->txrx.txd_size * (cnt - 1);
for (i = 0; i < cnt; i++) {
txd = (void *)eth->scratch_ring + i * soc->txrx.txd_size;
txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
-@@ -927,6 +931,12 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -937,6 +941,12 @@ static int mtk_init_fq_dma(struct mtk_et
txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
txd->txd4 = 0;
}
mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head);
-@@ -1030,10 +1040,12 @@ static void setup_tx_buf(struct mtk_eth
+@@ -1040,10 +1050,12 @@ static void setup_tx_buf(struct mtk_eth
}
}
u32 data;
WRITE_ONCE(desc->txd1, info->addr);
-@@ -1057,6 +1069,59 @@ static void mtk_tx_set_dma_desc(struct n
+@@ -1067,6 +1079,59 @@ static void mtk_tx_set_dma_desc(struct n
WRITE_ONCE(desc->txd4, data);
}
static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
int tx_num, struct mtk_tx_ring *ring, bool gso)
{
-@@ -1065,6 +1130,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1075,6 +1140,7 @@ static int mtk_tx_map(struct sk_buff *sk
.gso = gso,
.csum = skb->ip_summed == CHECKSUM_PARTIAL,
.vlan = skb_vlan_tag_present(skb),
.vlan_tci = skb_vlan_tag_get(skb),
.first = true,
.last = !skb_is_nonlinear(skb),
-@@ -1124,7 +1190,9 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1134,7 +1200,9 @@ static int mtk_tx_map(struct sk_buff *sk
}
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
!(frag_size - txd_info.size);
txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
-@@ -1205,17 +1273,16 @@ err_dma:
+@@ -1215,17 +1283,16 @@ err_dma:
return -ENOMEM;
}
}
} else {
nfrags += skb_shinfo(skb)->nr_frags;
-@@ -1267,7 +1334,7 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1277,7 +1344,7 @@ static netdev_tx_t mtk_start_xmit(struct
if (unlikely(test_bit(MTK_RESETTING, ð->state)))
goto drop;
if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
netif_stop_queue(dev);
netif_err(eth, tx_queued, dev,
-@@ -1359,7 +1426,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1369,7 +1436,7 @@ static int mtk_poll_rx(struct napi_struc
int idx;
struct sk_buff *skb;
u8 *data, *new_data;
int done = 0, bytes = 0;
while (done < budget) {
-@@ -1367,7 +1434,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1377,7 +1444,7 @@ static int mtk_poll_rx(struct napi_struc
unsigned int pktlen;
dma_addr_t dma_addr;
u32 hash, reason;
ring = mtk_get_rx_ring(eth);
if (unlikely(!ring))
-@@ -1377,16 +1444,15 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1387,16 +1454,15 @@ static int mtk_poll_rx(struct napi_struc
rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
data = ring->data[idx];
if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
!eth->netdev[mac]))
-@@ -1432,7 +1498,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1442,7 +1508,7 @@ static int mtk_poll_rx(struct napi_struc
pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
skb->dev = netdev;
skb_put(skb, pktlen);
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb_checksum_none_assert(skb);
-@@ -1450,10 +1516,25 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1460,10 +1526,25 @@ static int mtk_poll_rx(struct napi_struc
mtk_ppe_check_skb(eth->ppe, skb,
trxd.rxd4 & MTK_RXD4_FOE_ENTRY);
skb_record_rx_queue(skb, 0);
napi_gro_receive(napi, skb);
-@@ -1465,7 +1546,7 @@ release_desc:
+@@ -1475,7 +1556,7 @@ release_desc:
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
rxd->rxd2 = RX_DMA_LSO;
else
ring->calc_idx = idx;
-@@ -1667,7 +1748,8 @@ static int mtk_napi_rx(struct napi_struc
+@@ -1677,7 +1758,8 @@ static int mtk_napi_rx(struct napi_struc
do {
int rx_done;
rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth);
rx_done_total += rx_done;
-@@ -1681,10 +1763,11 @@ static int mtk_napi_rx(struct napi_struc
+@@ -1691,10 +1773,11 @@ static int mtk_napi_rx(struct napi_struc
if (rx_done_total == budget)
return budget;
return rx_done_total;
}
-@@ -1694,7 +1777,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1704,7 +1787,7 @@ static int mtk_tx_alloc(struct mtk_eth *
const struct mtk_soc_data *soc = eth->soc;
struct mtk_tx_ring *ring = ð->tx_ring;
int i, sz = soc->txrx.txd_size;
ring->buf = kcalloc(MTK_DMA_SIZE, sizeof(*ring->buf),
GFP_KERNEL);
-@@ -1714,13 +1797,19 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1724,13 +1807,19 @@ static int mtk_tx_alloc(struct mtk_eth *
txd->txd2 = next_ptr;
txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
txd->txd4 = 0;
ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
&ring->phys_pdma, GFP_KERNEL);
if (!ring->dma_pdma)
-@@ -1800,13 +1889,11 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1810,13 +1899,11 @@ static int mtk_rx_alloc(struct mtk_eth *
struct mtk_rx_ring *ring;
int rx_data_len, rx_dma_size;
int i;
} else {
ring = ð->rx_ring[ring_no];
}
-@@ -1842,7 +1929,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1852,7 +1939,7 @@ static int mtk_rx_alloc(struct mtk_eth *
return -ENOMEM;
for (i = 0; i < rx_dma_size; i++) {
dma_addr_t dma_addr = dma_map_single(eth->dma_dev,
ring->data[i] + NET_SKB_PAD + eth->ip_align,
-@@ -1857,26 +1944,47 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1867,26 +1954,47 @@ static int mtk_rx_alloc(struct mtk_eth *
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
rxd->rxd2 = RX_DMA_LSO;
else
return 0;
}
-@@ -2301,7 +2409,7 @@ static irqreturn_t mtk_handle_irq_rx(int
+@@ -2311,7 +2419,7 @@ static irqreturn_t mtk_handle_irq_rx(int
eth->rx_events++;
if (likely(napi_schedule_prep(ð->rx_napi))) {
__napi_schedule(ð->rx_napi);
}
return IRQ_HANDLED;
-@@ -2325,8 +2433,10 @@ static irqreturn_t mtk_handle_irq(int ir
+@@ -2335,8 +2443,10 @@ static irqreturn_t mtk_handle_irq(int ir
struct mtk_eth *eth = _eth;
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
mtk_handle_irq_rx(irq, _eth);
}
if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) {
-@@ -2344,16 +2454,16 @@ static void mtk_poll_controller(struct n
+@@ -2354,16 +2464,16 @@ static void mtk_poll_controller(struct n
struct mtk_eth *eth = mac->hw;
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
int err;
-@@ -2364,12 +2474,19 @@ static int mtk_start_dma(struct mtk_eth
+@@ -2374,12 +2484,19 @@ static int mtk_start_dma(struct mtk_eth
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
mtk_w32(eth,
MTK_RX_DMA_EN | rx_2b_offset |
MTK_RX_BT_32DWORDS | MTK_MULTI_EN,
-@@ -2443,7 +2560,7 @@ static int mtk_open(struct net_device *d
+@@ -2453,7 +2570,7 @@ static int mtk_open(struct net_device *d
napi_enable(ð->tx_napi);
napi_enable(ð->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
refcount_set(ð->dma_refcnt, 1);
}
else
-@@ -2495,7 +2612,7 @@ static int mtk_stop(struct net_device *d
+@@ -2505,7 +2622,7 @@ static int mtk_stop(struct net_device *d
mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
napi_disable(ð->tx_napi);
napi_disable(ð->rx_napi);
-@@ -2655,9 +2772,25 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2665,9 +2782,25 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
if (eth->pctl) {
/* Set GE2 driving and slew rate */
-@@ -2696,11 +2829,47 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2706,11 +2839,47 @@ static int mtk_hw_init(struct mtk_eth *e
/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp);
return 0;
err_disable_pm:
-@@ -3230,12 +3399,8 @@ static int mtk_probe(struct platform_dev
+@@ -3240,12 +3409,8 @@ static int mtk_probe(struct platform_dev
if (IS_ERR(eth->base))
return PTR_ERR(eth->base);
spin_lock_init(ð->page_lock);
spin_lock_init(ð->tx_irq_lock);
-@@ -3471,6 +3636,10 @@ static const struct mtk_soc_data mt2701_
+@@ -3481,6 +3646,10 @@ static const struct mtk_soc_data mt2701_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3484,6 +3653,10 @@ static const struct mtk_soc_data mt7621_
+@@ -3494,6 +3663,10 @@ static const struct mtk_soc_data mt7621_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3498,6 +3671,10 @@ static const struct mtk_soc_data mt7622_
+@@ -3508,6 +3681,10 @@ static const struct mtk_soc_data mt7622_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3511,6 +3688,10 @@ static const struct mtk_soc_data mt7623_
+@@ -3521,6 +3698,10 @@ static const struct mtk_soc_data mt7623_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3524,6 +3705,10 @@ static const struct mtk_soc_data mt7629_
+@@ -3534,6 +3715,10 @@ static const struct mtk_soc_data mt7629_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3536,6 +3721,10 @@ static const struct mtk_soc_data rt5350_
+@@ -3546,6 +3731,10 @@ static const struct mtk_soc_data rt5350_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -947,18 +947,15 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -957,18 +957,15 @@ static int mtk_init_fq_dma(struct mtk_et
return 0;
}
return &ring->buf[idx];
}
-@@ -966,13 +963,12 @@ static struct mtk_tx_buf *mtk_desc_to_tx
+@@ -976,13 +973,12 @@ static struct mtk_tx_buf *mtk_desc_to_tx
static struct mtk_tx_dma *qdma_to_pdma(struct mtk_tx_ring *ring,
struct mtk_tx_dma *dma)
{
}
static void mtk_tx_unmap(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
-@@ -1389,7 +1385,7 @@ static struct mtk_rx_ring *mtk_get_rx_ri
+@@ -1399,7 +1395,7 @@ static struct mtk_rx_ring *mtk_get_rx_ri
ring = ð->rx_ring[i];
idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
if (rxd->rxd2 & RX_DMA_DONE) {
ring->calc_idx_update = true;
return ring;
-@@ -1441,7 +1437,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1451,7 +1447,7 @@ static int mtk_poll_rx(struct napi_struc
goto rx_done;
idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
data = ring->data[idx];
if (!mtk_rx_get_desc(eth, &trxd, rxd))
-@@ -1648,7 +1644,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -1658,7 +1654,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
mtk_tx_unmap(eth, tx_buf, true);
ring->last_free = desc;
atomic_inc(&ring->free_count);
-@@ -1793,7 +1789,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1803,7 +1799,7 @@ static int mtk_tx_alloc(struct mtk_eth *
int next = (i + 1) % MTK_DMA_SIZE;
u32 next_ptr = ring->phys + next * sz;
txd->txd2 = next_ptr;
txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
txd->txd4 = 0;
-@@ -1823,7 +1819,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1833,7 +1829,7 @@ static int mtk_tx_alloc(struct mtk_eth *
ring->dma_size = MTK_DMA_SIZE;
atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
ring->last_free = (void *)txd;
ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
ring->thresh = MAX_SKB_FRAGS;
-@@ -1938,7 +1934,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1948,7 +1944,7 @@ static int mtk_rx_alloc(struct mtk_eth *
if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
return -ENOMEM;
rxd->rxd1 = (unsigned int)dma_addr;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
-@@ -2000,7 +1996,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2010,7 +2006,7 @@ static void mtk_rx_clean(struct mtk_eth
if (!ring->data[i])
continue;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -923,7 +923,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -933,7 +933,7 @@ static int mtk_init_fq_dma(struct mtk_et
for (i = 0; i < cnt; i++) {
struct mtk_tx_dma_v2 *txd;
};
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
-@@ -3708,6 +3745,21 @@ static const struct mtk_soc_data mt7629_
+@@ -3718,6 +3755,21 @@ static const struct mtk_soc_data mt7629_
},
};
static const struct mtk_soc_data rt5350_data = {
.reg_map = &mt7628_reg_map,
.caps = MT7628_CAPS,
-@@ -3730,6 +3782,7 @@ const struct of_device_id of_mtk_match[]
+@@ -3740,6 +3792,7 @@ const struct of_device_id of_mtk_match[]
{ .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
{ .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
{ .compatible = "mediatek,mt7629-eth", .data = &mt7629_data},
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1463,8 +1463,8 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1473,8 +1473,8 @@ static int mtk_poll_rx(struct napi_struc
int done = 0, bytes = 0;
while (done < budget) {
dma_addr_t dma_addr;
u32 hash, reason;
int mac = 0;
-@@ -1531,7 +1531,13 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1541,7 +1541,13 @@ static int mtk_poll_rx(struct napi_struc
pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
skb->dev = netdev;
skb_put(skb, pktlen);
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb_checksum_none_assert(skb);
-@@ -3755,6 +3761,7 @@ static const struct mtk_soc_data mt7986_
+@@ -3765,6 +3771,7 @@ static const struct mtk_soc_data mt7986_
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
.rx_irq_done_mask = MTK_RX_DONE_INT_V2,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3351,6 +3351,26 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3361,6 +3361,26 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -568,24 +568,8 @@ static void mtk_validate(struct phylink_
+@@ -577,24 +577,8 @@ static void mtk_validate(struct phylink_
unsigned long *supported,
struct phylink_link_state *state)
{
phylink_set_port_modes(mask);
phylink_set(mask, Autoneg);
-@@ -612,7 +596,6 @@ static void mtk_validate(struct phylink_
+@@ -621,7 +605,6 @@ static void mtk_validate(struct phylink_
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_RMII:
case PHY_INTERFACE_MODE_REVMII:
default:
phylink_set(mask, 10baseT_Half);
phylink_set(mask, 10baseT_Full);
-@@ -621,23 +604,6 @@ static void mtk_validate(struct phylink_
+@@ -630,23 +613,6 @@ static void mtk_validate(struct phylink_
break;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -578,8 +578,9 @@ static void mtk_validate(struct phylink_
+@@ -587,8 +587,9 @@ static void mtk_validate(struct phylink_
phylink_set(mask, 1000baseT_Full);
break;
case PHY_INTERFACE_MODE_1000BASEX:
phylink_set(mask, 2500baseX_Full);
break;
case PHY_INTERFACE_MODE_GMII:
-@@ -609,11 +610,6 @@ static void mtk_validate(struct phylink_
+@@ -618,11 +619,6 @@ static void mtk_validate(struct phylink_
linkmode_and(supported, supported, mask);
linkmode_and(state->advertising, state->advertising, mask);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -564,56 +564,8 @@ static void mtk_mac_link_up(struct phyli
+@@ -573,56 +573,8 @@ static void mtk_mac_link_up(struct phyli
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}
.mac_pcs_get_state = mtk_mac_pcs_get_state,
.mac_an_restart = mtk_mac_an_restart,
.mac_config = mtk_mac_config,
-@@ -3313,6 +3265,9 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3323,6 +3275,9 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3265,6 +3265,10 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3275,6 +3275,10 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3564,9 +3564,9 @@ static int mtk_probe(struct platform_dev
+@@ -3574,9 +3574,9 @@ static int mtk_probe(struct platform_dev
*/
init_dummy_netdev(ð->dummy_dev);
netif_napi_add(ð->dummy_dev, ð->tx_napi, mtk_napi_tx,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3260,7 +3260,6 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3270,7 +3270,6 @@ static int mtk_add_mac(struct mtk_eth *e
/* mac config is not set */
mac->interface = PHY_INTERFACE_MODE_NA;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -533,8 +533,18 @@ static void mtk_mac_link_up(struct phyli
+@@ -542,8 +542,18 @@ static void mtk_mac_link_up(struct phyli
{
struct mtk_mac *mac = container_of(config, struct mtk_mac,
phylink_config);
mcr &= ~(MAC_MCR_SPEED_100 | MAC_MCR_SPEED_1000 |
MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_TX_FC |
MAC_MCR_FORCE_RX_FC);
-@@ -3264,9 +3274,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3274,9 +3284,7 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
+++ /dev/null
-From 0e37ad71b2ff772009595002da2860999e98e14e Mon Sep 17 00:00:00 2001
-From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
-Date: Wed, 18 May 2022 15:55:12 +0100
-Subject: [PATCH 09/12] net: mtk_eth_soc: move MAC_MCR setting to mac_finish()
-
-Move the setting of the MTK_MAC_MCR register from the end of mac_config
-into the phylink mac_finish() method, to keep it as the very last write
-that is done during configuration.
-
-Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 33 ++++++++++++++-------
- 1 file changed, 22 insertions(+), 11 deletions(-)
-
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -316,8 +316,8 @@ static void mtk_mac_config(struct phylin
- struct mtk_mac *mac = container_of(config, struct mtk_mac,
- phylink_config);
- struct mtk_eth *eth = mac->hw;
-- u32 mcr_cur, mcr_new, sid, i;
- int val, ge_mode, err = 0;
-+ u32 sid, i;
-
- /* MT76x8 has no hardware settings between for the MAC */
- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
-@@ -455,6 +455,25 @@ static void mtk_mac_config(struct phylin
- return;
- }
-
-+ return;
-+
-+err_phy:
-+ dev_err(eth->dev, "%s: GMAC%d mode %s not supported!\n", __func__,
-+ mac->id, phy_modes(state->interface));
-+ return;
-+
-+init_err:
-+ dev_err(eth->dev, "%s: GMAC%d mode %s err: %d!\n", __func__,
-+ mac->id, phy_modes(state->interface), err);
-+}
-+
-+static int mtk_mac_finish(struct phylink_config *config, unsigned int mode,
-+ phy_interface_t interface)
-+{
-+ struct mtk_mac *mac = container_of(config, struct mtk_mac,
-+ phylink_config);
-+ u32 mcr_cur, mcr_new;
-+
- /* Setup gmac */
- mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
- mcr_new = mcr_cur;
-@@ -466,16 +485,7 @@ static void mtk_mac_config(struct phylin
- if (mcr_new != mcr_cur)
- mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
-
-- return;
--
--err_phy:
-- dev_err(eth->dev, "%s: GMAC%d mode %s not supported!\n", __func__,
-- mac->id, phy_modes(state->interface));
-- return;
--
--init_err:
-- dev_err(eth->dev, "%s: GMAC%d mode %s err: %d!\n", __func__,
-- mac->id, phy_modes(state->interface), err);
-+ return 0;
- }
-
- static void mtk_mac_pcs_get_state(struct phylink_config *config,
-@@ -582,6 +592,7 @@ static const struct phylink_mac_ops mtk_
- .mac_pcs_get_state = mtk_mac_pcs_get_state,
- .mac_an_restart = mtk_mac_an_restart,
- .mac_config = mtk_mac_config,
-+ .mac_finish = mtk_mac_finish,
- .mac_link_down = mtk_mac_link_down,
- .mac_link_up = mtk_mac_link_up,
- };
/* Save the syscfg0 value for mac_finish */
mac->syscfg0 = val;
} else if (phylink_autoneg_inband(mode)) {
-@@ -527,14 +537,6 @@ static void mtk_mac_pcs_get_state(struct
+@@ -526,14 +536,6 @@ static void mtk_mac_pcs_get_state(struct
state->pause |= MLO_PAUSE_TX;
}
static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode,
phy_interface_t interface)
{
-@@ -555,15 +557,6 @@ static void mtk_mac_link_up(struct phyli
+@@ -554,15 +556,6 @@ static void mtk_mac_link_up(struct phyli
phylink_config);
u32 mcr;
mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
mcr &= ~(MAC_MCR_SPEED_100 | MAC_MCR_SPEED_1000 |
MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_TX_FC |
-@@ -596,8 +589,8 @@ static void mtk_mac_link_up(struct phyli
+@@ -595,8 +588,8 @@ static void mtk_mac_link_up(struct phyli
static const struct phylink_mac_ops mtk_phylink_ops = {
.validate = phylink_generic_validate,
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -1198,27 +1198,31 @@ static int
+@@ -1404,27 +1404,31 @@ static int
mt7530_port_bridge_join(struct dsa_switch *ds, int port,
struct net_device *bridge)
{
}
/* Add the all other ports to this port matrix. */
-@@ -1323,24 +1327,28 @@ static void
+@@ -1529,24 +1533,28 @@ static void
mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
struct net_device *bridge)
{
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2454,6 +2454,32 @@ mt7531_setup(struct dsa_switch *ds)
+@@ -2660,6 +2660,32 @@ mt7531_setup(struct dsa_switch *ds)
return 0;
}
static bool
mt7530_phy_mode_supported(struct dsa_switch *ds, int port,
const struct phylink_link_state *state)
-@@ -2490,6 +2516,37 @@ static bool mt7531_is_rgmii_port(struct
+@@ -2696,6 +2722,37 @@ static bool mt7531_is_rgmii_port(struct
return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
}
static bool
mt7531_phy_mode_supported(struct dsa_switch *ds, int port,
const struct phylink_link_state *state)
-@@ -2966,6 +3023,18 @@ mt7531_cpu_port_config(struct dsa_switch
+@@ -3172,6 +3229,18 @@ mt7531_cpu_port_config(struct dsa_switch
return 0;
}
static void
mt7530_mac_port_validate(struct dsa_switch *ds, int port,
unsigned long *supported)
-@@ -3201,6 +3270,7 @@ static const struct dsa_switch_ops mt753
+@@ -3407,6 +3476,7 @@ static const struct dsa_switch_ops mt753
.port_vlan_del = mt7530_port_vlan_del,
.port_mirror_add = mt753x_port_mirror_add,
.port_mirror_del = mt753x_port_mirror_del,
.phylink_validate = mt753x_phylink_validate,
.phylink_mac_link_state = mt753x_phylink_mac_link_state,
.phylink_mac_config = mt753x_phylink_mac_config,
-@@ -3218,6 +3288,7 @@ static const struct mt753x_info mt753x_t
+@@ -3424,6 +3494,7 @@ static const struct mt753x_info mt753x_t
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.phy_mode_supported = mt7530_phy_mode_supported,
.mac_port_validate = mt7530_mac_port_validate,
.mac_port_get_state = mt7530_phylink_mac_link_state,
-@@ -3229,6 +3300,7 @@ static const struct mt753x_info mt753x_t
+@@ -3435,6 +3506,7 @@ static const struct mt753x_info mt753x_t
.phy_read = mt7530_phy_read,
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.phy_mode_supported = mt7530_phy_mode_supported,
.mac_port_validate = mt7530_mac_port_validate,
.mac_port_get_state = mt7530_phylink_mac_link_state,
-@@ -3241,6 +3313,7 @@ static const struct mt753x_info mt753x_t
+@@ -3447,6 +3519,7 @@ static const struct mt753x_info mt753x_t
.phy_write = mt7531_ind_phy_write,
.pad_setup = mt7531_pad_setup,
.cpu_port_config = mt7531_cpu_port_config,
.phy_mode_supported = mt7531_phy_mode_supported,
.mac_port_validate = mt7531_mac_port_validate,
.mac_port_get_state = mt7531_phylink_mac_link_state,
-@@ -3303,6 +3376,7 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3509,6 +3582,7 @@ mt7530_probe(struct mdio_device *mdiodev
*/
if (!priv->info->sw_setup || !priv->info->pad_setup ||
!priv->info->phy_read || !priv->info->phy_write ||
!priv->info->mac_port_get_state || !priv->info->mac_port_config)
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -769,6 +769,8 @@ struct mt753x_info {
+@@ -801,6 +801,8 @@ struct mt753x_info {
int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);
int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface);
int (*cpu_port_config)(struct dsa_switch *ds, int port);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2480,37 +2480,6 @@ static void mt7530_mac_port_get_caps(str
+@@ -2686,37 +2686,6 @@ static void mt7530_mac_port_get_caps(str
}
}
static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port)
{
return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
-@@ -2547,44 +2516,6 @@ static void mt7531_mac_port_get_caps(str
+@@ -2753,44 +2722,6 @@ static void mt7531_mac_port_get_caps(str
}
}
static int
mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
{
-@@ -2839,9 +2770,6 @@ mt753x_phylink_mac_config(struct dsa_swi
+@@ -3045,9 +2976,6 @@ mt753x_phylink_mac_config(struct dsa_swi
struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new;
switch (port) {
case 0 ... 4: /* Internal phy */
if (state->interface != PHY_INTERFACE_MODE_GMII)
-@@ -3057,12 +2985,6 @@ mt753x_phylink_validate(struct dsa_switc
+@@ -3263,12 +3191,6 @@ mt753x_phylink_validate(struct dsa_switc
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
struct mt7530_priv *priv = ds->priv;
phylink_set_port_modes(mask);
if (state->interface != PHY_INTERFACE_MODE_TRGMII &&
-@@ -3289,7 +3211,6 @@ static const struct mt753x_info mt753x_t
+@@ -3495,7 +3417,6 @@ static const struct mt753x_info mt753x_t
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_validate = mt7530_mac_port_validate,
.mac_port_get_state = mt7530_phylink_mac_link_state,
.mac_port_config = mt7530_mac_config,
-@@ -3301,7 +3222,6 @@ static const struct mt753x_info mt753x_t
+@@ -3507,7 +3428,6 @@ static const struct mt753x_info mt753x_t
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_validate = mt7530_mac_port_validate,
.mac_port_get_state = mt7530_phylink_mac_link_state,
.mac_port_config = mt7530_mac_config,
-@@ -3314,7 +3234,6 @@ static const struct mt753x_info mt753x_t
+@@ -3520,7 +3440,6 @@ static const struct mt753x_info mt753x_t
.pad_setup = mt7531_pad_setup,
.cpu_port_config = mt7531_cpu_port_config,
.mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_validate = mt7531_mac_port_validate,
.mac_port_get_state = mt7531_phylink_mac_link_state,
.mac_port_config = mt7531_mac_config,
-@@ -3377,7 +3296,6 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3583,7 +3502,6 @@ mt7530_probe(struct mdio_device *mdiodev
if (!priv->info->sw_setup || !priv->info->pad_setup ||
!priv->info->phy_read || !priv->info->phy_write ||
!priv->info->mac_port_get_caps ||
return -EINVAL;
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -771,8 +771,6 @@ struct mt753x_info {
+@@ -803,8 +803,6 @@ struct mt753x_info {
int (*cpu_port_config)(struct dsa_switch *ds, int port);
void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
struct phylink_config *config);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -3009,11 +3009,6 @@ mt753x_phylink_validate(struct dsa_switc
+@@ -3215,11 +3215,6 @@ mt753x_phylink_validate(struct dsa_switc
linkmode_and(supported, supported, mask);
linkmode_and(state->advertising, state->advertising, mask);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2587,12 +2587,13 @@ static int mt7531_rgmii_setup(struct mt7
+@@ -2793,12 +2793,13 @@ static int mt7531_rgmii_setup(struct mt7
}
static void mt7531_sgmii_validate(struct mt7530_priv *priv, int port,
phylink_set(supported, 2500baseX_Full);
phylink_set(supported, 2500baseT_Full);
}
-@@ -2965,16 +2966,18 @@ static void mt753x_phylink_get_caps(stru
+@@ -3171,16 +3172,18 @@ static void mt753x_phylink_get_caps(stru
static void
mt7530_mac_port_validate(struct dsa_switch *ds, int port,
}
static void
-@@ -2997,12 +3000,13 @@ mt753x_phylink_validate(struct dsa_switc
+@@ -3203,12 +3206,13 @@ mt753x_phylink_validate(struct dsa_switc
}
/* This switch only supports 1G full-duplex. */
phylink_set(mask, Asym_Pause);
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -772,6 +772,7 @@ struct mt753x_info {
+@@ -804,6 +804,7 @@ struct mt753x_info {
void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
struct phylink_config *config);
void (*mac_port_validate)(struct dsa_switch *ds, int port,
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2586,19 +2586,6 @@ static int mt7531_rgmii_setup(struct mt7
+@@ -2792,19 +2792,6 @@ static int mt7531_rgmii_setup(struct mt7
return 0;
}
static void
mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
unsigned int mode, phy_interface_t interface,
-@@ -2965,51 +2952,21 @@ static void mt753x_phylink_get_caps(stru
+@@ -3171,51 +3158,21 @@ static void mt753x_phylink_get_caps(stru
}
static void
linkmode_and(supported, supported, mask);
linkmode_and(state->advertising, state->advertising, mask);
-@@ -3210,7 +3167,6 @@ static const struct mt753x_info mt753x_t
+@@ -3416,7 +3373,6 @@ static const struct mt753x_info mt753x_t
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_get_state = mt7530_phylink_mac_link_state,
.mac_port_config = mt7530_mac_config,
},
-@@ -3221,7 +3177,6 @@ static const struct mt753x_info mt753x_t
+@@ -3427,7 +3383,6 @@ static const struct mt753x_info mt753x_t
.phy_write = mt7530_phy_write,
.pad_setup = mt7530_pad_clk_setup,
.mac_port_get_caps = mt7530_mac_port_get_caps,
.mac_port_get_state = mt7530_phylink_mac_link_state,
.mac_port_config = mt7530_mac_config,
},
-@@ -3233,7 +3188,6 @@ static const struct mt753x_info mt753x_t
+@@ -3439,7 +3394,6 @@ static const struct mt753x_info mt753x_t
.pad_setup = mt7531_pad_setup,
.cpu_port_config = mt7531_cpu_port_config,
.mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_get_state = mt7531_phylink_mac_link_state,
.mac_port_config = mt7531_mac_config,
.mac_pcs_an_restart = mt7531_sgmii_restart_an,
-@@ -3295,7 +3249,6 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3501,7 +3455,6 @@ mt7530_probe(struct mdio_device *mdiodev
if (!priv->info->sw_setup || !priv->info->pad_setup ||
!priv->info->phy_read || !priv->info->phy_write ||
!priv->info->mac_port_get_caps ||
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -24,6 +24,11 @@
+@@ -25,6 +25,11 @@
#include "mt7530.h"
/* String, offset, and register size in bytes if different from 4 bytes */
static const struct mt7530_mib_desc mt7530_mib[] = {
MIB_DESC(1, 0x00, "TxDrop"),
-@@ -2586,12 +2591,11 @@ static int mt7531_rgmii_setup(struct mt7
+@@ -2792,12 +2797,11 @@ static int mt7531_rgmii_setup(struct mt7
return 0;
}
unsigned int val;
/* For adjusting speed and duplex of SGMII force mode. */
-@@ -2617,6 +2621,9 @@ mt7531_sgmii_link_up_force(struct dsa_sw
+@@ -2823,6 +2827,9 @@ mt7531_sgmii_link_up_force(struct dsa_sw
/* MT7531 SGMII 1G force mode can only work in full duplex mode,
* no matter MT7531_SGMII_FORCE_HALF_DUPLEX is set or not.
*/
if ((speed == SPEED_10 || speed == SPEED_100) &&
duplex != DUPLEX_FULL)
-@@ -2692,9 +2699,10 @@ static int mt7531_sgmii_setup_mode_an(st
+@@ -2898,9 +2905,10 @@ static int mt7531_sgmii_setup_mode_an(st
return 0;
}
u32 val;
/* Only restart AN when AN is enabled */
-@@ -2751,6 +2759,24 @@ mt753x_mac_config(struct dsa_switch *ds,
+@@ -2957,6 +2965,24 @@ mt753x_mac_config(struct dsa_switch *ds,
return priv->info->mac_port_config(ds, port, mode, state->interface);
}
static void
mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
const struct phylink_link_state *state)
-@@ -2812,17 +2838,6 @@ unsupported:
+@@ -3018,17 +3044,6 @@ unsupported:
mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
}
static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
unsigned int mode,
phy_interface_t interface)
-@@ -2832,16 +2847,13 @@ static void mt753x_phylink_mac_link_down
+@@ -3038,16 +3053,13 @@ static void mt753x_phylink_mac_link_down
mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
}
}
static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
-@@ -2854,8 +2866,6 @@ static void mt753x_phylink_mac_link_up(s
+@@ -3060,8 +3072,6 @@ static void mt753x_phylink_mac_link_up(s
struct mt7530_priv *priv = ds->priv;
u32 mcr;
mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
/* MT753x MAC works in 1G full duplex mode for all up-clocked
-@@ -2933,6 +2943,8 @@ mt7531_cpu_port_config(struct dsa_switch
+@@ -3139,6 +3149,8 @@ mt7531_cpu_port_config(struct dsa_switch
return ret;
mt7530_write(priv, MT7530_PMCR_P(port),
PMCR_CPU_PORT_SETTING(priv->id));
mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL,
speed, DUPLEX_FULL, true, true);
-@@ -2972,16 +2984,13 @@ mt753x_phylink_validate(struct dsa_switc
+@@ -3178,16 +3190,13 @@ mt753x_phylink_validate(struct dsa_switc
linkmode_and(state->advertising, state->advertising, mask);
}
pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
state->link = (pmsr & PMSR_LINK);
-@@ -3008,8 +3017,6 @@ mt7530_phylink_mac_link_state(struct dsa
+@@ -3214,8 +3223,6 @@ mt7530_phylink_mac_link_state(struct dsa
state->pause |= MLO_PAUSE_RX;
if (pmsr & PMSR_TX_FC)
state->pause |= MLO_PAUSE_TX;
}
static int
-@@ -3051,32 +3058,49 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
+@@ -3257,32 +3264,49 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
return 0;
}
if (ret)
return ret;
-@@ -3089,6 +3113,13 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3295,6 +3319,13 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
return ret;
}
-@@ -3150,9 +3181,8 @@ static const struct dsa_switch_ops mt753
+@@ -3356,9 +3387,8 @@ static const struct dsa_switch_ops mt753
.port_mirror_del = mt753x_port_mirror_del,
.phylink_get_caps = mt753x_phylink_get_caps,
.phylink_validate = mt753x_phylink_validate,
.phylink_mac_link_down = mt753x_phylink_mac_link_down,
.phylink_mac_link_up = mt753x_phylink_mac_link_up,
.get_mac_eee = mt753x_get_mac_eee,
-@@ -3162,36 +3192,34 @@ static const struct dsa_switch_ops mt753
+@@ -3368,36 +3398,34 @@ static const struct dsa_switch_ops mt753
static const struct mt753x_info mt753x_table[] = {
[ID_MT7621] = {
.id = ID_MT7621,
},
};
-@@ -3249,7 +3277,7 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3455,7 +3483,7 @@ mt7530_probe(struct mdio_device *mdiodev
if (!priv->info->sw_setup || !priv->info->pad_setup ||
!priv->info->phy_read || !priv->info->phy_write ||
!priv->info->mac_port_get_caps ||
priv->id = priv->info->id;
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -741,6 +741,12 @@ static const char *p5_intf_modes(unsigne
+@@ -773,6 +773,12 @@ static const char *p5_intf_modes(unsigne
struct mt7530_priv;
/* struct mt753x_info - This is the main data structure for holding the specific
* part for each supported device
* @sw_setup: Holding the handler to a device initialization
-@@ -752,18 +758,14 @@ struct mt7530_priv;
+@@ -784,18 +790,14 @@ struct mt7530_priv;
* port
* @mac_port_validate: Holding the way to set addition validate type for a
* certan MAC port
int (*sw_setup)(struct dsa_switch *ds);
int (*phy_read)(struct mt7530_priv *priv, int port, int regnum);
int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);
-@@ -774,15 +776,9 @@ struct mt753x_info {
+@@ -806,15 +808,9 @@ struct mt753x_info {
void (*mac_port_validate)(struct dsa_switch *ds, int port,
phy_interface_t interface,
unsigned long *supported);
};
/* struct mt7530_priv - This is the main data structure for holding the state
-@@ -824,6 +820,7 @@ struct mt7530_priv {
+@@ -856,6 +852,7 @@ struct mt7530_priv {
u8 mirror_tx;
struct mt7530_port ports[MT7530_NUM_PORTS];
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2963,25 +2963,16 @@ static void mt753x_phylink_get_caps(stru
+@@ -3169,25 +3169,16 @@ static void mt753x_phylink_get_caps(stru
priv->info->mac_port_get_caps(ds, port, config);
}
}
static void mt7530_pcs_get_state(struct phylink_pcs *pcs,
-@@ -3083,12 +3074,14 @@ static void mt7530_pcs_an_restart(struct
+@@ -3289,12 +3280,14 @@ static void mt7530_pcs_an_restart(struct
}
static const struct phylink_pcs_ops mt7530_pcs_ops = {
.pcs_get_state = mt7531_pcs_get_state,
.pcs_config = mt753x_pcs_config,
.pcs_an_restart = mt7531_pcs_an_restart,
-@@ -3180,7 +3173,6 @@ static const struct dsa_switch_ops mt753
+@@ -3386,7 +3379,6 @@ static const struct dsa_switch_ops mt753
.port_mirror_add = mt753x_port_mirror_add,
.port_mirror_del = mt753x_port_mirror_del,
.phylink_get_caps = mt753x_phylink_get_caps,
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2960,6 +2960,12 @@ static void mt753x_phylink_get_caps(stru
+@@ -3166,6 +3166,12 @@ static void mt753x_phylink_get_caps(stru
config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
MAC_10 | MAC_100 | MAC_1000FD;
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -3098,9 +3098,16 @@ static int
+@@ -3304,9 +3304,16 @@ static int
mt753x_setup(struct dsa_switch *ds)
{
struct mt7530_priv *priv = ds->priv;
if (ret)
return ret;
-@@ -3112,13 +3119,6 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3318,13 +3325,6 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -1544,11 +1544,11 @@ static void
+@@ -1750,11 +1750,11 @@ static void
mt7530_hw_vlan_add(struct mt7530_priv *priv,
struct mt7530_hw_vlan_entry *entry)
{
/* Validate the entry with independent learning, create egress tag per
* VLAN and joining the port as one of the port members.
-@@ -1559,22 +1559,20 @@ mt7530_hw_vlan_add(struct mt7530_priv *p
+@@ -1765,22 +1765,20 @@ mt7530_hw_vlan_add(struct mt7530_priv *p
/* Decide whether adding tag or not for those outgoing packets from the
* port inside the VLAN.
}
static void
-@@ -1593,11 +1591,7 @@ mt7530_hw_vlan_del(struct mt7530_priv *p
+@@ -1799,11 +1797,7 @@ mt7530_hw_vlan_del(struct mt7530_priv *p
return;
}
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -1048,6 +1048,7 @@ static int
+@@ -1254,6 +1254,7 @@ static int
mt7530_port_enable(struct dsa_switch *ds, int port,
struct phy_device *phy)
{
struct mt7530_priv *priv = ds->priv;
mutex_lock(&priv->reg_mutex);
-@@ -1056,7 +1057,11 @@ mt7530_port_enable(struct dsa_switch *ds
+@@ -1262,7 +1263,11 @@ mt7530_port_enable(struct dsa_switch *ds
* restore the port matrix if the port is the member of a certain
* bridge.
*/
priv->ports[port].enable = true;
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
priv->ports[port].pm);
-@@ -1204,7 +1209,8 @@ mt7530_port_bridge_join(struct dsa_switc
+@@ -1410,7 +1415,8 @@ mt7530_port_bridge_join(struct dsa_switc
struct net_device *bridge)
{
struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
struct mt7530_priv *priv = ds->priv;
mutex_lock(&priv->reg_mutex);
-@@ -1281,9 +1287,12 @@ mt7530_port_set_vlan_unaware(struct dsa_
+@@ -1487,9 +1493,12 @@ mt7530_port_set_vlan_unaware(struct dsa_
* the CPU port get out of VLAN filtering mode.
*/
if (all_user_ports_removed) {
| PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
}
}
-@@ -1333,6 +1342,7 @@ mt7530_port_bridge_leave(struct dsa_swit
+@@ -1539,6 +1548,7 @@ mt7530_port_bridge_leave(struct dsa_swit
struct net_device *bridge)
{
struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
struct mt7530_priv *priv = ds->priv;
mutex_lock(&priv->reg_mutex);
-@@ -1361,8 +1371,8 @@ mt7530_port_bridge_leave(struct dsa_swit
+@@ -1567,8 +1577,8 @@ mt7530_port_bridge_leave(struct dsa_swit
*/
if (priv->ports[port].enable)
mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
/* When a port is removed from the bridge, the port would be set up
* back to the default as is at initial boot which is a VLAN-unaware
-@@ -1525,6 +1535,9 @@ static int
+@@ -1731,6 +1741,9 @@ static int
mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
struct netlink_ext_ack *extack)
{
if (vlan_filtering) {
/* The port is being kept as VLAN-unaware port when bridge is
* set up with vlan_filtering not being set, Otherwise, the
-@@ -1532,7 +1545,7 @@ mt7530_port_vlan_filtering(struct dsa_sw
+@@ -1738,7 +1751,7 @@ mt7530_port_vlan_filtering(struct dsa_sw
* for becoming a VLAN-aware port.
*/
mt7530_port_set_vlan_aware(ds, port);
MediaTek SoC family.
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1389,6 +1389,68 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1388,6 +1388,68 @@ static void mtk_update_rx_cpu_idx(struct
}
}
static int mtk_poll_rx(struct napi_struct *napi, int budget,
struct mtk_eth *eth)
{
-@@ -1402,9 +1464,9 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1401,9 +1463,9 @@ static int mtk_poll_rx(struct napi_struc
while (done < budget) {
unsigned int pktlen, *rxdcsum;
int mac = 0;
ring = mtk_get_rx_ring(eth);
-@@ -1435,36 +1497,54 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1434,36 +1496,54 @@ static int mtk_poll_rx(struct napi_struc
goto release_desc;
/* alloc new buffer */
pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
skb->dev = netdev;
-@@ -1518,7 +1598,6 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1517,7 +1597,6 @@ static int mtk_poll_rx(struct napi_struc
skip_rx:
ring->data[idx] = new_data;
rxd->rxd1 = (unsigned int)dma_addr;
release_desc:
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
rxd->rxd2 = RX_DMA_LSO;
-@@ -1526,7 +1605,6 @@ release_desc:
+@@ -1525,7 +1604,6 @@ release_desc:
rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
ring->calc_idx = idx;
done++;
}
-@@ -1890,13 +1968,15 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1889,13 +1967,15 @@ static int mtk_rx_alloc(struct mtk_eth *
if (!ring->data)
return -ENOMEM;
}
ring->dma = dma_alloc_coherent(eth->dma_dev,
-@@ -1907,16 +1987,33 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1906,16 +1986,33 @@ static int mtk_rx_alloc(struct mtk_eth *
for (i = 0; i < rx_dma_size; i++) {
struct mtk_rx_dma_v2 *rxd;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
rxd->rxd2 = RX_DMA_LSO;
-@@ -1932,6 +2029,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1931,6 +2028,7 @@ static int mtk_rx_alloc(struct mtk_eth *
rxd->rxd8 = 0;
}
}
ring->dma_size = rx_dma_size;
ring->calc_idx_update = false;
ring->calc_idx = rx_dma_size - 1;
-@@ -1983,7 +2081,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -1982,7 +2080,7 @@ static void mtk_rx_clean(struct mtk_eth
dma_unmap_single(eth->dma_dev, rxd->rxd1,
ring->buf_size, DMA_FROM_DEVICE);
}
kfree(ring->data);
ring->data = NULL;
-@@ -1995,6 +2093,13 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -1994,6 +2092,13 @@ static void mtk_rx_clean(struct mtk_eth
ring->dma, ring->phys);
ring->dma = NULL;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1389,6 +1389,11 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1388,6 +1388,11 @@ static void mtk_update_rx_cpu_idx(struct
}
}
static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth,
struct xdp_rxq_info *xdp_q,
int id, int size)
-@@ -1451,11 +1456,52 @@ static void mtk_rx_put_buff(struct mtk_r
+@@ -1450,11 +1455,52 @@ static void mtk_rx_put_buff(struct mtk_r
skb_free_frag(data);
}
int idx;
struct sk_buff *skb;
u8 *data, *new_data;
-@@ -1464,9 +1510,9 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1463,9 +1509,9 @@ static int mtk_poll_rx(struct napi_struc
while (done < budget) {
unsigned int pktlen, *rxdcsum;
int mac = 0;
ring = mtk_get_rx_ring(eth);
-@@ -1496,8 +1542,14 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1495,8 +1541,14 @@ static int mtk_poll_rx(struct napi_struc
if (unlikely(test_bit(MTK_RESETTING, ð->state)))
goto release_desc;
new_data = mtk_page_pool_get_buff(ring->page_pool,
&dma_addr,
GFP_ATOMIC);
-@@ -1505,6 +1557,34 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1504,6 +1556,34 @@ static int mtk_poll_rx(struct napi_struc
netdev->stats.rx_dropped++;
goto release_desc;
}
} else {
if (ring->frag_size <= PAGE_SIZE)
new_data = napi_alloc_frag(ring->frag_size);
-@@ -1528,27 +1608,20 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1527,27 +1607,20 @@ static int mtk_poll_rx(struct napi_struc
dma_unmap_single(eth->dma_dev, trxd.rxd1,
ring->buf_size, DMA_FROM_DEVICE);
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
rxdcsum = &trxd.rxd3;
-@@ -1560,7 +1633,6 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1559,7 +1632,6 @@ static int mtk_poll_rx(struct napi_struc
else
skb_checksum_none_assert(skb);
skb->protocol = eth_type_trans(skb, netdev);
hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
if (hash != MTK_RXD4_FOE_ENTRY) {
-@@ -1623,6 +1695,9 @@ rx_done:
+@@ -1622,6 +1694,9 @@ rx_done:
&dim_sample);
net_dim(ð->rx_dim, dim_sample);
return done;
}
-@@ -1968,7 +2043,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1967,7 +2042,7 @@ static int mtk_rx_alloc(struct mtk_eth *
if (!ring->data)
return -ENOMEM;
struct page_pool *pp;
pp = mtk_create_page_pool(eth, &ring->xdp_q, ring_no,
-@@ -2713,6 +2788,48 @@ static int mtk_stop(struct net_device *d
+@@ -2712,6 +2787,48 @@ static int mtk_stop(struct net_device *d
return 0;
}
static void ethsys_reset(struct mtk_eth *eth, u32 reset_bits)
{
regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL,
-@@ -2991,6 +3108,12 @@ static int mtk_change_mtu(struct net_dev
+@@ -2990,6 +3107,12 @@ static int mtk_change_mtu(struct net_dev
struct mtk_eth *eth = mac->hw;
u32 mcr_cur, mcr_new;
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
mcr_new = mcr_cur & ~MAC_MCR_MAX_RX_MASK;
-@@ -3317,6 +3440,7 @@ static const struct net_device_ops mtk_n
+@@ -3316,6 +3439,7 @@ static const struct net_device_ops mtk_n
.ndo_poll_controller = mtk_poll_controller,
#endif
.ndo_setup_tc = mtk_eth_setup_tc,
};
static const char * const mtk_clks_source_name[] = {
-@@ -1459,6 +1470,9 @@ static void mtk_rx_put_buff(struct mtk_r
+@@ -1458,6 +1469,9 @@ static void mtk_rx_put_buff(struct mtk_r
static u32 mtk_xdp_run(struct mtk_eth *eth, struct mtk_rx_ring *ring,
struct xdp_buff *xdp, struct net_device *dev)
{
struct bpf_prog *prog;
u32 act = XDP_PASS;
-@@ -1471,13 +1485,16 @@ static u32 mtk_xdp_run(struct mtk_eth *e
+@@ -1470,13 +1484,16 @@ static u32 mtk_xdp_run(struct mtk_eth *e
act = bpf_prog_run_xdp(prog, xdp);
switch (act) {
case XDP_PASS:
default:
bpf_warn_invalid_xdp_action(act);
fallthrough;
-@@ -1490,6 +1507,11 @@ static u32 mtk_xdp_run(struct mtk_eth *e
+@@ -1489,6 +1506,11 @@ static u32 mtk_xdp_run(struct mtk_eth *e
page_pool_put_full_page(ring->page_pool,
virt_to_head_page(xdp->data), true);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -988,15 +988,26 @@ static void mtk_tx_unmap(struct mtk_eth
+@@ -987,15 +987,26 @@ static void mtk_tx_unmap(struct mtk_eth
}
}
}
static void setup_tx_buf(struct mtk_eth *eth, struct mtk_tx_buf *tx_buf,
-@@ -1013,7 +1024,7 @@ static void setup_tx_buf(struct mtk_eth
+@@ -1012,7 +1023,7 @@ static void setup_tx_buf(struct mtk_eth
dma_unmap_addr_set(tx_buf, dma_addr1, mapped_addr);
dma_unmap_len_set(tx_buf, dma_len1, size);
} else {
txd->txd1 = mapped_addr;
txd->txd2 = TX_DMA_PLEN0(size);
dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr);
-@@ -1189,7 +1200,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1188,7 +1199,7 @@ static int mtk_tx_map(struct sk_buff *sk
soc->txrx.txd_size);
if (new_desc)
memset(tx_buf, 0, sizeof(*tx_buf));
tx_buf->flags |= MTK_TX_FLAGS_PAGE0;
tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 :
MTK_TX_FLAGS_FPORT1;
-@@ -1203,7 +1214,8 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1202,7 +1213,8 @@ static int mtk_tx_map(struct sk_buff *sk
}
/* store skb to cleanup */
if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
if (k & 0x1)
-@@ -1415,13 +1427,14 @@ static struct page_pool *mtk_create_page
+@@ -1414,13 +1426,14 @@ static struct page_pool *mtk_create_page
.pool_size = size,
.nid = NUMA_NO_NODE,
.dev = eth->dma_dev,
pp = page_pool_create(&pp_params);
if (IS_ERR(pp))
return pp;
-@@ -1467,6 +1480,122 @@ static void mtk_rx_put_buff(struct mtk_r
+@@ -1466,6 +1479,122 @@ static void mtk_rx_put_buff(struct mtk_r
skb_free_frag(data);
}
static u32 mtk_xdp_run(struct mtk_eth *eth, struct mtk_rx_ring *ring,
struct xdp_buff *xdp, struct net_device *dev)
{
-@@ -1495,6 +1624,18 @@ static u32 mtk_xdp_run(struct mtk_eth *e
+@@ -1494,6 +1623,18 @@ static u32 mtk_xdp_run(struct mtk_eth *e
count = &hw_stats->xdp_stats.rx_xdp_redirect;
goto update_stats;
default:
bpf_warn_invalid_xdp_action(act);
fallthrough;
-@@ -1728,9 +1869,8 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1727,9 +1868,8 @@ static int mtk_poll_tx_qdma(struct mtk_e
{
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
struct mtk_tx_ring *ring = ð->tx_ring;
u32 cpu, dma;
cpu = ring->last_free_ptr;
-@@ -1751,15 +1891,21 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1750,15 +1890,21 @@ static int mtk_poll_tx_qdma(struct mtk_e
if (tx_buf->flags & MTK_TX_FLAGS_FPORT1)
mac = 1;
mtk_tx_unmap(eth, tx_buf, true);
ring->last_free = desc;
-@@ -1778,9 +1924,8 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -1777,9 +1923,8 @@ static int mtk_poll_tx_pdma(struct mtk_e
unsigned int *done, unsigned int *bytes)
{
struct mtk_tx_ring *ring = ð->tx_ring;
u32 cpu, dma;
cpu = ring->cpu_idx;
-@@ -1788,14 +1933,18 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -1787,14 +1932,18 @@ static int mtk_poll_tx_pdma(struct mtk_e
while ((cpu != dma) && budget) {
tx_buf = &ring->buf[cpu];
}
mtk_tx_unmap(eth, tx_buf, true);
-@@ -3463,6 +3612,7 @@ static const struct net_device_ops mtk_n
+@@ -3462,6 +3611,7 @@ static const struct net_device_ops mtk_n
#endif
.ndo_setup_tc = mtk_eth_setup_tc,
.ndo_bpf = mtk_xdp,
MediaTek SoC family.
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3474,11 +3474,18 @@ static void mtk_get_strings(struct net_d
+@@ -3473,11 +3473,18 @@ static void mtk_get_strings(struct net_d
int i;
switch (stringset) {
break;
}
}
-@@ -3486,13 +3493,35 @@ static void mtk_get_strings(struct net_d
+@@ -3485,13 +3492,35 @@ static void mtk_get_strings(struct net_d
static int mtk_get_sset_count(struct net_device *dev, int sset)
{
switch (sset) {
static void mtk_get_ethtool_stats(struct net_device *dev,
struct ethtool_stats *stats, u64 *data)
{
-@@ -3520,6 +3549,8 @@ static void mtk_get_ethtool_stats(struct
+@@ -3519,6 +3548,8 @@ static void mtk_get_ethtool_stats(struct
for (i = 0; i < ARRAY_SIZE(mtk_ethtool_stats); i++)
*data_dst++ = *(data_src + mtk_ethtool_stats[i].offset);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1480,6 +1480,41 @@ static void mtk_rx_put_buff(struct mtk_r
+@@ -1479,6 +1479,41 @@ static void mtk_rx_put_buff(struct mtk_r
skb_free_frag(data);
}
static int mtk_xdp_submit_frame(struct mtk_eth *eth, struct xdp_frame *xdpf,
struct net_device *dev, bool dma_map)
{
-@@ -1490,9 +1525,8 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1489,9 +1524,8 @@ static int mtk_xdp_submit_frame(struct m
.first = true,
.last = true,
};
struct mtk_tx_buf *tx_buf;
if (unlikely(test_bit(MTK_RESETTING, ð->state)))
-@@ -1512,36 +1546,18 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1511,36 +1545,18 @@ static int mtk_xdp_submit_frame(struct m
tx_buf = mtk_desc_to_tx_buf(ring, txd, soc->txrx.txd_size);
memset(tx_buf, 0, sizeof(*tx_buf));
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -988,23 +988,22 @@ static void mtk_tx_unmap(struct mtk_eth
+@@ -987,23 +987,22 @@ static void mtk_tx_unmap(struct mtk_eth
}
}
}
tx_buf->flags = 0;
tx_buf->data = NULL;
-@@ -1507,6 +1506,8 @@ static int mtk_xdp_frame_map(struct mtk_
+@@ -1506,6 +1505,8 @@ static int mtk_xdp_frame_map(struct mtk_
mtk_tx_set_dma_desc(dev, txd, txd_info);
tx_buf->flags |= !mac->id ? MTK_TX_FLAGS_FPORT0 : MTK_TX_FLAGS_FPORT1;
txd_pdma = qdma_to_pdma(ring, txd);
setup_tx_buf(eth, tx_buf, txd_pdma, txd_info->addr, txd_info->size,
-@@ -1518,43 +1519,69 @@ static int mtk_xdp_frame_map(struct mtk_
+@@ -1517,43 +1518,69 @@ static int mtk_xdp_frame_map(struct mtk_
static int mtk_xdp_submit_frame(struct mtk_eth *eth, struct xdp_frame *xdpf,
struct net_device *dev, bool dma_map)
{
if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
txd_pdma = qdma_to_pdma(ring, txd);
-@@ -1581,7 +1608,24 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1580,7 +1607,24 @@ static int mtk_xdp_submit_frame(struct m
mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size),
MT7628_TX_CTX_IDX0);
}
spin_unlock(ð->page_lock);
return err;
-@@ -1910,18 +1954,15 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1909,18 +1953,15 @@ static int mtk_poll_tx_qdma(struct mtk_e
if (!tx_buf->data)
break;
mtk_tx_unmap(eth, tx_buf, true);
ring->last_free = desc;
-@@ -1952,17 +1993,15 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -1951,17 +1992,15 @@ static int mtk_poll_tx_pdma(struct mtk_e
if (!tx_buf->data)
break;
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -11783,6 +11783,14 @@ L: netdev@vger.kernel.org
+@@ -11790,6 +11790,14 @@ L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/mediatek/
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1846,10 +1846,19 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1845,10 +1845,19 @@ static int mtk_poll_rx(struct napi_struc
skb->dev = netdev;
bytes += skb->len;
if (*rxdcsum & eth->soc->txrx.rx_dma_l4_valid)
skb->ip_summed = CHECKSUM_UNNECESSARY;
-@@ -1857,16 +1866,9 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1856,16 +1865,9 @@ static int mtk_poll_rx(struct napi_struc
skb_checksum_none_assert(skb);
skb->protocol = eth_type_trans(skb, netdev);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1413,7 +1413,7 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1412,7 +1412,7 @@ static void mtk_update_rx_cpu_idx(struct
static bool mtk_page_pool_enabled(struct mtk_eth *eth)
{
};
/* strings used by ethtool */
-@@ -2928,6 +2932,7 @@ static int mtk_open(struct net_device *d
+@@ -2927,6 +2931,7 @@ static int mtk_open(struct net_device *d
/* we run 2 netdevs on the same dma ring so we only bring it up once */
if (!refcount_read(ð->dma_refcnt)) {
u32 gdm_config = MTK_GDMA_TO_PDMA;
int err;
-@@ -2937,15 +2942,15 @@ static int mtk_open(struct net_device *d
+@@ -2936,15 +2941,15 @@ static int mtk_open(struct net_device *d
return err;
}
refcount_set(ð->dma_refcnt, 1);
}
else
-@@ -4044,7 +4049,9 @@ static int mtk_probe(struct platform_dev
+@@ -4043,7 +4048,9 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4147,6 +4147,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4146,6 +4146,7 @@ static const struct mtk_soc_data mt7621_
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4165,6 +4166,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4164,6 +4165,7 @@ static const struct mtk_soc_data mt7622_
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4182,6 +4184,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4181,6 +4183,7 @@ static const struct mtk_soc_data mt7623_
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.offload_version = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4215,6 +4218,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4214,6 +4217,7 @@ static const struct mtk_soc_data mt7986_
.caps = MT7986_CAPS,
.required_clks = MT7986_CLKS_BITMAP,
.required_pctl = false,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1872,7 +1872,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1871,7 +1871,7 @@ static int mtk_poll_rx(struct napi_struc
reason = FIELD_GET(MTK_RXD4_PPE_CPU_REASON, trxd.rxd4);
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
-@@ -2933,7 +2933,8 @@ static int mtk_open(struct net_device *d
+@@ -2932,7 +2932,8 @@ static int mtk_open(struct net_device *d
/* we run 2 netdevs on the same dma ring so we only bring it up once */
if (!refcount_read(ð->dma_refcnt)) {
const struct mtk_soc_data *soc = eth->soc;
int err;
err = mtk_start_dma(eth);
-@@ -2942,8 +2943,11 @@ static int mtk_open(struct net_device *d
+@@ -2941,8 +2942,11 @@ static int mtk_open(struct net_device *d
return err;
}
mtk_gdm_config(eth, gdm_config);
-@@ -2988,6 +2992,7 @@ static int mtk_stop(struct net_device *d
+@@ -2987,6 +2991,7 @@ static int mtk_stop(struct net_device *d
{
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
phylink_stop(mac->phylink);
-@@ -3015,8 +3020,8 @@ static int mtk_stop(struct net_device *d
+@@ -3014,8 +3019,8 @@ static int mtk_stop(struct net_device *d
mtk_dma_free(eth);
return 0;
}
-@@ -4049,12 +4054,19 @@ static int mtk_probe(struct platform_dev
+@@ -4048,12 +4053,19 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
};
/* strings used by ethtool */
-@@ -3966,16 +3974,12 @@ static int mtk_probe(struct platform_dev
+@@ -3965,16 +3973,12 @@ static int mtk_probe(struct platform_dev
for (i = 0;; i++) {
struct device_node *np = of_parse_phandle(pdev->dev.of_node,
"mediatek,wed", i);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4164,6 +4164,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4163,6 +4163,7 @@ static const struct mtk_soc_data mt7621_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4183,6 +4184,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4182,6 +4183,7 @@ static const struct mtk_soc_data mt7622_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4201,6 +4203,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4200,6 +4202,7 @@ static const struct mtk_soc_data mt7623_
.required_pctl = true,
.offload_version = 2,
.hash_offset = 2,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3891,6 +3891,7 @@ void mtk_eth_set_dma_device(struct mtk_e
+@@ -3890,6 +3890,7 @@ void mtk_eth_set_dma_device(struct mtk_e
static int mtk_probe(struct platform_device *pdev)
{
struct device_node *mac_np;
struct mtk_eth *eth;
int err, i;
-@@ -3971,16 +3972,31 @@ static int mtk_probe(struct platform_dev
+@@ -3970,16 +3971,31 @@ static int mtk_probe(struct platform_dev
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1859,12 +1859,14 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1858,12 +1858,14 @@ static int mtk_poll_rx(struct napi_struc
bytes += skb->len;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
hash = trxd.rxd4 & MTK_RXD4_FOE_ENTRY;
if (hash != MTK_RXD4_FOE_ENTRY)
skb_set_hash(skb, jhash_1word(hash, 0),
-@@ -1878,7 +1880,6 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1877,7 +1879,6 @@ static int mtk_poll_rx(struct napi_struc
skb_checksum_none_assert(skb);
skb->protocol = eth_type_trans(skb, netdev);
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
mtk_ppe_check_skb(eth->ppe[0], skb, hash);
-@@ -4180,7 +4181,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4179,7 +4180,7 @@ static const struct mtk_soc_data mt7621_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4200,7 +4201,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4199,7 +4200,7 @@ static const struct mtk_soc_data mt7622_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4219,7 +4220,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4218,7 +4219,7 @@ static const struct mtk_soc_data mt7623_
.required_pctl = true,
.offload_version = 2,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4251,9 +4252,11 @@ static const struct mtk_soc_data mt7986_
+@@ -4250,9 +4251,11 @@ static const struct mtk_soc_data mt7986_
.reg_map = &mt7986_reg_map,
.ana_rgc3 = 0x128,
.caps = MT7986_CAPS,
entry->hash = 0xffff;
continue;
@@ -771,6 +805,8 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
- MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
+ MTK_PPE_SCAN_MODE_CHECK_AGE) |
FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
MTK_PPE_ENTRIES_SHIFT);
+ if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2))
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4255,6 +4255,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4254,6 +4254,7 @@ static const struct mtk_soc_data mt7986_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7986_CLKS_BITMAP,
.required_pctl = false,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4007,19 +4007,23 @@ static int mtk_probe(struct platform_dev
+@@ -4006,19 +4006,23 @@ static int mtk_probe(struct platform_dev
eth->irq[i] = platform_get_irq(pdev, i);
if (eth->irq[i] < 0) {
dev_err(&pdev->dev, "no IRQ%d resource found\n", i);
}
eth->clks[i] = NULL;
}
-@@ -4030,7 +4034,7 @@ static int mtk_probe(struct platform_dev
+@@ -4029,7 +4033,7 @@ static int mtk_probe(struct platform_dev
err = mtk_hw_init(eth);
if (err)
eth->hwlro = MTK_HAS_CAPS(eth->soc->caps, MTK_HWLRO);
-@@ -4128,6 +4132,8 @@ err_free_dev:
+@@ -4127,6 +4131,8 @@ err_free_dev:
mtk_free_dev(eth);
err_deinit_hw:
mtk_hw_deinit(eth);
return err;
}
-@@ -4147,6 +4153,7 @@ static int mtk_remove(struct platform_de
+@@ -4146,6 +4152,7 @@ static int mtk_remove(struct platform_de
phylink_disconnect_phy(mac->phylink);
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4090,13 +4090,13 @@ static int mtk_probe(struct platform_dev
+@@ -4089,13 +4089,13 @@ static int mtk_probe(struct platform_dev
eth->soc->offload_version, i);
if (!eth->ppe[i]) {
err = -ENOMEM;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4090,13 +4090,13 @@ static int mtk_probe(struct platform_dev
+@@ -4089,13 +4089,13 @@ static int mtk_probe(struct platform_dev
eth->soc->offload_version, i);
if (!eth->ppe[i]) {
err = -ENOMEM;
}
for (i = 0; i < MTK_MAX_DEVS; i++) {
-@@ -4106,7 +4106,7 @@ static int mtk_probe(struct platform_dev
+@@ -4105,7 +4105,7 @@ static int mtk_probe(struct platform_dev
err = register_netdev(eth->netdev[i]);
if (err) {
dev_err(eth->dev, "error bringing up device\n");
} else
netif_info(eth, probe, eth->netdev[i],
"mediatek frame engine at 0x%08lx, irq %d\n",
-@@ -4126,7 +4126,8 @@ static int mtk_probe(struct platform_dev
+@@ -4125,7 +4125,8 @@ static int mtk_probe(struct platform_dev
return 0;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3179,6 +3179,30 @@ static void mtk_dim_tx(struct work_struc
+@@ -3178,6 +3178,30 @@ static void mtk_dim_tx(struct work_struc
dim->state = DIM_START_MEASURE;
}
static int mtk_hw_init(struct mtk_eth *eth)
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
-@@ -3253,8 +3277,16 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3252,8 +3276,16 @@ static int mtk_hw_init(struct mtk_eth *e
* up with the more appropriate value when mtk_mac_config call is being
* invoked.
*/
/* Indicates CDM to parse the MTK special tag from CPU
* which also is working out for untag packets.
-@@ -3353,7 +3385,6 @@ static int mtk_change_mtu(struct net_dev
+@@ -3352,7 +3384,6 @@ static int mtk_change_mtu(struct net_dev
int length = new_mtu + MTK_RX_ETH_HLEN;
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
if (rcu_access_pointer(eth->prog) &&
length > MTK_PP_MAX_BUF_SIZE) {
-@@ -3361,23 +3392,7 @@ static int mtk_change_mtu(struct net_dev
+@@ -3360,23 +3391,7 @@ static int mtk_change_mtu(struct net_dev
return -EINVAL;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3423,11 +3423,8 @@ static void mtk_pending_work(struct work
+@@ -3422,11 +3422,8 @@ static void mtk_pending_work(struct work
rtnl_lock();
dev_dbg(eth->dev, "[%s][%d] reset\n", __func__, __LINE__);
/* stop all devices to make sure that dma is properly shut down */
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!eth->netdev[i])
-@@ -3461,7 +3458,7 @@ static void mtk_pending_work(struct work
+@@ -3460,7 +3457,7 @@ static void mtk_pending_work(struct work
dev_dbg(eth->dev, "[%s][%d] reset done\n", __func__, __LINE__);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3242,16 +3242,17 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3241,16 +3241,17 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3203,6 +3203,27 @@ static void mtk_set_mcr_max_rx(struct mt
+@@ -3202,6 +3202,27 @@ static void mtk_set_mcr_max_rx(struct mt
mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
}
static int mtk_hw_init(struct mtk_eth *eth)
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
-@@ -3242,22 +3263,9 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3241,22 +3262,9 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3224,7 +3224,54 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3223,7 +3223,54 @@ static void mtk_hw_reset(struct mtk_eth
0x3ffffff);
}
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
ETHSYS_DMA_AG_MAP_PPE;
-@@ -3263,7 +3310,12 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3262,7 +3309,12 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
/* Set FE to PDMAv2 if necessary */
-@@ -3451,7 +3503,7 @@ static void mtk_pending_work(struct work
+@@ -3450,7 +3502,7 @@ static void mtk_pending_work(struct work
if (eth->dev->pins)
pinctrl_select_state(eth->dev->pins->p,
eth->dev->pins->default_state);
/* restart DMA and enable IRQs */
for (i = 0; i < MTK_MAC_COUNT; i++) {
-@@ -4053,7 +4105,7 @@ static int mtk_probe(struct platform_dev
+@@ -4052,7 +4104,7 @@ static int mtk_probe(struct platform_dev
eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE);
INIT_WORK(ð->pending_work, mtk_pending_work);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2789,14 +2789,29 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2788,14 +2788,29 @@ static void mtk_dma_free(struct mtk_eth
kfree(eth->scratch_head);
}
schedule_work(ð->pending_work);
}
-@@ -3278,15 +3293,17 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3277,15 +3292,17 @@ static int mtk_hw_init(struct mtk_eth *e
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
int i, val, ret;
if (eth->ethsys)
regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, dma_mask,
-@@ -3412,8 +3429,10 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3411,8 +3428,10 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
err_disable_pm:
return ret;
}
-@@ -3475,30 +3494,53 @@ static int mtk_do_ioctl(struct net_devic
+@@ -3474,30 +3493,53 @@ static int mtk_do_ioctl(struct net_devic
return -EOPNOTSUPP;
}
if (eth->dev->pins)
pinctrl_select_state(eth->dev->pins->p,
-@@ -3509,15 +3551,19 @@ static void mtk_pending_work(struct work
+@@ -3508,15 +3550,19 @@ static void mtk_pending_work(struct work
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!test_bit(i, &restart))
continue;
};
/* strings used by ethtool */
-@@ -3286,6 +3292,102 @@ static void mtk_hw_warm_reset(struct mtk
+@@ -3285,6 +3291,102 @@ static void mtk_hw_warm_reset(struct mtk
val, rst_mask);
}
static int mtk_hw_init(struct mtk_eth *eth, bool reset)
{
u32 dma_mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA |
-@@ -3601,6 +3703,7 @@ static int mtk_cleanup(struct mtk_eth *e
+@@ -3600,6 +3702,7 @@ static int mtk_cleanup(struct mtk_eth *e
mtk_unreg_dev(eth);
mtk_free_dev(eth);
cancel_work_sync(ð->pending_work);
return 0;
}
-@@ -4038,6 +4141,7 @@ static int mtk_probe(struct platform_dev
+@@ -4037,6 +4140,7 @@ static int mtk_probe(struct platform_dev
eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
INIT_WORK(ð->rx_dim.work, mtk_dim_rx);
eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
INIT_WORK(ð->tx_dim.work, mtk_dim_tx);
-@@ -4242,6 +4346,8 @@ static int mtk_probe(struct platform_dev
+@@ -4241,6 +4345,8 @@ static int mtk_probe(struct platform_dev
NAPI_POLL_WEIGHT);
platform_set_drvdata(pdev, eth);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3632,6 +3632,11 @@ static void mtk_pending_work(struct work
+@@ -3631,6 +3631,11 @@ static void mtk_pending_work(struct work
set_bit(MTK_RESETTING, ð->state);
mtk_prepare_for_reset(eth);
/* stop all devices to make sure that dma is properly shut down */
for (i = 0; i < MTK_MAC_COUNT; i++) {
-@@ -3669,6 +3674,8 @@ static void mtk_pending_work(struct work
+@@ -3668,6 +3673,8 @@ static void mtk_pending_work(struct work
clear_bit(MTK_RESETTING, ð->state);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -901,7 +901,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -900,7 +900,7 @@ static int mtk_init_fq_dma(struct mtk_et
{
const struct mtk_soc_data *soc = eth->soc;
dma_addr_t phy_ring_tail;
dma_addr_t dma_addr;
int i;
-@@ -2155,19 +2155,25 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2154,19 +2154,25 @@ static int mtk_tx_alloc(struct mtk_eth *
struct mtk_tx_ring *ring = ð->tx_ring;
int i, sz = soc->txrx.txd_size;
struct mtk_tx_dma_v2 *txd;
u32 next_ptr = ring->phys + next * sz;
txd = ring->dma + i * sz;
-@@ -2187,22 +2193,22 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2186,22 +2192,22 @@ static int mtk_tx_alloc(struct mtk_eth *
* descriptors in ring->dma_pdma.
*/
if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
ring->thresh = MAX_SKB_FRAGS;
/* make sure that all changes to the dma ring are flushed before we
-@@ -2214,14 +2220,14 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2213,14 +2219,14 @@ static int mtk_tx_alloc(struct mtk_eth *
mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr);
mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr);
mtk_w32(eth,
mtk_w32(eth, 0, MT7628_TX_CTX_IDX0);
mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx);
}
-@@ -2239,7 +2245,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2238,7 +2244,7 @@ static void mtk_tx_clean(struct mtk_eth
int i;
if (ring->buf) {
mtk_tx_unmap(eth, &ring->buf[i], false);
kfree(ring->buf);
ring->buf = NULL;
-@@ -2247,14 +2253,14 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2246,14 +2252,14 @@ static void mtk_tx_clean(struct mtk_eth
if (ring->dma) {
dma_free_coherent(eth->dma_dev,
ring->dma_pdma, ring->phys_pdma);
ring->dma_pdma = NULL;
}
-@@ -2777,7 +2783,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2776,7 +2782,7 @@ static void mtk_dma_free(struct mtk_eth
netdev_reset_queue(eth->netdev[i]);
if (eth->scratch_ring) {
dma_free_coherent(eth->dma_dev,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4425,7 +4425,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4424,7 +4424,7 @@ static const struct mtk_soc_data mt7621_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.hash_offset = 2,
.foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
.txrx = {
-@@ -4464,7 +4464,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4463,7 +4463,7 @@ static const struct mtk_soc_data mt7623_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
},
.gdm1_cnt = 0x1c00,
.gdma_to_ppe0 = 0x3333,
-@@ -577,6 +581,75 @@ static void mtk_mac_link_down(struct phy
+@@ -576,6 +580,75 @@ static void mtk_mac_link_down(struct phy
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}
static void mtk_mac_link_up(struct phylink_config *config,
struct phy_device *phy,
unsigned int mode, phy_interface_t interface,
-@@ -602,6 +675,8 @@ static void mtk_mac_link_up(struct phyli
+@@ -601,6 +674,8 @@ static void mtk_mac_link_up(struct phyli
break;
}
/* Configure duplex */
if (duplex == DUPLEX_FULL)
mcr |= MAC_MCR_FORCE_DPX;
-@@ -1060,7 +1135,8 @@ static void mtk_tx_set_dma_desc_v1(struc
+@@ -1059,7 +1134,8 @@ static void mtk_tx_set_dma_desc_v1(struc
WRITE_ONCE(desc->txd1, info->addr);
if (info->last)
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
-@@ -1094,9 +1170,6 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1093,9 +1169,6 @@ static void mtk_tx_set_dma_desc_v2(struc
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */
data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
WRITE_ONCE(desc->txd4, data);
-@@ -1140,11 +1213,12 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1139,11 +1212,12 @@ static int mtk_tx_map(struct sk_buff *sk
.gso = gso,
.csum = skb->ip_summed == CHECKSUM_PARTIAL,
.vlan = skb_vlan_tag_present(skb),
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
const struct mtk_soc_data *soc = eth->soc;
-@@ -1152,8 +1226,10 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1151,8 +1225,10 @@ static int mtk_tx_map(struct sk_buff *sk
struct mtk_tx_dma *itxd_pdma, *txd_pdma;
struct mtk_tx_buf *itx_buf, *tx_buf;
int i, n_desc = 1;
itxd = ring->next_free;
itxd_pdma = qdma_to_pdma(ring, itxd);
if (itxd == ring->last_free)
-@@ -1202,7 +1278,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1201,7 +1277,7 @@ static int mtk_tx_map(struct sk_buff *sk
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.size = min_t(unsigned int, frag_size,
soc->txrx.dma_max_len);
txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
!(frag_size - txd_info.size);
txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
-@@ -1241,7 +1317,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1240,7 +1316,7 @@ static int mtk_tx_map(struct sk_buff *sk
txd_pdma->txd2 |= TX_DMA_LS1;
}
skb_tx_timestamp(skb);
ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2);
-@@ -1253,8 +1329,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1252,8 +1328,7 @@ static int mtk_tx_map(struct sk_buff *sk
wmb();
if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) {
mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr);
} else {
int next_idx;
-@@ -1323,7 +1398,7 @@ static void mtk_wake_queue(struct mtk_et
+@@ -1322,7 +1397,7 @@ static void mtk_wake_queue(struct mtk_et
for (i = 0; i < MTK_MAC_COUNT; i++) {
if (!eth->netdev[i])
continue;
}
}
-@@ -1347,7 +1422,7 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1346,7 +1421,7 @@ static netdev_tx_t mtk_start_xmit(struct
tx_num = mtk_cal_txd_req(eth, skb);
if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
netif_err(eth, tx_queued, dev,
"Tx Ring full when queue awake!\n");
spin_unlock(ð->page_lock);
-@@ -1373,7 +1448,7 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1372,7 +1447,7 @@ static netdev_tx_t mtk_start_xmit(struct
goto drop;
if (unlikely(atomic_read(&ring->free_count) <= ring->thresh))
spin_unlock(ð->page_lock);
-@@ -1540,10 +1615,12 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1539,10 +1614,12 @@ static int mtk_xdp_submit_frame(struct m
struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf);
const struct mtk_soc_data *soc = eth->soc;
struct mtk_tx_ring *ring = ð->tx_ring;
};
int err, index = 0, n_desc = 1, nr_frags;
struct mtk_tx_dma *htxd, *txd, *txd_pdma;
-@@ -1594,6 +1671,7 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1593,6 +1670,7 @@ static int mtk_xdp_submit_frame(struct m
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.size = skb_frag_size(&sinfo->frags[index]);
txd_info.last = index + 1 == nr_frags;
data = skb_frag_address(&sinfo->frags[index]);
index++;
-@@ -1945,8 +2023,46 @@ rx_done:
+@@ -1944,8 +2022,46 @@ rx_done:
return done;
}
{
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
struct mtk_tx_ring *ring = ð->tx_ring;
-@@ -1976,12 +2092,9 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1975,12 +2091,9 @@ static int mtk_poll_tx_qdma(struct mtk_e
break;
if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) {
budget--;
}
mtk_tx_unmap(eth, tx_buf, true);
-@@ -1999,7 +2112,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -1998,7 +2111,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
}
static int mtk_poll_tx_pdma(struct mtk_eth *eth, int budget,
{
struct mtk_tx_ring *ring = ð->tx_ring;
struct mtk_tx_buf *tx_buf;
-@@ -2015,12 +2128,8 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -2014,12 +2127,8 @@ static int mtk_poll_tx_pdma(struct mtk_e
break;
if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) {
budget--;
}
mtk_tx_unmap(eth, tx_buf, true);
-@@ -2041,26 +2150,15 @@ static int mtk_poll_tx(struct mtk_eth *e
+@@ -2040,26 +2149,15 @@ static int mtk_poll_tx(struct mtk_eth *e
{
struct mtk_tx_ring *ring = ð->tx_ring;
struct dim_sample dim_sample = {};
dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes,
&dim_sample);
-@@ -2070,7 +2168,7 @@ static int mtk_poll_tx(struct mtk_eth *e
+@@ -2069,7 +2167,7 @@ static int mtk_poll_tx(struct mtk_eth *e
(atomic_read(&ring->free_count) > ring->thresh))
mtk_wake_queue(eth);
}
static void mtk_handle_status_irq(struct mtk_eth *eth)
-@@ -2156,6 +2254,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2155,6 +2253,7 @@ static int mtk_tx_alloc(struct mtk_eth *
int i, sz = soc->txrx.txd_size;
struct mtk_tx_dma_v2 *txd;
int ring_size;
if (MTK_HAS_CAPS(soc->caps, MTK_QDMA))
ring_size = MTK_QDMA_RING_SIZE;
-@@ -2223,8 +2322,25 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2222,8 +2321,25 @@ static int mtk_tx_alloc(struct mtk_eth *
ring->phys + ((ring_size - 1) * sz),
soc->reg_map->qdma.crx_ptr);
mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr);
} else {
mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0);
mtk_w32(eth, ring_size, MT7628_TX_MAX_CNT0);
-@@ -2907,7 +3023,7 @@ static int mtk_start_dma(struct mtk_eth
+@@ -2906,7 +3022,7 @@ static int mtk_start_dma(struct mtk_eth
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
else
val |= MTK_RX_BT_32DWORDS;
mtk_w32(eth, val, reg_map->qdma.glo_cfg);
-@@ -2953,6 +3069,45 @@ static void mtk_gdm_config(struct mtk_et
+@@ -2952,6 +3068,45 @@ static void mtk_gdm_config(struct mtk_et
mtk_w32(eth, 0, MTK_RST_GL);
}
static int mtk_open(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
-@@ -2997,7 +3152,8 @@ static int mtk_open(struct net_device *d
+@@ -2996,7 +3151,8 @@ static int mtk_open(struct net_device *d
refcount_inc(ð->dma_refcnt);
phylink_start(mac->phylink);
return 0;
}
-@@ -3703,8 +3859,12 @@ static int mtk_unreg_dev(struct mtk_eth
+@@ -3702,8 +3858,12 @@ static int mtk_unreg_dev(struct mtk_eth
int i;
for (i = 0; i < MTK_MAC_COUNT; i++) {
unregister_netdev(eth->netdev[i]);
}
-@@ -3921,6 +4081,23 @@ static int mtk_set_rxnfc(struct net_devi
+@@ -3920,6 +4080,23 @@ static int mtk_set_rxnfc(struct net_devi
return ret;
}
static const struct ethtool_ops mtk_ethtool_ops = {
.get_link_ksettings = mtk_get_link_ksettings,
.set_link_ksettings = mtk_set_link_ksettings,
-@@ -3955,6 +4132,7 @@ static const struct net_device_ops mtk_n
+@@ -3954,6 +4131,7 @@ static const struct net_device_ops mtk_n
.ndo_setup_tc = mtk_eth_setup_tc,
.ndo_bpf = mtk_xdp,
.ndo_xdp_xmit = mtk_xdp_xmit,
};
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
-@@ -3964,6 +4142,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3963,6 +4141,7 @@ static int mtk_add_mac(struct mtk_eth *e
struct phylink *phylink;
struct mtk_mac *mac;
int id, err;
if (!_id) {
dev_err(eth->dev, "missing mac id\n");
-@@ -3981,7 +4160,10 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -3980,7 +4159,10 @@ static int mtk_add_mac(struct mtk_eth *e
return -EINVAL;
}
if (!eth->netdev[id]) {
dev_err(eth->dev, "alloc_etherdev failed\n");
return -ENOMEM;
-@@ -4089,6 +4271,11 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4088,6 +4270,11 @@ static int mtk_add_mac(struct mtk_eth *e
else
eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN;
#include "mtk_eth_soc.h"
#include "mtk_wed.h"
-@@ -1974,16 +1975,22 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1973,16 +1974,22 @@ static int mtk_poll_rx(struct napi_struc
htons(RX_DMA_VPID(trxd.rxd4)),
RX_DMA_VID(trxd.rxd4));
} else if (trxd.rxd2 & RX_DMA_VTAG) {
}
skb_record_rx_queue(skb, 0);
-@@ -2803,15 +2810,30 @@ static netdev_features_t mtk_fix_feature
+@@ -2802,15 +2809,30 @@ static netdev_features_t mtk_fix_feature
static int mtk_set_features(struct net_device *dev, netdev_features_t features)
{
}
/* wait for DMA to finish whatever it is doing before we start using it again */
-@@ -3108,11 +3130,45 @@ found:
+@@ -3107,11 +3129,45 @@ found:
return NOTIFY_DONE;
}
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
if (err) {
-@@ -3635,6 +3691,10 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3634,6 +3690,10 @@ static int mtk_hw_init(struct mtk_eth *e
*/
val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);
mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL);
/* Enable RX VLan Offloading */
mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
-@@ -3851,6 +3911,12 @@ static int mtk_free_dev(struct mtk_eth *
+@@ -3850,6 +3910,12 @@ static int mtk_free_dev(struct mtk_eth *
free_netdev(eth->netdev[i]);
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3715,9 +3715,12 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3714,9 +3714,12 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3146,7 +3146,8 @@ static int mtk_open(struct net_device *d
+@@ -3145,7 +3145,8 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
struct metadata_dst *md_dst = eth->dsa_meta[i];
-@@ -3163,7 +3164,8 @@ static int mtk_open(struct net_device *d
+@@ -3162,7 +3163,8 @@ static int mtk_open(struct net_device *d
}
} else {
/* Hardware special tag parsing needs to be disabled if at least
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3081,7 +3081,7 @@ static void mtk_gdm_config(struct mtk_et
+@@ -3080,7 +3080,7 @@ static void mtk_gdm_config(struct mtk_et
val |= config;
val |= MTK_GDMA_SPECIAL_TAG;
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-@@ -3146,8 +3146,7 @@ static int mtk_open(struct net_device *d
+@@ -3145,8 +3145,7 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) {
struct metadata_dst *md_dst = eth->dsa_meta[i];
-@@ -3164,8 +3163,7 @@ static int mtk_open(struct net_device *d
+@@ -3163,8 +3162,7 @@ static int mtk_open(struct net_device *d
}
} else {
/* Hardware special tag parsing needs to be disabled if at least
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1830,7 +1830,9 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1829,7 +1829,9 @@ static int mtk_poll_rx(struct napi_struc
while (done < budget) {
unsigned int pktlen, *rxdcsum;
dma_addr_t dma_addr;
u32 hash, reason;
int mac = 0;
-@@ -1970,27 +1972,29 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1969,27 +1971,29 @@ static int mtk_poll_rx(struct napi_struc
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -676,8 +676,6 @@ static void mtk_mac_link_up(struct phyli
+@@ -675,8 +675,6 @@ static void mtk_mac_link_up(struct phyli
break;
}
mtk_eth_path_name(path), __func__, updated);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4752,6 +4752,26 @@ static const struct mtk_soc_data mt7629_
+@@ -4751,6 +4751,26 @@ static const struct mtk_soc_data mt7629_
},
};
static const struct mtk_soc_data mt7986_data = {
.reg_map = &mt7986_reg_map,
.ana_rgc3 = 0x128,
-@@ -4794,6 +4814,7 @@ const struct of_device_id of_mtk_match[]
+@@ -4793,6 +4813,7 @@ const struct of_device_id of_mtk_match[]
{ .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
{ .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
{ .compatible = "mediatek,mt7629-eth", .data = &mt7629_data},
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -702,8 +702,10 @@ static const struct phylink_mac_ops mtk_
+@@ -701,8 +701,10 @@ static const struct phylink_mac_ops mtk_
static int mtk_mdio_init(struct mtk_eth *eth)
{
mii_np = of_get_child_by_name(eth->dev->of_node, "mdio-bus");
if (!mii_np) {
-@@ -729,6 +731,25 @@ static int mtk_mdio_init(struct mtk_eth
+@@ -728,6 +730,25 @@ static int mtk_mdio_init(struct mtk_eth
eth->mii_bus->parent = eth->dev;
snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np);
}
return NULL;
-@@ -3963,8 +3964,17 @@ static int mtk_unreg_dev(struct mtk_eth
+@@ -3962,8 +3963,17 @@ static int mtk_unreg_dev(struct mtk_eth
return 0;
}
mtk_unreg_dev(eth);
mtk_free_dev(eth);
cancel_work_sync(ð->pending_work);
-@@ -4404,6 +4414,36 @@ void mtk_eth_set_dma_device(struct mtk_e
+@@ -4403,6 +4413,36 @@ void mtk_eth_set_dma_device(struct mtk_e
rtnl_unlock();
}
static int mtk_probe(struct platform_device *pdev)
{
struct resource *res = NULL;
-@@ -4467,13 +4507,7 @@ static int mtk_probe(struct platform_dev
+@@ -4466,13 +4506,7 @@ static int mtk_probe(struct platform_dev
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
if (err)
return err;
-@@ -4484,14 +4518,17 @@ static int mtk_probe(struct platform_dev
+@@ -4483,14 +4517,17 @@ static int mtk_probe(struct platform_dev
"mediatek,pctl");
if (IS_ERR(eth->pctl)) {
dev_err(&pdev->dev, "no pctl regmap found\n");
}
if (eth->soc->offload_version) {
-@@ -4652,6 +4689,8 @@ err_deinit_hw:
+@@ -4651,6 +4688,8 @@ err_deinit_hw:
mtk_hw_deinit(eth);
err_wed_exit:
mtk_wed_exit();
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4638,8 +4638,8 @@ static int mtk_probe(struct platform_dev
+@@ -4637,8 +4637,8 @@ static int mtk_probe(struct platform_dev
for (i = 0; i < num_ppe; i++) {
u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400;
if (!eth->ppe[i]) {
err = -ENOMEM;
goto err_deinit_ppe;
-@@ -4765,6 +4765,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4764,6 +4764,7 @@ static const struct mtk_soc_data mt7622_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.foe_entry_size = sizeof(struct mtk_foe_entry) - 16,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
-@@ -4802,6 +4803,7 @@ static const struct mtk_soc_data mt7629_
+@@ -4801,6 +4802,7 @@ static const struct mtk_soc_data mt7629_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7629_CLKS_BITMAP,
.required_pctl = false,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4822,6 +4824,7 @@ static const struct mtk_soc_data mt7981_
+@@ -4821,6 +4823,7 @@ static const struct mtk_soc_data mt7981_
.offload_version = 2,
.hash_offset = 4,
.foe_entry_size = sizeof(struct mtk_foe_entry),
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
-@@ -4842,6 +4845,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4841,6 +4844,7 @@ static const struct mtk_soc_data mt7986_
.offload_version = 2,
.hash_offset = 4,
.foe_entry_size = sizeof(struct mtk_foe_entry),
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1850,9 +1850,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1849,9 +1849,7 @@ static int mtk_poll_rx(struct napi_struc
while (done < budget) {
unsigned int pktlen, *rxdcsum;
dma_addr_t dma_addr;
u32 hash, reason;
int mac = 0;
-@@ -1987,36 +1985,21 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1986,36 +1984,21 @@ static int mtk_poll_rx(struct napi_struc
skb_checksum_none_assert(skb);
skb->protocol = eth_type_trans(skb, netdev);
skb_record_rx_queue(skb, 0);
napi_gro_receive(napi, skb);
-@@ -2834,29 +2817,11 @@ static netdev_features_t mtk_fix_feature
+@@ -2833,29 +2816,11 @@ static netdev_features_t mtk_fix_feature
static int mtk_set_features(struct net_device *dev, netdev_features_t features)
{
return 0;
}
-@@ -3170,30 +3135,6 @@ static int mtk_open(struct net_device *d
+@@ -3169,30 +3134,6 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
if (err) {
netdev_err(dev, "%s: could not attach PHY: %d\n", __func__,
-@@ -3234,6 +3175,35 @@ static int mtk_open(struct net_device *d
+@@ -3233,6 +3174,35 @@ static int mtk_open(struct net_device *d
phylink_start(mac->phylink);
netif_tx_start_all_queues(dev);
return 0;
}
-@@ -3718,10 +3688,9 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3717,10 +3687,9 @@ static int mtk_hw_init(struct mtk_eth *e
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL);
/* set interrupt delays based on current Net DIM sample */
mtk_dim_rx(ð->rx_dim.work);
-@@ -4361,7 +4330,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4360,7 +4329,7 @@ static int mtk_add_mac(struct mtk_eth *e
eth->netdev[id]->hw_features |= NETIF_F_LRO;
eth->netdev[id]->vlan_features = eth->soc->hw_features &
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4714,7 +4714,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4713,7 +4713,7 @@ static const struct mtk_soc_data mt7621_
.required_pctl = false,
.offload_version = 1,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4735,7 +4735,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4734,7 +4734,7 @@ static const struct mtk_soc_data mt7622_
.offload_version = 2,
.hash_offset = 2,
.has_accounting = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4754,7 +4754,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4753,7 +4753,7 @@ static const struct mtk_soc_data mt7623_
.required_pctl = true,
.offload_version = 1,
.hash_offset = 2,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4792,8 +4792,8 @@ static const struct mtk_soc_data mt7981_
+@@ -4791,8 +4791,8 @@ static const struct mtk_soc_data mt7981_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma_v2),
.rxd_size = sizeof(struct mtk_rx_dma_v2),
-@@ -4813,8 +4813,8 @@ static const struct mtk_soc_data mt7986_
+@@ -4812,8 +4812,8 @@ static const struct mtk_soc_data mt7986_
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
/* mt7623_pad_clk_setup */
for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
-@@ -4289,13 +4261,19 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4288,13 +4260,19 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;
if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id)
__set_bit(PHY_INTERFACE_MODE_TRGMII,
-@@ -4755,6 +4733,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4754,6 +4732,7 @@ static const struct mtk_soc_data mt7623_
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -512,38 +512,6 @@ static int mtk_mac_finish(struct phylink
+@@ -511,38 +511,6 @@ static int mtk_mac_finish(struct phylink
return 0;
}
static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode,
phy_interface_t interface)
{
-@@ -666,7 +634,6 @@ static void mtk_mac_link_up(struct phyli
+@@ -665,7 +633,6 @@ static void mtk_mac_link_up(struct phyli
static const struct phylink_mac_ops mtk_phylink_ops = {
.validate = phylink_generic_validate,
.mac_select_pcs = mtk_mac_select_pcs,
.mac_config = mtk_mac_config,
.mac_finish = mtk_mac_finish,
.mac_link_down = mtk_mac_link_down,
-@@ -4256,8 +4223,6 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4255,8 +4222,6 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -537,7 +537,7 @@ static void mtk_set_queue_speed(struct m
+@@ -536,7 +536,7 @@ static void mtk_set_queue_speed(struct m
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |
MTK_QTX_SCH_LEAKY_BUCKET_SIZE;
val |= MTK_QTX_SCH_LEAKY_BUCKET_EN;
if (IS_ENABLED(CONFIG_SOC_MT7621)) {
-@@ -912,7 +912,7 @@ static bool mtk_rx_get_desc(struct mtk_e
+@@ -911,7 +911,7 @@ static bool mtk_rx_get_desc(struct mtk_e
rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
rxd->rxd5 = READ_ONCE(dma_rxd->rxd5);
rxd->rxd6 = READ_ONCE(dma_rxd->rxd6);
}
-@@ -970,7 +970,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -969,7 +969,7 @@ static int mtk_init_fq_dma(struct mtk_et
txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
txd->txd4 = 0;
txd->txd5 = 0;
txd->txd6 = 0;
txd->txd7 = 0;
-@@ -1159,7 +1159,7 @@ static void mtk_tx_set_dma_desc(struct n
+@@ -1158,7 +1158,7 @@ static void mtk_tx_set_dma_desc(struct n
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
mtk_tx_set_dma_desc_v2(dev, txd, info);
else
mtk_tx_set_dma_desc_v1(dev, txd, info);
-@@ -1466,7 +1466,7 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1465,7 +1465,7 @@ static void mtk_update_rx_cpu_idx(struct
static bool mtk_page_pool_enabled(struct mtk_eth *eth)
{
}
static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth,
-@@ -1806,7 +1806,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1805,7 +1805,7 @@ static int mtk_poll_rx(struct napi_struc
break;
/* find out which mac the packet come from. values start at 1 */
mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1;
else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
!(trxd.rxd4 & RX_DMA_SPECIAL_TAG))
-@@ -1902,7 +1902,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1901,7 +1901,7 @@ static int mtk_poll_rx(struct napi_struc
skb->dev = netdev;
bytes += skb->len;
reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5);
hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY;
if (hash != MTK_RXD5_FOE_ENTRY)
-@@ -1927,8 +1927,8 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1926,8 +1926,8 @@ static int mtk_poll_rx(struct napi_struc
/* When using VLAN untagging in combination with DSA, the
* hardware treats the MTK special tag as a VLAN and untags it.
*/
unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0);
if (port < ARRAY_SIZE(eth->dsa_meta) &&
-@@ -2232,7 +2232,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2231,7 +2231,7 @@ static int mtk_tx_alloc(struct mtk_eth *
txd->txd2 = next_ptr;
txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
txd->txd4 = 0;
txd->txd5 = 0;
txd->txd6 = 0;
txd->txd7 = 0;
-@@ -2285,14 +2285,14 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2284,14 +2284,14 @@ static int mtk_tx_alloc(struct mtk_eth *
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) |
FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) |
MTK_QTX_SCH_LEAKY_BUCKET_SIZE;
mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4);
} else {
mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0);
-@@ -2419,7 +2419,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2418,7 +2418,7 @@ static int mtk_rx_alloc(struct mtk_eth *
rxd->rxd3 = 0;
rxd->rxd4 = 0;
rxd->rxd5 = 0;
rxd->rxd6 = 0;
rxd->rxd7 = 0;
-@@ -2970,7 +2970,7 @@ static int mtk_start_dma(struct mtk_eth
+@@ -2969,7 +2969,7 @@ static int mtk_start_dma(struct mtk_eth
MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO |
MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE;
val |= MTK_MUTLI_CNT | MTK_RESV_BUF |
MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |
MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN;
-@@ -3114,7 +3114,7 @@ static int mtk_open(struct net_device *d
+@@ -3113,7 +3113,7 @@ static int mtk_open(struct net_device *d
phylink_start(mac->phylink);
netif_tx_start_all_queues(dev);
return 0;
if (mtk_uses_dsa(dev) && !eth->prog) {
-@@ -3379,7 +3379,7 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3378,7 +3378,7 @@ static void mtk_hw_reset(struct mtk_eth
{
u32 val;
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);
val = RSTCTRL_PPE0_V2;
} else {
-@@ -3391,7 +3391,7 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3390,7 +3390,7 @@ static void mtk_hw_reset(struct mtk_eth
ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val);
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
0x3ffffff);
}
-@@ -3417,7 +3417,7 @@ static void mtk_hw_warm_reset(struct mtk
+@@ -3416,7 +3416,7 @@ static void mtk_hw_warm_reset(struct mtk
return;
}
rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2;
else
rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0;
-@@ -3587,7 +3587,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3586,7 +3586,7 @@ static int mtk_hw_init(struct mtk_eth *e
else
mtk_hw_reset(eth);
/* Set FE to PDMAv2 if necessary */
val = mtk_r32(eth, MTK_FE_GLO_MISC);
mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC);
-@@ -3624,7 +3624,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3623,7 +3623,7 @@ static int mtk_hw_init(struct mtk_eth *e
*/
val = mtk_r32(eth, MTK_CDMQ_IG_CTRL);
mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL);
val = mtk_r32(eth, MTK_CDMP_IG_CTRL);
mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL);
-@@ -3646,7 +3646,7 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3645,7 +3645,7 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
/* PSE should not drop port8 and port9 packets from WDMA Tx */
mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
-@@ -4435,7 +4435,7 @@ static int mtk_probe(struct platform_dev
+@@ -4434,7 +4434,7 @@ static int mtk_probe(struct platform_dev
}
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
err = -EINVAL;
-@@ -4543,9 +4543,8 @@ static int mtk_probe(struct platform_dev
+@@ -4542,9 +4542,8 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe);
for (i = 0; i < num_ppe; i++) {
u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400;
-@@ -4639,6 +4638,7 @@ static const struct mtk_soc_data mt2701_
+@@ -4638,6 +4637,7 @@ static const struct mtk_soc_data mt2701_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4655,6 +4655,7 @@ static const struct mtk_soc_data mt7621_
+@@ -4654,6 +4654,7 @@ static const struct mtk_soc_data mt7621_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7621_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
-@@ -4675,6 +4676,7 @@ static const struct mtk_soc_data mt7622_
+@@ -4674,6 +4675,7 @@ static const struct mtk_soc_data mt7622_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.hash_offset = 2,
.has_accounting = true,
-@@ -4695,6 +4697,7 @@ static const struct mtk_soc_data mt7623_
+@@ -4694,6 +4696,7 @@ static const struct mtk_soc_data mt7623_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
-@@ -4717,6 +4720,7 @@ static const struct mtk_soc_data mt7629_
+@@ -4716,6 +4719,7 @@ static const struct mtk_soc_data mt7629_
.required_clks = MT7629_CLKS_BITMAP,
.required_pctl = false,
.has_accounting = true,
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
-@@ -4734,6 +4738,7 @@ static const struct mtk_soc_data mt7981_
+@@ -4733,6 +4737,7 @@ static const struct mtk_soc_data mt7981_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7981_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
.has_accounting = true,
-@@ -4755,6 +4760,7 @@ static const struct mtk_soc_data mt7986_
+@@ -4754,6 +4759,7 @@ static const struct mtk_soc_data mt7986_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7986_CLKS_BITMAP,
.required_pctl = false,
.offload_version = 2,
.hash_offset = 4,
.has_accounting = true,
-@@ -4775,6 +4781,7 @@ static const struct mtk_soc_data rt5350_
+@@ -4774,6 +4780,7 @@ static const struct mtk_soc_data rt5350_
.hw_features = MTK_HW_FEATURES_MT7628,
.required_clks = MT7628_CLKS_BITMAP,
.required_pctl = false,
else
val = MTK_FOE_IB2_MIB_CNT;
@@ -971,7 +971,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
- MTK_PPE_SCAN_MODE_KEEPALIVE_AGE) |
+ MTK_PPE_SCAN_MODE_CHECK_AGE) |
FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM,
MTK_PPE_ENTRIES_SHIFT);
- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2))
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -838,7 +838,7 @@ static void mtk_stats_update(struct mtk_
+@@ -837,7 +837,7 @@ static void mtk_stats_update(struct mtk_
{
int i;
if (!eth->mac[i] || !eth->mac[i]->hw_stats)
continue;
if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) {
-@@ -1341,7 +1341,7 @@ static int mtk_queue_stopped(struct mtk_
+@@ -1340,7 +1340,7 @@ static int mtk_queue_stopped(struct mtk_
{
int i;
if (!eth->netdev[i])
continue;
if (netif_queue_stopped(eth->netdev[i]))
-@@ -1355,7 +1355,7 @@ static void mtk_wake_queue(struct mtk_et
+@@ -1354,7 +1354,7 @@ static void mtk_wake_queue(struct mtk_et
{
int i;
if (!eth->netdev[i])
continue;
netif_tx_wake_all_queues(eth->netdev[i]);
-@@ -1812,7 +1812,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1811,7 +1811,7 @@ static int mtk_poll_rx(struct napi_struc
!(trxd.rxd4 & RX_DMA_SPECIAL_TAG))
mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1;
!eth->netdev[mac]))
goto release_desc;
-@@ -2844,7 +2844,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -2843,7 +2843,7 @@ static void mtk_dma_free(struct mtk_eth
const struct mtk_soc_data *soc = eth->soc;
int i;
if (eth->netdev[i])
netdev_reset_queue(eth->netdev[i]);
if (eth->scratch_ring) {
-@@ -2998,8 +2998,13 @@ static void mtk_gdm_config(struct mtk_et
+@@ -2997,8 +2997,13 @@ static void mtk_gdm_config(struct mtk_et
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
return;
/* default setup the forward port to send frame to PDMA */
val &= ~0xffff;
-@@ -3009,7 +3014,7 @@ static void mtk_gdm_config(struct mtk_et
+@@ -3008,7 +3013,7 @@ static void mtk_gdm_config(struct mtk_et
val |= config;
val |= MTK_GDMA_SPECIAL_TAG;
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-@@ -3608,15 +3613,15 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3607,15 +3612,15 @@ static int mtk_hw_init(struct mtk_eth *e
* up with the more appropriate value when mtk_mac_config call is being
* invoked.
*/
}
/* Indicates CDM to parse the MTK special tag from CPU
-@@ -3796,7 +3801,7 @@ static void mtk_pending_work(struct work
+@@ -3795,7 +3800,7 @@ static void mtk_pending_work(struct work
mtk_prepare_for_reset(eth);
/* stop all devices to make sure that dma is properly shut down */
if (!eth->netdev[i] || !netif_running(eth->netdev[i]))
continue;
-@@ -3812,8 +3817,8 @@ static void mtk_pending_work(struct work
+@@ -3811,8 +3816,8 @@ static void mtk_pending_work(struct work
mtk_hw_init(eth, true);
/* restart DMA and enable IRQs */
continue;
if (mtk_open(eth->netdev[i])) {
-@@ -3840,7 +3845,7 @@ static int mtk_free_dev(struct mtk_eth *
+@@ -3839,7 +3844,7 @@ static int mtk_free_dev(struct mtk_eth *
{
int i;
if (!eth->netdev[i])
continue;
free_netdev(eth->netdev[i]);
-@@ -3859,7 +3864,7 @@ static int mtk_unreg_dev(struct mtk_eth
+@@ -3858,7 +3863,7 @@ static int mtk_unreg_dev(struct mtk_eth
{
int i;
struct mtk_mac *mac;
if (!eth->netdev[i])
continue;
-@@ -4160,7 +4165,7 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4159,7 +4164,7 @@ static int mtk_add_mac(struct mtk_eth *e
}
id = be32_to_cpup(_id);
dev_err(eth->dev, "%d is not a valid mac id\n", id);
return -EINVAL;
}
-@@ -4305,7 +4310,7 @@ void mtk_eth_set_dma_device(struct mtk_e
+@@ -4304,7 +4309,7 @@ void mtk_eth_set_dma_device(struct mtk_e
rtnl_lock();
dev = eth->netdev[i];
if (!dev || !(dev->flags & IFF_UP))
-@@ -4613,7 +4618,7 @@ static int mtk_remove(struct platform_de
+@@ -4612,7 +4617,7 @@ static int mtk_remove(struct platform_de
int i;
/* stop all devices to make sure that dma is properly shut down */
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -818,17 +818,32 @@ void mtk_stats_update_mac(struct mtk_mac
+@@ -817,17 +817,32 @@ void mtk_stats_update_mac(struct mtk_mac
mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs);
hw_stats->rx_flow_control_packets +=
mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs);
}
u64_stats_update_end(&hw_stats->syncp);
-@@ -1130,7 +1145,10 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1129,7 +1144,10 @@ static void mtk_tx_set_dma_desc_v2(struc
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
WRITE_ONCE(desc->txd4, data);
-@@ -1141,6 +1159,8 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1140,6 +1158,8 @@ static void mtk_tx_set_dma_desc_v2(struc
/* tx checksum offload */
if (info->csum)
data |= TX_DMA_CHKSUM_V2;
}
WRITE_ONCE(desc->txd5, data);
-@@ -1206,8 +1226,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1205,8 +1225,7 @@ static int mtk_tx_map(struct sk_buff *sk
mtk_tx_set_dma_desc(dev, itxd, &txd_info);
itx_buf->flags |= MTK_TX_FLAGS_SINGLE0;
setup_tx_buf(eth, itx_buf, itxd_pdma, txd_info.addr, txd_info.size,
k++);
-@@ -1255,8 +1274,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1254,8 +1273,7 @@ static int mtk_tx_map(struct sk_buff *sk
memset(tx_buf, 0, sizeof(*tx_buf));
tx_buf->data = (void *)MTK_DMA_DUMMY_DESC;
tx_buf->flags |= MTK_TX_FLAGS_PAGE0;
setup_tx_buf(eth, tx_buf, txd_pdma, txd_info.addr,
txd_info.size, k++);
-@@ -1558,7 +1576,7 @@ static int mtk_xdp_frame_map(struct mtk_
+@@ -1557,7 +1575,7 @@ static int mtk_xdp_frame_map(struct mtk_
}
mtk_tx_set_dma_desc(dev, txd, txd_info);
tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX;
tx_buf->data = (void *)MTK_DMA_DUMMY_DESC;
-@@ -1806,11 +1824,24 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1805,11 +1823,24 @@ static int mtk_poll_rx(struct napi_struc
break;
/* find out which mac the packet come from. values start at 1 */
if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS ||
!eth->netdev[mac]))
-@@ -2030,7 +2061,6 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2029,7 +2060,6 @@ static int mtk_poll_tx_qdma(struct mtk_e
while ((cpu != dma) && budget) {
u32 next_cpu = desc->txd2;
desc = mtk_qdma_phys_to_virt(ring, desc->txd2);
if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0)
-@@ -2038,15 +2068,13 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2037,15 +2067,13 @@ static int mtk_poll_tx_qdma(struct mtk_e
tx_buf = mtk_desc_to_tx_buf(ring, desc,
eth->soc->txrx.txd_size);
budget--;
}
-@@ -3651,7 +3679,24 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -3650,7 +3678,24 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
/* PSE should not drop port8 and port9 packets from WDMA Tx */
mtk_w32(eth, 0x00000300, PSE_DROP_CFG);
-@@ -4213,7 +4258,11 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4212,7 +4257,11 @@ static int mtk_add_mac(struct mtk_eth *e
}
spin_lock_init(&mac->hw_stats->stats_lock);
u64_stats_init(&mac->hw_stats->syncp);
return;
err_phy:
-@@ -682,11 +798,15 @@ static int mtk_mdio_init(struct mtk_eth
+@@ -681,11 +797,15 @@ static int mtk_mdio_init(struct mtk_eth
}
divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63);
dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider);
-@@ -1145,10 +1265,19 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1144,10 +1264,19 @@ static void mtk_tx_set_dma_desc_v2(struc
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid);
WRITE_ONCE(desc->txd4, data);
-@@ -4307,6 +4436,17 @@ static int mtk_add_mac(struct mtk_eth *e
+@@ -4306,6 +4435,17 @@ static int mtk_add_mac(struct mtk_eth *e
mac->phylink_config.supported_interfaces);
}
phylink = phylink_create(&mac->phylink_config,
of_fwnode_handle(mac->of_node),
phy_mode, &mtk_phylink_ops);
-@@ -4829,6 +4969,24 @@ static const struct mtk_soc_data mt7986_
+@@ -4828,6 +4968,24 @@ static const struct mtk_soc_data mt7986_
},
};
static const struct mtk_soc_data rt5350_data = {
.reg_map = &mt7628_reg_map,
.caps = MT7628_CAPS,
-@@ -4847,14 +5005,15 @@ static const struct mtk_soc_data rt5350_
+@@ -4846,14 +5004,15 @@ static const struct mtk_soc_data rt5350_
};
const struct of_device_id of_mtk_match[] = {
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1613,7 +1613,7 @@ static void mtk_update_rx_cpu_idx(struct
+@@ -1612,7 +1612,7 @@ static void mtk_update_rx_cpu_idx(struct
static bool mtk_page_pool_enabled(struct mtk_eth *eth)
{
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4977,6 +4977,9 @@ static const struct mtk_soc_data mt7988_
+@@ -4976,6 +4976,9 @@ static const struct mtk_soc_data mt7988_
.required_clks = MT7988_CLKS_BITMAP,
.required_pctl = false,
.version = 3,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -4979,6 +4979,7 @@ static const struct mtk_soc_data mt7988_
+@@ -4978,6 +4978,7 @@ static const struct mtk_soc_data mt7988_
.version = 3,
.offload_version = 2,
.hash_offset = 4,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3541,19 +3541,34 @@ static void mtk_hw_reset(struct mtk_eth
+@@ -3540,19 +3540,34 @@ static void mtk_hw_reset(struct mtk_eth
{
u32 val;
regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
0x3ffffff);
}
-@@ -3579,13 +3594,21 @@ static void mtk_hw_warm_reset(struct mtk
+@@ -3578,13 +3593,21 @@ static void mtk_hw_warm_reset(struct mtk
return;
}
regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask);
-@@ -3937,11 +3960,17 @@ static void mtk_prepare_for_reset(struct
+@@ -3936,11 +3959,17 @@ static void mtk_prepare_for_reset(struct
u32 val;
int i;
/* adjust PPE configurations to prepare for reset */
for (i = 0; i < ARRAY_SIZE(eth->ppe); i++)
-@@ -4002,11 +4031,18 @@ static void mtk_pending_work(struct work
+@@ -4001,11 +4030,18 @@ static void mtk_pending_work(struct work
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1075,10 +1075,13 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -1074,10 +1074,13 @@ static int mtk_init_fq_dma(struct mtk_et
dma_addr_t dma_addr;
int i;
if (unlikely(!eth->scratch_ring))
return -ENOMEM;
-@@ -2376,8 +2379,14 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2375,8 +2378,14 @@ static int mtk_tx_alloc(struct mtk_eth *
if (!ring->buf)
goto no_tx_mem;
if (!ring->dma)
goto no_tx_mem;
-@@ -2476,8 +2485,7 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2475,8 +2484,7 @@ static void mtk_tx_clean(struct mtk_eth
kfree(ring->buf);
ring->buf = NULL;
}
dma_free_coherent(eth->dma_dev,
ring->dma_size * soc->txrx.txd_size,
ring->dma, ring->phys);
-@@ -2496,9 +2504,14 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2495,9 +2503,14 @@ static int mtk_rx_alloc(struct mtk_eth *
{
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
struct mtk_rx_ring *ring;
if (rx_flag == MTK_RX_FLAGS_QDMA) {
if (ring_no)
return -EINVAL;
-@@ -2533,9 +2546,20 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2532,9 +2545,20 @@ static int mtk_rx_alloc(struct mtk_eth *
ring->page_pool = pp;
}
if (!ring->dma)
return -ENOMEM;
-@@ -2618,7 +2642,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2617,7 +2641,7 @@ static int mtk_rx_alloc(struct mtk_eth *
return 0;
}
{
int i;
-@@ -2641,7 +2665,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2640,7 +2664,7 @@ static void mtk_rx_clean(struct mtk_eth
ring->data = NULL;
}
dma_free_coherent(eth->dma_dev,
ring->dma_size * eth->soc->txrx.rxd_size,
ring->dma, ring->phys);
-@@ -3004,7 +3028,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -3003,7 +3027,7 @@ static void mtk_dma_free(struct mtk_eth
for (i = 0; i < MTK_MAX_DEVS; i++)
if (eth->netdev[i])
netdev_reset_queue(eth->netdev[i]);
dma_free_coherent(eth->dma_dev,
MTK_QDMA_RING_SIZE * soc->txrx.txd_size,
eth->scratch_ring, eth->phy_scratch_ring);
-@@ -3012,13 +3036,13 @@ static void mtk_dma_free(struct mtk_eth
+@@ -3011,13 +3035,13 @@ static void mtk_dma_free(struct mtk_eth
eth->phy_scratch_ring = 0;
}
mtk_tx_clean(eth);
}
kfree(eth->scratch_head);
-@@ -4588,7 +4612,7 @@ static int mtk_sgmii_init(struct mtk_eth
+@@ -4587,7 +4611,7 @@ static int mtk_sgmii_init(struct mtk_eth
static int mtk_probe(struct platform_device *pdev)
{
struct device_node *mac_np;
struct mtk_eth *eth;
int err, i;
-@@ -4608,6 +4632,20 @@ static int mtk_probe(struct platform_dev
+@@ -4607,6 +4631,20 @@ static int mtk_probe(struct platform_dev
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
eth->ip_align = NET_IP_ALIGN;
spin_lock_init(ð->page_lock);
spin_lock_init(ð->tx_irq_lock);
spin_lock_init(ð->rx_irq_lock);
-@@ -4671,6 +4709,18 @@ static int mtk_probe(struct platform_dev
+@@ -4670,6 +4708,18 @@ static int mtk_probe(struct platform_dev
err = -EINVAL;
goto err_destroy_sgmii;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1266,6 +1266,10 @@ static void mtk_tx_set_dma_desc_v2(struc
+@@ -1265,6 +1265,10 @@ static void mtk_tx_set_dma_desc_v2(struc
data = TX_DMA_PLEN0(info->size);
if (info->last)
data |= TX_DMA_LS0;
WRITE_ONCE(desc->txd3, data);
/* set forward port */
-@@ -1933,6 +1937,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1932,6 +1936,7 @@ static int mtk_poll_rx(struct napi_struc
bool xdp_flush = false;
int idx;
struct sk_buff *skb;
u8 *data, *new_data;
struct mtk_rx_dma_v2 *rxd, trxd;
int done = 0, bytes = 0;
-@@ -2048,7 +2053,10 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2047,7 +2052,10 @@ static int mtk_poll_rx(struct napi_struc
goto release_desc;
}
ring->buf_size, DMA_FROM_DEVICE);
skb = build_skb(data, ring->frag_size);
-@@ -2114,6 +2122,9 @@ release_desc:
+@@ -2113,6 +2121,9 @@ release_desc:
else
rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
ring->calc_idx = idx;
done++;
}
-@@ -2598,6 +2609,9 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2597,6 +2608,9 @@ static int mtk_rx_alloc(struct mtk_eth *
else
rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
rxd->rxd3 = 0;
rxd->rxd4 = 0;
if (mtk_is_netsys_v2_or_greater(eth)) {
-@@ -2644,6 +2658,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2643,6 +2657,7 @@ static int mtk_rx_alloc(struct mtk_eth *
static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_sram)
{
int i;
if (ring->data && ring->dma) {
-@@ -2657,7 +2672,10 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2656,7 +2671,10 @@ static void mtk_rx_clean(struct mtk_eth
if (!rxd->rxd1)
continue;
ring->buf_size, DMA_FROM_DEVICE);
mtk_rx_put_buff(ring, ring->data[i], false);
}
-@@ -4646,6 +4664,14 @@ static int mtk_probe(struct platform_dev
+@@ -4645,6 +4663,14 @@ static int mtk_probe(struct platform_dev
}
}
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2746,9 +2746,6 @@ mt7531_mac_config(struct dsa_switch *ds,
+@@ -2952,9 +2952,6 @@ mt7531_mac_config(struct dsa_switch *ds,
case PHY_INTERFACE_MODE_NA:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
return mt7531_sgmii_setup_mode_force(priv, port, interface);
default:
return -EINVAL;
-@@ -2824,13 +2821,6 @@ unsupported:
+@@ -3030,13 +3027,6 @@ unsupported:
return;
}
mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
mcr_new = mcr_cur;
mcr_new &= ~PMCR_LINK_SETTINGS_MASK;
-@@ -2967,6 +2957,9 @@ static void mt753x_phylink_get_caps(stru
+@@ -3173,6 +3163,9 @@ static void mt753x_phylink_get_caps(stru
config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
MAC_10 | MAC_100 | MAC_1000FD;
/* This driver does not make use of the speed, duplex, pause or the
* advertisement in its mac_config, so it is safe to mark this driver
* as non-legacy.
-@@ -3032,6 +3025,7 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
+@@ -3238,6 +3231,7 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
status = mt7530_read(priv, MT7531_PCS_CONTROL_1(port));
state->link = !!(status & MT7531_SGMII_LINK_STATUS);
if (state->interface == PHY_INTERFACE_MODE_SGMII &&
(status & MT7531_SGMII_AN_ENABLE)) {
val = mt7530_read(priv, MT7531_PCS_SPEED_ABILITY(port));
-@@ -3062,16 +3056,44 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
+@@ -3268,16 +3262,44 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
return 0;
}
}
static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
-@@ -3112,6 +3134,8 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3318,6 +3340,8 @@ mt753x_setup(struct dsa_switch *ds)
priv->pcs[i].pcs.ops = priv->info->pcs_ops;
priv->pcs[i].priv = priv;
priv->pcs[i].port = i;
ret = priv->info->sw_setup(ds);
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -373,6 +373,7 @@ enum mt7530_vlan_port_acc_frm {
+@@ -405,6 +405,7 @@ enum mt7530_vlan_port_acc_frm {
#define MT7531_SGMII_LINK_STATUS BIT(18)
#define MT7531_SGMII_AN_ENABLE BIT(12)
#define MT7531_SGMII_AN_RESTART BIT(9)
#include <linux/phylink.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
-@@ -2598,128 +2599,11 @@ static int mt7531_rgmii_setup(struct mt7
+@@ -2804,128 +2805,11 @@ static int mt7531_rgmii_setup(struct mt7
return 0;
}
static int
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
-@@ -2742,11 +2626,11 @@ mt7531_mac_config(struct dsa_switch *ds,
+@@ -2948,11 +2832,11 @@ mt7531_mac_config(struct dsa_switch *ds,
phydev = dp->slave->phydev;
return mt7531_rgmii_setup(priv, port, interface, phydev);
case PHY_INTERFACE_MODE_SGMII:
default:
return -EINVAL;
}
-@@ -2771,11 +2655,11 @@ mt753x_phylink_mac_select_pcs(struct dsa
+@@ -2977,11 +2861,11 @@ mt753x_phylink_mac_select_pcs(struct dsa
switch (interface) {
case PHY_INTERFACE_MODE_TRGMII:
default:
return NULL;
}
-@@ -3016,86 +2900,6 @@ static void mt7530_pcs_get_state(struct
+@@ -3222,86 +3106,6 @@ static void mt7530_pcs_get_state(struct
state->pause |= MLO_PAUSE_TX;
}
static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
phy_interface_t interface,
const unsigned long *advertising,
-@@ -3115,18 +2919,57 @@ static const struct phylink_pcs_ops mt75
+@@ -3321,18 +3125,57 @@ static const struct phylink_pcs_ops mt75
.pcs_an_restart = mt7530_pcs_an_restart,
};
int i, ret;
/* Initialise the PCS devices */
-@@ -3134,8 +2977,6 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3340,8 +3183,6 @@ mt753x_setup(struct dsa_switch *ds)
priv->pcs[i].pcs.ops = priv->info->pcs_ops;
priv->pcs[i].priv = priv;
priv->pcs[i].port = i;
}
ret = priv->info->sw_setup(ds);
-@@ -3150,6 +2991,16 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3356,6 +3197,16 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
return ret;
}
-@@ -3241,7 +3092,7 @@ static const struct mt753x_info mt753x_t
+@@ -3447,7 +3298,7 @@ static const struct mt753x_info mt753x_t
},
[ID_MT7531] = {
.id = ID_MT7531,
.sw_setup = mt7531_setup,
.phy_read = mt7531_ind_phy_read,
.phy_write = mt7531_ind_phy_write,
-@@ -3349,7 +3200,7 @@ static void
+@@ -3555,7 +3406,7 @@ static void
mt7530_remove(struct mdio_device *mdiodev)
{
struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev);
if (!priv)
return;
-@@ -3368,6 +3219,10 @@ mt7530_remove(struct mdio_device *mdiode
+@@ -3574,6 +3425,10 @@ mt7530_remove(struct mdio_device *mdiode
mt7530_free_irq(priv);
dsa_unregister_switch(priv->ds);
dev_set_drvdata(&mdiodev->dev, NULL);
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -364,47 +364,8 @@ enum mt7530_vlan_port_acc_frm {
+@@ -396,47 +396,8 @@ enum mt7530_vlan_port_acc_frm {
CCR_TX_OCT_CNT_BAD)
/* MT7531 SGMII register group */
/* Register for system reset */
#define MT7530_SYS_CTRL 0x7000
-@@ -703,13 +664,13 @@ struct mt7530_fdb {
+@@ -735,13 +696,13 @@ struct mt7530_fdb {
* @pm: The matrix used to show all connections with the port.
* @pvid: The VLAN specified is to be considered a PVID at ingress. Any
* untagged frames will be assigned to the related VLAN.
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -224,9 +224,10 @@ mt7530_mii_read(struct mt7530_priv *priv
+@@ -225,9 +225,10 @@ mt7530_mii_read(struct mt7530_priv *priv
/* MT7530 uses 31 as the pseudo port */
ret = bus->write(bus, 0x1f, 0x1f, page);
if (ret < 0) {
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2951,26 +2951,56 @@ static const struct regmap_bus mt7531_re
+@@ -3157,26 +3157,56 @@ static const struct regmap_bus mt7531_re
.reg_update_bits = mt7530_regmap_update_bits,
};
int i, ret;
/* Initialise the PCS devices */
-@@ -2992,15 +3022,11 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3198,15 +3228,11 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2924,7 +2924,7 @@ static int mt7530_regmap_read(void *cont
+@@ -3130,7 +3130,7 @@ static int mt7530_regmap_read(void *cont
{
struct mt7530_priv *priv = context;
return 0;
};
-@@ -2932,23 +2932,25 @@ static int mt7530_regmap_write(void *con
+@@ -3138,23 +3138,25 @@ static int mt7530_regmap_write(void *con
{
struct mt7530_priv *priv = context;
};
static int
-@@ -2974,6 +2976,9 @@ mt7531_create_sgmii(struct mt7530_priv *
+@@ -3180,6 +3182,9 @@ mt7531_create_sgmii(struct mt7530_priv *
mt7531_pcs_config[i]->reg_stride = 4;
mt7531_pcs_config[i]->reg_base = MT7531_SGMII_REG_BASE(5 + i);
mt7531_pcs_config[i]->max_register = 0x17c;
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -183,9 +183,9 @@ core_clear(struct mt7530_priv *priv, u32
+@@ -184,9 +184,9 @@ core_clear(struct mt7530_priv *priv, u32
}
static int
u16 page, r, lo, hi;
int ret;
-@@ -197,24 +197,34 @@ mt7530_mii_write(struct mt7530_priv *pri
+@@ -198,24 +198,34 @@ mt7530_mii_write(struct mt7530_priv *pri
/* MT7530 uses 31 as the pseudo port */
ret = bus->write(bus, 0x1f, 0x1f, page);
if (ret < 0)
u16 page, r, lo, hi;
int ret;
-@@ -223,17 +233,32 @@ mt7530_mii_read(struct mt7530_priv *priv
+@@ -224,17 +234,32 @@ mt7530_mii_read(struct mt7530_priv *priv
/* MT7530 uses 31 as the pseudo port */
ret = bus->write(bus, 0x1f, 0x1f, page);
}
static void
-@@ -283,14 +308,10 @@ mt7530_rmw(struct mt7530_priv *priv, u32
+@@ -284,14 +309,10 @@ mt7530_rmw(struct mt7530_priv *priv, u32
u32 mask, u32 set)
{
struct mii_bus *bus = priv->bus;
mutex_unlock(&bus->mdio_lock);
}
-@@ -298,7 +319,7 @@ mt7530_rmw(struct mt7530_priv *priv, u32
+@@ -299,7 +320,7 @@ mt7530_rmw(struct mt7530_priv *priv, u32
static void
mt7530_set(struct mt7530_priv *priv, u32 reg, u32 val)
{
}
static void
-@@ -2920,22 +2941,6 @@ static const struct phylink_pcs_ops mt75
+@@ -3126,22 +3147,6 @@ static const struct phylink_pcs_ops mt75
.pcs_an_restart = mt7530_pcs_an_restart,
};
static void
mt7530_mdio_regmap_lock(void *mdio_lock)
{
-@@ -2948,7 +2953,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc
+@@ -3154,7 +3159,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc
mutex_unlock(mdio_lock);
}
.reg_write = mt7530_regmap_write,
.reg_read = mt7530_regmap_read,
};
-@@ -2981,7 +2986,7 @@ mt7531_create_sgmii(struct mt7530_priv *
+@@ -3187,7 +3192,7 @@ mt7531_create_sgmii(struct mt7530_priv *
mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock;
regmap = devm_regmap_init(priv->dev,
mt7531_pcs_config[i]);
if (IS_ERR(regmap)) {
ret = PTR_ERR(regmap);
-@@ -3146,6 +3151,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match)
+@@ -3352,6 +3357,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match)
static int
mt7530_probe(struct mdio_device *mdiodev)
{
struct mt7530_priv *priv;
struct device_node *dn;
-@@ -3225,6 +3231,21 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3431,6 +3437,21 @@ mt7530_probe(struct mdio_device *mdiodev
mutex_init(&priv->reg_mutex);
dev_set_drvdata(&mdiodev->dev, priv);
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -747,6 +747,7 @@ struct mt753x_info {
+@@ -779,6 +779,7 @@ struct mt753x_info {
* @dev: The device pointer
* @ds: The pointer to the dsa core structure
* @bus: The bus used for the device and built-in PHY
* @rstc: The pointer to reset control used by MCM
* @core_pwr: The power supplied into the core
* @io_pwr: The power supplied into the I/O
-@@ -767,6 +768,7 @@ struct mt7530_priv {
+@@ -799,6 +800,7 @@ struct mt7530_priv {
struct device *dev;
struct dsa_switch *ds;
struct mii_bus *bus;
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -3032,12 +3032,6 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3238,12 +3238,6 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
return ret;
}
-@@ -3154,6 +3148,7 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3360,6 +3354,7 @@ mt7530_probe(struct mdio_device *mdiodev
static struct regmap_config *regmap_config;
struct mt7530_priv *priv;
struct device_node *dn;
dn = mdiodev->dev.of_node;
-@@ -3246,6 +3241,12 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3452,6 +3447,12 @@ mt7530_probe(struct mdio_device *mdiodev
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -143,31 +143,40 @@ err:
+@@ -144,31 +144,40 @@ err:
}
static void
}
static void
-@@ -264,13 +273,11 @@ mt7530_mii_read(struct mt7530_priv *priv
+@@ -265,13 +274,11 @@ mt7530_mii_read(struct mt7530_priv *priv
static void
mt7530_write(struct mt7530_priv *priv, u32 reg, u32 val)
{
}
static u32
-@@ -282,14 +289,13 @@ _mt7530_unlocked_read(struct mt7530_dumm
+@@ -283,14 +290,13 @@ _mt7530_unlocked_read(struct mt7530_dumm
static u32
_mt7530_read(struct mt7530_dummy_poll *p)
{
return val;
}
-@@ -307,13 +313,11 @@ static void
+@@ -308,13 +314,11 @@ static void
mt7530_rmw(struct mt7530_priv *priv, u32 reg,
u32 mask, u32 set)
{
}
static void
-@@ -645,14 +649,13 @@ static int
+@@ -646,14 +650,13 @@ static int
mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,
int regnum)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -685,7 +688,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr
+@@ -686,7 +689,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr
ret = val & MT7531_MDIO_RW_DATA_MASK;
out:
return ret;
}
-@@ -694,14 +697,13 @@ static int
+@@ -695,14 +698,13 @@ static int
mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
int regnum, u32 data)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -733,7 +735,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p
+@@ -734,7 +736,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p
}
out:
return ret;
}
-@@ -741,14 +743,13 @@ out:
+@@ -742,14 +744,13 @@ out:
static int
mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -771,7 +772,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr
+@@ -772,7 +773,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr
ret = val & MT7531_MDIO_RW_DATA_MASK;
out:
return ret;
}
-@@ -780,14 +781,13 @@ static int
+@@ -781,14 +782,13 @@ static int
mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum,
u16 data)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg,
!(reg & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -809,7 +809,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p
+@@ -810,7 +810,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p
}
out:
return ret;
}
-@@ -1117,7 +1117,6 @@ static int
+@@ -1323,7 +1323,6 @@ static int
mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
{
struct mt7530_priv *priv = ds->priv;
int length;
u32 val;
-@@ -1128,7 +1127,7 @@ mt7530_port_change_mtu(struct dsa_switch
+@@ -1334,7 +1333,7 @@ mt7530_port_change_mtu(struct dsa_switch
if (!dsa_is_cpu_port(ds, port))
return 0;
val = mt7530_mii_read(priv, MT7530_GMACCR);
val &= ~MAX_RX_PKT_LEN_MASK;
-@@ -1149,7 +1148,7 @@ mt7530_port_change_mtu(struct dsa_switch
+@@ -1355,7 +1354,7 @@ mt7530_port_change_mtu(struct dsa_switch
mt7530_mii_write(priv, MT7530_GMACCR, val);
return 0;
}
-@@ -1945,10 +1944,10 @@ mt7530_irq_thread_fn(int irq, void *dev_
+@@ -2151,10 +2150,10 @@ mt7530_irq_thread_fn(int irq, void *dev_
u32 val;
int p;
for (p = 0; p < MT7530_NUM_PHYS; p++) {
if (BIT(p) & val) {
-@@ -1984,7 +1983,7 @@ mt7530_irq_bus_lock(struct irq_data *d)
+@@ -2190,7 +2189,7 @@ mt7530_irq_bus_lock(struct irq_data *d)
{
struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
}
static void
-@@ -1993,7 +1992,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da
+@@ -2199,7 +2198,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da
struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -950,6 +950,24 @@ mt7530_set_ageing_time(struct dsa_switch
+@@ -951,6 +951,24 @@ mt7530_set_ageing_time(struct dsa_switch
return 0;
}
struct mt7530_priv *priv = ds->priv;
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -682,24 +682,6 @@ enum p5_interface_select {
+@@ -714,24 +714,6 @@ enum p5_interface_select {
P5_INTF_SEL_GMAC5_SGMII,
};
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -3160,44 +3160,21 @@ static const struct of_device_id mt7530_
+@@ -3366,44 +3366,21 @@ static const struct of_device_id mt7530_
MODULE_DEVICE_TABLE(of, mt7530_of_match);
static int
if (!priv->info)
return -EINVAL;
-@@ -3211,23 +3188,53 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3417,23 +3394,53 @@ mt7530_probe(struct mdio_device *mdiodev
return -EINVAL;
priv->id = priv->info->id;
priv->reset = devm_gpiod_get_optional(&mdiodev->dev, "reset",
GPIOD_OUT_LOW);
if (IS_ERR(priv->reset)) {
-@@ -3236,12 +3243,15 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3442,12 +3449,15 @@ mt7530_probe(struct mdio_device *mdiodev
}
}
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -3278,6 +3278,17 @@ mt7530_probe(struct mdio_device *mdiodev
+@@ -3484,6 +3484,17 @@ mt7530_probe(struct mdio_device *mdiodev
}
static void
mt7530_remove(struct mdio_device *mdiodev)
{
struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev);
-@@ -3296,16 +3307,11 @@ mt7530_remove(struct mdio_device *mdiode
+@@ -3502,16 +3513,11 @@ mt7530_remove(struct mdio_device *mdiode
dev_err(priv->dev, "Failed to disable io pwr: %d\n",
ret);
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -11895,6 +11895,7 @@ M: Landen Chao <Landen.Chao@mediatek.com
+@@ -11902,6 +11902,7 @@ M: Landen Chao <Landen.Chao@mediatek.com
M: DENG Qingfang <dqfext@gmail.com>
L: netdev@vger.kernel.org
S: Maintained
#include <linux/phylink.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
-@@ -192,31 +191,6 @@ core_clear(struct mt7530_priv *priv, u32
+@@ -193,31 +192,6 @@ core_clear(struct mt7530_priv *priv, u32
}
static int
mt7530_mii_write(struct mt7530_priv *priv, u32 reg, u32 val)
{
int ret;
-@@ -230,29 +204,6 @@ mt7530_mii_write(struct mt7530_priv *pri
+@@ -231,29 +205,6 @@ mt7530_mii_write(struct mt7530_priv *pri
return ret;
}
static u32
mt7530_mii_read(struct mt7530_priv *priv, u32 reg)
{
-@@ -2958,72 +2909,6 @@ static const struct phylink_pcs_ops mt75
+@@ -3164,72 +3115,6 @@ static const struct phylink_pcs_ops mt75
.pcs_an_restart = mt7530_pcs_an_restart,
};
static int
mt753x_setup(struct dsa_switch *ds)
{
-@@ -3082,7 +2967,7 @@ static int mt753x_set_mac_eee(struct dsa
+@@ -3288,7 +3173,7 @@ static int mt753x_set_mac_eee(struct dsa
return 0;
}
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
.get_strings = mt7530_get_strings,
-@@ -3116,8 +3001,9 @@ static const struct dsa_switch_ops mt753
+@@ -3322,8 +3207,9 @@ static const struct dsa_switch_ops mt753
.get_mac_eee = mt753x_get_mac_eee,
.set_mac_eee = mt753x_set_mac_eee,
};
[ID_MT7621] = {
.id = ID_MT7621,
.pcs_ops = &mt7530_pcs_ops,
-@@ -3150,16 +3036,9 @@ static const struct mt753x_info mt753x_t
+@@ -3356,16 +3242,9 @@ static const struct mt753x_info mt753x_t
.mac_port_config = mt7531_mac_config,
},
};
mt7530_probe_common(struct mt7530_priv *priv)
{
struct device *dev = priv->dev;
-@@ -3196,88 +3075,9 @@ mt7530_probe_common(struct mt7530_priv *
+@@ -3402,88 +3281,9 @@ mt7530_probe_common(struct mt7530_priv *
return 0;
}
mt7530_remove_common(struct mt7530_priv *priv)
{
if (priv->irq)
-@@ -3288,57 +3088,6 @@ mt7530_remove_common(struct mt7530_priv
+@@ -3494,57 +3294,6 @@ mt7530_remove_common(struct mt7530_priv
mutex_destroy(&priv->reg_mutex);
}
MODULE_LICENSE("GPL");
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -807,4 +807,10 @@ static inline void INIT_MT7530_DUMMY_POL
+@@ -839,4 +839,10 @@ static inline void INIT_MT7530_DUMMY_POL
p->reg = reg;
}
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -144,13 +144,15 @@ err:
+@@ -145,13 +145,15 @@ err:
static void
mt7530_mutex_lock(struct mt7530_priv *priv)
{
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -11893,9 +11893,11 @@ MEDIATEK SWITCH DRIVER
+@@ -11900,9 +11900,11 @@ MEDIATEK SWITCH DRIVER
M: Sean Wang <sean.wang@mediatek.com>
M: Landen Chao <Landen.Chao@mediatek.com>
M: DENG Qingfang <dqfext@gmail.com>
+MODULE_LICENSE("GPL");
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -1992,6 +1992,47 @@ static const struct irq_domain_ops mt753
+@@ -2198,6 +2198,47 @@ static const struct irq_domain_ops mt753
};
static void
mt7530_setup_mdio_irq(struct mt7530_priv *priv)
{
struct dsa_switch *ds = priv->ds;
-@@ -2025,8 +2066,15 @@ mt7530_setup_irq(struct mt7530_priv *pri
+@@ -2231,8 +2272,15 @@ mt7530_setup_irq(struct mt7530_priv *pri
return priv->irq ? : -EINVAL;
}
if (!priv->irq_domain) {
dev_err(dev, "failed to create IRQ domain\n");
return -ENOMEM;
-@@ -2521,6 +2569,25 @@ static void mt7531_mac_port_get_caps(str
+@@ -2727,6 +2775,25 @@ static void mt7531_mac_port_get_caps(str
}
}
static int
mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
{
-@@ -2597,6 +2664,17 @@ static bool mt753x_is_mac_port(u32 port)
+@@ -2803,6 +2870,17 @@ static bool mt753x_is_mac_port(u32 port)
}
static int
mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
{
-@@ -2666,7 +2744,8 @@ mt753x_phylink_mac_config(struct dsa_swi
+@@ -2872,7 +2950,8 @@ mt753x_phylink_mac_config(struct dsa_swi
switch (port) {
case 0 ... 4: /* Internal phy */
goto unsupported;
break;
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
-@@ -2744,7 +2823,8 @@ static void mt753x_phylink_mac_link_up(s
+@@ -2950,7 +3029,8 @@ static void mt753x_phylink_mac_link_up(s
/* MT753x MAC works in 1G full duplex mode for all up-clocked
* variants.
*/
(phy_interface_mode_is_8023z(interface))) {
speed = SPEED_1000;
duplex = DUPLEX_FULL;
-@@ -2824,6 +2904,21 @@ mt7531_cpu_port_config(struct dsa_switch
+@@ -3030,6 +3110,21 @@ mt7531_cpu_port_config(struct dsa_switch
return 0;
}
static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
-@@ -2969,6 +3064,27 @@ static int mt753x_set_mac_eee(struct dsa
+@@ -3175,6 +3270,27 @@ static int mt753x_set_mac_eee(struct dsa
return 0;
}
const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
-@@ -3037,6 +3153,17 @@ const struct mt753x_info mt753x_table[]
+@@ -3243,6 +3359,17 @@ const struct mt753x_info mt753x_table[]
.mac_port_get_caps = mt7531_mac_port_get_caps,
.mac_port_config = mt7531_mac_config,
},
MT7531_MIRROR_MASK : MIRROR_MASK)
/* Registers for BPDU and PAE frame control*/
-@@ -295,9 +296,8 @@ enum mt7530_vlan_port_acc_frm {
+@@ -327,9 +328,8 @@ enum mt7530_vlan_port_acc_frm {
MT7531_FORCE_DPX | \
MT7531_FORCE_RX_FC | \
MT7531_FORCE_TX_FC)
}
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -3031,6 +3031,12 @@ mt753x_setup(struct dsa_switch *ds)
+@@ -3237,6 +3237,12 @@ mt753x_setup(struct dsa_switch *ds)
if (ret && priv->irq)
mt7530_free_irq_common(priv);
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
-@@ -741,10 +741,10 @@ struct mt753x_info {
+@@ -773,10 +773,10 @@ struct mt753x_info {
* registers
* @p6_interface Holding the current port 6 interface
* @p5_intf_sel: Holding the current port 5 interface select
*/
struct mt7530_priv {
struct device *dev;
-@@ -763,7 +763,6 @@ struct mt7530_priv {
+@@ -795,7 +795,6 @@ struct mt7530_priv {
unsigned int p5_intf_sel;
u8 mirror_rx;
u8 mirror_tx;
struct mt7530_port ports[MT7530_NUM_PORTS];
struct mt753x_pcs pcs[MT7530_NUM_PORTS];
/* protect among processes for registers access*/
-@@ -771,6 +770,7 @@ struct mt7530_priv {
+@@ -803,6 +802,7 @@ struct mt7530_priv {
int irq;
struct irq_domain *irq_domain;
u32 irq_enable;
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -12694,6 +12694,7 @@ F: include/uapi/linux/meye.h
+@@ -12701,6 +12701,7 @@ F: include/uapi/linux/meye.h
MOTORCOMM PHY DRIVER
M: Peter Geis <pgwipeout@gmail.com>
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -17959,6 +17959,11 @@ L: netdev@vger.kernel.org
+@@ -17966,6 +17966,11 @@ L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/dlink/sundance.c
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -12358,6 +12358,14 @@ S: Supported
+@@ -12365,6 +12365,14 @@ S: Supported
F: Documentation/devicetree/bindings/mtd/atmel-nand.txt
F: drivers/mtd/nand/raw/atmel/*
imx_ocotp_nvmem_config.priv = priv;
--- a/drivers/nvmem/meson-efuse.c
+++ b/drivers/nvmem/meson-efuse.c
-@@ -93,6 +93,7 @@ static int meson_efuse_probe(struct plat
+@@ -74,6 +74,7 @@ static int meson_efuse_probe(struct plat
econfig->dev = dev;
econfig->name = dev_name(dev);
+#define SYMTAB_DISCARD_GPL
+#endif
+
- /* Align . to a 8 byte boundary equals to maximum function alignment. */
- #define ALIGN_FUNCTION() . = ALIGN(8)
+ /* Align . function alignment. */
+ #define ALIGN_FUNCTION() . = ALIGN(CONFIG_FUNCTION_ALIGNMENT)
@@ -485,14 +495,14 @@
/* Kernel symbol table: Normal symbols */ \
#include <linux/mutex.h>
#include <linux/err.h>
#include <linux/property.h>
-@@ -3360,3 +3361,5 @@ static int __init regmap_initcall(void)
+@@ -3364,3 +3365,5 @@ static int __init regmap_initcall(void)
return 0;
}
postcore_initcall(regmap_initcall);
#define QUECTEL_VENDOR_ID 0x2c7c
/* These Quectel products use Quectel's vendor ID */
-@@ -1147,6 +1152,11 @@ static const struct usb_device_id option
+@@ -1152,6 +1157,11 @@ static const struct usb_device_id option
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */
.driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) },
/* Quectel products using Qualcomm vendor ID */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)},
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20),
-@@ -1188,6 +1198,11 @@ static const struct usb_device_id option
+@@ -1193,6 +1203,11 @@ static const struct usb_device_id option
.driver_info = ZLP },
{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
.driver_info = RSVD(4) },
INDIRECT_CALLABLE_DECLARE(struct dst_entry *ip6_dst_check(struct dst_entry *,
u32));
INDIRECT_CALLABLE_DECLARE(struct dst_entry *ipv4_dst_check(struct dst_entry *,
-@@ -1994,9 +2008,11 @@ static void __sk_free(struct sock *sk)
+@@ -2005,9 +2019,11 @@ static void __sk_free(struct sock *sk)
if (likely(sk->sk_net_refcnt))
sock_inuse_add(sock_net(sk), -1);
--- a/fs/locks.c
+++ b/fs/locks.c
-@@ -2953,6 +2953,8 @@ static const struct seq_operations locks
+@@ -3008,6 +3008,8 @@ static const struct seq_operations locks
static int __init proc_locks_init(void)
{
--- a/net/core/sock.c
+++ b/net/core/sock.c
-@@ -3889,6 +3889,8 @@ static __net_initdata struct pernet_oper
+@@ -3900,6 +3900,8 @@ static __net_initdata struct pernet_oper
static int __init proto_init(void)
{
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
-@@ -1562,7 +1562,7 @@ static void device_links_purge(struct de
+@@ -1577,7 +1577,7 @@ static void device_links_purge(struct de
#define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \
DL_FLAG_PM_RUNTIME)
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
-@@ -7620,7 +7620,7 @@ static void __init alloc_node_mem_map(st
+@@ -7622,7 +7622,7 @@ static void __init alloc_node_mem_map(st
if (pgdat == NODE_DATA(0)) {
mem_map = NODE_DATA(0)->node_mem_map;
if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
for (i = sizeof(struct ipt_entry);
i < e->target_offset;
i += m->u.match_size) {
-@@ -1222,12 +1259,15 @@ compat_copy_entry_to_user(struct ipt_ent
+@@ -1226,12 +1263,15 @@ compat_copy_entry_to_user(struct ipt_ent
compat_uint_t origsize;
const struct xt_entry_match *ematch;
int ret = 0;
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
-@@ -6298,6 +6329,8 @@ static int ip6_route_dev_notify(struct n
+@@ -6291,6 +6322,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
-@@ -6309,6 +6342,7 @@ static int ip6_route_dev_notify(struct n
+@@ -6302,6 +6335,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
-@@ -6500,6 +6534,8 @@ static int __net_init ip6_route_net_init
+@@ -6493,6 +6527,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
-@@ -6510,11 +6546,21 @@ static int __net_init ip6_route_net_init
+@@ -6503,11 +6539,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
-@@ -6541,6 +6587,8 @@ out:
+@@ -6534,6 +6580,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
-@@ -6560,6 +6608,7 @@ static void __net_exit ip6_route_net_exi
+@@ -6553,6 +6601,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6643,6 +6692,9 @@ void __init ip6_route_init_special_entri
+@@ -6636,6 +6685,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
if (netif_elide_gro(skb->dev))
goto normal;
-@@ -8091,6 +8094,48 @@ static void __netdev_adjacent_dev_unlink
+@@ -8094,6 +8097,48 @@ static void __netdev_adjacent_dev_unlink
&upper_dev->adj_list.lower);
}
static int __netdev_upper_dev_link(struct net_device *dev,
struct net_device *upper_dev, bool master,
void *upper_priv, void *upper_info,
-@@ -8142,6 +8187,7 @@ static int __netdev_upper_dev_link(struc
+@@ -8145,6 +8190,7 @@ static int __netdev_upper_dev_link(struc
if (ret)
return ret;
ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
ret = notifier_to_errno(ret);
-@@ -8238,6 +8284,7 @@ static void __netdev_upper_dev_unlink(st
+@@ -8241,6 +8287,7 @@ static void __netdev_upper_dev_unlink(st
__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
-@@ -9057,6 +9104,7 @@ int dev_set_mac_address(struct net_devic
+@@ -9060,6 +9107,7 @@ int dev_set_mac_address(struct net_devic
if (err)
return err;
dev->addr_assign_type = NET_ADDR_SET;
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -7770,7 +7770,7 @@ static int nft_register_flowtable_net_ho
+@@ -7803,7 +7803,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -3098,8 +3098,8 @@ static irqreturn_t mtk_handle_irq_rx(int
+@@ -3097,8 +3097,8 @@ static irqreturn_t mtk_handle_irq_rx(int
eth->rx_events++;
if (likely(napi_schedule_prep(ð->rx_napi))) {
}
return IRQ_HANDLED;
-@@ -3111,8 +3111,8 @@ static irqreturn_t mtk_handle_irq_tx(int
+@@ -3110,8 +3110,8 @@ static irqreturn_t mtk_handle_irq_tx(int
eth->tx_events++;
if (likely(napi_schedule_prep(ð->tx_napi))) {
}
return IRQ_HANDLED;
-@@ -4886,6 +4886,8 @@ static int mtk_probe(struct platform_dev
+@@ -4885,6 +4885,8 @@ static int mtk_probe(struct platform_dev
* for NAPI to work
*/
init_dummy_netdev(ð->dummy_dev);
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2422,7 +2422,7 @@ mt7531_setup(struct dsa_switch *ds)
+@@ -2628,7 +2628,7 @@ mt7531_setup(struct dsa_switch *ds)
struct mt7530_priv *priv = ds->priv;
struct mt7530_dummy_poll p;
u32 val, id;
/* Reset whole chip through gpio pin or memory-mapped registers for
* different type of hardware
-@@ -2454,6 +2454,10 @@ mt7531_setup(struct dsa_switch *ds)
+@@ -2660,6 +2660,10 @@ mt7531_setup(struct dsa_switch *ds)
return -ENODEV;
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1516,12 +1516,28 @@ static void mtk_wake_queue(struct mtk_et
+@@ -1515,12 +1515,28 @@ static void mtk_wake_queue(struct mtk_et
}
}
bool gso = false;
int tx_num;
-@@ -1543,6 +1559,18 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1542,6 +1558,18 @@ static netdev_tx_t mtk_start_xmit(struct
return NETDEV_TX_BUSY;
}
/* TSO: fill MSS info in tcp checksum field */
if (skb_is_gso(skb)) {
if (skb_cow_head(skb, 0)) {
-@@ -1558,8 +1586,14 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1557,8 +1585,14 @@ static netdev_tx_t mtk_start_xmit(struct
}
}
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -723,6 +723,7 @@ static void mtk_mac_link_up(struct phyli
+@@ -722,6 +722,7 @@ static void mtk_mac_link_up(struct phyli
MAC_MCR_FORCE_RX_FC);
/* Configure speed */
switch (speed) {
case SPEED_2500:
case SPEED_1000:
-@@ -3291,6 +3292,9 @@ found:
+@@ -3290,6 +3291,9 @@ found:
if (dp->index >= MTK_QDMA_NUM_QUEUES)
return NOTIFY_DONE;
+++ /dev/null
-From 1e25ca1147579bda8b941be1b9851f5911d44eb0 Mon Sep 17 00:00:00 2001
-From: Daniel Golle <daniel@makrotopia.org>
-Date: Tue, 22 Aug 2023 19:04:42 +0100
-Subject: [PATCH 098/125] net: ethernet: mtk_eth_soc: add paths and SerDes
- modes for MT7988
-
-MT7988 comes with a built-in 2.5G PHY as well as SerDes lanes to
-connect external PHYs or transceivers in USXGMII, 10GBase-R, 5GBase-R,
-2500Base-X, 1000Base-X and Cisco SGMII interface modes.
-
-Implement support for configuring for the new paths to SerDes interfaces
-and the internal 2.5G PHY.
-
-Add USXGMII PCS driver for 10GBase-R, 5GBase-R and USXGMII mode, and
-setup the new PHYA on MT7988 to access the also still existing old
-LynxI PCS for 1000Base-X, 2500Base-X and Cisco SGMII PCS interface
-modes.
-
-Signed-off-by: Daniel Golle <daniel@makrotopia.org>
----
- drivers/net/ethernet/mediatek/Kconfig | 16 +
- drivers/net/ethernet/mediatek/Makefile | 1 +
- drivers/net/ethernet/mediatek/mtk_eth_path.c | 123 +++-
- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 182 ++++-
- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 232 ++++++-
- drivers/net/ethernet/mediatek/mtk_usxgmii.c | 692 +++++++++++++++++++
- 6 files changed, 1215 insertions(+), 31 deletions(-)
- create mode 100644 drivers/net/ethernet/mediatek/mtk_usxgmii.c
-
---- a/drivers/net/ethernet/mediatek/Kconfig
-+++ b/drivers/net/ethernet/mediatek/Kconfig
-@@ -24,6 +24,22 @@ config NET_MEDIATEK_SOC
- This driver supports the gigabit ethernet MACs in the
- MediaTek SoC family.
-
-+config NET_MEDIATEK_SOC_USXGMII
-+ bool "Support USXGMII SerDes on MT7988"
-+ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST
-+ def_bool NET_MEDIATEK_SOC != n
-+ help
-+ Include support for 10GE SerDes which can be found on MT7988.
-+ If this kernel should run on SoCs with 10 GBit/s Ethernet you
-+ will need to select this option to use GMAC2 and GMAC3 with
-+ external PHYs, SFP(+) cages in 10GBase-R, 5GBase-R or USXGMII
-+ interface modes.
-+
-+ Note that as the 2500Base-X/1000Base-X/Cisco SGMII SerDes PCS
-+ unit (MediaTek LynxI) in MT7988 is connected via the new 10GE
-+ SerDes, you will also need to select this option in case you
-+ want to use any of those SerDes modes.
-+
- config NET_MEDIATEK_STAR_EMAC
- tristate "MediaTek STAR Ethernet MAC support"
- select PHYLIB
---- a/drivers/net/ethernet/mediatek/Makefile
-+++ b/drivers/net/ethernet/mediatek/Makefile
-@@ -5,6 +5,7 @@
-
- obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o
- mtk_eth-y := mtk_eth_soc.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o
-+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_USXGMII) += mtk_usxgmii.o
- mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o mtk_wed_wo.o
- ifdef CONFIG_DEBUG_FS
- mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o
---- a/drivers/net/ethernet/mediatek/mtk_eth_path.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c
-@@ -31,10 +31,20 @@ static const char *mtk_eth_path_name(u64
- return "gmac2_rgmii";
- case MTK_ETH_PATH_GMAC2_SGMII:
- return "gmac2_sgmii";
-+ case MTK_ETH_PATH_GMAC2_2P5GPHY:
-+ return "gmac2_2p5gphy";
- case MTK_ETH_PATH_GMAC2_GEPHY:
- return "gmac2_gephy";
-+ case MTK_ETH_PATH_GMAC3_SGMII:
-+ return "gmac3_sgmii";
- case MTK_ETH_PATH_GDM1_ESW:
- return "gdm1_esw";
-+ case MTK_ETH_PATH_GMAC1_USXGMII:
-+ return "gmac1_usxgmii";
-+ case MTK_ETH_PATH_GMAC2_USXGMII:
-+ return "gmac2_usxgmii";
-+ case MTK_ETH_PATH_GMAC3_USXGMII:
-+ return "gmac3_usxgmii";
- default:
- return "unknown path";
- }
-@@ -127,6 +137,27 @@ static int set_mux_u3_gmac2_to_qphy(stru
- return 0;
- }
-
-+static int set_mux_gmac2_to_2p5gphy(struct mtk_eth *eth, u64 path)
-+{
-+ int ret;
-+
-+ if (path == MTK_ETH_PATH_GMAC2_2P5GPHY) {
-+ ret = regmap_clear_bits(eth->ethsys, ETHSYS_SYSCFG0, SYSCFG0_SGMII_GMAC2_V2);
-+ if (ret)
-+ return ret;
-+
-+ /* Setup mux to 2p5g PHY */
-+ ret = regmap_clear_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX, MUX_G2_USXGMII_SEL);
-+ if (ret)
-+ return ret;
-+
-+ dev_dbg(eth->dev, "path %s in %s updated\n",
-+ mtk_eth_path_name(path), __func__);
-+ }
-+
-+ return 0;
-+}
-+
- static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)
- {
- unsigned int val = 0;
-@@ -165,7 +196,48 @@ static int set_mux_gmac1_gmac2_to_sgmii_
- return 0;
- }
-
--static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path)
-+static int set_mux_gmac123_to_usxgmii(struct mtk_eth *eth, u64 path)
-+{
-+ unsigned int val = 0;
-+ bool updated = true;
-+ int mac_id = 0;
-+
-+ /* Disable SYSCFG1 SGMII */
-+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);
-+
-+ switch (path) {
-+ case MTK_ETH_PATH_GMAC1_USXGMII:
-+ val &= ~(u32)SYSCFG0_SGMII_GMAC1_V2;
-+ mac_id = MTK_GMAC1_ID;
-+ break;
-+ case MTK_ETH_PATH_GMAC2_USXGMII:
-+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2;
-+ mac_id = MTK_GMAC2_ID;
-+ break;
-+ case MTK_ETH_PATH_GMAC3_USXGMII:
-+ val &= ~(u32)SYSCFG0_SGMII_GMAC3_V2;
-+ mac_id = MTK_GMAC3_ID;
-+ break;
-+ default:
-+ updated = false;
-+ };
-+
-+ if (updated) {
-+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
-+ SYSCFG0_SGMII_MASK, val);
-+
-+ if (mac_id == MTK_GMAC2_ID)
-+ regmap_set_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX,
-+ MUX_G2_USXGMII_SEL);
-+ }
-+
-+ dev_dbg(eth->dev, "path %s in %s updated = %d\n",
-+ mtk_eth_path_name(path), __func__, updated);
-+
-+ return 0;
-+}
-+
-+static int set_mux_gmac123_to_gephy_sgmii(struct mtk_eth *eth, u64 path)
- {
- unsigned int val = 0;
- bool updated = true;
-@@ -182,6 +254,9 @@ static int set_mux_gmac12_to_gephy_sgmii
- case MTK_ETH_PATH_GMAC2_SGMII:
- val |= SYSCFG0_SGMII_GMAC2_V2;
- break;
-+ case MTK_ETH_PATH_GMAC3_SGMII:
-+ val |= SYSCFG0_SGMII_GMAC3_V2;
-+ break;
- default:
- updated = false;
- }
-@@ -210,13 +285,25 @@ static const struct mtk_eth_muxc mtk_eth
- .cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY,
- .set_path = set_mux_u3_gmac2_to_qphy,
- }, {
-+ .name = "mux_gmac2_to_2p5gphy",
-+ .cap_bit = MTK_ETH_MUX_GMAC2_TO_2P5GPHY,
-+ .set_path = set_mux_gmac2_to_2p5gphy,
-+ }, {
- .name = "mux_gmac1_gmac2_to_sgmii_rgmii",
- .cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII,
- .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii,
- }, {
- .name = "mux_gmac12_to_gephy_sgmii",
- .cap_bit = MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII,
-- .set_path = set_mux_gmac12_to_gephy_sgmii,
-+ .set_path = set_mux_gmac123_to_gephy_sgmii,
-+ }, {
-+ .name = "mux_gmac123_to_gephy_sgmii",
-+ .cap_bit = MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII,
-+ .set_path = set_mux_gmac123_to_gephy_sgmii,
-+ }, {
-+ .name = "mux_gmac123_to_usxgmii",
-+ .cap_bit = MTK_ETH_MUX_GMAC123_TO_USXGMII,
-+ .set_path = set_mux_gmac123_to_usxgmii,
- },
- };
-
-@@ -249,12 +336,39 @@ out:
- return err;
- }
-
-+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id)
-+{
-+ u64 path;
-+
-+ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_USXGMII :
-+ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_USXGMII :
-+ MTK_ETH_PATH_GMAC3_USXGMII;
-+
-+ /* Setup proper MUXes along the path */
-+ return mtk_eth_mux_setup(eth, path);
-+}
-+
- int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)
- {
- u64 path;
-
-- path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII :
-- MTK_ETH_PATH_GMAC2_SGMII;
-+ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_SGMII :
-+ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_SGMII :
-+ MTK_ETH_PATH_GMAC3_SGMII;
-+
-+ /* Setup proper MUXes along the path */
-+ return mtk_eth_mux_setup(eth, path);
-+}
-+
-+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id)
-+{
-+ u64 path = 0;
-+
-+ if (mac_id == MTK_GMAC2_ID)
-+ path = MTK_ETH_PATH_GMAC2_2P5GPHY;
-+
-+ if (!path)
-+ return -EINVAL;
-
- /* Setup proper MUXes along the path */
- return mtk_eth_mux_setup(eth, path);
-@@ -284,4 +398,3 @@ int mtk_gmac_rgmii_path_setup(struct mtk
- /* Setup proper MUXes along the path */
- return mtk_eth_mux_setup(eth, path);
- }
--
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -431,6 +431,30 @@ static void mtk_setup_bridge_switch(stru
- MTK_GSW_CFG);
- }
-
-+static bool mtk_check_gmac23_idle(struct mtk_mac *mac)
-+{
-+ u32 mac_fsm, gdm_fsm;
-+
-+ mac_fsm = mtk_r32(mac->hw, MTK_MAC_FSM(mac->id));
-+
-+ switch (mac->id) {
-+ case MTK_GMAC2_ID:
-+ gdm_fsm = mtk_r32(mac->hw, MTK_FE_GDM2_FSM);
-+ break;
-+ case MTK_GMAC3_ID:
-+ gdm_fsm = mtk_r32(mac->hw, MTK_FE_GDM3_FSM);
-+ break;
-+ default:
-+ return true;
-+ };
-+
-+ if ((mac_fsm & 0xFFFF0000) == 0x01010000 &&
-+ (gdm_fsm & 0xFFFF0000) == 0x00000000)
-+ return true;
-+
-+ return false;
-+}
-+
- static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config,
- phy_interface_t interface)
- {
-@@ -439,12 +463,20 @@ static struct phylink_pcs *mtk_mac_selec
- struct mtk_eth *eth = mac->hw;
- unsigned int sid;
-
-- if (interface == PHY_INTERFACE_MODE_SGMII ||
-- phy_interface_mode_is_8023z(interface)) {
-- sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ?
-- 0 : mac->id;
--
-- return eth->sgmii_pcs[sid];
-+ if ((interface == PHY_INTERFACE_MODE_SGMII ||
-+ phy_interface_mode_is_8023z(interface)) &&
-+ MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
-+ sid = mtk_mac2xgmii_id(eth, mac->id);
-+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII))
-+ return mtk_sgmii_wrapper_select_pcs(eth, mac->id);
-+ else
-+ return eth->sgmii_pcs[sid];
-+ } else if ((interface == PHY_INTERFACE_MODE_USXGMII ||
-+ interface == PHY_INTERFACE_MODE_10GBASER ||
-+ interface == PHY_INTERFACE_MODE_5GBASER) &&
-+ MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII) &&
-+ mac->id != MTK_GMAC1_ID) {
-+ return mtk_usxgmii_select_pcs(eth, mac->id);
- }
-
- return NULL;
-@@ -500,7 +532,22 @@ static void mtk_mac_config(struct phylin
- goto init_err;
- }
- break;
-+ case PHY_INTERFACE_MODE_USXGMII:
-+ case PHY_INTERFACE_MODE_10GBASER:
-+ case PHY_INTERFACE_MODE_5GBASER:
-+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) {
-+ err = mtk_gmac_usxgmii_path_setup(eth, mac->id);
-+ if (err)
-+ goto init_err;
-+ }
-+ break;
- case PHY_INTERFACE_MODE_INTERNAL:
-+ if (mac->id == MTK_GMAC2_ID &&
-+ MTK_HAS_CAPS(eth->soc->caps, MTK_2P5GPHY)) {
-+ err = mtk_gmac_2p5gphy_path_setup(eth, mac->id);
-+ if (err)
-+ goto init_err;
-+ }
- break;
- default:
- goto err_phy;
-@@ -555,8 +602,6 @@ static void mtk_mac_config(struct phylin
- val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id);
- val |= SYSCFG0_GE_MODE(ge_mode, mac->id);
- regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val);
--
-- mac->interface = state->interface;
- }
-
- /* SGMII */
-@@ -573,21 +618,40 @@ static void mtk_mac_config(struct phylin
-
- /* Save the syscfg0 value for mac_finish */
- mac->syscfg0 = val;
-- } else if (phylink_autoneg_inband(mode)) {
-+ } else if (state->interface != PHY_INTERFACE_MODE_USXGMII &&
-+ state->interface != PHY_INTERFACE_MODE_10GBASER &&
-+ state->interface != PHY_INTERFACE_MODE_5GBASER &&
-+ phylink_autoneg_inband(mode)) {
- dev_err(eth->dev,
-- "In-band mode not supported in non SGMII mode!\n");
-+ "In-band mode not supported in non-SerDes modes!\n");
- return;
- }
-
- /* Setup gmac */
-- if (mtk_is_netsys_v3_or_greater(eth) &&
-- mac->interface == PHY_INTERFACE_MODE_INTERNAL) {
-- mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id));
-- mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id));
-+ if (mtk_is_netsys_v3_or_greater(eth)) {
-+ if (mtk_interface_mode_is_xgmii(state->interface)) {
-+ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id));
-+ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id));
-+
-+ if (mac->id == MTK_GMAC1_ID)
-+ mtk_setup_bridge_switch(eth);
-+ } else {
-+ mtk_w32(eth, 0, MTK_GDMA_EG_CTRL(mac->id));
-
-- mtk_setup_bridge_switch(eth);
-+ /* FIXME: In current hardware design, we have to reset FE
-+ * when swtiching XGDM to GDM. Therefore, here trigger an SER
-+ * to let GDM go back to the initial state.
-+ */
-+ if ((mtk_interface_mode_is_xgmii(mac->interface) ||
-+ mac->interface == PHY_INTERFACE_MODE_NA) &&
-+ !mtk_check_gmac23_idle(mac) &&
-+ !test_bit(MTK_RESETTING, ð->state))
-+ schedule_work(ð->pending_work);
-+ }
- }
-
-+ mac->interface = state->interface;
-+
- return;
-
- err_phy:
-@@ -633,10 +697,13 @@ static void mtk_mac_link_down(struct phy
- {
- struct mtk_mac *mac = container_of(config, struct mtk_mac,
- phylink_config);
-- u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
-
-- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN);
-- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
-+ if (!mtk_interface_mode_is_xgmii(interface)) {
-+ mtk_m32(mac->hw, MAC_MCR_TX_EN | MAC_MCR_RX_EN, 0, MTK_MAC_MCR(mac->id));
-+ mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), 0, MTK_XGMAC_STS(mac->id));
-+ } else if (mac->id != MTK_GMAC1_ID) {
-+ mtk_m32(mac->hw, XMAC_MCR_TRX_DISABLE, XMAC_MCR_TRX_DISABLE, MTK_XMAC_MCR(mac->id));
-+ }
- }
-
- static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx,
-@@ -708,13 +775,11 @@ static void mtk_set_queue_speed(struct m
- mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs);
- }
-
--static void mtk_mac_link_up(struct phylink_config *config,
-- struct phy_device *phy,
-- unsigned int mode, phy_interface_t interface,
-- int speed, int duplex, bool tx_pause, bool rx_pause)
-+static void mtk_gdm_mac_link_up(struct mtk_mac *mac,
-+ struct phy_device *phy,
-+ unsigned int mode, phy_interface_t interface,
-+ int speed, int duplex, bool tx_pause, bool rx_pause)
- {
-- struct mtk_mac *mac = container_of(config, struct mtk_mac,
-- phylink_config);
- u32 mcr;
-
- mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
-@@ -748,6 +813,55 @@ static void mtk_mac_link_up(struct phyli
- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
- }
-
-+static void mtk_xgdm_mac_link_up(struct mtk_mac *mac,
-+ struct phy_device *phy,
-+ unsigned int mode, phy_interface_t interface,
-+ int speed, int duplex, bool tx_pause, bool rx_pause)
-+{
-+ u32 mcr, force_link = 0;
-+
-+ if (mac->id == MTK_GMAC1_ID)
-+ return;
-+
-+ /* Eliminate the interference(before link-up) caused by PHY noise */
-+ mtk_m32(mac->hw, XMAC_LOGIC_RST, 0, MTK_XMAC_LOGIC_RST(mac->id));
-+ mdelay(20);
-+ mtk_m32(mac->hw, XMAC_GLB_CNTCLR, XMAC_GLB_CNTCLR, MTK_XMAC_CNT_CTRL(mac->id));
-+
-+ if (mac->interface == PHY_INTERFACE_MODE_INTERNAL || mac->id == MTK_GMAC3_ID)
-+ force_link = MTK_XGMAC_FORCE_LINK(mac->id);
-+
-+ mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), force_link, MTK_XGMAC_STS(mac->id));
-+
-+ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id));
-+ mcr &= ~(XMAC_MCR_FORCE_TX_FC | XMAC_MCR_FORCE_RX_FC | XMAC_MCR_TRX_DISABLE);
-+ /* Configure pause modes -
-+ * phylink will avoid these for half duplex
-+ */
-+ if (tx_pause)
-+ mcr |= XMAC_MCR_FORCE_TX_FC;
-+ if (rx_pause)
-+ mcr |= XMAC_MCR_FORCE_RX_FC;
-+
-+ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id));
-+}
-+
-+static void mtk_mac_link_up(struct phylink_config *config,
-+ struct phy_device *phy,
-+ unsigned int mode, phy_interface_t interface,
-+ int speed, int duplex, bool tx_pause, bool rx_pause)
-+{
-+ struct mtk_mac *mac = container_of(config, struct mtk_mac,
-+ phylink_config);
-+
-+ if (mtk_interface_mode_is_xgmii(interface))
-+ mtk_xgdm_mac_link_up(mac, phy, mode, interface, speed, duplex,
-+ tx_pause, rx_pause);
-+ else
-+ mtk_gdm_mac_link_up(mac, phy, mode, interface, speed, duplex,
-+ tx_pause, rx_pause);
-+}
-+
- static const struct phylink_mac_ops mtk_phylink_ops = {
- .validate = phylink_generic_validate,
- .mac_select_pcs = mtk_mac_select_pcs,
-@@ -4561,8 +4675,21 @@ static int mtk_add_mac(struct mtk_eth *e
- phy_interface_zero(mac->phylink_config.supported_interfaces);
- __set_bit(PHY_INTERFACE_MODE_INTERNAL,
- mac->phylink_config.supported_interfaces);
-+ } else if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII)) {
-+ mac->phylink_config.mac_capabilities |= MAC_5000FD | MAC_10000FD;
-+ __set_bit(PHY_INTERFACE_MODE_5GBASER,
-+ mac->phylink_config.supported_interfaces);
-+ __set_bit(PHY_INTERFACE_MODE_10GBASER,
-+ mac->phylink_config.supported_interfaces);
-+ __set_bit(PHY_INTERFACE_MODE_USXGMII,
-+ mac->phylink_config.supported_interfaces);
- }
-
-+ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_2P5GPHY) &&
-+ id == MTK_GMAC2_ID)
-+ __set_bit(PHY_INTERFACE_MODE_INTERNAL,
-+ mac->phylink_config.supported_interfaces);
-+
- phylink = phylink_create(&mac->phylink_config,
- of_fwnode_handle(mac->of_node),
- phy_mode, &mtk_phylink_ops);
-@@ -4755,6 +4882,13 @@ static int mtk_probe(struct platform_dev
-
- if (err)
- return err;
-+ }
-+
-+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) {
-+ err = mtk_usxgmii_init(eth);
-+
-+ if (err)
-+ return err;
- }
-
- if (eth->soc->required_pctl) {
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -499,6 +499,21 @@
- #define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED)
- #define INTF_MODE_RGMII_10_100 0
-
-+/* XFI Mac control registers */
-+#define MTK_XMAC_BASE(x) (0x12000 + (((x) - 1) * 0x1000))
-+#define MTK_XMAC_MCR(x) (MTK_XMAC_BASE(x))
-+#define XMAC_MCR_TRX_DISABLE 0xf
-+#define XMAC_MCR_FORCE_TX_FC BIT(5)
-+#define XMAC_MCR_FORCE_RX_FC BIT(4)
-+
-+/* XFI Mac logic reset registers */
-+#define MTK_XMAC_LOGIC_RST(x) (MTK_XMAC_BASE(x) + 0x10)
-+#define XMAC_LOGIC_RST BIT(0)
-+
-+/* XFI Mac count global control */
-+#define MTK_XMAC_CNT_CTRL(x) (MTK_XMAC_BASE(x) + 0x100)
-+#define XMAC_GLB_CNTCLR BIT(0)
-+
- /* GPIO port control registers for GMAC 2*/
- #define GPIO_OD33_CTRL8 0x4c0
- #define GPIO_BIAS_CTRL 0xed0
-@@ -524,6 +539,7 @@
- #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK)
- #define SYSCFG0_SGMII_GMAC1_V2 BIT(9)
- #define SYSCFG0_SGMII_GMAC2_V2 BIT(8)
-+#define SYSCFG0_SGMII_GMAC3_V2 BIT(7)
-
-
- /* ethernet subsystem clock register */
-@@ -556,12 +572,74 @@
- #define ETHSYS_DMA_AG_MAP_QDMA BIT(1)
- #define ETHSYS_DMA_AG_MAP_PPE BIT(2)
-
-+/* USXGMII subsystem config registers */
-+/* Register to control speed */
-+#define RG_PHY_TOP_SPEED_CTRL1 0x80C
-+#define USXGMII_RATE_UPDATE_MODE BIT(31)
-+#define USXGMII_MAC_CK_GATED BIT(29)
-+#define USXGMII_IF_FORCE_EN BIT(28)
-+#define USXGMII_RATE_ADAPT_MODE GENMASK(10, 8)
-+#define USXGMII_RATE_ADAPT_MODE_X1 0
-+#define USXGMII_RATE_ADAPT_MODE_X2 1
-+#define USXGMII_RATE_ADAPT_MODE_X4 2
-+#define USXGMII_RATE_ADAPT_MODE_X10 3
-+#define USXGMII_RATE_ADAPT_MODE_X100 4
-+#define USXGMII_RATE_ADAPT_MODE_X5 5
-+#define USXGMII_RATE_ADAPT_MODE_X50 6
-+#define USXGMII_XFI_RX_MODE GENMASK(6, 4)
-+#define USXGMII_XFI_RX_MODE_10G 0
-+#define USXGMII_XFI_RX_MODE_5G 1
-+#define USXGMII_XFI_TX_MODE GENMASK(2, 0)
-+#define USXGMII_XFI_TX_MODE_10G 0
-+#define USXGMII_XFI_TX_MODE_5G 1
-+
-+/* Register to control PCS AN */
-+#define RG_PCS_AN_CTRL0 0x810
-+#define USXGMII_AN_RESTART BIT(31)
-+#define USXGMII_AN_SYNC_CNT GENMASK(30, 11)
-+#define USXGMII_AN_ENABLE BIT(0)
-+
-+#define RG_PCS_AN_CTRL2 0x818
-+#define USXGMII_LINK_TIMER_IDLE_DETECT GENMASK(29, 20)
-+#define USXGMII_LINK_TIMER_COMP_ACK_DETECT GENMASK(19, 10)
-+#define USXGMII_LINK_TIMER_AN_RESTART GENMASK(9, 0)
-+
-+/* Register to read PCS AN status */
-+#define RG_PCS_AN_STS0 0x81c
-+#define USXGMII_PCS_AN_WORD GENMASK(15, 0)
-+#define USXGMII_LPA_LATCH BIT(31)
-+
-+/* Register to control USXGMII XFI PLL digital */
-+#define XFI_PLL_DIG_GLB8 0x08
-+#define RG_XFI_PLL_EN BIT(31)
-+
-+/* Register to control USXGMII XFI PLL analog */
-+#define XFI_PLL_ANA_GLB8 0x108
-+#define RG_XFI_PLL_ANA_SWWA 0x02283248
-+
- /* Infrasys subsystem config registers */
- #define INFRA_MISC2 0x70c
- #define CO_QPHY_SEL BIT(0)
- #define GEPHY_MAC_SEL BIT(1)
-
-+/* Toprgu subsystem config registers */
-+#define TOPRGU_SWSYSRST 0x18
-+#define SWSYSRST_UNLOCK_KEY GENMASK(31, 24)
-+#define SWSYSRST_XFI_PLL_GRST BIT(16)
-+#define SWSYSRST_XFI_PEXPT1_GRST BIT(15)
-+#define SWSYSRST_XFI_PEXPT0_GRST BIT(14)
-+#define SWSYSRST_XFI1_GRST BIT(13)
-+#define SWSYSRST_XFI0_GRST BIT(12)
-+#define SWSYSRST_SGMII1_GRST BIT(2)
-+#define SWSYSRST_SGMII0_GRST BIT(1)
-+#define TOPRGU_SWSYSRST_EN 0xFC
-+
- /* Top misc registers */
-+#define TOP_MISC_NETSYS_PCS_MUX 0x84
-+#define NETSYS_PCS_MUX_MASK GENMASK(1, 0)
-+#define MUX_G2_USXGMII_SEL BIT(1)
-+#define MUX_HSGMII1_G1_SEL BIT(0)
-+
- #define USB_PHY_SWITCH_REG 0x218
- #define QPHY_SEL_MASK GENMASK(1, 0)
- #define SGMII_QPHY_SEL 0x2
-@@ -586,6 +664,8 @@
- #define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c)
- #define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110)
-
-+/* Debug Purpose Register */
-+#define MTK_PSE_FQFC_CFG 0x100
- #define MTK_FE_CDM1_FSM 0x220
- #define MTK_FE_CDM2_FSM 0x224
- #define MTK_FE_CDM3_FSM 0x238
-@@ -594,6 +674,11 @@
- #define MTK_FE_CDM6_FSM 0x328
- #define MTK_FE_GDM1_FSM 0x228
- #define MTK_FE_GDM2_FSM 0x22C
-+#define MTK_FE_GDM3_FSM 0x23C
-+#define MTK_FE_PSE_FREE 0x240
-+#define MTK_FE_DROP_FQ 0x244
-+#define MTK_FE_DROP_FC 0x248
-+#define MTK_FE_DROP_PPE 0x24C
-
- #define MTK_MAC_FSM(x) (0x1010C + ((x) * 0x100))
-
-@@ -940,6 +1025,8 @@ enum mkt_eth_capabilities {
- MTK_RGMII_BIT = 0,
- MTK_TRGMII_BIT,
- MTK_SGMII_BIT,
-+ MTK_USXGMII_BIT,
-+ MTK_2P5GPHY_BIT,
- MTK_ESW_BIT,
- MTK_GEPHY_BIT,
- MTK_MUX_BIT,
-@@ -960,8 +1047,11 @@ enum mkt_eth_capabilities {
- MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,
- MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT,
- MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT,
-+ MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT,
- MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT,
- MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT,
-+ MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT,
-+ MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT,
-
- /* PATH BITS */
- MTK_ETH_PATH_GMAC1_RGMII_BIT,
-@@ -969,14 +1059,21 @@ enum mkt_eth_capabilities {
- MTK_ETH_PATH_GMAC1_SGMII_BIT,
- MTK_ETH_PATH_GMAC2_RGMII_BIT,
- MTK_ETH_PATH_GMAC2_SGMII_BIT,
-+ MTK_ETH_PATH_GMAC2_2P5GPHY_BIT,
- MTK_ETH_PATH_GMAC2_GEPHY_BIT,
-+ MTK_ETH_PATH_GMAC3_SGMII_BIT,
- MTK_ETH_PATH_GDM1_ESW_BIT,
-+ MTK_ETH_PATH_GMAC1_USXGMII_BIT,
-+ MTK_ETH_PATH_GMAC2_USXGMII_BIT,
-+ MTK_ETH_PATH_GMAC3_USXGMII_BIT,
- };
-
- /* Supported hardware group on SoCs */
- #define MTK_RGMII BIT_ULL(MTK_RGMII_BIT)
- #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT)
- #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT)
-+#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT)
-+#define MTK_2P5GPHY BIT_ULL(MTK_2P5GPHY_BIT)
- #define MTK_ESW BIT_ULL(MTK_ESW_BIT)
- #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
- #define MTK_MUX BIT_ULL(MTK_MUX_BIT)
-@@ -999,10 +1096,16 @@ enum mkt_eth_capabilities {
- BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
- #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \
- BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
-+#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY \
-+ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT)
- #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
- BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
- #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \
- BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT)
-+#define MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII \
-+ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT)
-+#define MTK_ETH_MUX_GMAC123_TO_USXGMII \
-+ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT)
-
- /* Supported path present on SoCs */
- #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT)
-@@ -1010,8 +1113,13 @@ enum mkt_eth_capabilities {
- #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
- #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
- #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
-+#define MTK_ETH_PATH_GMAC2_2P5GPHY BIT_ULL(MTK_ETH_PATH_GMAC2_2P5GPHY_BIT)
- #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
-+#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT)
- #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)
-+#define MTK_ETH_PATH_GMAC1_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC1_USXGMII_BIT)
-+#define MTK_ETH_PATH_GMAC2_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC2_USXGMII_BIT)
-+#define MTK_ETH_PATH_GMAC3_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC3_USXGMII_BIT)
-
- #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII)
- #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII)
-@@ -1019,7 +1127,12 @@ enum mkt_eth_capabilities {
- #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII)
- #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII)
- #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY)
-+#define MTK_GMAC2_2P5GPHY (MTK_ETH_PATH_GMAC2_2P5GPHY | MTK_2P5GPHY)
-+#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII)
- #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW)
-+#define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII)
-+#define MTK_GMAC2_USXGMII (MTK_ETH_PATH_GMAC2_USXGMII | MTK_USXGMII)
-+#define MTK_GMAC3_USXGMII (MTK_ETH_PATH_GMAC3_USXGMII | MTK_USXGMII)
-
- /* MUXes present on SoCs */
- /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
-@@ -1038,10 +1151,20 @@ enum mkt_eth_capabilities {
- (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \
- MTK_SHARED_SGMII)
-
-+/* 2: GMAC2 -> XGMII */
-+#define MTK_MUX_GMAC2_TO_2P5GPHY \
-+ (MTK_ETH_MUX_GMAC2_TO_2P5GPHY | MTK_MUX | MTK_INFRA)
-+
- /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
- #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \
- (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX)
-
-+#define MTK_MUX_GMAC123_TO_GEPHY_SGMII \
-+ (MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII | MTK_MUX)
-+
-+#define MTK_MUX_GMAC123_TO_USXGMII \
-+ (MTK_ETH_MUX_GMAC123_TO_USXGMII | MTK_MUX | MTK_INFRA)
-+
- #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x))
-
- #define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \
-@@ -1073,8 +1196,12 @@ enum mkt_eth_capabilities {
- MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \
- MTK_RSTCTRL_PPE1 | MTK_SRAM)
-
--#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_QDMA | \
-- MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM)
-+#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_GMAC1_SGMII | \
-+ MTK_GMAC2_2P5GPHY | MTK_GMAC2_SGMII | MTK_GMAC2_USXGMII | \
-+ MTK_GMAC3_SGMII | MTK_GMAC3_USXGMII | \
-+ MTK_MUX_GMAC123_TO_GEPHY_SGMII | \
-+ MTK_MUX_GMAC123_TO_USXGMII | MTK_MUX_GMAC2_TO_2P5GPHY | \
-+ MTK_QDMA | MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM)
-
- struct mtk_tx_dma_desc_info {
- dma_addr_t addr;
-@@ -1184,6 +1311,24 @@ struct mtk_soc_data {
- /* currently no SoC has more than 3 macs */
- #define MTK_MAX_DEVS 3
-
-+/* struct mtk_usxgmii_pcs - This structure holds each usxgmii regmap and
-+ * associated data
-+ * @regmap: The register map pointing at the range used to setup
-+ * USXGMII modes
-+ * @interface: Currently selected interface mode
-+ * @id: The element is used to record the index of PCS
-+ * @pcs: Phylink PCS structure
-+ */
-+struct mtk_usxgmii_pcs {
-+ struct mtk_eth *eth;
-+ struct regmap *regmap;
-+ struct phylink_pcs *wrapped_sgmii_pcs;
-+ phy_interface_t interface;
-+ u8 id;
-+ unsigned int mode;
-+ struct phylink_pcs pcs;
-+};
-+
- /* struct mtk_eth - This is the main datasructure for holding the state
- * of the driver
- * @dev: The device pointer
-@@ -1204,6 +1349,12 @@ struct mtk_soc_data {
- * @infra: The register map pointing at the range used to setup
- * SGMII and GePHY path
- * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances
-+ * @sgmii_wrapped_pcs: Pointers to NETSYSv3 wrapper PCS instances
-+ * @usxgmii_pll: The register map pointing at the range used to control
-+ * the USXGMII SerDes PLL
-+ * @regmap_pextp: The register map pointing at the range used to setup
-+ * PHYA
-+ * @usxgmii_pcs: Pointer to array of pointers to struct for USXGMII PCS
- * @pctl: The register map pointing at the range used to setup
- * GMAC port drive/slew values
- * @dma_refcnt: track how many netdevs are using the DMA engine
-@@ -1247,6 +1398,10 @@ struct mtk_eth {
- struct regmap *ethsys;
- struct regmap *infra;
- struct phylink_pcs *sgmii_pcs[MTK_MAX_DEVS];
-+ struct regmap *toprgu;
-+ struct regmap *usxgmii_pll;
-+ struct regmap *regmap_pextp[MTK_MAX_DEVS];
-+ struct mtk_usxgmii_pcs *usxgmii_pcs[MTK_MAX_DEVS];
- struct regmap *pctl;
- bool hwlro;
- refcount_t dma_refcnt;
-@@ -1434,6 +1589,19 @@ static inline u32 mtk_get_ib2_multicast_
- return MTK_FOE_IB2_MULTICAST;
- }
-
-+static inline bool mtk_interface_mode_is_xgmii(phy_interface_t interface)
-+{
-+ switch (interface) {
-+ case PHY_INTERFACE_MODE_INTERNAL:
-+ case PHY_INTERFACE_MODE_USXGMII:
-+ case PHY_INTERFACE_MODE_10GBASER:
-+ case PHY_INTERFACE_MODE_5GBASER:
-+ return true;
-+ default:
-+ return false;
-+ }
-+}
-+
- /* read the hardware status register */
- void mtk_stats_update_mac(struct mtk_mac *mac);
-
-@@ -1442,8 +1610,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne
- u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg);
-
- int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);
-+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id);
- int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
- int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
-+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id);
-
- int mtk_eth_offload_init(struct mtk_eth *eth);
- int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
-@@ -1453,5 +1623,63 @@ int mtk_flow_offload_cmd(struct mtk_eth
- void mtk_flow_offload_cleanup(struct mtk_eth *eth, struct list_head *list);
- void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev);
-
-+static inline int mtk_mac2xgmii_id(struct mtk_eth *eth, int mac_id)
-+{
-+ int xgmii_id = mac_id;
-+
-+ if (mtk_is_netsys_v3_or_greater(eth)) {
-+ switch (mac_id) {
-+ case MTK_GMAC1_ID:
-+ case MTK_GMAC2_ID:
-+ xgmii_id = 1;
-+ break;
-+ case MTK_GMAC3_ID:
-+ xgmii_id = 0;
-+ break;
-+ default:
-+ xgmii_id = -1;
-+ }
-+ }
-+
-+ return MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII) ? 0 : xgmii_id;
-+}
-+
-+static inline int mtk_xgmii2mac_id(struct mtk_eth *eth, int xgmii_id)
-+{
-+ int mac_id = xgmii_id;
-+
-+ if (mtk_is_netsys_v3_or_greater(eth)) {
-+ switch (xgmii_id) {
-+ case 0:
-+ mac_id = 2;
-+ break;
-+ case 1:
-+ mac_id = 1;
-+ break;
-+ default:
-+ mac_id = -1;
-+ }
-+ }
-+
-+ return mac_id;
-+}
-+
-+#ifdef CONFIG_NET_MEDIATEK_SOC_USXGMII
-+struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int id);
-+struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id);
-+int mtk_usxgmii_init(struct mtk_eth *eth);
-+#else
-+static inline struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int id)
-+{
-+ return NULL;
-+}
-+
-+static inline struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id)
-+{
-+ return NULL;
-+}
-+
-+static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; }
-+#endif /* NET_MEDIATEK_SOC_USXGMII */
-
- #endif /* MTK_ETH_H */
---- /dev/null
-+++ b/drivers/net/ethernet/mediatek/mtk_usxgmii.c
-@@ -0,0 +1,690 @@
-+// SPDX-License-Identifier: GPL-2.0
-+/*
-+ * Copyright (c) 2023 MediaTek Inc.
-+ * Author: Henry Yen <henry.yen@mediatek.com>
-+ * Daniel Golle <daniel@makrotopia.org>
-+ */
-+
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/regmap.h>
-+#include "mtk_eth_soc.h"
-+
-+static struct mtk_usxgmii_pcs *pcs_to_mtk_usxgmii_pcs(struct phylink_pcs *pcs)
-+{
-+ return container_of(pcs, struct mtk_usxgmii_pcs, pcs);
-+}
-+
-+static int mtk_xfi_pextp_init(struct mtk_eth *eth)
-+{
-+ struct device *dev = eth->dev;
-+ struct device_node *r = dev->of_node;
-+ struct device_node *np;
-+ int i;
-+
-+ for (i = 0; i < MTK_MAX_DEVS; i++) {
-+ np = of_parse_phandle(r, "mediatek,xfi-pextp", i);
-+ if (!np)
-+ break;
-+
-+ eth->regmap_pextp[i] = syscon_node_to_regmap(np);
-+ if (IS_ERR(eth->regmap_pextp[i]))
-+ return PTR_ERR(eth->regmap_pextp[i]);
-+ }
-+
-+ return 0;
-+}
-+
-+static int mtk_xfi_pll_init(struct mtk_eth *eth)
-+{
-+ struct device_node *r = eth->dev->of_node;
-+ struct device_node *np;
-+
-+ np = of_parse_phandle(r, "mediatek,xfi-pll", 0);
-+ if (!np)
-+ return -1;
-+
-+ eth->usxgmii_pll = syscon_node_to_regmap(np);
-+ if (IS_ERR(eth->usxgmii_pll))
-+ return PTR_ERR(eth->usxgmii_pll);
-+
-+ return 0;
-+}
-+
-+static int mtk_toprgu_init(struct mtk_eth *eth)
-+{
-+ struct device_node *r = eth->dev->of_node;
-+ struct device_node *np;
-+
-+ np = of_parse_phandle(r, "mediatek,toprgu", 0);
-+ if (!np)
-+ return -1;
-+
-+ eth->toprgu = syscon_node_to_regmap(np);
-+ if (IS_ERR(eth->toprgu))
-+ return PTR_ERR(eth->toprgu);
-+
-+ return 0;
-+}
-+
-+static int mtk_xfi_pll_enable(struct mtk_eth *eth)
-+{
-+ u32 val = 0;
-+
-+ if (!eth->usxgmii_pll)
-+ return -EINVAL;
-+
-+ /* Add software workaround for USXGMII PLL TCL issue */
-+ regmap_write(eth->usxgmii_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA);
-+
-+ regmap_read(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, &val);
-+ val |= RG_XFI_PLL_EN;
-+ regmap_write(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, val);
-+
-+ return 0;
-+}
-+
-+static void mtk_usxgmii_setup_phya(struct regmap *pextp, phy_interface_t interface, int id)
-+{
-+ bool is_10g = (interface == PHY_INTERFACE_MODE_10GBASER ||
-+ interface == PHY_INTERFACE_MODE_USXGMII);
-+ bool is_2p5g = (interface == PHY_INTERFACE_MODE_2500BASEX);
-+ bool is_5g = (interface == PHY_INTERFACE_MODE_5GBASER);
-+
-+ /* Setup operation mode */
-+ if (is_10g)
-+ regmap_write(pextp, 0x9024, 0x00C9071C);
-+ else
-+ regmap_write(pextp, 0x9024, 0x00D9071C);
-+
-+ if (is_5g)
-+ regmap_write(pextp, 0x2020, 0xAAA5A5AA);
-+ else
-+ regmap_write(pextp, 0x2020, 0xAA8585AA);
-+
-+ if (is_2p5g || is_5g || is_10g) {
-+ regmap_write(pextp, 0x2030, 0x0C020707);
-+ regmap_write(pextp, 0x2034, 0x0E050F0F);
-+ regmap_write(pextp, 0x2040, 0x00140032);
-+ } else {
-+ regmap_write(pextp, 0x2030, 0x0C020207);
-+ regmap_write(pextp, 0x2034, 0x0E05050F);
-+ regmap_write(pextp, 0x2040, 0x00200032);
-+ }
-+
-+ if (is_2p5g || is_10g)
-+ regmap_write(pextp, 0x50F0, 0x00C014AA);
-+ else if (is_5g)
-+ regmap_write(pextp, 0x50F0, 0x00C018AA);
-+ else
-+ regmap_write(pextp, 0x50F0, 0x00C014BA);
-+
-+ if (is_5g) {
-+ regmap_write(pextp, 0x50E0, 0x3777812B);
-+ regmap_write(pextp, 0x506C, 0x005C9CFF);
-+ regmap_write(pextp, 0x5070, 0x9DFAFAFA);
-+ regmap_write(pextp, 0x5074, 0x273F3F3F);
-+ regmap_write(pextp, 0x5078, 0xA8883868);
-+ regmap_write(pextp, 0x507C, 0x14661466);
-+ } else {
-+ regmap_write(pextp, 0x50E0, 0x3777C12B);
-+ regmap_write(pextp, 0x506C, 0x005F9CFF);
-+ regmap_write(pextp, 0x5070, 0x9D9DFAFA);
-+ regmap_write(pextp, 0x5074, 0x27273F3F);
-+ regmap_write(pextp, 0x5078, 0xA7883C68);
-+ regmap_write(pextp, 0x507C, 0x11661166);
-+ }
-+
-+ if (is_2p5g || is_10g) {
-+ regmap_write(pextp, 0x5080, 0x0E000AAF);
-+ regmap_write(pextp, 0x5084, 0x08080D0D);
-+ regmap_write(pextp, 0x5088, 0x02030909);
-+ } else if (is_5g) {
-+ regmap_write(pextp, 0x5080, 0x0E001ABF);
-+ regmap_write(pextp, 0x5084, 0x080B0D0D);
-+ regmap_write(pextp, 0x5088, 0x02050909);
-+ } else {
-+ regmap_write(pextp, 0x5080, 0x0E000EAF);
-+ regmap_write(pextp, 0x5084, 0x08080E0D);
-+ regmap_write(pextp, 0x5088, 0x02030B09);
-+ }
-+
-+ if (is_5g) {
-+ regmap_write(pextp, 0x50E4, 0x0C000000);
-+ regmap_write(pextp, 0x50E8, 0x04000000);
-+ } else {
-+ regmap_write(pextp, 0x50E4, 0x0C0C0000);
-+ regmap_write(pextp, 0x50E8, 0x04040000);
-+ }
-+
-+ if (is_2p5g || mtk_interface_mode_is_xgmii(interface))
-+ regmap_write(pextp, 0x50EC, 0x0F0F0C06);
-+ else
-+ regmap_write(pextp, 0x50EC, 0x0F0F0606);
-+
-+ if (is_5g) {
-+ regmap_write(pextp, 0x50A8, 0x50808C8C);
-+ regmap_write(pextp, 0x6004, 0x18000000);
-+ } else {
-+ regmap_write(pextp, 0x50A8, 0x506E8C8C);
-+ regmap_write(pextp, 0x6004, 0x18190000);
-+ }
-+
-+ if (is_10g)
-+ regmap_write(pextp, 0x00F8, 0x01423342);
-+ else if (is_5g)
-+ regmap_write(pextp, 0x00F8, 0x00A132A1);
-+ else if (is_2p5g)
-+ regmap_write(pextp, 0x00F8, 0x009C329C);
-+ else
-+ regmap_write(pextp, 0x00F8, 0x00FA32FA);
-+
-+ /* Force SGDT_OUT off and select PCS */
-+ if (mtk_interface_mode_is_xgmii(interface))
-+ regmap_write(pextp, 0x00F4, 0x80201F20);
-+ else
-+ regmap_write(pextp, 0x00F4, 0x80201F21);
-+
-+ /* Force GLB_CKDET_OUT */
-+ regmap_write(pextp, 0x0030, 0x00050C00);
-+
-+ /* Force AEQ on */
-+ regmap_write(pextp, 0x0070, 0x02002800);
-+ ndelay(1020);
-+
-+ /* Setup DA default value */
-+ regmap_write(pextp, 0x30B0, 0x00000020);
-+ regmap_write(pextp, 0x3028, 0x00008A01);
-+ regmap_write(pextp, 0x302C, 0x0000A884);
-+ regmap_write(pextp, 0x3024, 0x00083002);
-+ if (mtk_interface_mode_is_xgmii(interface)) {
-+ regmap_write(pextp, 0x3010, 0x00022220);
-+ regmap_write(pextp, 0x5064, 0x0F020A01);
-+ regmap_write(pextp, 0x50B4, 0x06100600);
-+ if (interface == PHY_INTERFACE_MODE_USXGMII)
-+ regmap_write(pextp, 0x3048, 0x40704000);
-+ else
-+ regmap_write(pextp, 0x3048, 0x47684100);
-+ } else {
-+ regmap_write(pextp, 0x3010, 0x00011110);
-+ regmap_write(pextp, 0x3048, 0x40704000);
-+ }
-+
-+ if (!mtk_interface_mode_is_xgmii(interface) && !is_2p5g)
-+ regmap_write(pextp, 0x3064, 0x0000C000);
-+
-+ if (interface == PHY_INTERFACE_MODE_USXGMII) {
-+ regmap_write(pextp, 0x3050, 0xA8000000);
-+ regmap_write(pextp, 0x3054, 0x000000AA);
-+ } else if (mtk_interface_mode_is_xgmii(interface)) {
-+ regmap_write(pextp, 0x3050, 0x00000000);
-+ regmap_write(pextp, 0x3054, 0x00000000);
-+ } else {
-+ regmap_write(pextp, 0x3050, 0xA8000000);
-+ regmap_write(pextp, 0x3054, 0x000000AA);
-+ }
-+
-+ if (mtk_interface_mode_is_xgmii(interface))
-+ regmap_write(pextp, 0x306C, 0x00000F00);
-+ else if (is_2p5g)
-+ regmap_write(pextp, 0x306C, 0x22000F00);
-+ else
-+ regmap_write(pextp, 0x306C, 0x20200F00);
-+
-+ if (interface == PHY_INTERFACE_MODE_10GBASER && id == 0)
-+ regmap_write(pextp, 0xA008, 0x0007B400);
-+
-+ if (mtk_interface_mode_is_xgmii(interface))
-+ regmap_write(pextp, 0xA060, 0x00040000);
-+ else
-+ regmap_write(pextp, 0xA060, 0x00050000);
-+
-+ if (is_10g)
-+ regmap_write(pextp, 0x90D0, 0x00000001);
-+ else if (is_5g)
-+ regmap_write(pextp, 0x90D0, 0x00000003);
-+ else if (is_2p5g)
-+ regmap_write(pextp, 0x90D0, 0x00000005);
-+ else
-+ regmap_write(pextp, 0x90D0, 0x00000007);
-+
-+ /* Release reset */
-+ regmap_write(pextp, 0x0070, 0x0200E800);
-+ usleep_range(150, 500);
-+
-+ /* Switch to P0 */
-+ regmap_write(pextp, 0x0070, 0x0200C111);
-+ ndelay(1020);
-+ regmap_write(pextp, 0x0070, 0x0200C101);
-+ usleep_range(15, 50);
-+
-+ if (mtk_interface_mode_is_xgmii(interface)) {
-+ /* Switch to Gen3 */
-+ regmap_write(pextp, 0x0070, 0x0202C111);
-+ } else {
-+ /* Switch to Gen2 */
-+ regmap_write(pextp, 0x0070, 0x0201C111);
-+ }
-+ ndelay(1020);
-+ if (mtk_interface_mode_is_xgmii(interface))
-+ regmap_write(pextp, 0x0070, 0x0202C101);
-+ else
-+ regmap_write(pextp, 0x0070, 0x0201C101);
-+ usleep_range(100, 500);
-+ regmap_write(pextp, 0x30B0, 0x00000030);
-+ if (mtk_interface_mode_is_xgmii(interface))
-+ regmap_write(pextp, 0x00F4, 0x80201F00);
-+ else
-+ regmap_write(pextp, 0x00F4, 0x80201F01);
-+
-+ regmap_write(pextp, 0x3040, 0x30000000);
-+ usleep_range(400, 1000);
-+}
-+
-+static void mtk_usxgmii_reset(struct mtk_eth *eth, int id)
-+{
-+ u32 toggle, val;
-+
-+ if (id >= MTK_MAX_DEVS || !eth->toprgu)
-+ return;
-+
-+ switch (id) {
-+ case 0:
-+ toggle = SWSYSRST_XFI_PEXPT0_GRST | SWSYSRST_XFI0_GRST |
-+ SWSYSRST_SGMII0_GRST;
-+ break;
-+ case 1:
-+ toggle = SWSYSRST_XFI_PEXPT1_GRST | SWSYSRST_XFI1_GRST |
-+ SWSYSRST_SGMII1_GRST;
-+ break;
-+ default:
-+ return;
-+ }
-+
-+ /* Enable software reset */
-+ regmap_set_bits(eth->toprgu, TOPRGU_SWSYSRST_EN, toggle);
-+
-+ /* Assert USXGMII reset */
-+ regmap_set_bits(eth->toprgu, TOPRGU_SWSYSRST,
-+ FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | toggle);
-+
-+ usleep_range(100, 500);
-+
-+ /* De-assert USXGMII reset */
-+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val);
-+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88);
-+ val &= ~toggle;
-+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val);
-+
-+ /* Disable software reset */
-+ regmap_clear_bits(eth->toprgu, TOPRGU_SWSYSRST_EN, toggle);
-+
-+ mdelay(10);
-+}
-+
-+/* As the USXGMII PHYA is shared with the 1000Base-X/2500Base-X/Cisco SGMII unit
-+ * the psc-mtk-lynxi instance needs to be wrapped, so that calls to .pcs_config
-+ * also trigger an initial reset and subsequent configuration of the PHYA.
-+ */
-+struct mtk_sgmii_wrapper_pcs {
-+ struct mtk_eth *eth;
-+ struct phylink_pcs *wrapped_pcs;
-+ u8 id;
-+ struct phylink_pcs pcs;
-+};
-+
-+static int mtk_sgmii_wrapped_pcs_config(struct phylink_pcs *pcs,
-+ unsigned int mode,
-+ phy_interface_t interface,
-+ const unsigned long *advertising,
-+ bool permit_pause_to_mac)
-+{
-+ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs);
-+ bool full_reconf;
-+ int ret;
-+
-+ full_reconf = interface != wp->eth->usxgmii_pcs[wp->id]->interface;
-+ if (full_reconf) {
-+ mtk_xfi_pll_enable(wp->eth);
-+ mtk_usxgmii_reset(wp->eth, wp->id);
-+ }
-+
-+ ret = wp->wrapped_pcs->ops->pcs_config(wp->wrapped_pcs, mode, interface,
-+ advertising, permit_pause_to_mac);
-+
-+ if (full_reconf)
-+ mtk_usxgmii_setup_phya(wp->eth->regmap_pextp[wp->id], interface, wp->id);
-+
-+ wp->eth->usxgmii_pcs[wp->id]->interface = interface;
-+
-+ return ret;
-+}
-+
-+static void mtk_sgmii_wrapped_pcs_get_state(struct phylink_pcs *pcs,
-+ struct phylink_link_state *state)
-+{
-+ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs);
-+
-+ return wp->wrapped_pcs->ops->pcs_get_state(wp->wrapped_pcs, state);
-+}
-+
-+static void mtk_sgmii_wrapped_pcs_an_restart(struct phylink_pcs *pcs)
-+{
-+ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs);
-+
-+ wp->wrapped_pcs->ops->pcs_an_restart(wp->wrapped_pcs);
-+}
-+
-+static void mtk_sgmii_wrapped_pcs_link_up(struct phylink_pcs *pcs,
-+ unsigned int mode,
-+ phy_interface_t interface, int speed,
-+ int duplex)
-+{
-+ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs);
-+
-+ wp->wrapped_pcs->ops->pcs_link_up(wp->wrapped_pcs, mode, interface, speed, duplex);
-+}
-+
-+static void mtk_sgmii_wrapped_pcs_disable(struct phylink_pcs *pcs)
-+{
-+ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs);
-+
-+ wp->wrapped_pcs->ops->pcs_disable(wp->wrapped_pcs);
-+
-+ wp->eth->usxgmii_pcs[wp->id]->interface = PHY_INTERFACE_MODE_NA;
-+}
-+
-+static const struct phylink_pcs_ops mtk_sgmii_wrapped_pcs_ops = {
-+ .pcs_get_state = mtk_sgmii_wrapped_pcs_get_state,
-+ .pcs_config = mtk_sgmii_wrapped_pcs_config,
-+ .pcs_an_restart = mtk_sgmii_wrapped_pcs_an_restart,
-+ .pcs_link_up = mtk_sgmii_wrapped_pcs_link_up,
-+ .pcs_disable = mtk_sgmii_wrapped_pcs_disable,
-+};
-+
-+static int mtk_sgmii_wrapper_init(struct mtk_eth *eth)
-+{
-+ struct mtk_sgmii_wrapper_pcs *wp;
-+ int i;
-+
-+ for (i = 0; i < MTK_MAX_DEVS; i++) {
-+ if (!eth->sgmii_pcs[i])
-+ continue;
-+
-+ if (!eth->usxgmii_pcs[i])
-+ continue;
-+
-+ /* Make sure all PCS ops are supported by wrapped PCS */
-+ if (!eth->sgmii_pcs[i]->ops->pcs_get_state ||
-+ !eth->sgmii_pcs[i]->ops->pcs_config ||
-+ !eth->sgmii_pcs[i]->ops->pcs_an_restart ||
-+ !eth->sgmii_pcs[i]->ops->pcs_link_up ||
-+ !eth->sgmii_pcs[i]->ops->pcs_disable)
-+ return -EOPNOTSUPP;
-+
-+ wp = devm_kzalloc(eth->dev, sizeof(*wp), GFP_KERNEL);
-+ if (!wp)
-+ return -ENOMEM;
-+
-+ wp->wrapped_pcs = eth->sgmii_pcs[i];
-+ wp->id = i;
-+ wp->pcs.poll = true;
-+ wp->pcs.ops = &mtk_sgmii_wrapped_pcs_ops;
-+ wp->eth = eth;
-+
-+ eth->usxgmii_pcs[i]->wrapped_sgmii_pcs = &wp->pcs;
-+ }
-+
-+ return 0;
-+}
-+
-+struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int mac_id)
-+{
-+ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id);
-+
-+ if (!eth->usxgmii_pcs[xgmii_id])
-+ return NULL;
-+
-+ return eth->usxgmii_pcs[xgmii_id]->wrapped_sgmii_pcs;
-+}
-+
-+static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
-+ phy_interface_t interface,
-+ const unsigned long *advertising,
-+ bool permit_pause_to_mac)
-+{
-+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs);
-+ struct mtk_eth *eth = mpcs->eth;
-+ struct regmap *pextp = eth->regmap_pextp[mpcs->id];
-+ unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0;
-+ bool mode_changed = false;
-+
-+ if (!pextp)
-+ return -ENODEV;
-+
-+ if (interface == PHY_INTERFACE_MODE_USXGMII) {
-+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) | USXGMII_AN_ENABLE;
-+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) |
-+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) |
-+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B);
-+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) |
-+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G);
-+ } else if (interface == PHY_INTERFACE_MODE_10GBASER) {
-+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF);
-+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) |
-+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) |
-+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B);
-+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) |
-+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G);
-+ adapt_mode = USXGMII_RATE_UPDATE_MODE;
-+ } else if (interface == PHY_INTERFACE_MODE_5GBASER) {
-+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0xFF);
-+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x3D) |
-+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x3D) |
-+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x3D);
-+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_5G) |
-+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_5G);
-+ adapt_mode = USXGMII_RATE_UPDATE_MODE;
-+ } else {
-+ return -EINVAL;
-+ }
-+
-+ adapt_mode |= FIELD_PREP(USXGMII_RATE_ADAPT_MODE, USXGMII_RATE_ADAPT_MODE_X1);
-+
-+ if (mpcs->interface != interface) {
-+ mpcs->interface = interface;
-+ mode_changed = true;
-+ }
-+
-+ mtk_xfi_pll_enable(eth);
-+ mtk_usxgmii_reset(eth, mpcs->id);
-+
-+ /* Setup USXGMII AN ctrl */
-+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL0,
-+ USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE,
-+ an_ctrl);
-+
-+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL2,
-+ USXGMII_LINK_TIMER_IDLE_DETECT |
-+ USXGMII_LINK_TIMER_COMP_ACK_DETECT |
-+ USXGMII_LINK_TIMER_AN_RESTART,
-+ link_timer);
-+
-+ mpcs->mode = mode;
-+
-+ /* Gated MAC CK */
-+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1,
-+ USXGMII_MAC_CK_GATED, USXGMII_MAC_CK_GATED);
-+
-+ /* Enable interface force mode */
-+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1,
-+ USXGMII_IF_FORCE_EN, USXGMII_IF_FORCE_EN);
-+
-+ /* Setup USXGMII adapt mode */
-+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1,
-+ USXGMII_RATE_UPDATE_MODE | USXGMII_RATE_ADAPT_MODE,
-+ adapt_mode);
-+
-+ /* Setup USXGMII speed */
-+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1,
-+ USXGMII_XFI_RX_MODE | USXGMII_XFI_TX_MODE,
-+ xfi_mode);
-+
-+ usleep_range(1, 10);
-+
-+ /* Un-gated MAC CK */
-+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1,
-+ USXGMII_MAC_CK_GATED, 0);
-+
-+ usleep_range(1, 10);
-+
-+ /* Disable interface force mode for the AN mode */
-+ if (an_ctrl & USXGMII_AN_ENABLE)
-+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1,
-+ USXGMII_IF_FORCE_EN, 0);
-+
-+ /* Setup USXGMIISYS with the determined property */
-+ mtk_usxgmii_setup_phya(pextp, interface, mpcs->id);
-+
-+ return mode_changed;
-+}
-+
-+static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs,
-+ struct phylink_link_state *state)
-+{
-+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs);
-+ struct mtk_eth *eth = mpcs->eth;
-+ struct mtk_mac *mac = eth->mac[mtk_xgmii2mac_id(eth, mpcs->id)];
-+ u32 val = 0;
-+
-+ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val);
-+ if (FIELD_GET(USXGMII_AN_ENABLE, val)) {
-+ /* Refresh LPA by inverting LPA_LATCH */
-+ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val);
-+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_STS0,
-+ USXGMII_LPA_LATCH,
-+ !(val & USXGMII_LPA_LATCH));
-+
-+ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val);
-+
-+ phylink_decode_usxgmii_word(state, FIELD_GET(USXGMII_PCS_AN_WORD,
-+ val));
-+
-+ state->interface = mpcs->interface;
-+ } else {
-+ val = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id));
-+
-+ if (mac->id == MTK_GMAC2_ID)
-+ val >>= 16;
-+
-+ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, val)) {
-+ case 0:
-+ state->speed = SPEED_10000;
-+ break;
-+ case 1:
-+ state->speed = SPEED_5000;
-+ break;
-+ case 2:
-+ state->speed = SPEED_2500;
-+ break;
-+ case 3:
-+ state->speed = SPEED_1000;
-+ break;
-+ }
-+
-+ state->interface = mpcs->interface;
-+ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val);
-+ state->duplex = DUPLEX_FULL;
-+ }
-+
-+ /* Continuously repeat re-configuration sequence until link comes up */
-+ if (state->link == 0)
-+ mtk_usxgmii_pcs_config(pcs, mpcs->mode,
-+ state->interface, NULL, false);
-+}
-+
-+static void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs)
-+{
-+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs);
-+ unsigned int val = 0;
-+
-+ if (!mpcs->regmap)
-+ return;
-+
-+ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val);
-+ val |= USXGMII_AN_RESTART;
-+ regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val);
-+}
-+
-+static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
-+ phy_interface_t interface,
-+ int speed, int duplex)
-+{
-+ /* Reconfiguring USXGMII to ensure the quality of the RX signal
-+ * after the line side link up.
-+ */
-+ mtk_usxgmii_pcs_config(pcs, mode,
-+ interface, NULL, false);
-+}
-+
-+static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = {
-+ .pcs_config = mtk_usxgmii_pcs_config,
-+ .pcs_get_state = mtk_usxgmii_pcs_get_state,
-+ .pcs_an_restart = mtk_usxgmii_pcs_restart_an,
-+ .pcs_link_up = mtk_usxgmii_pcs_link_up,
-+};
-+
-+int mtk_usxgmii_init(struct mtk_eth *eth)
-+{
-+ struct device_node *r = eth->dev->of_node;
-+ struct device *dev = eth->dev;
-+ struct device_node *np;
-+ int i, ret;
-+
-+ for (i = 0; i < MTK_MAX_DEVS; i++) {
-+ np = of_parse_phandle(r, "mediatek,usxgmiisys", i);
-+ if (!np)
-+ break;
-+
-+ eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs[i]), GFP_KERNEL);
-+ if (!eth->usxgmii_pcs[i])
-+ return -ENOMEM;
-+
-+ eth->usxgmii_pcs[i]->id = i;
-+ eth->usxgmii_pcs[i]->eth = eth;
-+ eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np);
-+ if (IS_ERR(eth->usxgmii_pcs[i]->regmap))
-+ return PTR_ERR(eth->usxgmii_pcs[i]->regmap);
-+
-+ eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops;
-+ eth->usxgmii_pcs[i]->pcs.poll = true;
-+ eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA;
-+ eth->usxgmii_pcs[i]->mode = -1;
-+
-+ of_node_put(np);
-+ }
-+
-+ ret = mtk_xfi_pextp_init(eth);
-+ if (ret)
-+ return ret;
-+
-+ ret = mtk_xfi_pll_init(eth);
-+ if (ret)
-+ return ret;
-+
-+ ret = mtk_toprgu_init(eth);
-+ if (ret)
-+ return ret;
-+
-+ return mtk_sgmii_wrapper_init(eth);
-+}
-+
-+struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int mac_id)
-+{
-+ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id);
-+
-+ if (!eth->usxgmii_pcs[xgmii_id]->regmap)
-+ return NULL;
-+
-+ return ð->usxgmii_pcs[xgmii_id]->pcs;
-+}
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
-@@ -4359,6 +4359,15 @@ int skb_gro_receive(struct sk_buff *p, s
+@@ -4360,6 +4360,15 @@ int skb_gro_receive(struct sk_buff *p, s
if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush))
return -E2BIG;
void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
int (*poll)(struct napi_struct *, int), int weight)
{
-@@ -11381,6 +11456,9 @@ static int dev_cpu_dead(unsigned int old
+@@ -11384,6 +11459,9 @@ static int dev_cpu_dead(unsigned int old
raise_softirq_irqoff(NET_TX_SOFTIRQ);
local_irq_enable();
#ifdef CONFIG_RPS
remsd = oldsd->rps_ipi_list;
oldsd->rps_ipi_list = NULL;
-@@ -11720,6 +11798,7 @@ static int __init net_dev_init(void)
+@@ -11723,6 +11801,7 @@ static int __init net_dev_init(void)
sd->cpu = i;
#endif
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
-@@ -2129,10 +2129,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr
+@@ -2335,10 +2335,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr
{
struct dsa_switch *ds = priv->ds;
struct device *dev = priv->dev;
bus = devm_mdiobus_alloc(dev);
if (!bus)
return -ENOMEM;
-@@ -2149,7 +2152,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr
+@@ -2355,7 +2358,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr
if (priv->irq)
mt7530_setup_mdio_irq(priv);
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
-@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct
+@@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
/*
* The Mellanox Tavor device gives false positive parity errors. Disable
* parity error reporting.
-@@ -3368,6 +3369,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
+@@ -3369,6 +3370,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
/*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
* To work around this, query the size it should be configured to by the
-@@ -3393,6 +3396,8 @@ static void quirk_intel_ntb(struct pci_d
+@@ -3394,6 +3397,8 @@ static void quirk_intel_ntb(struct pci_d
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled, even
* though no one is handling them (e.g., if the i915 driver is never
-@@ -3431,6 +3436,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
+@@ -3432,6 +3437,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
help
--- a/init/main.c
+++ b/init/main.c
-@@ -618,6 +618,29 @@ static inline void setup_nr_cpu_ids(void
+@@ -619,6 +619,29 @@ static inline void setup_nr_cpu_ids(void
static inline void smp_prepare_cpus(unsigned int maxcpus) { }
#endif
/*
* We need to store the untouched command line for future reference.
* We also need to store the touched command line since the parameter
-@@ -957,6 +980,7 @@ asmlinkage __visible void __init __no_sa
+@@ -958,6 +981,7 @@ asmlinkage __visible void __init __no_sa
pr_notice("%s", linux_banner);
early_security_init();
setup_arch(&command_line);
projects / librecmc / librecmc.git / commitdiff