arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon

This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This
property will ensure the SD runs on High Speed mode.

Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 9516c799d5d822cf5481adcff3a3b5378939b7b1..0984077bacf52b647256dce9ff134e2a865be343 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -837,6 +837,8 @@
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x870>;
                        power-domains = <&pd_sd0>;
+                       nvmem-cells = <&soc_revision>;
+                       nvmem-cell-names = "soc_revision";
                };
 
                sdhci1: sdhci@ff170000 {
@@ -851,6 +853,8 @@
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x871>;
                        power-domains = <&pd_sd1>;
+                       nvmem-cells = <&soc_revision>;
+                       nvmem-cell-names = "soc_revision";
                };
 
                pinctrl0: pinctrl@ff180000 {