am3517_crane ARM ARMV7 (AM35x SoC)
-Rolf Offermanns <rof@sysgo.de>
-
- shannon SA1100
-
Kyungmin Park <kyungmin.park@samsung.com>
apollon ARM1136EJS
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := shannon.o flash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# LART board with SA1100 cpu
-#
-# see http://www.lart.tudelft.nl/ for more information on LART
-#
-
-#
-# Tuxscreen has 4 banks of 4 MB DRAM each
-#
-# c000'0000
-# c800'0000
-# d000'0000
-# d800'0000
-#
-# Linux-Kernel is expected to be at c000'8000, entry c000'8000
-#
-# we load ourself to d838'0000, the upper 1 MB of the last (4th) bank
-#
-# download areas is c800'0000
-#
-
-
-CONFIG_SYS_TEXT_BASE = 0xd8380000
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush(void);
-
-
-#define FLASH_BANK_SIZE 0x400000 /* 4 MB */
-#define MAIN_SECT_SIZE 0x20000 /* 128 KB */
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00F000F0
-#define CMD_UNLOCK1 0x00AA00AA
-#define CMD_UNLOCK2 0x00550055
-#define CMD_ERASE_SETUP 0x00800080
-#define CMD_ERASE_CONFIRM 0x00300030
-#define CMD_PROGRAM 0x00A000A0
-#define CMD_UNLOCK_BYPASS 0x00200020
-
-#define MEM_FLASH_ADDR1 (*(volatile u32 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 2)))
-#define MEM_FLASH_ADDR2 (*(volatile u32 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 2)))
-
-#define BIT_ERASE_DONE 0x00800080
-#define BIT_RDY_MASK 0x00800080
-#define BIT_PROGRAM_ERROR 0x00200020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init(void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
- {
- ulong flashbase = 0;
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV160B & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++)
- {
-
- if (j <= 3)
- {
- /* 1st one is 32 KB */
- if (j == 0)
- {
- flash_info[i].start[j] = flashbase + 0;
- }
-
- /* 2nd and 3rd are both 16 KB */
- if ((j == 1) || (j == 2))
- {
- flash_info[i].start[j] = flashbase + 0x8000 + (j-1)*0x4000;
- }
-
- /* 4th 64 KB */
- if (j == 3)
- {
- flash_info[i].start[j] = flashbase + 0x10000;
- }
- }
- else
- {
- flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- /*
- * Protect monitor and environment sectors
- * Inferno is complicated, it's hardware locked
- */
-#ifdef CONFIG_INFERNO
- /* first one, 0x00000 to 0x07fff */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE + 0x00000,
- CONFIG_SYS_FLASH_BASE + 0x08000 - 1,
- &flash_info[0]);
-
- /* third to 10th, 0x0c000 - 0xdffff */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE + 0x0c000,
- CONFIG_SYS_FLASH_BASE + 0xe0000 - 1,
- &flash_info[0]);
-#else
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf("AMD: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK)
- {
- case (AMD_ID_LV160B & FLASH_TYPEMASK):
- printf("2x Amd29F160BB (16Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++)
- {
- if ((i % 5) == 0)
- {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
-Done:
- ;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1, chip2;
- ulong start;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
- {
- printf("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- if (info->protect[sect] == 0)
- { /* not protected */
- vu_long *addr = (vu_long *)(info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
-
- do
- {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
- {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
- chip1 = ERR;
-
- if (!chip2 && (result >> 16) & BIT_ERASE_DONE)
- chip2 = READY;
-
- if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR)
- chip2 = ERR;
-
- } while (!chip1 || !chip2);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR || chip2 == ERR)
- {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO)
- {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf("ok.\n");
- }
- else /* it was protected */
- {
- printf("protected!\n");
- }
- }
-
- if (ctrlc())
- printf("User Interrupt!\n");
-
-outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked(10000);
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long *)dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1, chip2;
- ulong start;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status();
- icache_disable();
- iflag = disable_interrupts();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait until flash is ready */
- chip1 = chip2 = 0;
- do
- {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
- {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
- {
- result = *addr;
-
- if ((result & 0x80) == (data & 0x80))
- chip1 = READY;
- else
- chip1 = ERR;
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16))))
- chip2 = READY;
-
- if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR))
- {
- result = *addr;
-
- if ((result & (0x80 << 16)) == (data & (0x80 << 16)))
- chip2 = READY;
- else
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || chip2 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts();
-
- if (cflag)
- icache_enable();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int l;
- int i, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = *((vu_long*)src);
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- src += 4;
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-}
+++ /dev/null
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
- * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-
-/* some parameters for the board */
-
-MEM_BASE: .long 0xa0000000
-MEM_START: .long 0xc0000000
-
-#define MDCNFG 0x00
-#define MDCAS0 0x04
-#define MDCAS1 0x08
-#define MDCAS2 0x0c
-#define MSC0 0x10
-#define MSC1 0x14
-#define MECR 0x18
-
-mdcas0: .long 0xc71c703f @ cccccccf
-mdcas1: .long 0xffc71c71 @ fffffffc
-mdcas2: .long 0xffffffff @ ffffffff
-mdcnfg: .long 0x0334b21f @ 9326991f
-msc0: .long 0xfff84458 @ 42304230
-msc1: .long 0xffffffff @ 20182018
-mecr: .long 0x7fff7fff @ 01000000
-
-/* setting up the memory */
-
-.globl lowlevel_init
-lowlevel_init:
- ldr r0, MEM_BASE
-
- /* Setup the flash memory */
- ldr r1, msc0
- str r1, [r0, #MSC0]
-
- /* Set up the DRAM */
-
- /* MDCAS0 */
- ldr r1, mdcas0
- str r1, [r0, #MDCAS0]
-
- /* MDCAS1 */
- ldr r1, mdcas1
- str r1, [r0, #MDCAS1]
-
- /* MDCAS2 */
- ldr r1, mdcas2
- str r1, [r0, #MDCAS2]
-
- /* MDCNFG */
- ldr r1, mdcnfg
- str r1, [r0, #MDCNFG]
-
- /* Set up PCMCIA space */
- ldr r1, mecr
- str r1, [r0, #MECR]
-
- /* Load something to activate bank */
- ldr r1, MEM_START
-
-.rept 8
- ldr r0, [r1]
-.endr
-
- /* everything is fine now */
- mov pc, lr
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- /* memory and cpu-speed are setup before relocation */
- /* but if we use InfernoLoader, we must do some inits here */
-
-#ifdef CONFIG_INFERNO
- {
- unsigned long temp;
- __asm__ __volatile__(/* disable MMU, enable icache */
- "mrc p15, 0, %0, c1, c0\n"
- "bic %0, %0, #0x00002000\n"
- "bic %0, %0, #0x0000000f\n"
- "orr %0, %0, #0x00001000\n"
- "orr %0, %0, #0x00000002\n"
- "mcr p15, 0, %0, c1, c0\n"
- /* flush caches */
- "mov %0, #0\n"
- "mcr p15, 0, %0, c7, c7, 0\n"
- "mcr p15, 0, %0, c8, c7, 0\n"
- : "=r" (temp)
- :
- : "memory");
- /* setup PCMCIA timing */
- temp = 0xa0000018;
- *(unsigned long *)temp = 0x00060006;
-
- }
-#endif /* CONFIG_INFERNO */
-
- /* arch number for shannon */
- gd->bd->bi_arch_number = MACH_TYPE_SHANNON;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0xc0000100;
-
- return 0;
-}
-
-int dram_init (void)
-{
-#if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
- defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
- bd_t *bd = gd->bd;
-#endif
-
-#ifdef PHYS_SDRAM_1
- bd->bi_dram[0].start = PHYS_SDRAM_1;
- bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-#endif
-
-#ifdef PHYS_SDRAM_2
- bd->bi_dram[1].start = PHYS_SDRAM_2;
- bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-#endif
-
-#ifdef PHYS_SDRAM_3
- bd->bi_dram[2].start = PHYS_SDRAM_3;
- bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-#endif
-
-#ifdef PHYS_SDRAM_4
- bd->bi_dram[3].start = PHYS_SDRAM_4;
- bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-#endif
-
- return (0);
-}
zipitz2 arm pxa
zylonite arm pxa
jornada arm sa1100
-shannon arm sa1100
atngw100 avr32 at32ap - atmel at32ap700x
atstk1002 avr32 at32ap atstk1000 atmel at32ap700x
atstk1003 avr32 at32ap atstk1000 atmel at32ap700x
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
+shannon arm sa1100 - 2011-09-05 Rolf Offermanns <rof@sysgo.de>
modnet50 arm arm720t - 2011-09-05 Thomas Elste <info@elste.org>
lpc2292sodimm arm arm720t - 2011-09-05
lart arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * Since we use the Inferno-Loader to bring us to live,
- * we skip the lowlevel init stuff.
- * But U-Boot still relocates itself into RAM
- */
-#define CONFIG_INFERNO /* we are using the inferno bootldr */
-#define CONFIG_SKIP_LOWLEVEL_INIT 1
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_SA1100 1 /* This is an SA1100 CPU */
-#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */
-
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-/* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_DCACHE_OFF
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_DRIVER_3C589 1
-
-/*
- * select serial console configuration
- */
-#define CONFIG_SA1100_SERIAL
-#define CONFIG_SERIAL3 1 /* we use SERIAL 3 */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE 115200
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
-#define CONFIG_NETMASK 255.255.0.0
-#define CONFIG_BOOTCOMMAND "help"
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "TuxScreen # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */
-
-#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
-#define CONFIG_SYS_CPUSPEED 0x09 /* 190 MHz for Shannon */
-
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#define CONFIG_DOS_PARTITION 1 /* DOS partitiion support */
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128*1024) /* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-/* BE CAREFUL */
-#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of EDORAM */
-#define PHYS_SDRAM_1 0xc0000000 /* RAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x00400000 /* 4 MB */
-#define PHYS_SDRAM_2 0xc8000000 /* RAM Bank #2 */
-#define PHYS_SDRAM_2_SIZE 0x00400000 /* 4 MB */
-#define PHYS_SDRAM_3 0xd0000000 /* RAM Bank #3 */
-#define PHYS_SDRAM_3_SIZE 0x00400000 /* 4 MB */
-#define PHYS_SDRAM_4 0xd8000000 /* RAM Bank #4 */
-#define PHYS_SDRAM_4_SIZE 0x00400000 /* 4 MB */
-
-
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT (31+4) /* max number of sectors on one chip */
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-#ifdef CONFIG_INFERNO
-/* we take the last sector, 128 KB in size, but we only use 16 KB of it for stack reasons */
-#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
-#define CONFIG_ENV_SECT_SIZE (128 << 10) /* size of environment sector */
-#else
-#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
-#endif
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-
-/* we pick the upper one */
-
-#define CONFIG_PCMCIA_SLOT_A
-
-#define CONFIG_SYS_PCMCIA_IO_ADDR (0x20000000)
-#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_DMA_ADDR (0x24000000)
-#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0x2C000000)
-#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_MEM_ADDR (0x28000000)
-#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 )
-
-/* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */
-
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
- *-----------------------------------------------------------------------
- */
-
-#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */
-
-#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */
-#undef CONFIG_IDE_LED /* LED for ide not supported */
-#undef CONFIG_IDE_RESET /* reset for ide not supported */
-
-#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
-#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
-
-/* it's simple, all regs are in I/O space */
-#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_ATTRB_ADDR
-
-/* Offset for data I/O */
-#define CONFIG_SYS_ATA_DATA_OFFSET 0
-
-/* Offset for normal register accesses */
-#define CONFIG_SYS_ATA_REG_OFFSET 0
-
-/* Offset for alternate registers */
-#define CONFIG_SYS_ATA_ALT_OFFSET 0
-
-/*-----------------------------------------------------------------------
- */
-
-#endif /* __CONFIG_H */
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