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ppc4xx: Canyonlands/Glacier: Squeeze NAND image a bit to fit again
author
Stefan Roese
<sr@denx.de>
Mon, 27 Aug 2012 13:39:45 +0000
(15:39 +0200)
committer
Stefan Roese
<sr@denx.de>
Mon, 3 Sep 2012 09:29:07 +0000
(11:29 +0200)
This patch removes some superfluous SDRAM init calls to fit the
NAND_SPL image into 4k again.
Signed-off-by: Stefan Roese <sr@denx.de>
nand_spl/board/amcc/canyonlands/ddr2_fixed.c
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diff --git
a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
index f71ecfb930254495e62d66a5f4dc3e03d073ab05..10f62cc812f8c5c4c8ee3469b13745f60625fff5 100644
(file)
--- a/
nand_spl/board/amcc/canyonlands/ddr2_fixed.c
+++ b/
nand_spl/board/amcc/canyonlands/ddr2_fixed.c
@@
-92,14
+92,11
@@
static void ddr_init_common(void)
mtsdram(SDRAM_INITPLR11, 0x80000432);
mtsdram(SDRAM_INITPLR12, 0x808103C0);
mtsdram(SDRAM_INITPLR13, 0x80810040);
- mtsdram(SDRAM_INITPLR14, 0x00000000);
- mtsdram(SDRAM_INITPLR15, 0x00000000);
mtsdram(SDRAM_RDCC, 0x40000000);
mtsdram(SDRAM_RQDC, 0x80000038);
mtsdram(SDRAM_RFDC, 0x00000257);
mtdcr(SDRAM_R0BAS, 0x0000F800); /* MQ0_B0BAS */
- mtdcr(SDRAM_R1BAS, 0x0400F800); /* MQ0_B1BAS */
}
phys_size_t initdram(int board_type)