Remove infinite loop from new QC/A SPI driver

It seems that we really don't need and don't want this loop here.
In case of missing FLASH chip, we should get 0x0 from SPI shift in register after the command, because other chips are silent during their CS high.

What's more, it seems that the access to SPI shift in register is somehow locked until the SOC shifts out all previously programmed bits.
That is only a theory after some tests on scope and still needs more tests.

diff --git a/u-boot/cpu/mips/ar7240/qca_sf.c b/u-boot/cpu/mips/ar7240/qca_sf.c
index 3b48e91b60a80d69254197db42e3074c954d529c..36e02d112e5ab55343604653e5e66dccf0522eb0 100644 (file)
--- a/u-boot/cpu/mips/ar7240/qca_sf.c
+++ b/u-boot/cpu/mips/ar7240/qca_sf.c
@@ -188,17 +188,13 @@ void qca_sf_write_page(u32 bank, u32 address, u32 length, u8 *data)
 /* Returns JEDEC ID for selected FLASH chip */
 u32 qca_sf_jedec_id(u32 bank)
 {
-       volatile u32 data_in = 0;
+       u32 data_in;
 
        qca_sf_bank_to_cs_mask(bank);
 
        qca_sf_spi_en();
        qca_sf_shift_out(SPI_FLASH_CMD_JEDEC << 24, 32, 1);
-
-       do {
-               data_in = qca_sf_shift_in();
-       } while (data_in == 0);
-
+       data_in = qca_sf_shift_in();
        qca_sf_spi_di();
 
        return (data_in & 0x00FFFFFF);