ARM: uniphier: refactor SBC init code

There is a bunch of duplication in the System Bus Controller init
code.  Roughly, there are two types in the SBC mode:  Adress/Data
Multiplex Mode and Save Pins Mode.  Consolidate per-SoC functions
into the two, plus per-SoC optional init code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index e969fd0c4ed638a5437af97aa5a80c56d3a77090..cef9d621c9d5dbe6f087863cecd39420f0508ccd 100644 (file)
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -34,27 +34,33 @@ int ph1_pro5_init(const struct uniphier_board_data *bd);
 int proxstream2_init(const struct uniphier_board_data *bd);
 
 #if defined(CONFIG_MICRO_SUPPORT_CARD)
-int ph1_sld3_sbc_init(const struct uniphier_board_data *bd);
-int ph1_ld4_sbc_init(const struct uniphier_board_data *bd);
-int ph1_pro4_sbc_init(const struct uniphier_board_data *bd);
-int proxstream2_sbc_init(const struct uniphier_board_data *bd);
+int sbc_admulti_init(const struct uniphier_board_data *bd);
+int sbc_savepin_init(const struct uniphier_board_data *bd);
+int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd);
+int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd);
+int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd);
 #else
-static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd)
+static inline int sbc_admulti_init(const struct uniphier_board_data *bd)
 {
        return 0;
 }
 
-static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
+static inline int sbc_savepin_init(const struct uniphier_board_data *bd)
 {
        return 0;
 }
 
-static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
+static inline int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd)
 {
        return 0;
 }
 
-static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd)
+static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)
+{
+       return 0;
+}
+
+static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)
 {
        return 0;
 }

diff --git a/arch/arm/mach-uniphier/init/init-ld4.c b/arch/arm/mach-uniphier/init/init-ld4.c
index a9c6d72e0b63c4f2994d77392285254088d2766f..5295cd03163eaf163dbd440e224f1da6e7dfcc0f 100644 (file)
--- a/arch/arm/mach-uniphier/init/init-ld4.c
+++ b/arch/arm/mach-uniphier/init/init-ld4.c
@@ -14,7 +14,8 @@ int ph1_ld4_init(const struct uniphier_board_data *bd)
 {
        ph1_ld4_bcu_init(bd);
 
-       ph1_ld4_sbc_init(bd);
+       sbc_savepin_init(bd);
+       uniphier_ld4_sbc_init(bd);
 
        support_card_reset();
 

diff --git a/arch/arm/mach-uniphier/init/init-pro4.c b/arch/arm/mach-uniphier/init/init-pro4.c
index 6fcd8b6c857963cc1366ec7a857d2288808eeb2d..456fb48bd7136c60353a83500dc64c854f046cb6 100644 (file)
--- a/arch/arm/mach-uniphier/init/init-pro4.c
+++ b/arch/arm/mach-uniphier/init/init-pro4.c
@@ -12,7 +12,7 @@
 
 int ph1_pro4_init(const struct uniphier_board_data *bd)
 {
-       ph1_pro4_sbc_init(bd);
+       sbc_savepin_init(bd);
 
        support_card_reset();
 

diff --git a/arch/arm/mach-uniphier/init/init-pro5.c b/arch/arm/mach-uniphier/init/init-pro5.c
index 45c65cf49a7495da0e745d0ed238a619459484bf..c2c68031b4075550d349f55ee76e2038c79d4080 100644 (file)
--- a/arch/arm/mach-uniphier/init/init-pro5.c
+++ b/arch/arm/mach-uniphier/init/init-pro5.c
@@ -12,7 +12,7 @@
 
 int ph1_pro5_init(const struct uniphier_board_data *bd)
 {
-       ph1_pro4_sbc_init(bd);
+       sbc_savepin_init(bd);
 
        support_card_reset();
 

diff --git a/arch/arm/mach-uniphier/init/init-pxs2.c b/arch/arm/mach-uniphier/init/init-pxs2.c
index 029c54499791c04e2fb9d0eeb9ee42277ad20ca1..2d4b6fbb9bf5feaacb6ad2f11da167979dcfc71e 100644 (file)
--- a/arch/arm/mach-uniphier/init/init-pxs2.c
+++ b/arch/arm/mach-uniphier/init/init-pxs2.c
@@ -14,7 +14,8 @@ int proxstream2_init(const struct uniphier_board_data *bd)
 {
        int ret;
 
-       proxstream2_sbc_init(bd);
+       sbc_savepin_init(bd);
+       uniphier_pxs2_sbc_init(bd);
 
        support_card_reset();
 

diff --git a/arch/arm/mach-uniphier/init/init-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c
index 7827ec0bdc4b4140d02cbbb99068da6360dbc780..c48126fd1cae78644403c67615c9d1d10a970f81 100644 (file)
--- a/arch/arm/mach-uniphier/init/init-sld3.c
+++ b/arch/arm/mach-uniphier/init/init-sld3.c
@@ -14,7 +14,8 @@ int ph1_sld3_init(const struct uniphier_board_data *bd)
 {
        ph1_sld3_bcu_init(bd);
 
-       ph1_sld3_sbc_init(bd);
+       sbc_admulti_init(bd);
+       uniphier_sld3_sbc_init(bd);
 
        support_card_reset();
 

diff --git a/arch/arm/mach-uniphier/init/init-sld8.c b/arch/arm/mach-uniphier/init/init-sld8.c
index 6c96aede2ae4c6b85dd94ac8b761ead228d1ca86..1f31ca697bbbba254bfea14eacff3225b861ffdc 100644 (file)
--- a/arch/arm/mach-uniphier/init/init-sld8.c
+++ b/arch/arm/mach-uniphier/init/init-sld8.c
@@ -14,7 +14,8 @@ int ph1_sld8_init(const struct uniphier_board_data *bd)
 {
        ph1_ld4_bcu_init(bd);
 
-       ph1_ld4_sbc_init(bd);
+       sbc_savepin_init(bd);
+       uniphier_ld4_sbc_init(bd);
 
        support_card_reset();
 

diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile
index 87220a6432858d787b822bbbf33a6fe2741e058f..e515af9439ec908c0966ef2f1d67f173c2555c9b 100644 (file)
--- a/arch/arm/mach-uniphier/sbc/Makefile
+++ b/arch/arm/mach-uniphier/sbc/Makefile
@@ -2,10 +2,10 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-$(CONFIG_ARCH_UNIPHIER_SLD3)       += sbc-sld3.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD4)                += sbc-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO4)       += sbc-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_SLD8)       += sbc-ld4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PRO5)       += sbc-pro4.o
-obj-$(CONFIG_ARCH_UNIPHIER_PXS2)       += sbc-pxs2.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD6B)       += sbc-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD3)       += sbc-admulti.o sbc-sld3.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD4)                += sbc-savepin.o sbc-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO4)       += sbc-savepin.o
+obj-$(CONFIG_ARCH_UNIPHIER_SLD8)       += sbc-savepin.o sbc-ld4.o
+obj-$(CONFIG_ARCH_UNIPHIER_PRO5)       += sbc-savepin.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS2)       += sbc-savepin.o sbc-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD6B)       += sbc-savepin.o sbc-pxs2.o

diff --git a/arch/arm/mach-uniphier/sbc/sbc-admulti.c b/arch/arm/mach-uniphier/sbc/sbc-admulti.c
new file mode 100644 (file)
index 0000000..8e9f8eb
--- /dev/null
+++ b/arch/arm/mach-uniphier/sbc/sbc-admulti.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sg-regs.h"
+#include "sbc-regs.h"
+
+#define SBCTRL0_ADMULTIPLX_PERI_VALUE  0x33120000
+#define SBCTRL1_ADMULTIPLX_PERI_VALUE  0x03005500
+#define SBCTRL2_ADMULTIPLX_PERI_VALUE  0x14000020
+
+#define SBCTRL0_ADMULTIPLX_MEM_VALUE   0x33120000
+#define SBCTRL1_ADMULTIPLX_MEM_VALUE   0x03005500
+#define SBCTRL2_ADMULTIPLX_MEM_VALUE   0x14000010
+
+int sbc_admulti_init(const struct uniphier_board_data *bd)
+{
+       /*
+        * Only CS1 is connected to support card.
+        * BKSZ[1:0] should be set to "01".
+        */
+       writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
+       writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
+       writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
+
+       if (boot_is_swapped()) {
+               /*
+                * Boot Swap On: boot from external NOR/SRAM
+                * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
+                *
+                * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
+                * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
+                */
+               writel(0x0000bc01, SBBASE0);
+       } else {
+               /*
+                * Boot Swap Off: boot from mask ROM
+                * 0x40000000-0x41ffffff: mask ROM
+                * 0x42000000-0x43efffff: memory bank (31MB)
+                * 0x43f00000-0x43ffffff: peripherals (1MB)
+                */
+               writel(0x0000be01, SBBASE0); /* dummy */
+               writel(0x0200be01, SBBASE1);
+       }
+
+       return 0;
+}

diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c
index fcce43cb99594b3feb9b7e798ea07c6a09cfb077..12bee79fd65d1c29f37bb543fd1fe90f33c80cf3 100644 (file)
--- a/arch/arm/mach-uniphier/sbc/sbc-ld4.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-ld4.c
@@ -1,17 +1,15 @@
 /*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include <common.h>
 #include <linux/io.h>
 
 #include "../init.h"
-#include "../sg-regs.h"
 #include "sbc-regs.h"
 
-int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
+int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd)
 {
        u32 tmp;
 
@@ -20,34 +18,5 @@ int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
        tmp &= 0xfffffcff;
        writel(tmp, PC0CTRL);
 
-       /*
-        * Only CS1 is connected to support card.
-        * BKSZ[1:0] should be set to "01".
-        */
-       writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
-       writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
-       writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
-       writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
-
-       if (boot_is_swapped()) {
-               /*
-                * Boot Swap On: boot from external NOR/SRAM
-                * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-                *
-                * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-                * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-                */
-               writel(0x0000bc01, SBBASE0);
-       } else {
-               /*
-                * Boot Swap Off: boot from mask ROM
-                * 0x40000000-0x41ffffff: mask ROM
-                * 0x42000000-0x43efffff: memory bank (31MB)
-                * 0x43f00000-0x43ffffff: peripherals (1MB)
-                */
-               writel(0x0000be01, SBBASE0); /* dummy */
-               writel(0x0200be01, SBBASE1);
-       }
-
        return 0;
 }

diff --git a/arch/arm/mach-uniphier/sbc/sbc-pro4.c b/arch/arm/mach-uniphier/sbc/sbc-pro4.c
deleted file mode 100644 (file)
index 8313c5a..0000000
--- a/arch/arm/mach-uniphier/sbc/sbc-pro4.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/io.h>
-
-#include "../init.h"
-#include "../sg-regs.h"
-#include "sbc-regs.h"
-
-int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
-{
-       /*
-        * Only CS1 is connected to support card.
-        * BKSZ[1:0] should be set to "01".
-        */
-       writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
-       writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
-       writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
-       writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
-
-       if (boot_is_swapped()) {
-               /*
-                * Boot Swap On: boot from external NOR/SRAM
-                * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-                *
-                * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-                * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-                */
-               writel(0x0000bc01, SBBASE0);
-       } else {
-               /*
-                * Boot Swap Off: boot from mask ROM
-                * 0x40000000-0x41ffffff: mask ROM
-                * 0x42000000-0x43efffff: memory bank (31MB)
-                * 0x43f00000-0x43ffffff: peripherals (1MB)
-                */
-               writel(0x0000be01, SBBASE0); /* dummy */
-               writel(0x0200be01, SBBASE1);
-       }
-
-       return 0;
-}

diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
index 0d9ffe153f1828640348bc0e849339821b13cf75..acbf4c53fb5a5091b4dd1c0fe71b1b99ab2b6fc4 100644 (file)
--- a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -7,43 +7,13 @@
 #include <linux/io.h>
 
 #include "../init.h"
-#include "../sg-regs.h"
 #include "sbc-regs.h"
 
-int proxstream2_sbc_init(const struct uniphier_board_data *bd)
+int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd)
 {
        /* necessary for ROM boot ?? */
        /* system bus output enable */
        writel(0x17, PC0CTRL);
 
-       /*
-        * Only CS1 is connected to support card.
-        * BKSZ[1:0] should be set to "01".
-        */
-       writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
-       writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
-       writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
-       writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
-
-       if (boot_is_swapped()) {
-               /*
-                * Boot Swap On: boot from external NOR/SRAM
-                * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-                *
-                * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-                * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-                */
-               writel(0x0000bc01, SBBASE0);
-       } else {
-               /*
-                * Boot Swap Off: boot from mask ROM
-                * 0x40000000-0x41ffffff: mask ROM
-                * 0x42000000-0x43efffff: memory bank (31MB)
-                * 0x43f00000-0x43ffffff: peripherals (1MB)
-                */
-               writel(0x0000be01, SBBASE0); /* dummy */
-               writel(0x0200be01, SBBASE1);
-       }
-
        return 0;
 }

diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h
index 493363bb6427be87ee9cdbb5edf76a5c741b636b..a5dca74a55b929b4c64aa807f5a6ec76c1db7dde 100644 (file)
--- a/arch/arm/mach-uniphier/sbc/sbc-regs.h
+++ b/arch/arm/mach-uniphier/sbc/sbc-regs.h
@@ -74,27 +74,6 @@
 #define        SBCTRL73                SBCTRL(7, 3)
 #define        SBCTRL74                (SBCTRL_BASE + 0x170)
 
-/* slower but LED works */
-#define SBCTRL0_SAVEPIN_PERI_VALUE     0x55450000
-#define SBCTRL1_SAVEPIN_PERI_VALUE     0x07168d00
-#define SBCTRL2_SAVEPIN_PERI_VALUE     0x34000009
-#define SBCTRL4_SAVEPIN_PERI_VALUE     0x02110110
-
-/* faster but LED does not work */
-#define SBCTRL0_SAVEPIN_MEM_VALUE      0x55450000
-#define SBCTRL1_SAVEPIN_MEM_VALUE      0x06057700
-/* NOR flash needs more wait counts than SRAM */
-#define SBCTRL2_SAVEPIN_MEM_VALUE      0x34000009
-#define SBCTRL4_SAVEPIN_MEM_VALUE      0x02110210
-
-#define SBCTRL0_ADMULTIPLX_PERI_VALUE  0x33120000
-#define SBCTRL1_ADMULTIPLX_PERI_VALUE  0x03005500
-#define SBCTRL2_ADMULTIPLX_PERI_VALUE  0x14000020
-
-#define SBCTRL0_ADMULTIPLX_MEM_VALUE   0x33120000
-#define SBCTRL1_ADMULTIPLX_MEM_VALUE   0x03005500
-#define SBCTRL2_ADMULTIPLX_MEM_VALUE   0x14000010
-
 #define PC0CTRL                                0x598000c0
 #define ROM_BOOT_ROMRSV2               0x59801208
 

diff --git a/arch/arm/mach-uniphier/sbc/sbc-savepin.c b/arch/arm/mach-uniphier/sbc/sbc-savepin.c
new file mode 100644 (file)
index 0000000..e3e3daa
--- /dev/null
+++ b/arch/arm/mach-uniphier/sbc/sbc-savepin.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <linux/io.h>
+
+#include "../init.h"
+#include "sbc-regs.h"
+
+/* slower but LED works */
+#define SBCTRL0_SAVEPIN_PERI_VALUE     0x55450000
+#define SBCTRL1_SAVEPIN_PERI_VALUE     0x07168d00
+#define SBCTRL2_SAVEPIN_PERI_VALUE     0x34000009
+#define SBCTRL4_SAVEPIN_PERI_VALUE     0x02110110
+
+/* faster but LED does not work */
+#define SBCTRL0_SAVEPIN_MEM_VALUE      0x55450000
+#define SBCTRL1_SAVEPIN_MEM_VALUE      0x06057700
+/* NOR flash needs more wait counts than SRAM */
+#define SBCTRL2_SAVEPIN_MEM_VALUE      0x34000009
+#define SBCTRL4_SAVEPIN_MEM_VALUE      0x02110210
+
+int sbc_savepin_init(const struct uniphier_board_data *bd)
+{
+       /*
+        * Only CS1 is connected to support card.
+        * BKSZ[1:0] should be set to "01".
+        */
+       writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
+       writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
+       writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
+       writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
+
+       if (boot_is_swapped()) {
+               /*
+                * Boot Swap On: boot from external NOR/SRAM
+                * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
+                *
+                * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
+                * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
+                */
+               writel(0x0000bc01, SBBASE0);
+       } else {
+               /*
+                * Boot Swap Off: boot from mask ROM
+                * 0x40000000-0x41ffffff: mask ROM
+                * 0x42000000-0x43efffff: memory bank (31MB)
+                * 0x43f00000-0x43ffffff: peripherals (1MB)
+                */
+               writel(0x0000be01, SBBASE0); /* dummy */
+               writel(0x0200be01, SBBASE1);
+       }
+
+       return 0;
+}

diff --git a/arch/arm/mach-uniphier/sbc/sbc-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-sld3.c
index c03c2843a65a273e6b3468abd80bc6d617702f74..ac9d0301be4b4849874e39d5fa048121ed31155b 100644 (file)
--- a/arch/arm/mach-uniphier/sbc/sbc-sld3.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-sld3.c
@@ -4,45 +4,13 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include <common.h>
 #include <linux/io.h>
 
 #include "../init.h"
 #include "../sg-regs.h"
-#include "sbc-regs.h"
 
-int ph1_sld3_sbc_init(const struct uniphier_board_data *bd)
+int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd)
 {
-       /* only address/data multiplex mode is supported */
-
-       /*
-        * Only CS1 is connected to support card.
-        * BKSZ[1:0] should be set to "01".
-        */
-       writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
-       writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
-       writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
-
-       if (boot_is_swapped()) {
-               /*
-                * Boot Swap On: boot from external NOR/SRAM
-                * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
-                *
-                * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
-                * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
-                */
-               writel(0x0000bc01, SBBASE0);
-       } else {
-               /*
-                * Boot Swap Off: boot from mask ROM
-                * 0x40000000-0x41ffffff: mask ROM
-                * 0x42000000-0x43efffff: memory bank (31MB)
-                * 0x43f00000-0x43ffffff: peripherals (1MB)
-                */
-               writel(0x0000be01, SBBASE0); /* dummy */
-               writel(0x0200be01, SBBASE1);
-       }
-
        sg_set_pinsel(99, 1, 4, 4);     /* GPIO26 -> EA24 */
 
        return 0;