Add support for TP-Link TL-WR842N/D v3 (QCA9531 based)

This closes #143.

diff --git a/Makefile b/Makefile
index d2a0db1342e131a58c6c3e69e45917e80eff5ee6..82def5fbf16327972e0cc104c8454e9e52d0ded3 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -235,7 +235,8 @@ COMMON_ETHS27_TARGETS = \
        tp-link_tl-wr841n_v10 \
        tp-link_tl-wr841n_v11 \
        tp-link_tl-wr841n_v8 \
-       tp-link_tl-wr841n_v9
+       tp-link_tl-wr841n_v9 \
+       tp-link_tl-wr842n_v3
 
 $(COMMON_ETHS27_TARGETS):
        @$(call build,123,1,ETH_CONFIG=_s27)

diff --git a/README.md b/README.md
index 27f416d6ccded591b95add8a9e1b5b76bdb5703a..e147e5c9d5d94ee2def1af8f86e1b634f092f277 100644 (file)
--- a/README.md
+++ b/README.md
@@ -106,6 +106,7 @@ Currently supported devices:
   - TP-Link TL-WR810N
   - TP-Link TL-WR820N (version for Chinese market)
   - TP-Link TL-WR841N/D v9, v10, v11
+  - TP-Link TL-WR842N/D v3
   - Wallys DR531
   - YunCore AP90Q
   - YunCore CPE830
@@ -151,6 +152,7 @@ More information about supported devices:
 | [TP-Link TL-WR820N](https://wiki.openwrt.org/toh/tp-link/tl-wr820n) | QCA9531 | 4 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WR841N/D v8](http://wiki.openwrt.org/toh/tp-link/tl-wr841nd) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WR841N/D v9/10/11](https://wiki.openwrt.org/toh/tp-link/tl-wr841nd) | QCA9533 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
+| TP-Link TL-WR842N/D v3 | QCA9531 | 16 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO |
 | Village Telco Mesh Potato 2 | AR9331 | 16 MiB | 64 MiB DDR1 | 192 KiB | R/W |
 | Wallys DR531 | QCA9531 | 8 MiB | 64 MiB DDR2 | 192 KiB | R/W |
 | YunCore AP90Q | QCA9531 | 16 MiB | 128 MiB DDR2 | 256 KiB | R/W |

diff --git a/u-boot/Makefile b/u-boot/Makefile
index a1f65a0f6ee2998def7c735f420e7645ac0eafd4..e86725dd662abb1def324d2891be52d78c7ea3af 100644 (file)
--- a/u-boot/Makefile
+++ b/u-boot/Makefile
@@ -618,6 +618,13 @@ tp-link_tl-wr841n_v9: qca953x_common lsdk_kernel
        @$(call define_add,CFG_ATH_GMAC_NMACS,2)
        @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
 
+tp-link_tl-wr842n_v3: qca953x_common lsdk_kernel
+       @$(call config_init,TP-Link TL-WR842N/D v3,tl-wr842nd-v3,16,1,1,QCA_QCA953X_SOC)
+       @$(call define_add,CONFIG_FOR_TPLINK_WR842N_V3,1)
+       @$(call define_add,CFG_ATHRS27_PHY,1)
+       @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+       @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
 unwireddevices_unwired-one: ar933x_common
        @$(call config_init,Black Swift aka Unwired One,black-swift,16,11,1,QCA_AR933X_SOC)
        @$(call define_add,CONFIG_FOR_BLACK_SWIFT_BOARD,1)

diff --git a/u-boot/include/configs/ap143.h b/u-boot/include/configs/ap143.h
index d934c1aa2e807d73597cd1703d3781f760fc51a4..64a37fb1ed933a9a243abc9ad383e55312a1f855 100644 (file)
--- a/u-boot/include/configs/ap143.h
+++ b/u-boot/include/configs/ap143.h
@@ -111,6 +111,16 @@
        #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
        #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 
+#elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
+
+       #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO2  | GPIO3  | GPIO4  |\
+                                               GPIO11 | GPIO12 | GPIO13 |\
+                                               GPIO14 | GPIO15 | GPIO16 |\
+                                               GPIO17
+       #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
+       #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1
+       #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
+
 #elif defined(CONFIG_FOR_WALLYS_DR531)
 
        #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
@@ -197,6 +207,12 @@
                                "rootfstype=squashfs init=/sbin/init "\
                                "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 
+#elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
+
+       #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
+                               "rootfstype=jffs2 init=/sbin/init "\
+                               "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(ART)"
+
 #elif defined(CONFIG_FOR_WALLYS_DR531)
 
        #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
@@ -220,7 +236,8 @@
     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
-    defined(CONFIG_FOR_TPLINK_WR841N_V9)
+    defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
+    defined(CONFIG_FOR_TPLINK_WR842N_V3)
        #define CFG_LOAD_ADDR   0x9F020000
 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
       defined(CONFIG_FOR_P2W_R602N)      ||\
@@ -267,7 +284,8 @@
       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
-      defined(CONFIG_FOR_TPLINK_WR841N_V9)
+      defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
+      defined(CONFIG_FOR_TPLINK_WR842N_V3)
        #define CFG_ENV_ADDR            0x9F01EC00
        #define CFG_ENV_SIZE            0x1000
        #define CFG_ENV_SECT_SIZE       0x10000
@@ -315,7 +333,8 @@
       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
-      defined(CONFIG_FOR_TPLINK_WR841N_V9)
+      defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
+      defined(CONFIG_FOR_TPLINK_WR842N_V3)
        #define OFFSET_MAC_DATA_BLOCK           0x010000
        #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
        #define OFFSET_MAC_ADDRESS              0x00FC00
@@ -371,7 +390,8 @@
     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
-    defined(CONFIG_FOR_TPLINK_WR841N_V9)
+    defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
+    defined(CONFIG_FOR_TPLINK_WR842N_V3)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
@@ -408,7 +428,8 @@
     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
-    defined(CONFIG_FOR_TPLINK_WR841N_V9)
+    defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
+    defined(CONFIG_FOR_TPLINK_WR842N_V3)
 
        #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
        #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000