Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
-int au1x00_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short * value)
+int au1x00_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
+ unsigned short value = 0;
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
u32 mii_control;
return -1;
}
}
- *value = *mii_data_reg;
- return 0;
+ value = *mii_data_reg;
+ return value;
}
-int au1x00_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+int au1x00_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
eth_register(dev);
#if defined(CONFIG_CMD_MII)
- miiphy_register(dev->name,
- au1x00_miiphy_read, au1x00_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = au1x00_miiphy_read;
+ mdiodev->write = au1x00_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 1;
#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
- miiphy_register(dev->name,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
}
#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
- miiphy_register(dev->name,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
}
static int mii_discover_phy(struct eth_device *dev);
#endif
-int fec8xx_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
+int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
+int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value);
static struct ether_fcc_info_s
{
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name,
- fec8xx_miiphy_read, fec8xx_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = fec8xx_miiphy_read;
+ mdiodev->write = fec8xx_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
}
return 1;
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
-int fec8xx_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
+int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
+ unsigned short value = 0;
short rdreg; /* register working value */
#ifdef MII_DEBUG
#endif
rdreg = mii_send(mk_mii_read(addr, reg));
- *value = rdreg;
+ value = rdreg;
#ifdef MII_DEBUG
- printf ("0x%04x\n", *value);
+ printf ("0x%04x\n", value);
#endif
- return 0;
+ return value;
}
-int fec8xx_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
#ifdef MII_DEBUG
printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
print_fpga_info();
- miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII_BUSNAME, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
for (k = 0; k < 32; ++k)
configure_gbit_phy(k);
}
if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {
- miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
- bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
if ((mux_ch == 1) && !ch0_rgmii2_present)
continue;
print_fpga_info(k, false);
osd_probe(k);
if (feature_carrier_speed == CARRIER_SPEED_1G) {
- miiphy_register(bb_miiphy_buses[k].name,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, bb_miiphy_buses[k].name,
+ MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
setup_88e1518(bb_miiphy_buses[k].name, 0);
}
}
/* setup Gbit PHYs */
puts("TRANS: ");
puts(str_phys);
- miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII_BUSNAME, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
for (k = 0; k < 32; ++k) {
configure_gbit_phy(CONFIG_SYS_GBIT_MII_BUSNAME, k);
putc(slash[k % 8]);
}
- miiphy_register(CONFIG_SYS_GBIT_MII1_BUSNAME,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII1_BUSNAME, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
for (k = 0; k < 32; ++k) {
configure_gbit_phy(CONFIG_SYS_GBIT_MII1_BUSNAME, k);
}
if (hw_type_cat) {
- miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
- bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
if ((mux_ch == 1) && !ch0_rgmii2_present)
continue;
osd_probe(k + 4);
#endif
if (hw_type_cat) {
- miiphy_register(bb_miiphy_buses[k].name,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, bb_miiphy_buses[k].name,
+ MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
setup_88e1514(bb_miiphy_buses[k].name, 0);
}
}
}
if (hw_type_cat) {
- miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
- bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
if ((mux_ch == 1) && !ch0_sgmii2_present)
continue;
dp501_probe(k, false);
#endif
if (hw_type_cat) {
- miiphy_register(bb_miiphy_buses[k].name,
- bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, bb_miiphy_buses[k].name,
+ MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
setup_88e1514(bb_miiphy_buses[k].name, 0);
}
}
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name,
- emac4xx_miiphy_read, emac4xx_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = emac4xx_miiphy_read;
+ mdiodev->write = emac4xx_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
if (0 == virgin) {
return !timeout;
}
-static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
- u16 *value)
+static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad,
+ int phy_reg)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ u16 value = 0;
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct armdfec_device *darmdfec = to_darmdfec(dev);
struct armdfec_reg *regs = darmdfec->regs;
u32 val;
if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) {
val = readl(®s->phyadr);
- *value = val & 0x1f;
- return 0;
+ value = val & 0x1f;
+ return value;
}
/* check parameters */
return -1;
}
val = readl(®s->smi);
- *value = val & 0xffff;
+ value = val & 0xffff;
- return 0;
+ return value;
}
-static int smi_reg_write(const char *devname,
- u8 phy_addr, u8 phy_reg, u16 value)
+static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad,
+ int phy_reg, u16 value)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct armdfec_device *darmdfec = to_darmdfec(dev);
struct armdfec_reg *regs = darmdfec->regs;
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, smi_reg_read, smi_reg_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = smi_reg_read;
+ mdiodev->write = smi_reg_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 0;
return (at91_emac_t *) netdev->iobase;
}
-int at91emac_mii_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
+int at91emac_mii_read(struct mii_dev *bus, int addr, int devad, int reg)
{
+ unsigned short value = 0;
at91_emac_t *emac;
- emac = get_emacbase_by_name(devname);
- at91emac_read(emac , addr, reg, value);
- return 0;
+ emac = get_emacbase_by_name(bus->name);
+ at91emac_read(emac , addr, reg, &value);
+ return value;
}
-int at91emac_mii_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+int at91emac_mii_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
at91_emac_t *emac;
- emac = get_emacbase_by_name(devname);
+ emac = get_emacbase_by_name(bus->name);
at91emac_write(emac, addr, reg, value);
return 0;
}
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, at91emac_mii_read, at91emac_mii_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = at91emac_mii_read;
+ mdiodev->write = at91emac_mii_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 1;
}
return 0;
}
-static int bfin_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val)
+static int bfin_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
+ ushort val = 0;
if (bfin_miiphy_wait())
return 1;
bfin_write_EMAC_STAADD(SET_PHYAD(addr) | SET_REGAD(reg) | STABUSY);
if (bfin_miiphy_wait())
return 1;
- *val = bfin_read_EMAC_STADAT();
- return 0;
+ val = bfin_read_EMAC_STADAT();
+ return val;
}
-static int bfin_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val)
+static int bfin_miiphy_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 val)
{
if (bfin_miiphy_wait())
return 1;
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, bfin_miiphy_read, bfin_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = bfin_miiphy_read;
+ mdiodev->write = bfin_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 0;
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
+static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
{
- return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
+ unsigned short value = 0;
+ int retval = (davinci_eth_phy_read(addr, reg, &value) ? 0 : 1);
+ if (retval < 0)
+ return retval;
+ return value;
}
-static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
+static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
{
return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
}
debug("Ethernet PHY: %s\n", phy[i].name);
- miiphy_register(phy[i].name, davinci_mii_phy_read,
- davinci_mii_phy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, phy[i].name, MDIO_NAME_LEN);
+ mdiodev->read = davinci_mii_phy_read;
+ mdiodev->write = davinci_mii_phy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
}
#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
return dev;
}
-static int eepro100_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
+static int eepro100_miiphy_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
{
+ unsigned short value = 0;
struct eth_device *dev;
- dev = verify_phyaddr(devname, addr);
+ dev = verify_phyaddr(bus->name, addr);
if (dev == NULL)
return -1;
- if (get_phyreg(dev, addr, reg, value) != 0) {
- printf("%s: mii read timeout!\n", devname);
+ if (get_phyreg(dev, addr, reg, &value) != 0) {
+ printf("%s: mii read timeout!\n", bus->name);
return -1;
}
- return 0;
+ return value;
}
-static int eepro100_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+static int eepro100_miiphy_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
{
struct eth_device *dev;
- dev = verify_phyaddr(devname, addr);
+ dev = verify_phyaddr(bus->name, addr);
if (dev == NULL)
return -1;
if (set_phyreg(dev, addr, reg, value) != 0) {
- printf("%s: mii write timeout!\n", devname);
+ printf("%s: mii write timeout!\n", bus->name);
return -1;
}
#if defined (CONFIG_MII) || defined(CONFIG_CMD_MII)
/* register mii command access routines */
- miiphy_register(dev->name,
- eepro100_miiphy_read, eepro100_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = eepro100_miiphy_read;
+ mdiodev->write = eepro100_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
card_number++;
*
* This function is registered with miiphy_register().
*/
-int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
+int enc_miiphy_read(struct mii_dev *bus, int phy_adr, int devad, int reg)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ u16 value = 0;
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
enc_dev_t *enc;
if (!dev || phy_adr != 0)
enc_release_bus(enc);
return -1;
}
- *value = enc_phy_read(enc, reg);
+ value = enc_phy_read(enc, reg);
enc_release_bus(enc);
- return 0;
+ return value;
}
/*
*
* This function is registered with miiphy_register().
*/
-int enc_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
+int enc_miiphy_write(struct mii_dev *bus, int phy_adr, int devad, int reg,
+ u16 value)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
enc_dev_t *enc;
if (!dev || phy_adr != 0)
sprintf(dev->name, "enc%i.%i", bus, cs);
eth_register(dev);
#if defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, enc_miiphy_read, enc_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = enc_miiphy_read;
+ mdiodev->write = enc_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 0;
}
#define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
/* ep93xx_miiphy ops forward declarations */
-static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
- unsigned char const reg, unsigned short * const value);
-static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
- unsigned char const reg, unsigned short const value);
+static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad,
+ int reg);
+static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value);
#if defined(EP93XX_MAC_DEBUG)
/**
#if defined(CONFIG_MII)
int ep93xx_miiphy_initialize(bd_t * const bd)
{
- miiphy_register("ep93xx_eth0", ep93xx_miiphy_read, ep93xx_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, "ep93xx_eth0", MDIO_NAME_LEN);
+ mdiodev->read = ep93xx_miiphy_read;
+ mdiodev->write = ep93xx_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
return 0;
}
#endif
/**
* Read a 16-bit value from an MII register.
*/
-static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
- unsigned char const reg, unsigned short * const value)
+static int ep93xx_miiphy_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
{
+ unsigned short value = 0;
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
int ret = -1;
uint32_t self_ctl;
debug("+ep93xx_miiphy_read");
/* Parameter checks */
- BUG_ON(dev == NULL);
+ BUG_ON(bus->name == NULL);
BUG_ON(addr > MII_ADDRESS_MAX);
BUG_ON(reg > MII_REGISTER_MAX);
- BUG_ON(value == NULL);
+ BUG_ON(&value == NULL);
/*
* Save the current SelfCTL register value. Set MAC to suppress
while (readl(&mac->miists) & MIISTS_BUSY)
; /* noop */
- *value = (unsigned short)readl(&mac->miidata);
+ value = (unsigned short)readl(&mac->miidata);
/* Restore the saved SelfCTL value and return. */
writel(self_ctl, &mac->selfctl);
/* Fall through */
debug("-ep93xx_miiphy_read");
- return ret;
+ if (ret < 0)
+ return ret;
+ return value;
}
/**
* Write a 16-bit value to an MII register.
*/
-static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
- unsigned char const reg, unsigned short const value)
+static int ep93xx_miiphy_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
int ret = -1;
debug("+ep93xx_miiphy_write");
/* Parameter checks */
- BUG_ON(dev == NULL);
+ BUG_ON(bus->name == NULL);
BUG_ON(addr > MII_ADDRESS_MAX);
BUG_ON(reg > MII_REGISTER_MAX);
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name,
- mcffec_miiphy_read, mcffec_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = mcffec_miiphy_read;
+ mdiodev->write = mcffec_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
if (i > 0)
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-static int ftmac110_mdio_read(
- const char *devname, uint8_t addr, uint8_t reg, uint16_t *value)
+static int ftmac110_mdio_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
{
+ uint16_t value = 0;
int ret = 0;
struct eth_device *dev;
- dev = eth_get_dev_by_name(devname);
+ dev = eth_get_dev_by_name(bus->name);
if (dev == NULL) {
- printf("%s: no such device\n", devname);
+ printf("%s: no such device\n", bus->name);
ret = -1;
} else {
- *value = mdio_read(dev, addr, reg);
+ value = mdio_read(dev, addr, reg);
}
- return ret;
+ if (ret < 0)
+ return ret;
+ return value;
}
-static int ftmac110_mdio_write(
- const char *devname, uint8_t addr, uint8_t reg, uint16_t value)
+static int ftmac110_mdio_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
{
int ret = 0;
struct eth_device *dev;
- dev = eth_get_dev_by_name(devname);
+ dev = eth_get_dev_by_name(bus->name);
if (dev == NULL) {
- printf("%s: no such device\n", devname);
+ printf("%s: no such device\n", bus->name);
ret = -1;
} else {
mdio_write(dev, addr, reg, value);
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, ftmac110_mdio_read, ftmac110_mdio_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = ftmac110_mdio_read;
+ mdiodev->write = ftmac110_mdio_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
card_nr++;
*
* Returns 16bit phy register value, or 0xffff on error
*/
-static int mii_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 *data)
+static int mii_reg_read(struct mii_dev *bus, int phy_adr, int devad,
+ int reg_ofs)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ u16 data = 0;
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct lpc32xx_eth_device *dlpc32xx_eth = to_lpc32xx_eth(dev);
struct lpc32xx_eth_registers *regs = dlpc32xx_eth->regs;
u32 mind_reg;
return -EFAULT;
}
- *data = (u16) readl(®s->mrdd);
+ data = (u16) readl(®s->mrdd);
debug("%s:(adr %d, off %d) => %04x\n", __func__, phy_adr,
- reg_ofs, *data);
+ reg_ofs, data);
- return 0;
+ return data;
}
/*
* Returns 0 if write succeed, -EINVAL on bad parameters
* -ETIME on timeout
*/
-static int mii_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
+static int mii_reg_write(struct mii_dev *bus, int phy_adr, int devad,
+ int reg_ofs, u16 data)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct lpc32xx_eth_device *dlpc32xx_eth = to_lpc32xx_eth(dev);
struct lpc32xx_eth_registers *regs = dlpc32xx_eth->regs;
u32 mind_reg;
#if defined(CONFIG_PHYLIB)
lpc32xx_eth_phylib_init(dev, CONFIG_PHY_ADDR);
#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, mii_reg_read, mii_reg_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = mii_reg_read;
+ mdiodev->write = mii_reg_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 0;
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
-int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
+int macb_miiphy_read(struct mii_dev *bus, int phy_adr, int devad, int reg)
{
+ u16 value = 0;
#ifdef CONFIG_DM_ETH
- struct udevice *dev = eth_get_dev_by_name(devname);
+ struct udevice *dev = eth_get_dev_by_name(bus->name);
struct macb_device *macb = dev_get_priv(dev);
#else
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct macb_device *macb = to_macb(dev);
#endif
if (macb->phy_addr != phy_adr)
return -1;
- arch_get_mdio_control(devname);
- *value = macb_mdio_read(macb, reg);
+ arch_get_mdio_control(bus->name);
+ value = macb_mdio_read(macb, reg);
- return 0;
+ return value;
}
-int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
+int macb_miiphy_write(struct mii_dev *bus, int phy_adr, int devad, int reg,
+ u16 value)
{
#ifdef CONFIG_DM_ETH
- struct udevice *dev = eth_get_dev_by_name(devname);
+ struct udevice *dev = eth_get_dev_by_name(bus->name);
struct macb_device *macb = dev_get_priv(dev);
#else
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct macb_device *macb = to_macb(dev);
#endif
if (macb->phy_addr != phy_adr)
return -1;
- arch_get_mdio_control(devname);
+ arch_get_mdio_control(bus->name);
macb_mdio_write(macb, reg, value);
return 0;
eth_register(netdev);
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
- miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, netdev->name, MDIO_NAME_LEN);
+ mdiodev->read = macb_miiphy_read;
+ mdiodev->write = macb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
macb->bus = miiphy_get_dev_by_name(netdev->name);
#endif
return 0;
_macb_eth_initialize(macb);
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
- miiphy_register(dev->name, macb_miiphy_read, macb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = macb_miiphy_read;
+ mdiodev->write = macb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
macb->bus = miiphy_get_dev_by_name(dev->name);
#endif
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name,
- mcffec_miiphy_read, mcffec_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = mcffec_miiphy_read;
+ mdiodev->write = mcffec_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
if (i > 0)
fec_info[i - 1].next = &fec_info[i];
#error "CONFIG_MII has to be defined!"
#endif
-int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
-int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data);
+int fec512x_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr);
+int fec512x_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr, u16 data);
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
static uchar rx_buff[FEC_BUFFER_SIZE];
eth_register (dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register (dev->name,
- fec512x_miiphy_read, fec512x_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = fec512x_miiphy_read;
+ mdiodev->write = fec512x_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
/* Clean up space FEC's MIB and FIFO RAM ...*/
/* MII-interface related functions */
/********************************************************************/
-int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
+int fec512x_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr)
{
+ u16 retVal = 0;
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
u32 reg; /* convenient holder for the PHY register */
/*
* it's now safe to read the PHY's register
*/
- *retVal = (u16) in_be32(ð->mii_data);
+ retVal = (u16) in_be32(ð->mii_data);
- return 0;
+ return retVal;
}
/********************************************************************/
-int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
+int fec512x_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr, u16 data)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
-int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal);
-int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
+int fec5xxx_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr);
+int fec5xxx_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr, u16 data);
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis);
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register (dev->name,
- fec5xxx_miiphy_read, fec5xxx_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = fec5xxx_miiphy_read;
+ mdiodev->write = fec5xxx_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
/*
/* MII-interface related functions */
/********************************************************************/
-int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
+int fec5xxx_miiphy_read(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr)
{
+ uint16 retVal = 0;
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
uint32 phy; /* convenient holder for the PHY */
/*
* it's now safe to read the PHY's register
*/
- *retVal = (uint16) eth->mii_data;
+ retVal = (uint16) eth->mii_data;
- return 0;
+ return retVal;
}
/********************************************************************/
-int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
+int fec5xxx_miiphy_write(struct mii_dev *bus, int phyAddr, int devad,
+ int regAddr, u16 data)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
*
* Returns 16bit phy register value, or 0xffff on error
*/
-static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
+static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
+ int reg_ofs)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ u16 data = 0;
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
struct mvgbe_registers *regs = dmvgbe->regs;
u32 smi_reg;
if (phy_adr == MV_PHY_ADR_REQUEST &&
reg_ofs == MV_PHY_ADR_REQUEST) {
/* */
- *data = (u16) (MVGBE_REG_RD(regs->phyadr) & PHYADR_MASK);
- return 0;
+ data = (u16) (MVGBE_REG_RD(regs->phyadr) & PHYADR_MASK);
+ return data;
}
/* check parameters */
if (phy_adr > PHYADR_MASK) {
for (timeout = 0; timeout < MVGBE_PHY_SMI_TIMEOUT; timeout++)
;
- *data = (u16) (MVGBE_REG_RD(MVGBE_SMI_REG) & MVGBE_PHY_SMI_DATA_MASK);
+ data = (u16) (MVGBE_REG_RD(MVGBE_SMI_REG) & MVGBE_PHY_SMI_DATA_MASK);
debug("%s:(adr %d, off %d) value= %04x\n", __func__, phy_adr, reg_ofs,
- *data);
+ data);
- return 0;
+ return data;
}
/*
* Returns 0 if write succeed, -EINVAL on bad parameters
* -ETIME on timeout
*/
-static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
+static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
+ int reg_ofs, u16 data)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
struct mvgbe_registers *regs = dmvgbe->regs;
u32 smi_reg;
#if defined(CONFIG_PHYLIB)
mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum);
#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, smi_reg_read, smi_reg_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = smi_reg_read;
+ mdiodev->write = smi_reg_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
/* Set phy address of the port */
miiphy_write(dev->name, MV_PHY_ADR_REQUEST,
MV_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum);
eth_register(dev);
bb_miiphy_buses[0].priv = eth;
- miiphy_register(dev->name, bb_miiphy_read, bb_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = bb_miiphy_read;
+ mdiodev->write = bb_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
if (!eth_getenv_enetaddr("ethaddr", dev->enetaddr))
puts("Please set MAC address\n");
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* wrapper for smc911x_eth_phy_read */
-static int smc911x_miiphy_read(const char *devname, u8 phy, u8 reg, u16 *val)
+static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
+ int reg)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
- if (dev)
- return smc911x_eth_phy_read(dev, phy, reg, val);
+ u16 val = 0;
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
+ if (dev) {
+ int retval = smc911x_eth_phy_read(dev, phy, reg, &val);
+ if (retval < 0)
+ return retval;
+ return val;
+ }
return -1;
}
/* wrapper for smc911x_eth_phy_write */
-static int smc911x_miiphy_write(const char *devname, u8 phy, u8 reg, u16 val)
+static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
+ int reg, u16 val)
{
- struct eth_device *dev = eth_get_dev_by_name(devname);
+ struct eth_device *dev = eth_get_dev_by_name(bus->name);
if (dev)
return smc911x_eth_phy_write(dev, phy, reg, val);
return -1;
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, smc911x_miiphy_read, smc911x_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = smc911x_miiphy_read;
+ mdiodev->write = smc911x_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 1;
* Returns:
* 0 on success
*/
-static int uec_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
+static int uec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
+ unsigned short value = 0;
int devindex = 0;
- if (devname == NULL || value == NULL) {
+ if (bus->name == NULL || &value == NULL) {
debug("%s: NULL pointer given\n", __FUNCTION__);
} else {
- devindex = uec_miiphy_find_dev_by_name(devname);
+ devindex = uec_miiphy_find_dev_by_name(bus->name);
if (devindex >= 0) {
- *value = uec_read_phy_reg(devlist[devindex], addr, reg);
+ value = uec_read_phy_reg(devlist[devindex], addr, reg);
}
}
- return 0;
+ return value;
}
/*
* Returns:
* 0 on success
*/
-static int uec_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+static int uec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
int devindex = 0;
- if (devname == NULL) {
+ if (bus->name == NULL) {
debug("%s: NULL pointer given\n", __FUNCTION__);
} else {
- devindex = uec_miiphy_find_dev_by_name(devname);
+ devindex = uec_miiphy_find_dev_by_name(bus->name);
if (devindex >= 0) {
uec_write_phy_reg(devlist[devindex], addr, reg, value);
}
}
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name, uec_miiphy_read, uec_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = uec_miiphy_read;
+ mdiodev->write = uec_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
return 1;