iocon: reset FPGAs in last_stage_init()

- Reset FPGAs in last_stage_init()

Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 3a51d864cdb1c52d1fa16cc1f3556111ceea5c10..7484624d13e14d5eefa42e401d15d9390fb0558f 100644 (file)
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -381,7 +381,7 @@ int last_stage_init(void)
                ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
        }
 
-       /* wait for FPGA done */
+       /* wait for FPGA done; then reset FPGA */
        for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
                unsigned int ctr = 0;
 
@@ -396,6 +396,12 @@ int last_stage_init(void)
                                break;
                        }
                }
+
+               pca953x_set_dir(mclink_controllers[k], MCFPGA_RESET_N, 0);
+               pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, 0);
+               udelay(10);
+               pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N,
+                               MCFPGA_RESET_N);
        }
 
        if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {