arm: ls102xa: enable snooping for CAAM transactions
authorhoria.geanta@freescale.com <horia.geanta@freescale.com>
Thu, 15 Oct 2015 11:21:31 +0000 (14:21 +0300)
committerYork Sun <yorksun@freescale.com>
Thu, 29 Oct 2015 17:33:58 +0000 (10:33 -0700)
Enable snooping for CAAM read & write transactions by
programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP]
SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv7/ls102xa/cpu.c
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h

index e2eb5f383a4a34b6de8bc665f98f676a107ca0da..df2e1b76f168eb4c67e28d591730787277a66ca9 100644 (file)
@@ -301,6 +301,7 @@ int arch_cpu_init(void)
        void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
        void *rcpm2_base =
                (void *)(CONFIG_SYS_DCSRBAR + DCSR_RCPM2_BLOCK_OFFSET);
+       struct ccsr_scfg *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
        u32 state;
 
        /*
@@ -328,6 +329,8 @@ int arch_cpu_init(void)
         */
        fsl_epu_clean(epu_base);
 
+       setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
        return 0;
 }
 
index 60aa0d3b6f43bdf5db72c975ad5268c83de033ff..fbd06bafce31a78d4163d0ab78a56055a2088a69 100644 (file)
@@ -144,6 +144,7 @@ struct ccsr_gur {
 };
 
 #define SCFG_ETSECDMAMCR_LE_BD_FR      0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR       0xc0000000
 #define SCFG_ETSECCMCR_GE2_CLK125      0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125      0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125      0x08000000