Add support for TP-Link TL-WR841N v9 (QCA953x based)
authorPiotr Dymacz <pepe2k@gmail.com>
Wed, 2 Mar 2016 22:36:29 +0000 (23:36 +0100)
committerPiotr Dymacz <pepe2k@gmail.com>
Wed, 2 Mar 2016 22:36:29 +0000 (23:36 +0100)
Makefile
u-boot/Makefile
u-boot/include/configs/ap143.h

index 5f7f6ead281343a1cfb8935f33696ca34a2f086f..4905f2377fca27b0ec99984de5206f0bfd44287d 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -151,6 +151,17 @@ tplink_wr841n_v8:
        @cd $(BUILD_TOPDIR)/u-boot/ && $(MAKECMD) ENDIANNESS=-EB V=1 all
        @make --no-print-directory show_size
 
+tplink_wr841n_v9:      export UBOOT_FILE_NAME=uboot_for_tp-link_tl-wr841n_v9
+tplink_wr841n_v9:      export CONFIG_MAX_UBOOT_SIZE_KB=123
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
+tplink_wr841n_v9:      export COMPRESSED_UBOOT=1
+endif
+tplink_wr841n_v9:      export ETH_CONFIG=_s27
+tplink_wr841n_v9:
+       @cd $(BUILD_TOPDIR)/u-boot/ && $(MAKECMD) wr841n_v9_config
+       @cd $(BUILD_TOPDIR)/u-boot/ && $(MAKECMD) ENDIANNESS=-EB V=1 all
+       @make --no-print-directory show_size
+
 tplink_wa830re_v2_wa801nd_v2:  export UBOOT_FILE_NAME=uboot_for_tp-link_tl-wa830re_v2_tl-wa801nd_v2
 tplink_wa830re_v2_wa801nd_v2:  export CONFIG_MAX_UBOOT_SIZE_KB=123
 ifndef CONFIG_SKIP_LOWLEVEL_INIT
index 53f7f4586b9c339c5cdcf476a25fc67628109b02..13c3d75e5651eb896db5531aa461367e514d47a7 100644 (file)
@@ -613,6 +613,20 @@ wr820n_CN_config : unconfig ap143_common_config
 
        @./mkconfig -a ap143 mips mips ap143 ar7240 ar7240
 
+wr841n_v9_config : unconfig ap143_common_config
+       @/bin/echo -e '\e[32m> Configuring for TP-Link TL-WR841N/D v9 at:' `date` '\e[0m'
+       @echo "#define SOC_TYPE               QCA_QCA953X_SOC" >> include/config.h
+       @echo "#define CONFIG_FOR_TPLINK_WR841N_V9          1" >> include/config.h
+       @echo "#define CFG_ATHRS27_PHY                      1" >> include/config.h
+       @echo "#define CFG_ATH_GMAC_NMACS                   2" >> include/config.h
+       @echo "#define DEFAULT_FLASH_SIZE_IN_MB             4" >> include/config.h
+       @echo "#define GPIO_RST_BUTTON_BIT                 12" >> include/config.h
+       @echo "#define GPIO_RST_BUTTON_IS_ACTIVE_LOW        1" >> include/config.h
+       @echo "#define CONFIG_TPLINK_IMAGE_HEADER           1" >> include/config.h
+       @echo "#define BOARD_CUSTOM_STRING                  \"TP-Link TL-WR841N/D v9\"" >> include/config.h
+
+       @./mkconfig -a ap143 mips mips ap143 ar7240 ar7240
+
 #########################################################################
 #########################################################################
 #########################################################################
index c3db79dbe11830b610db4d08cdaf11b8d470576b..0d56416230d15320cefbc16a08072a3583564118 100644 (file)
 
        /* Initial states */
        #define CONFIG_QCA_GPIO_MASK_OUTPUTS_INIT_HI    CONFIG_QCA_GPIO_MASK_LEDS_ACTIVE_LO
+
+#elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
+       /* LEDs */
+       #define CONFIG_QCA_GPIO_MASK_LEDS_ACTIVE_LO             (GPIO3 | GPIO4  | GPIO11 | GPIO13 |\
+                                                                                                       GPIO14 | GPIO15 | GPIO16)
+
+       /* Outputs, inputs */
+       #define CONFIG_QCA_GPIO_MASK_OUTPUTS                    CONFIG_QCA_GPIO_MASK_LEDS_ACTIVE_LO
+       #define CONFIG_QCA_GPIO_MASK_INPUTS                             (GPIO12 | GPIO17)
+
+       /* Initial states */
+       #define CONFIG_QCA_GPIO_MASK_OUTPUTS_INIT_HI    CONFIG_QCA_GPIO_MASK_LEDS_ACTIVE_LO
+
 #endif
 
 /*
 #undef CONFIG_BOOTARGS
 #if defined(CONFIG_FOR_TPLINK_WR820N_CN)
        #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(ART)"
+#elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
+       #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 #endif
 
 /*
 #undef CONFIG_LOADADDR
 #define CONFIG_LOADADDR                        0x80800000
 
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CFG_LOAD_ADDR                    0x9F020000
        #define UPDATE_SCRIPT_FW_ADDR   "0x9F020000"
        #define CONFIG_BOOTCOMMAND              "bootm 0x9F020000"
 #endif
 #define        CFG_HZ  bd->bi_cfg_hz
 
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CONFIG_QCA_PLL          QCA_PLL_PRESET_550_400_200
        #define CFG_HZ_FALLBACK         (550000000LU/2)
 #endif
 #define CFG_ENV_IS_IN_FLASH    1
 #undef  CFG_ENV_IS_NOWHERE
 
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CFG_ENV_ADDR            0x9F01EC00
        #define CFG_ENV_SIZE            0x1000
        #define CFG_ENV_SECT_SIZE       0x10000
 /*
  * Available commands
  */
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CONFIG_COMMANDS (CFG_CMD_MEMORY | \
                                                         CFG_CMD_DHCP   | \
                                                         CFG_CMD_PING   | \
 #define WEBFAILSAFE_UPLOAD_UBOOT_ADDRESS                       CFG_FLASH_BASE
 
 // Firmware partition offset
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS               WEBFAILSAFE_UPLOAD_UBOOT_ADDRESS + 0x20000
 #endif
 
 #define WEBFAILSAFE_UPLOAD_UBOOT_SIZE_IN_BYTES         (CONFIG_MAX_UBOOT_SIZE_KB * 1024)
 
 // TODO: should be == CONFIG_MAX_UBOOT_SIZE_KB
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define UPDATE_SCRIPT_UBOOT_SIZE_IN_BYTES                       "0x1EC00"
        #define UPDATE_SCRIPT_UBOOT_BACKUP_SIZE_IN_BYTES        "0x20000"
 #endif
 
 // max. firmware size <= (FLASH_SIZE -  WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES)
 // TP-Link: 64k(U-Boot),64k(MAC/model/WPS pin block),64k(ART)
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 #endif
 
 #define CONFIG_AG7240_SPEPHY
 #define CONFIG_NET_MULTI
 #define CONFIG_PCI 1
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define WLANCAL                                 0x9fff1000
        #define BOARDCAL                                0x9fff0000
 #endif
 #undef DEBUG
 
 /* MAC address, model and PIN number offsets in FLASH */
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define OFFSET_MAC_DATA_BLOCK                   0x010000
        #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
        #define OFFSET_MAC_ADDRESS                              0x00FC00
 /*
  * PLL and clocks configurations from FLASH
  */
-#if defined(CONFIG_FOR_TPLINK_WR820N_CN)
+#if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
+       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        /*
         * All TP-Link routers have a lot of unused space
         * in FLASH, in second 64 KiB block.