LCD: add data structure for EXYNOS display driver

Add vidinfo data structure for EXYNOS display driver

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>

diff --git a/include/lcd.h b/include/lcd.h
index d95feeb791d713355e997f95fe2c908a1fcfa8a4..3d9ef167107e6f6e1bbfdcd874d6854025b0dae8 100644 (file)
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -183,6 +183,70 @@ typedef struct vidinfo {
        u_long  mmio;           /* Memory mapped registers */
 } vidinfo_t;
 
+#elif defined(CONFIG_EXYNOS_FB)
+
+enum {
+       FIMD_RGB_INTERFACE = 1,
+       FIMD_CPU_INTERFACE = 2,
+};
+
+typedef struct vidinfo {
+       ushort vl_col;          /* Number of columns (i.e. 640) */
+       ushort vl_row;          /* Number of rows (i.e. 480) */
+       ushort vl_width;        /* Width of display area in millimeters */
+       ushort vl_height;       /* Height of display area in millimeters */
+
+       /* LCD configuration register */
+       u_char vl_freq;         /* Frequency */
+       u_char vl_clkp;         /* Clock polarity */
+       u_char vl_oep;          /* Output Enable polarity */
+       u_char vl_hsp;          /* Horizontal Sync polarity */
+       u_char vl_vsp;          /* Vertical Sync polarity */
+       u_char vl_dp;           /* Data polarity */
+       u_char vl_bpix;         /* Bits per pixel */
+
+       /* Horizontal control register. Timing from data sheet */
+       u_char vl_hspw;         /* Horz sync pulse width */
+       u_char vl_hfpd;         /* Wait before of line */
+       u_char vl_hbpd;         /* Wait end of line */
+
+       /* Vertical control register. */
+       u_char  vl_vspw;        /* Vertical sync pulse width */
+       u_char  vl_vfpd;        /* Wait before of frame */
+       u_char  vl_vbpd;        /* Wait end of frame */
+       u_char  vl_cmd_allow_len; /* Wait end of frame */
+
+       void (*cfg_gpio)(void);
+       void (*backlight_on)(unsigned int onoff);
+       void (*reset_lcd)(void);
+       void (*lcd_power_on)(void);
+       void (*cfg_ldo)(void);
+       void (*enable_ldo)(unsigned int onoff);
+       void (*mipi_power)(void);
+       void (*backlight_reset)(void);
+
+       unsigned int win_id;
+       unsigned int init_delay;
+       unsigned int power_on_delay;
+       unsigned int reset_delay;
+       unsigned int interface_mode;
+       unsigned int mipi_enabled;
+       unsigned int cs_setup;
+       unsigned int wr_setup;
+       unsigned int wr_act;
+       unsigned int wr_hold;
+
+       /* parent clock name(MPLL, EPLL or VPLL) */
+       unsigned int pclk_name;
+       /* ratio value for source clock from parent clock. */
+       unsigned int sclk_div;
+
+       unsigned int dual_lcd_enabled;
+
+} vidinfo_t;
+
+void init_panel_info(vidinfo_t *vid);
+
 #else
 
 typedef struct vidinfo {