board: gdsys: Configure bridge on DP501 to support DDC only
authorDirk Eibach <dirk.eibach@gdsys.cc>
Thu, 3 Jul 2014 07:28:21 +0000 (09:28 +0200)
committerTom Rini <trini@ti.com>
Mon, 7 Jul 2014 23:47:19 +0000 (19:47 -0400)
The I2C bridge on DP501 supports EDID, MCCS and HDCP by default.
Allow EDID only to avoid I2C address conflicts.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
board/gdsys/common/dp501.c
include/configs/controlcenterd.h

index e00e58997bdfc2704b999d3381f436b0ef5b65d1..7958baeaaf55775982d119710226caab3551d686 100644 (file)
@@ -54,6 +54,7 @@ static void dp501_link_training(u8 addr)
 void dp501_powerup(u8 addr)
 {
        dp501_clrbits(addr, 0x0a, 0x30); /* power on encoder */
+       dp501_setbits(addr, 0x0a, 0x0e); /* block HDCP and MCCS on I2C bride*/
        i2c_reg_write(addr, 0x27, 0x30); /* Hardware auto detect DVO timing */
        dp501_setbits(addr, 0x72, 0x80); /* DPCD read enable */
        dp501_setbits(addr, 0x30, 0x20); /* RS polynomial select */
index 868813f29b1f3e5d96437069dabd16bbdd676dd9..ec3145f430c549ee0438a409c71874520ea68ae4 100644 (file)
 #define CONFIG_SYS_FSL_I2C2_SPEED      400000
 #define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
-/* Probing DP501 I2C-Bridge will hang */
-#define CONFIG_SYS_I2C_NOPROBES                { {0, 0x30}, {0, 0x37}, {0, 0x3a}, \
-                                         {0, 0x3b}, {0, 0x50} }
+
+#ifndef CONFIG_TRAILBLAZER
+#define CONFIG_CMD_I2C
+#endif
 
 #define CONFIG_PCA9698                 /* NXP PCA9698 */