rockchip: clk: rk3399: handle clk_enable requests for USB3

The "simple" OF glue layer for the Designware USB3 core enables
all refernced clocks.  These need to be need to be implemented
otherwise the driver fails to probe.  A dummy implementation
that simply returns success is sufficient since the RK3399 comes
out of reset with all clock gates open.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index aa6a8ad1c9c88c8998b7009ce3dddafa695dc61a..6c73fc93facc1a46c88fe364c93aa8f0a36b6297 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1078,6 +1078,18 @@ static int rk3399_clk_enable(struct clk *clk)
        case PCLK_GMAC:
                /* Required to successfully probe the Designware GMAC driver */
                return 0;
+
+       case SCLK_USB3OTG0_REF:
+       case SCLK_USB3OTG1_REF:
+       case SCLK_USB3OTG0_SUSPEND:
+       case SCLK_USB3OTG1_SUSPEND:
+       case ACLK_USB3OTG0:
+       case ACLK_USB3OTG1:
+       case ACLK_USB3_RKSOC_AXI_PERF:
+       case ACLK_USB3:
+       case ACLK_USB3_GRF:
+               /* Required to successfully probe the Designware USB3 driver */
+               return 0;
        }
 
        debug("%s: unsupported clk %ld\n", __func__, clk->id);