85xx: Adds GPIO registers to MPC85xx Memory Map.
authorPoonam Aggrwal <poonam.aggrwal@freescale.com>
Thu, 2 Jul 2009 10:44:40 +0000 (16:14 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 2 Jul 2009 13:33:20 +0000 (08:33 -0500)
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
include/asm-ppc/immap_85xx.h

index db2bdf0afa6a998e1c48f7a512a4716128a215d3..0efef0521437ce4ab0e67d7074929fdce4bcea3a 100644 (file)
@@ -341,6 +341,15 @@ typedef struct ccsr_pcix {
        char    res11[476];
 } ccsr_pcix_t;
 
+typedef struct ccsr_gpio {
+       uint    gpdir;
+       uint    gpodr;
+       uint    gpdat;
+       uint    gpier;
+       uint    gpimr;
+       uint    gpicr;
+} ccsr_gpio_t;
+
 #define PCIX_COMMAND   0x62
 #define POWAR_EN       0x80000000
 #define POWAR_IO_READ  0x00080000
@@ -1648,6 +1657,8 @@ typedef struct ccsr_gur {
 #define CONFIG_SYS_MPC85xx_PCIX_ADDR   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX_OFFSET)
 #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET        (0x9000)
 #define CONFIG_SYS_MPC85xx_PCIX2_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX2_OFFSET)
+#define CONFIG_SYS_MPC85xx_GPIO_OFFSET (0xF000)
+#define CONFIG_SYS_MPC85xx_GPIO_ADDR   (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GPIO_OFFSET)
 #define CONFIG_SYS_MPC85xx_SATA1_OFFSET        (0x18000)
 #define CONFIG_SYS_MPC85xx_SATA1_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SATA1_OFFSET)
 #define CONFIG_SYS_MPC85xx_SATA2_OFFSET        (0x19000)