powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger

Debugging of e500 and e500v1 processer requires MSR[DE] bit to be set always.
Where MSR = Machine State register

Make sure of MSR[DE] bit is set uniformaly across the different execution
address space i.e. AS0 and AS1.

Signed-off-by: Radu Lazarescu <radu.lazarescu@freescale.com>
Signed-off-by: Catalin Udma <catalin.udma@freescale.com>
Signed-off-by: Marius Grigoras <marius.grigoras@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2cd5db7c59b852a05a4f69f388406bf5ddadc4b2..e7b2d377938debebc9fa6a27196e8dc81eaa5a1e 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -537,7 +537,7 @@ void arch_preboot_os(void)
         * disabled by the time we get called.
         */
        msr = mfmsr();
-       msr &= ~(MSR_ME|MSR_CE|MSR_DE);
+       msr &= ~(MSR_ME|MSR_CE);
        mtmsr(msr);
 
        setup_ivors();

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 8e99ef6c68828f3d8ee46b3c5d22eec9ac7af19d..653e222f82158548b75df1e8fbe695f6ef848c2f 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -82,6 +82,9 @@
        .globl _start_e500
 
 _start_e500:
+/* Enable debug exception */
+       li      r1,MSR_DE
+       mtmsr   r1
 
 #if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC)
        /* ISBC uses L2 as stack.
@@ -733,8 +736,8 @@ create_init_ram_area:
        msync
        tlbwe
 
-       lis     r6,MSR_IS|MSR_DS@h
-       ori     r6,r6,MSR_IS|MSR_DS@l
+       lis     r6,MSR_IS|MSR_DS|MSR_DE@h
+       ori     r6,r6,MSR_IS|MSR_DS|MSR_DE@l
        lis     r7,switch_as@h
        ori     r7,r7,switch_as@l