usb: s3c-otg: Rename remaining macros

The driver is actually for the Designware DWC2 controller.
This patch renames the remaining S3C_* macros to match the
DWC2 naming.

Signed-off-by: Marek Vasut <marex@denx.de>

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 40a7125ca00322083dae37d6d6b120215fe64c6d..93514a993a8edae3e836a5e991663c7ddb264e55 100644 (file)
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -190,7 +190,7 @@ static void udc_reinit(struct dwc2_udc *dev)
        dev->ep0state = WAIT_FOR_SETUP;
 
        /* basic endpoint records init */
-       for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
+       for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
                struct dwc2_ep *ep = &dev->ep[i];
 
                if (i != 0)
@@ -380,7 +380,7 @@ static void stop_activity(struct dwc2_udc *dev,
        dev->gadget.speed = USB_SPEED_UNKNOWN;
 
        /* prevent new request submissions, kill any outstanding requests  */
-       for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
+       for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
                struct dwc2_ep *ep = &dev->ep[i];
                ep->stopped = 1;
                nuke(ep, -ESHUTDOWN);
@@ -448,7 +448,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
        writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[EP0_CON].doepctl);
        writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[EP0_CON].diepctl);
 
-       for (i = 1; i < S3C_MAX_ENDPOINTS; i++) {
+       for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
                writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[i].doepctl);
                writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[i].diepctl);
        }
@@ -470,7 +470,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
        writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
               &reg->gnptxfsiz);
 
-       for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++)
+       for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
                writel((PTX_FIFO_SIZE >> 2) << 16 |
                       ((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
                         PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
@@ -479,13 +479,13 @@ static void reconfig_usbd(struct dwc2_udc *dev)
        /* Flush the RX FIFO */
        writel(RX_FIFO_FLUSH, &reg->grstctl);
        while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
-               debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
+               debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
 
        /* Flush all the Tx FIFO's */
        writel(TX_FIFO_FLUSH_ALL, &reg->grstctl);
        writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, &reg->grstctl);
        while (readl(&reg->grstctl) & TX_FIFO_FLUSH)
-               debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
+               debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
 
        /* 13. Clear NAK bit of EP0, EP1, EP2*/
        /* For Slave mode*/
@@ -515,7 +515,7 @@ static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
        }
 
        dev->ep[0].ep.maxpacket = ep0_fifo_size;
-       for (i = 1; i < S3C_MAX_ENDPOINTS; i++)
+       for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
                dev->ep[i].ep.maxpacket = ep_fifo_size;
 
        /* EP0 - Control IN (64 bytes)*/

diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index 1dcb277ad3e72d475e896af61c650ff641b704fd..5126a9d8eb04d7929e7a727309bf0484933647a5 100644 (file)
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -24,8 +24,8 @@
 #define EP_FIFO_SIZE           512
 #define EP_FIFO_SIZE2          1024
 /* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
-#define S3C_MAX_ENDPOINTS      4
-#define S3C_MAX_HW_ENDPOINTS   16
+#define DWC2_MAX_ENDPOINTS     4
+#define DWC2_MAX_HW_ENDPOINTS  16
 
 #define WAIT_FOR_SETUP          0
 #define DATA_STATE_XMIT         1
@@ -81,7 +81,7 @@ struct dwc2_udc {
        struct s3c_plat_otg_data *pdata;
 
        int ep0state;
-       struct dwc2_ep ep[S3C_MAX_ENDPOINTS];
+       struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
 
        unsigned char usb_address;
 

diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 57affcb2a33897b2f19e4f9ae437bb4c4691fab0..78ec90ea9f4387632cfa9796be0cd14d61c17871 100644 (file)
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -83,11 +83,11 @@ struct dwc2_usbotg_reg {
 /*===================================================================== */
 /*definitions related to CSR setting */
 
-/* S3C_UDC_OTG_GOTGCTL */
+/* DWC2_UDC_OTG_GOTGCTL */
 #define B_SESSION_VALID                (0x1<<19)
 #define A_SESSION_VALID                (0x1<<18)
 
-/* S3C_UDC_OTG_GAHBCFG */
+/* DWC2_UDC_OTG_GAHBCFG */
 #define PTXFE_HALF                     (0<<8)
 #define PTXFE_ZERO                     (1<<8)
 #define NPTXFE_HALF                    (0<<7)
@@ -102,11 +102,11 @@ struct dwc2_usbotg_reg {
 #define GBL_INT_UNMASK                 (1<<0)
 #define GBL_INT_MASK                   (0<<0)
 
-/* S3C_UDC_OTG_GRSTCTL */
+/* DWC2_UDC_OTG_GRSTCTL */
 #define AHB_MASTER_IDLE                (1u<<31)
 #define CORE_SOFT_RESET                (0x1<<0)
 
-/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */
+/* DWC2_UDC_OTG_GINTSTS/DWC2_UDC_OTG_GINTMSK core interrupt register */
 #define INT_RESUME                     (1u<<31)
 #define INT_DISCONN                    (0x1<<29)
 #define INT_CONN_ID_STS_CNG            (0x1<<28)
@@ -146,22 +146,22 @@ struct dwc2_usbotg_reg {
 #define USB_LOW_6MHZ                   (0x2<<1)
 #define USB_FULL_48MHZ                 (0x3<<1)
 
-/* S3C_UDC_OTG_GRXSTSP STATUS */
+/* DWC2_UDC_OTG_GRXSTSP STATUS */
 #define OUT_PKT_RECEIVED               (0x2<<17)
 #define OUT_TRANSFER_COMPLELTED        (0x3<<17)
 #define SETUP_TRANSACTION_COMPLETED    (0x4<<17)
 #define SETUP_PKT_RECEIVED             (0x6<<17)
 #define GLOBAL_OUT_NAK                 (0x1<<17)
 
-/* S3C_UDC_OTG_DCTL device control register */
+/* DWC2_UDC_OTG_DCTL device control register */
 #define NORMAL_OPERATION               (0x1<<0)
 #define SOFT_DISCONNECT                (0x1<<1)
 
-/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */
+/* DWC2_UDC_OTG_DAINT device all endpoint interrupt register */
 #define DAINT_OUT_BIT                  (16)
 #define DAINT_MASK                     (0xFFFF)
 
-/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device
+/* DWC2_UDC_OTG_DIEPCTL0/DOEPCTL0 device
    control IN/OUT endpoint 0 control register */
 #define DEPCTL_EPENA                   (0x1<<31)
 #define DEPCTL_EPDIS                   (0x1<<30)
@@ -191,9 +191,9 @@ struct dwc2_usbotg_reg {
 #define DIEPCTL0_NEXT_EP_BIT           (11)
 
 
-/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint
+/* DWC2_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint
    common interrupt mask register */
-/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */
+/* DWC2_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */
 #define BACK2BACK_SETUP_RECEIVED       (0x1<<6)
 #define INTKNEPMIS                     (0x1<<5)
 #define INTKN_TXFEMP                   (0x1<<4)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index fe02c0f8c2cbfbee5b21818011c5ae464973e1c3..d56d401c8e576a06ae6f68da179ee148f05df8fc 100644 (file)
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -652,14 +652,14 @@ static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req,
                } else if (ep_is_in(ep)) {
                        gintsts = readl(&reg->gintsts);
                        debug_cond(DEBUG_IN_EP,
-                                  "%s: ep_is_in, S3C_UDC_OTG_GINTSTS=0x%x\n",
+                                  "%s: ep_is_in, DWC2_UDC_OTG_GINTSTS=0x%x\n",
                                   __func__, gintsts);
 
                        setdma_tx(ep, req);
                } else {
                        gintsts = readl(&reg->gintsts);
                        debug_cond(DEBUG_OUT_EP != 0,
-                                  "%s:ep_is_out, S3C_UDC_OTG_GINTSTS=0x%x\n",
+                                  "%s:ep_is_out, DWC2_UDC_OTG_GINTSTS=0x%x\n",
                                   __func__, gintsts);
 
                        setdma_rx(ep, req);