net: dwc_eth_qos: implement phy reg and max-speed for stm32
authorPatrick Delaunay <patrick.delaunay@st.com>
Wed, 18 Mar 2020 09:50:16 +0000 (10:50 +0100)
committerPatrice Chotard <patrice.chotard@st.com>
Wed, 15 Apr 2020 07:08:29 +0000 (09:08 +0200)
Add management of property "reg" to configure @ of phy and
also "max-speed" property to specify maximum speed in Mbit/s
supported by the device

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
drivers/net/dwc_eth_qos.c

index 47966592165732e8c4a21ae96b6b940749d1662c..63f2086dece4a726f72abb830c9bab06cdb8f2d6 100644 (file)
@@ -306,6 +306,8 @@ struct eqos_priv {
        struct clk clk_slave_bus;
        struct mii_dev *mii;
        struct phy_device *phy;
+       int phyaddr;
+       u32 max_speed;
        void *descs;
        struct eqos_desc *tx_descs;
        struct eqos_desc *rx_descs;
@@ -1081,12 +1083,21 @@ static int eqos_start(struct udevice *dev)
         * don't need to reconnect/reconfigure again
         */
        if (!eqos->phy) {
-               eqos->phy = phy_connect(eqos->mii, -1, dev,
+               eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev,
                                        eqos->config->interface(dev));
                if (!eqos->phy) {
                        pr_err("phy_connect() failed");
                        goto err_stop_resets;
                }
+
+               if (eqos->max_speed) {
+                       ret = phy_set_supported(eqos->phy, eqos->max_speed);
+                       if (ret) {
+                               pr_err("phy_set_supported() failed: %d", ret);
+                               goto err_shutdown_phy;
+                       }
+               }
+
                ret = phy_config(eqos->phy);
                if (ret < 0) {
                        pr_err("phy_config() failed: %d", ret);
@@ -1654,6 +1665,8 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
        if (ret)
                return -EINVAL;
 
+       eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0);
+
        ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
        if (ret) {
                pr_err("clk_get_by_name(master_bus) failed: %d", ret);
@@ -1677,6 +1690,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
        if (ret)
                pr_warn("No phy clock provided %d", ret);
 
+       eqos->phyaddr = -1;
        ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
                                         &phandle_args);
        if (!ret) {
@@ -1689,6 +1703,9 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
                if (ret)
                        pr_warn("gpio_request_by_name(phy reset) not provided %d",
                                ret);
+
+               eqos->phyaddr = ofnode_read_u32_default(phandle_args.node,
+                                                       "reg", -1);
        }
 
        debug("%s: OK\n", __func__);