pico-imx7d: Convert DM MMC
authorJoris Offouga <offougajoris@gmail.com>
Thu, 4 Apr 2019 12:00:55 +0000 (14:00 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 25 Apr 2019 17:16:24 +0000 (19:16 +0200)
This patch enable convert DM MMC for imx7d-pico board and variant.

Before the DM conversion only usdhc3 was enabled and therefore it appeared
as MMC 0 to u-boot. After enabling MMC DM though usdhc3 defaults to MMC 2,
which left unattended would drive changes to existing pico-pi bootscripts and
environment variables that rely on mmc 0.

Setup the alias of mmc0 and usdhc3 so that existing pico-imx7d boot code will
work unmodified.

When converting to DM_MMC it is necessary that SPL initializes eMMC
by itself, so move the original eMMC initialization from U-Boot
proper to SPL.

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
arch/arm/dts/imx7d-pico.dtsi
board/technexion/pico-imx7d/pico-imx7d.c
board/technexion/pico-imx7d/spl.c
configs/pico-hobbit-imx7d_defconfig
configs/pico-imx7d_defconfig
configs/pico-pi-imx7d_defconfig

index d1a407957031e051f46b4d3823e4ca9e3c7a959f..9f1fe683db3a506f43ceb121ac4570f9063338ca 100644 (file)
@@ -8,6 +8,10 @@
 
 
 / {
+       aliases {
+               mmc0 = &usdhc3;
+       };
+
        /* Will be filled by the bootloader */
        memory@80000000 {
                device_type = "memory";
index 3b9be455878421932654343630d7740a5a14c4a6..e63b19df6ed253c53bc84a12ee9653a63d6c9e80 100644 (file)
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/io.h>
 #include <common.h>
-#include <fsl_esdhc.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <mmc.h>
 #include <netdev.h>
 #include <usb.h>
 #include <power/pmic.h>
@@ -28,9 +26,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UART_PAD_CTRL  (PAD_CTL_DSE_3P3V_49OHM | \
        PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
 
-#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
-       PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PUS_PU100KOHM | PAD_CTL_DSE_3P3V_49OHM)
 #define ENET_PAD_CTRL_MII  (PAD_CTL_DSE_3P3V_32OHM)
 
@@ -126,20 +121,6 @@ static iomux_v3_cfg_t const uart5_pads[] = {
        MX7D_PAD_I2C4_SDA__UART5_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
-static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
-       MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
 #ifdef CONFIG_FEC_MXC
 static iomux_v3_cfg_t const fec1_pads[] = {
        MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
@@ -224,25 +205,6 @@ static void setup_iomux_uart(void)
        imx_iomux_v3_setup_multiple_pads(uart5_pads, ARRAY_SIZE(uart5_pads));
 }
 
-static struct fsl_esdhc_cfg usdhc_cfg[1] = {
-       {USDHC3_BASE_ADDR},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-       /* Assume uSDHC3 emmc is always present */
-       return 1;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-       imx_iomux_v3_setup_multiple_pads(
-                       usdhc3_emmc_pads, ARRAY_SIZE(usdhc3_emmc_pads));
-       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-
-       return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-}
-
 int board_early_init_f(void)
 {
        setup_iomux_uart();
index 8c3443875dec76aa545d634df88dccc6c4c29dcc..92a46463dbf7591f5c6b029598b9b0466d97d2f2 100644 (file)
@@ -5,11 +5,15 @@
  * Author: Richard Hu <richard.hu@technexion.com>
  */
 
+#include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/arch/mx7-pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch-mx7/mx7-ddr.h>
+#include <asm/mach-imx/iomux-v3.h>
 #include <asm/gpio.h>
+#include <fsl_esdhc.h>
 #include <spl.h>
 
 #if defined(CONFIG_SPL_BUILD)
@@ -119,4 +123,38 @@ void board_init_f(ulong dummy)
 void reset_cpu(ulong addr)
 {
 }
+
+#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
+       PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
+
+static iomux_v3_cfg_t const usdhc3_pads[] = {
+       MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+static struct fsl_esdhc_cfg usdhc_cfg[1] = {
+       {USDHC3_BASE_ADDR},
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+       /* Assume uSDHC3 emmc is always present */
+       return 1;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+       imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+       return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+}
 #endif
index 8738f0bc29ddae2df91d7533dd8a77564dd51b62..c75532e9a6b56cc049b564bc5b5f9e51618edc65 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x20000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
+CONFIG_DM_MMC=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
index 54d7da8768c705c087a17e4ab7a318b736d27ca0..818032ef18f64035e6ba3d12a2e6f94d1d79f49f 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_CMD_BOOTMENU=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX7=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
 CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x20000
 CONFIG_CMD_DFU=y
index 662492aae1db901267502e3641693639417c9a80..926e70e9f6ee16cc73ea11f64179e3138c50c05c 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x20000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
+CONFIG_DM_MMC=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y