ARM: socfpga: vining_fpga: Update DT
authorMarek Vasut <marex@denx.de>
Wed, 26 Jun 2019 22:19:32 +0000 (00:19 +0200)
committermarex <marex@chi.lan>
Wed, 9 Oct 2019 20:54:18 +0000 (22:54 +0200)
Pick minor changes from the downstream DT, disable MMC, add GMAC0 node
and adjust PHY skew settings for GMAC1.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
arch/arm/dts/socfpga_cyclone5_vining_fpga.dts

index db55a4ecadbc8666146c0515630851b09ba36291..44bedd8b6737634e65580cb2141ec40570417400 100644 (file)
@@ -20,7 +20,7 @@
 };
 
 &mmc {
-       u-boot,dm-pre-reloc;
+       status = "disabled";
 };
 
 &qspi {
index be52fbf43df4230824e423031e630d6f6afbb969..3fb6e1437219e08d2836f6ac71e3ab5f47e71d55 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
 /*
- * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
  */
 
 #include "socfpga_cyclone5.dtsi"
        };
 };
 
+&gmac0 {
+       status = "disabled";
+       phy-mode = "gmii";
+};
+
 &gmac1 {
        status = "okay";
        phy-mode = "rgmii";
                        rxd1-skew-ps = <0>;
                        rxd2-skew-ps = <0>;
                        rxd3-skew-ps = <0>;
+                       txd0-skew-ps = <0>;
+                       txd1-skew-ps = <0>;
+                       txd2-skew-ps = <0>;
+                       txd3-skew-ps = <0>;
                        txen-skew-ps = <0>;
-                       txc-skew-ps = <1560>;
+                       txc-skew-ps = <1860>;
                        rxdv-skew-ps = <0>;
-                       rxc-skew-ps = <1200>;
+                       rxc-skew-ps = <1860>;
                };
        };
 };