mpc8641hpcn: Clean up PCI mapping concepts
authorBecky Bruce <beckyb@kernel.crashing.org>
Wed, 4 Feb 2009 00:10:53 +0000 (18:10 -0600)
committerWolfgang Denk <wd@denx.de>
Mon, 9 Feb 2009 23:30:17 +0000 (00:30 +0100)
Clean up PCI mapping concepts in the 8641 config - rename _BASE
to _BUS, as it's actually a PCI bus address, separate virtual
and physical addresses into _VIRT and _PHYS, and use each
appopriately.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
board/freescale/mpc8641hpcn/mpc8641hpcn.c
include/configs/MPC8641HPCN.h

index 9b6b69e40aa2df2dd84a06b6f361aa013393688a..28c16833dc9bb7ebd4725724bf1f979933920f55 100644 (file)
@@ -165,14 +165,14 @@ void pci_init_board(void)
 
                /* outbound memory */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_MEM_BASE,
+                              CONFIG_SYS_PCI1_MEM_BUS,
                               CONFIG_SYS_PCI1_MEM_PHYS,
                               CONFIG_SYS_PCI1_MEM_SIZE,
                               PCI_REGION_MEM);
 
                /* outbound io */
                pci_set_region(r++,
-                              CONFIG_SYS_PCI1_IO_BASE,
+                              CONFIG_SYS_PCI1_IO_BUS,
                               CONFIG_SYS_PCI1_IO_PHYS,
                               CONFIG_SYS_PCI1_IO_SIZE,
                               PCI_REGION_IO);
@@ -195,7 +195,7 @@ void pci_init_board(void)
                 * Activate ULI1575 legacy chip by performing a fake
                 * memory access.  Needed to make ULI RTC work.
                 */
-               in_be32((unsigned *) ((char *)(CONFIG_SYS_PCI1_MEM_BASE
+               in_be32((unsigned *) ((char *)(CONFIG_SYS_PCI1_MEM_VIRT
                                       + CONFIG_SYS_PCI1_MEM_SIZE - 0x1000000)));
 
        } else {
@@ -214,14 +214,14 @@ void pci_init_board(void)
 
        /* outbound memory */
        pci_set_region(r++,
-                      CONFIG_SYS_PCI2_MEM_BASE,
+                      CONFIG_SYS_PCI2_MEM_BUS,
                       CONFIG_SYS_PCI2_MEM_PHYS,
                       CONFIG_SYS_PCI2_MEM_SIZE,
                       PCI_REGION_MEM);
 
        /* outbound io */
        pci_set_region(r++,
-                      CONFIG_SYS_PCI2_IO_BASE,
+                      CONFIG_SYS_PCI2_IO_BUS,
                       CONFIG_SYS_PCI2_IO_PHYS,
                       CONFIG_SYS_PCI2_IO_SIZE,
                       PCI_REGION_IO);
index ceb8e546bded78f41d6ff645d6914a8163d83b44..ce94b7a34b43b6d8464973f87a6e9f70e7f8c6b6 100644 (file)
@@ -331,14 +331,17 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * General PCI
  * Addresses are mapped 1-1.
  */
-#define CONFIG_SYS_PCI1_MEM_BASE       0x80000000
+
+#define CONFIG_SYS_PCI1_MEM_VIRT       0x80000000
 #ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCI1_MEM_BUS                CONFIG_SYS_PCI1_MEM_VIRT
 #define CONFIG_SYS_PCI1_MEM_PHYS       0x0000000c00000000ULL
 #else
-#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BASE
+#define CONFIG_SYS_PCI1_MEM_BUS                CONFIG_SYS_PCI1_MEM_VIRT
+#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_VIRT
 #endif
 #define CONFIG_SYS_PCI1_MEM_SIZE       0x20000000      /* 512M */
-#define CONFIG_SYS_PCI1_IO_BASE        0x00000000
+#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
 #define CONFIG_SYS_PCI1_IO_VIRT        0xffc00000
 #define CONFIG_SYS_PCI1_IO_PHYS        (CONFIG_SYS_PCI1_IO_VIRT \
                                 | CONFIG_SYS_PHYS_ADDR_HIGH)
@@ -348,12 +351,14 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define KSEG1ADDR(x)           ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
 #define _IO_BASE               0x00000000
 
-#define CONFIG_SYS_PCI2_MEM_BASE       (CONFIG_SYS_PCI1_MEM_BASE \
+#define CONFIG_SYS_PCI2_MEM_BUS                (CONFIG_SYS_PCI1_MEM_BUS \
+                                        + CONFIG_SYS_PCI1_MEM_SIZE)
+#define CONFIG_SYS_PCI2_MEM_VIRT       (CONFIG_SYS_PCI1_MEM_VIRT \
                                         + CONFIG_SYS_PCI1_MEM_SIZE)
 #define CONFIG_SYS_PCI2_MEM_PHYS       (CONFIG_SYS_PCI1_MEM_PHYS \
                                         + CONFIG_SYS_PCI1_MEM_SIZE)
 #define CONFIG_SYS_PCI2_MEM_SIZE       0x20000000      /* 512M */
-#define CONFIG_SYS_PCI2_IO_BASE        0x00000000
+#define CONFIG_SYS_PCI2_IO_BUS 0x00000000
 #define CONFIG_SYS_PCI2_IO_VIRT (CONFIG_SYS_PCI1_IO_VIRT \
                                 + CONFIG_SYS_PCI1_IO_SIZE)
 #define CONFIG_SYS_PCI2_IO_PHYS        (CONFIG_SYS_PCI1_IO_PHYS \
@@ -501,7 +506,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_DBAT2L      (BAT_PHYS_ADDR(CONFIG_SYS_PCI1_MEM_PHYS) \
                                 | BATL_PP_RW | BATL_CACHEINHIBIT \
                                 | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U      (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_1G \
+#define CONFIG_SYS_DBAT2U      (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_1G \
                                 | BATU_VS | BATU_VP)
 #define CONFIG_SYS_IBAT2L      (BAT_PHYS_ADDR(CONFIG_SYS_PCI1_MEM_PHYS) \
                                 | BATL_PP_RW | BATL_CACHEINHIBIT)