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MIPS: fix missing semicolon in cacheops.h
author
Tony Wu
<tung7970@gmail.com>
Sat, 30 May 2015 07:02:39 +0000
(15:02 +0800)
committer
Daniel Schwierzeck
<daniel.schwierzeck@gmail.com>
Thu, 2 Jul 2015 09:29:33 +0000
(11:29 +0200)
Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2
(MIPS: avoid .set ISA for cache operations)
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
arch/mips/include/asm/cacheops.h
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diff --git
a/arch/mips/include/asm/cacheops.h
b/arch/mips/include/asm/cacheops.h
index 75ec380980f7653b1505d1316eae20329704cbb3..af2adc701edb3ac8e2db1efe14f6b818d30096c8 100644
(file)
--- a/
arch/mips/include/asm/cacheops.h
+++ b/
arch/mips/include/asm/cacheops.h
@@
-18,7
+18,7
@@
static inline void mips_cache(int op, const volatile void *addr)
#ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE
__builtin_mips_cache(op, addr);
#else
- __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr))
+ __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr))
;
#endif
}