usb: uniphier: remove UniPhier xHCI driver and select DM_USB
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Tue, 13 Sep 2016 16:06:00 +0000 (01:06 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Wed, 14 Sep 2016 13:54:19 +0000 (22:54 +0900)
This driver has not been converted to Driver Model, and it is an
obstacle to migrate other block device drivers.  Remove it for now.

The UniPhier SoCs already use a DM-based EHCI driver, so now
ARCH_UNIPHIER can select DM_USB.

These two changes must be done atomically because removing the
legacy driver causes a build error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
arch/arm/Kconfig
configs/uniphier_ld4_sld8_defconfig
configs/uniphier_sld3_defconfig
drivers/usb/host/Kconfig
drivers/usb/host/Makefile
drivers/usb/host/xhci-uniphier.c [deleted file]
include/fdtdec.h
lib/fdtdec.c

index f7b6f0d4f2ec0d435899b01e215fcb3d84276688..512e32606f9d127ad120568eb867296c88db4899 100644 (file)
@@ -861,6 +861,7 @@ config ARCH_UNIPHIER
        select DM_I2C
        select DM_MMC
        select DM_SERIAL
+       select DM_USB
        select OF_CONTROL
        select OF_LIBFDT
        select SPL
index e3ad160e3bea1169db4905c833b353eb3ff758e6..89d3de4b312ef959d62dda4a87c9c49f48d3505a 100644 (file)
@@ -32,7 +32,6 @@ CONFIG_SPL_NAND_DENALI=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_USB=y
-CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
index 1c5cece5e0ffa19f30ddd0059f5f983b3d3bc5de..8781fe674f8f788cf5105ed192c57ff6b36bf16e 100644 (file)
@@ -30,7 +30,6 @@ CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SPL_NAND_DENALI=y
 CONFIG_USB=y
-CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
index e0699d41ac14356b81e6fb9f4e2aa372944ea307..42e8a9f934fb0a50d16e1600d8fd3c299ef4260a 100644 (file)
@@ -15,13 +15,6 @@ config USB_XHCI_HCD
 
 if USB_XHCI_HCD
 
-config USB_XHCI_UNIPHIER
-       bool "Support for UniPhier on-chip xHCI USB controller"
-       depends on ARCH_UNIPHIER
-       default y
-       ---help---
-         Enables support for the on-chip xHCI controller on UniPhier SoCs.
-
 config USB_XHCI_DWC3
        bool "DesignWare USB3 DRD Core Support"
        help
index 620d114795a19f7a5c3c079756aa06fb0df126b4..55190bb667fd161c83905e3e5dcb1cf1eeb37093 100644 (file)
@@ -62,7 +62,6 @@ obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
-obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/xhci-uniphier.c b/drivers/usb/host/xhci-uniphier.c
deleted file mode 100644 (file)
index 1b3f3d2..0000000
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <usb.h>
-#include <fdtdec.h>
-#include "xhci.h"
-
-static int get_uniphier_xhci_base(int index, struct xhci_hccr **base)
-{
-       DECLARE_GLOBAL_DATA_PTR;
-       int node_list[2];
-       fdt_addr_t addr;
-       int count;
-
-       count = fdtdec_find_aliases_for_id(gd->fdt_blob, "usb",
-                                          COMPAT_SOCIONEXT_XHCI, node_list,
-                                          ARRAY_SIZE(node_list));
-
-       if (index >= count)
-               return -ENODEV;
-
-       addr = fdtdec_get_addr(gd->fdt_blob, node_list[index], "reg");
-       if (addr == FDT_ADDR_T_NONE)
-               return -ENODEV;
-
-       *base = (struct xhci_hccr *)addr;
-
-       return 0;
-}
-
-#define USB3_RST_CTRL          0x00100040
-#define IOMMU_RST_N            (1 << 5)
-#define LINK_RST_N             (1 << 4)
-
-static void uniphier_xhci_reset(void __iomem *base, int on)
-{
-       u32 tmp;
-
-       tmp = readl(base + USB3_RST_CTRL);
-
-       if (on)
-               tmp &= ~(IOMMU_RST_N | LINK_RST_N);
-       else
-               tmp |= IOMMU_RST_N | LINK_RST_N;
-
-       writel(tmp, base + USB3_RST_CTRL);
-}
-
-int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
-{
-       int ret;
-       struct xhci_hccr *cr;
-       struct xhci_hcor *or;
-
-       ret = get_uniphier_xhci_base(index, &cr);
-       if (ret < 0)
-               return ret;
-
-       uniphier_xhci_reset(cr, 0);
-
-       or = (void *)cr + HC_LENGTH(xhci_readl(&cr->cr_capbase));
-
-       *hccr = cr;
-       *hcor = or;
-
-       return 0;
-}
-
-void xhci_hcd_stop(int index)
-{
-       int ret;
-       struct xhci_hccr *cr;
-
-       ret = get_uniphier_xhci_base(index, &cr);
-       if (ret < 0)
-               return;
-
-       uniphier_xhci_reset(cr, 1);
-}
index aeb6bab1c4c6f2b53f8acd56dccfa72f83a31c85..27887c8c21ad7de8b9c29e1c7febd9f3a70bed8b 100644 (file)
@@ -148,7 +148,6 @@ enum fdt_compat_id {
        COMPAT_INTEL_MICROCODE,         /* Intel microcode update */
        COMPAT_AMS_AS3722,              /* AMS AS3722 PMIC */
        COMPAT_INTEL_QRK_MRC,           /* Intel Quark MRC */
-       COMPAT_SOCIONEXT_XHCI,          /* Socionext UniPhier xHCI */
        COMPAT_ALTERA_SOCFPGA_DWMAC,    /* SoCFPGA Ethernet controller */
        COMPAT_ALTERA_SOCFPGA_DWMMC,    /* SoCFPGA DWMMC controller */
        COMPAT_ALTERA_SOCFPGA_DWC2USB,  /* SoCFPGA DWC2 USB controller */
index e638ca5d6a337acd2d32f9e18850b0e732d279b7..4defb902b87297d03f891ea18b26647bd19fccc9 100644 (file)
@@ -59,7 +59,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
        COMPAT(INTEL_MICROCODE, "intel,microcode"),
        COMPAT(AMS_AS3722, "ams,as3722"),
        COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
-       COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
        COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
        COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
        COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),