Fix PCI problems on PPChameleon board

diff --git a/CHANGELOG b/CHANGELOG
index 13ce748ae8c10e3c30d11b377cddcee22266ded2..abd42a0b0fb857d2ebe833b21b6a94ac45fcee43 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
 Changes for U-Boot 1.0.0:
 ======================================================================
 
+* Fix PCI problems on PPChameleon board
+
 * Patch by Steven Scholz, 18 Oct 2003:
   Fix AT91RM9200 ethernet driver
 

diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c
index 803c7982282b7d9768ff0251ef446993f4a90106..a7682ba338f563bf56b1900369767e68a1f58f74 100644 (file)
--- a/board/dave/PPChameleonEVB/PPChameleonEVB.c
+++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c
@@ -68,7 +68,7 @@ int board_pre_init (void)
        mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
        mtdcr(uicer, 0x00000000);       /* disable all ints */
        mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
-       mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+       mtdcr(uicpr, 0xFFFFFF80);       /* set int polarities */
        mtdcr(uictr, 0x10000000);       /* set int trigger levels */
        mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
        mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */

diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index fa5acfc0de6cea6b660fca5633596c70fb727446..d3f6b2379455730aff58bca8d181fa086369dbed 100644 (file)
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -206,11 +206,14 @@ void pci_405gp_init(struct pci_controller *hose)
         *--------------------------------------------------------------------------*/
        out32r(PTM1LA,    ptmla[0]);         /* insert address                     */
        out32r(PTM1MS,    ptmms[0]);         /* insert size, enable bit is 1       */
+       pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_1, ptmpcila[0]);
 
        /*--------------------------------------------------------------------------+
         * 405GP PCI Target configuration.  (PTM2)
         *--------------------------------------------------------------------------*/
        out32r(PTM2LA, ptmla[1]);            /* insert address                     */
+       pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_2, ptmpcila[1]);
+
        if (ptmms[1] == 0)
        {
                out32r(PTM2MS,    0x00000001);   /* set enable bit                     */
@@ -251,7 +254,7 @@ void pci_405gp_init(struct pci_controller *hose)
        }
 
 #if (CONFIG_PCI_HOST != PCI_HOST_ADAPTER)
-#if (CONFIG_PCI_HOSE == PCI_HOST_AUTO)
+#if (CONFIG_PCI_HOST == PCI_HOST_AUTO)
        if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
 #endif
        {

diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads
index 3eb5d95744a43c5b1f6b17343e41037378404fca..f78c9c6b39e22c97a1c71c1555ad730b3b14d03e 100644 (file)
--- a/doc/README.mpc85xxads
+++ b/doc/README.mpc85xxads
@@ -4,6 +4,10 @@ Xianghua Xiao(X.Xiao@motorola.com)
 Created 10/15/03
 -----------------------------------------
 
+0. Toolchain
+The Binutils in current ELDK toolchain will not support MPC85xx chip. You need
+use the newest binutils-2.14.tar.bz2 from http://ftp.gnu.org/gnu/binutils.
+
 1. SWITCH SETTINGS & JUMPERS
 1.1 First, make sure the board default setting is consistent with the document
     shipped with your board. Then apply the following changes:

diff --git a/drivers/ns8382x.c b/drivers/ns8382x.c
index 978080eb20c37c3ced5e3d8bb0f434c7155e6aa4..154d6cacefbe244dc6971c146e820524c4839369 100644 (file)
--- a/drivers/ns8382x.c
+++ b/drivers/ns8382x.c
@@ -321,7 +321,7 @@ ns8382x_initialize(bd_t * bis)
                if ((devno = pci_find_devices(supported, idx++)) < 0)
                        break;
 
-               pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &iobase);
+               pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
                iobase &= ~0x3; /* 1: unused and 0:I/O Space Indicator */
 
 #ifdef NS8382X_DEBUG

diff --git a/drivers/pci.c b/drivers/pci.c
index c91c992e8d8c66765b0bb85dcbf9b3178651d862..e014f91444fb0964d502308e80d95d44aede4964 100644 (file)
--- a/drivers/pci.c
+++ b/drivers/pci.c
@@ -428,11 +428,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
             dev <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
             dev += PCI_BDF(0,0,1))
        {
-#if ((!defined(CONFIG_405GP)) && (!defined(CONFIG_405EP)))     /* don't skip host bridge on ppc405gp and 405ep */
                /* Skip our host bridge */
                if ( dev == PCI_BDF(hose->first_busno,0,0) )
                        continue;
-#endif
 
                if (PCI_FUNC(dev) && !found_multi)
                        continue;

diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 52c65e920cb448688bbbb30f693ff8842bb571cd..b480114373b9cda84e4cd53e217a04e0db23729c 100644 (file)
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -282,7 +282,7 @@
 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 
 #define CONFIG_PCI                     /* include pci support          */
-#define CONFIG_PCI_HOST        PCI_HOST_AUTO   /* select pci host function     */
+#define CONFIG_PCI_HOST        PCI_HOST_FORCE   /* select pci host function     */
 #undef  CONFIG_PCI_PNP                 /* do pci plug-and-play         */
                                        /* resource configuration       */
 

diff --git a/include/configs/trab.h b/include/configs/trab.h
index caf1bbd0dc870bdfcebcee67ec81faf272ec6600..e7d1b263e6e7094d921e4e0964c90b88308a3eea 100644 (file)
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -204,7 +204,7 @@
        "loadaddr=c400000\0" \
        "net_load=tftpboot $loadaddr $loadfile\0" \
        "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
-       "kernel_addr=000C0000\0" \
+       "kernel_addr=00060000\0" \
        "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
        "mdm_init1=ATZ\0" \
        "mdm_init2=ATS0=1\0" \