Imply preferred clock driver per SoC, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
bool "Renesas SoC R8A7790"
select RCAR_GEN2
select ARM_CORTEX_A15_CVE_2017_5715
+ imply CLK_R8A7790
config R8A7791
bool "Renesas SoC R8A7791"
select RCAR_GEN2
select ARM_CORTEX_A15_CVE_2017_5715
+ imply CLK_R8A7791
config R8A7792
bool "Renesas SoC R8A7792"
select RCAR_GEN2
select ARM_CORTEX_A15_CVE_2017_5715
+ imply CLK_R8A7792
config R8A7793
bool "Renesas SoC R8A7793"
select RCAR_GEN2
select ARM_CORTEX_A15_CVE_2017_5715
+ imply CLK_R8A7793
config R8A7794
bool "Renesas SoC R8A7794"
select RCAR_GEN2
+ imply CLK_R8A7794
choice
prompt "Renesas ARM SoCs board select"
config R8A7795
bool "Renesas SoC R8A7795"
+ imply CLK_R8A7795
config R8A7796
bool "Renesas SoC R8A7796"
+ imply CLK_R8A7796
config R8A77970
bool "Renesas SoC R8A77970"
+ imply CLK_R8A77970
config R8A77990
bool "Renesas SoC R8A77990"
+ imply CLK_R8A77990
config R8A77995
bool "Renesas SoC R8A77995"
+ imply CLK_R8A77995
endchoice