-commit f9476902b789b0481b9df49af88d6ca94fb16fa0
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Tue Dec 15 12:10:47 2009 -0600
-
- mpc85xx, mpc86xx: Fix gd->cpu pointer after relocation
+commit 4e72fb15c9073129e05820cc9c54f54bc4985835
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Mar 12 22:11:00 2010 +0100
- The gd->cpu pointer is set to an address located in flash when the
- probecpu() function is called while U-Boot is executing from flash.
- This pointer needs to be updated to point to an address in RAM after
- relocation has occurred otherwise Linux may not be able to boot due to
- "fdt board" crashing if flash has been erased or changed.
+ standalone eepro100_eeprom: fix build error
- This bug was introduced in commit
- a0e2066f392782730f0398095e583c87812d97f2.
+ Building examples/standalone/eepro100_eeprom triggers this error:
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
- Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
- Tested-by: Kumar Gala <galak@kernel.crashing.org>
- Tested on MPC8527DS.
- Tested by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ In file included from include/common.h:629,
+ from eepro100_eeprom.c:24:
+ include/net.h: In function 'NetReadIP':
+ include/net.h:430: warning: implicit declaration of function 'memcpy'
+ eepro100_eeprom.c: At top level:
+ eepro100_eeprom.c:81: error: conflicting types for 'memcpy'
+ include/net.h:430: error: previous implicit declaration of 'memcpy' was here
-commit 3363a34b9eeda9783afcbbed5cdd738926d1f4bf
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Sun Dec 13 17:58:34 2009 -0600
+ Fix this.
- MVBLUE: Remove CONFIG_CMD_IRQ
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
- Neither the MVBLUE nor its underlying architecture implement the
- do_irqinfo() function which is required when CONFIG_CMD_IRQ is defined.
- This change fixes the following MVBLUE compiler error:
+commit 1bb1809558e11eb089fba32caed9fc99d21477c1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Mar 12 22:10:31 2010 +0100
- -> ./MAKEALL MVBLUE
- Configuring for MVBLUE board...
- common/libcommon.a(cmd_irq.o):(.u_boot_cmd+0x24): undefined reference to `do_irqinfo'
- make: *** [u-boot] Error 1
+ Update .gitignore's: add some generated files
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
- Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
-commit 18e8ad60ee87431c01cc2686985b60cc54f5dd3b
+commit 9c9cbe78dcb0afad081670cb1bdc82d227095cae
Author: Detlev Zundel <dzu@denx.de>
-Date: Mon Dec 14 17:54:40 2009 +0100
+Date: Mon Mar 8 14:02:57 2010 +0100
- imx27lite: Reenable MTD support on NOR flash.
+ mpc82xx: Remove SL8245 board and the now orpahned sk98lin network driver.
- The support for this was silently dropped by a configuration
- split during the merge of the imx27lite board support in commit
- 864aa034f3a0e10ce710e8bbda171df3cab59414 (cmd_mtdparts: Move to common
- handling of FLASH devices via MTD layer).
+ This code has compile problems and the company does not even exist any
+ more. So we take the liberty to drop support for it.
Signed-off-by: Detlev Zundel <dzu@denx.de>
+ CC: Wolfgang Denk <wd@denx.de>
+ CC: Ben Warren <biggerbadderben@gmail.com>
-commit f4cfe42758192d09f8375e384cc000aa70d97029
-Author: Stefan Roese <sr@denx.de>
-Date: Wed Dec 9 09:01:43 2009 +0100
-
- nand: Fix access to last block in NAND devices
-
- Currently, the last block of NAND devices can't be accessed. This patch
- fixes this issue by correcting the boundary checking (off-by-one error).
+commit ca02f6f8dc4966b2a019b15e01b5070189327df2
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Mar 10 17:16:48 2010 -0600
- Signed-off-by: Stefan Roese <sr@denx.de>
- Cc: Scott Wood <scottwood@freescale.com>
- Cc: Wolfgang Denk <wd@denx.de>
+ 85xx: Drop FIT support to allow u-boot image to fit in 512k
-commit 3b887ca8ce72cc12129183538f6e828db13f4867
-Author: Peter Korsgaard <jacmet@sunsite.dk>
-Date: Tue Dec 8 22:20:34 2009 +0100
+ The 36-bit build exceeds the 512k size we have. Removing FIT type image
+ support allows us to fit and we dont really use it.
- mpc83xx: boot time regression, move LCRR setup back to cpu_init_f
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
- Commit c7190f02 (retain POR values of non-configured ACR, SPCR, SCCR,
- and LCRR bitfields) moved the LCRR assignment to after relocation
- to RAM because of the potential problem with changing the local bus
- clock while executing from flash.
+commit 5f8419597f427aaf9bb501460735d703d10db5ee
+Author: Michael Zaidman <michael.zaidman@gmail.com>
+Date: Sun Feb 28 16:28:25 2010 +0200
- This change unfortunately adversely affects the boot time, as running
- all code up to cpu_init_r can cause significant slowdown.
+ Cosmetic change - indentation correction.
- E.G. on a 8347 board a bootup time increase of ~600ms has been observed:
+ Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
- 0.020 CPU: e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
- 0.168 RS: 232
- 0.172 I2C: ready
- 0.176 DRAM: 64 MB
- 1.236 FLASH: 32 MB
+commit a693447ceadff49155e260cbbaef4e09c926cab5
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Wed Feb 24 00:29:44 2010 +0100
- Versus:
+ cmd_mtdparts.c: prevent printbuffer overflows
- 0.016 CPU: e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
- 0.092 RS: 232
- 0.092 I2C: ready
- 0.096 DRAM: 64 MB
- 0.644 FLASH: 32 MB
+ The length of configured MTDPARTS_DEFAULT string
+ could be greater than console printbuffer size.
+ Replace printf() by puts() to avoid potential buffer
+ overflows.
- So far no boards have needed the late LCRR setup, so simply revert it
- for now - If it is needed at a later time, those boards can either do
- their own final LCRR setup in board code (E.G. in board_early_init_r),
- or we can introduce a CONFIG_SYS_LCRR_LATE config option to only do
- the setup in cpu_init_r.
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
- Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
- Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+commit 3920bbedcf74a073bc72950a51de75af6faa2f06
+Author: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+Date: Fri Feb 19 11:59:04 2010 +0100
-commit 386118a896554b13f14ad0f82356276988f7de82
-Author: Michal Simek <monstr@monstr.eu>
-Date: Tue Dec 8 09:12:49 2009 +0100
+ Fix MPC8536DS documentation
- microblaze: Correct ffs regression for Microblaze
+ This patch corrects small mistake in the register list in
+ doc/README.mpc8536ds. These registers are 32 bits and this one starts
+ at ....c not ....e
- We are using generic implementation of ffs. This should
- be part of Simon's commit 0413cfecea350000eab5e591a0965c3e3ee0ff00
+ When using the ...c address I can boot from sd, when using the ...e
+ address I cannot.
- Here is warning message which this patch removes.
+ Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+ Acked-by: Hu Mingkai <B21284@freescale.com>
- In file included from /tmp/u-boot-microblaze/include/common.h:38,
- from cmd_mtdparts.c:87:
- /tmp/u-boot-microblaze/include/linux/bitops.h:123:1: warning: "ffs" redefined
- In file included from /tmp/u-boot-microblaze/include/linux/bitops.h:110,
- from /tmp/u-boot-microblaze/include/common.h:38,
- from cmd_mtdparts.c:87:
- /tmp/u-boot-microblaze/include/asm/bitops.h:269:1:
- warning: this is the location of the previous definition
+commit ab68f4dd193053c0ba395af15b154caca35e99f3
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Feb 10 08:03:21 2010 +0100
- Signed-off-by: Michal Simek <monstr@monstr.eu>
+ doc: add README for CONFIG_HWCONFIG option
-commit 8fe7b29f9811322931f0192a56431edcf819d6b9
-Author: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
-Date: Mon Dec 7 08:09:57 2009 -0800
+ Signed-off-by: Heiko Schocher <hs@denx.de>
- microblaze: Stop stack clobbering in microblaze-generic.
+commit 7026ead0d3ece5e43d6b39f62fb5c4306f691224
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 9 15:50:27 2010 +0100
- A typo caused the stack and malloc regions to overlap, which prevented
- mem_malloc_init() from returning. This commit makes the memory layout match
- the example described in include/configs/microblaze-generic.h
+ TQM8xx: enable device tree support on all TQM8xx based boards.
- Signed-off-by: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
- Signed-off-by: Michal Simek <monstr@monstr.eu>
+ Also enable support for CONFIG_HWCONFIG because we use this for
+ configuring if this hardware has a FEC or not.
-commit 0fc52948bda0734431cb528ee4fd82f1dec8c7b5
-Author: Wolfgang Denk <wd@denx.de>
-Date: Mon Dec 7 23:14:13 2009 +0100
+ syntax:
- Update CHANGELOG, prepare -rc2
+ hwconfig=fec:on if hardware has an fec
+ hwconfig=fec:off if hardware has no fec
+ Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
-commit f2352877cb2daac88115192fb09991a2397d0b27
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Sun Dec 6 23:58:28 2009 -0600
+commit 6ed3b9d44c359bc829e9acd0a55fcd1c3e82b6ae
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 9 15:50:21 2010 +0100
- MAKEALL: Fix return value
+ TQM8xx: add device tree support for TQM8xx based boards.
- Previously MAKEALL would always return a value of 0, even if 1 or more
- boards did not compile. This change causes MAKEALL to return 0 if all
- boards were able to build, otherwise 1.
+ Also use hwconfig to configure whether the board has a FEC or not.
+ We then can adjust the DTS to tell Linux if there is a FEC present.
- This change also requires changing the script interpreter from sh to
- bash to support bash's PIPESTATUS variable.
+ syntax:
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ hwconfig=fec:on if hardware has a FEC
+ hwconfig=fec:off if hardware has no FEC
-commit fbc1c8f6f6c972524197829c56dd8f2f5da0200a
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Sun Dec 6 01:33:24 2009 -0600
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
- tools/mkimage: Remove duplicate line of code
+commit 143cd21fe22e69bf0cdaefd57be98f07ed8f04fa
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Mar 11 23:56:03 2010 +0100
- Recent commits 1a99de2cb4d08eb3bf9fb3f60a9d533150de8c0e and
- 6a590c5f5fd12cdd27f3153522acfac3854590e7 both fixed the same bug in the
- same manner. Unfortunately git was "smart" enough to merge both changes
- which resulted in some duplicate code.
+ Move CONFIG_UPDATE_TFTP code after CONFIG_PREBOOT
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ The auto-update feature (CONFIG_UPDATE_TFTP) requires that the env
+ variable serverip be set for the TFTP access. If DHCP is to be used
+ to get the serverip env variable, this doesn't work as DHCP happens
+ after the auto-update attempt has run. A solution is to run DHCP in
+ PREBOOT, but even this is too late.
- Reordered code and comment a bit.
+ To solve this, we move update_tftp() below the PREBOOT stuff.
Signed-off-by: Wolfgang Denk <wd@denx.de>
-commit df002fa6b9cd475909ede35bf95b803c2289c6a4
-Author: Heiko Schocher <hs@denx.de>
-Date: Sat Dec 5 11:59:51 2009 +0100
+commit 1b691bb0c2fa18c9b68f15398ef6c8b9e0c0f3e3
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Jan 25 18:50:11 2010 -0500
- i2c: fix dangling comment in do_i2c_mw()
+ mkimage: dont force entry point with xip
- commit bd3784df94bfeca43fbf34094df9cb1bd3ecca3b deleted some unused
- code in do_i2c_mw(), but missed to also remove the respective
- commment. This patch fixes this.
+ Some people boot images with the entry point in the middle of the blob
+ (like Linux with the head code in discardable .init.text), and there is no
+ no real requirement that the entry point be right after the mkimage header
+ when doing XIP, so let people specify whatever they want. If they do need
+ an entry right after the header, then they still can do that with normal
+ -e behavior.
- Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-commit f8450829f921cf10667af98a8d08edfa3d998f04
-Author: Heiko Schocher <hs@denx.de>
-Date: Tue Dec 1 19:30:47 2009 +0100
+commit 4b99327a4121a28d2bdb2c2b841f5d97931ae905
+Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+Date: Fri Jan 15 10:06:06 2010 -0500
- 52xx, manroland: add fdt_fixup_memory() in ft_board_setup()
+ PPC: Record U-Boot's relocated address in RAM and show in bdinfo.
- To update the real memory size in the memory node on the
- uc101 and mucmc52 boards call fdt_fixup_memory() in
- ft_board_setup().
+ This patch uses gd->relocaddr variable to store uboot's relocated
+ address in RAM and shows it in bdinfo command.
- Signed-off-by: Heiko Schocher <hs@denx.de>
+ This patch moves CONFIG_AMIGAONEG3SE style copying of the address
+ in board_init_f to just before relocation is actually done.
-commit 0ec81db20294efdad2454a753e79f1fe244a43ca
-Author: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
-Date: Tue Dec 1 14:05:55 2009 +0100
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+ Tested-by: Detlev Zundel <dzu@denx.de>
- Fix computation in nand_util.c:get_len_incl_bad
+commit 8c4444ff5e1d8e9fd1a847a2fb096aa9aff66f85
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Mar 11 23:35:43 2010 +0100
- Depending on offset, flash size and the number of bad blocks,
- get_len_incl_bad may return a too small value which may lead to:
+ Fix memory leak in mmc_read()
- 1) If there are no bad blocks, nand_{read,write}_skip_bad chooses the
- bad block aware read/write code. This may hurt performance, but does
- not have any adverse effects.
+ There is be a path through mmc_read in drivers/mmc/mmc.c where
+ malloc'd memory is not freed before exiting mmc_read: it occurs if
+ mmc_set_blocklen() returns a non-zero value.
- 2) If there are bad blocks, the nand_{read,write}_skip_bad may choose
- the bad block unaware read/write code (if len_incl_bad == *length)
- which leads to corrupted data.
+ Reported-by: Quentin Armitage <Quentin@Armitage.org.uk>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
- Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
+commit 6258b04e9a41ee60f21547358a58fbcb9087735d
+Author: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+Date: Thu Feb 11 14:57:04 2010 +0100
-commit aabb8cb0818e285aeed0cfaf243635997e07554d
-Author: Evan Samanas <esamanas@xes-inc.com>
-Date: Mon Nov 9 20:08:36 2009 -0600
+ AT91: Update otc570 board to new SoC access
- nfs: NfsTimeout() updates
+ * convert otc570 board to use c stucture SoC access
+ * change gpio access to at91_gpio syntax
- - NfsTimeout() does not correctly update the NFS timeout value which
- results in NfsTimeout() only being called once in certain situations.
- This can result in the 'nfs' command hanging indefinetly. For
- example, the command:
+ Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
- nfs 192.168.0.1:/home/user/file
+commit 7cedb29872069e782f9f97cef4ab1232736e4c85
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Sun Feb 14 12:20:43 2010 +0100
- will not exit until ctrl-c is pressed if 192.168.0.1 does not have an
- NFS server running.
+ updates the at91 main_clock calculation
- This issue is resolved by reinitializting the NFS timeout value inside
- NfsTimeout() when a timeout occurs.
+ * updates the conditional main_clock calculation (if AT91_MAIN_CLOCK defined) to c structure SoC access
+ * add need register flags
- - Make the 'nfs' command print the 'T' character when a timeout occurs.
- Previously there was no indication that timeouts were occuring.
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
- - Mimic the 'tftpboot' command and when a download fails print "Retry
- count exceeded; starting again", and restart the download taking the
- 'netretry' environment variable into account.
+commit 637833c2d669f9a370706e275e7103454c3c83ec
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date: Wed Mar 3 15:27:37 2010 +0530
- Signed-off-by: Evan Samanas <esamanas@xes-inc.com>
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ arm: kirkwood: suen3: fixed build warning
- Tested on TQM8xxL.
+ This patch fixes following build warning
- Tested by: Wolfgang Denk <wd@denx.de>
+ Invalid Kwbimage command Type - valid names are: BOOT_FROM, NAND_ECC_MODE, NAND_PAGE_SIZE, SATA_PIO_MODE, DDR_INIT_DELAY, DATA, , spi, nand, sata, pex, uart
- Tested on MPC8527DS.
+ Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
- Tested by: Ed Swarthout <Ed.Swarthout@freescale.com>
+commit e4d34492017c95e4041ea0c581e1ab8d1d49381b
+Author: Stefano Babic <sbabic@denx.de>
+Date: Fri Mar 5 17:54:37 2010 +0100
-commit 224c90d1060bf1a83cbf33ca51d060b9d19e0294
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Wed Nov 18 19:08:59 2009 -0600
+ MX51: removed warnings for the mx51evk
- bootm: Fix help message's sub-command ordering
+ The patch removes warnings at compile time and provides
+ some cleanup code:
+ - Removed comment on NAND (not yet supported) from lowlevel_init.S
+ - Removed NFMS bit definition from imx-regs.h
+ The bit is only related to MX.25/35 and can lead to confusion
+ - Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
- The help message for the 'bootm' command listed the 'cmdline' and 'bdt'
- sub-commands in the wrong order which resulted in the error below when
- following the 'help' command's instructions:
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
- "Trying to execute a command out of order"
+commit 9d69e33d8d0f112fe3a089101d023e87431684d1
+Author: Vipin Kumar <vipin.kumar@st.com>
+Date: Tue Mar 2 10:46:52 2010 +0530
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ SPEAr : Supporting new mach ids for spear310 and spear320
-commit a93c92cddaedd5f0720e0da15c6664f7a688b582
-Author: Robert P. J. Day <rpjday@crashcourse.ca>
-Date: Tue Nov 17 07:30:23 2009 -0500
+ Supporting new machine ids for SoCs spear310 and spear320
- help: Correct syntax of nandecc help output.
+ include/asm-arm/mach-types.h has to be updated before applying
+ this patch for build to work
- "nandecc" help output should not reproduce the command name, nor have
- a trailing newline.
+ Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
- Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+commit cc0b53c8d5d6a3f14f36982552bc3feb8ecb1db5
+Author: Heiko Schocher <hs@denx.de>
+Date: Mon Mar 1 15:58:18 2010 +0100
-commit c2fff331a32ceca837d76eb7827d6340da270d52
-Author: Mike Rapoport <mike@compulab.co.il>
-Date: Wed Nov 11 10:03:03 2009 +0200
+ arm, suen3: fix compile error, if doing not a local build
- smc911x: update SMC911X related configuration description
+ Signed-off-by: Heiko Schocher <hs@denx.de>
- Since commit 736fead8fdbf8a8407048bebc373cd551d01ec98 "Convert SMC911X
- Ethernet driver to CONFIG_NET_MULTI API" SMC911X configration options
- are called CONFIG_SMC911X rather than CONFIG_DRIVER_SMC911X. Update
- README to reflect that change.
+commit 67fa8c25f5c2d23932c0f31b035281d6abbb0965
+Author: Heiko Schocher <[hs@denx.de]>
+Date: Mon Feb 22 16:43:02 2010 +0530
- Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+ arm: add support for the suen3 board from keymile
-commit 45b6b65c6bf06a589ef3123192af94b0381db27b
-Author: Mike Rapoport <mike@compulab.co.il>
-Date: Wed Nov 11 10:03:09 2009 +0200
+ Add support for the ARM part of the mgcoge2, named suen3.
+ This board is based on the Marvell Kirkwood (88F6281) SoC.
+ As there come more board variants, common config options
+ are collected in include/configs/km_arm.h. Also, this board
+ use common code for all keymile boards, which is stored in
+ board/keymile/common/common.c
- smc911x: fix typo in smc911x_handle_mac_address name
+ Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Heiko Schocher <hs@denx.de>
- Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+commit 6895d4510a7758595b85b48a7f449bd61dfc812f
+Author: John Rigby <jcrigby@gmail.com>
+Date: Mon Jan 25 23:12:58 2010 -0700
-commit f64ef9bb995687e24e0b61b52316f4eaa97c3bbc
-Author: Ed Swarthout <Ed.Swarthout@freescale.com>
-Date: Thu Nov 19 02:47:28 2009 -0600
+ Add support for KARO TX25 board
- fix nfs symlink name corruption
+ This is an i.MX25 base board with only NAND
+ so it uses nand_spl to boot.
- An off by one error may cause nfs readlink lookup fail if
- nfs_path_buff has non-zero data from a previous use.
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
- Loading: *** ERROR: File lookup fail
+ Tune configuration, add support for (redundant) environment in NAND.
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
- Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+ CC: Fred Fan <fanyefeng@gmail.com>
+ CC: Tom <Tom.Rix@windriver.com>
-commit e8fac25e83426fdf461c66aa8a2530ec28ec536e
-Author: Wolfgang Denk <wd@denx.de>
-Date: Mon Dec 7 21:06:40 2009 +0100
+commit 740d6ae5b982496fcea0666b2207cb34cc0e6015
+Author: John Rigby <jcrigby@gmail.com>
+Date: Mon Jan 25 23:12:57 2010 -0700
- at91sam9261ek.c: fix minor coding style issue.
+ fec_mxc: add MX25 support
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Use RMII for MX25
+ Add code to init gasket that enables RMII
-commit 4713010adf5beda87410d637ebfc58db0db9a9db
-Author: Wolfgang Denk <wd@denx.de>
-Date: Sun Dec 6 01:21:28 2009 +0100
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
+ CC: Ben Warren <biggerbadderben@gmail.com>
- trab: fix warning: implicit declaration of function 'disable_vfd'
+commit cb17b92de03416cf4d5db5bd27ef4ae17f95e707
+Author: John Rigby <jcrigby@gmail.com>
+Date: Mon Jan 25 23:12:55 2010 -0700
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+ fec_mxc: cleanup and factor out MX27 dependencies
-commit a9f99ab44b473fb394169ba365f8b4380f981584
-Author: Wolfgang Denk <wd@denx.de>
-Date: Sun Dec 6 00:53:18 2009 +0100
+ general cleanup
+ move clock init to cpu_eth_init in cpu/arm926ejs/mx27/generic.c
+ make MX27 specific phy init conditional on CONFIG_MX27
+ replace call to imx_get_ahbclk with one to imx_get_fecclk
+ and define imx_get_fecclk in include/asm-arm/arch-mx27/clock.h
- zlib.c: avoid build conflicts for cradle board
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
+ CC: Ben Warren <biggerbadderben@gmail.com>
+ CC: Fred Fan <fanyefeng@gmail.com>
+ CC: Tom <Tom.Rix@windriver.com>
- Commit dce3d79710 updated the zlib code to v0.95; this caused
- conflicts when building for the "cradle" board, because the (pretty
- generic) preprocessor variable "OFF" was used in multiple files.
- Make sure to avoid further conflicts by #undef'ing it in zlib.c
- before redefining it.
+commit 552ff8f1d9fccf57243a01afe6dbebb982867e20
+Author: John Rigby <jcrigby@gmail.com>
+Date: Mon Jan 25 23:12:56 2010 -0700
- Signed-off-by: Wolfgang Denk <wd@denx.de>
- cc: Giuseppe Condorelli <giuseppe.condorelli@st.com>
- cc: Angelo Castello <angelo.castello@st.com>
- cc: Alessandro Rubini <rubini-list@gnudd.com>
+ Add support for Freescale MX25 SOC
-commit 8cbf4e4f17121d732e78764f0ba317c9a1838ea6
-Author: Wolfgang Denk <wd@denx.de>
-Date: Sun Dec 6 00:26:19 2009 +0100
+ ARM926EJS core with MX31 peripherals.
- Fix out-of-tree building of "apollon" board.
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
+ Earlier Version Signed-off-by: Wolfgang Denk <wd@denx.de>
+ CC: Fred Fan <fanyefeng@gmail.com>
+ CC: Tom <Tom.Rix@windriver.com>
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit e911c983f4a8d588f831806af37eb56c95512d5d
+Author: John Rigby <jcrigby@gmail.com>
+Date: Mon Jan 25 23:12:51 2010 -0700
-commit f68ab43de67f59925542efb6bcec30f4a84fe695
-Author: Mike Frysinger <vapier@gentoo.org>
-Date: Fri Dec 4 05:35:15 2009 -0500
+ mxc_serial replace platform specific clock
- lzma: ignore unset filesizes
+ remove ifdef'd clock selection code from
+ serial_mxc.c and replace with call to imx_get_uartclk
- The Linux kernel build system changed how it compresses things with LZMA
- such that the header no longer contains the filesize (it is instead set to
- all F's). So if we get a LZMA image that has -1 for the 64bit field,
- let's just assume that the decompressed size is unknown and continue on.
+ Add definitions for imx_get_uartclk to imx31 and imx27
+ include files.
- Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ This makes it easier to add new imx platforms.
-commit cccfc2ab77877dbdd2abe26b28d4c1f467feb0c0
-Author: Detlev Zundel <dzu@denx.de>
-Date: Tue Dec 1 17:16:19 2009 +0100
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
- README: Rearrange paragraphs to regain linear arrangement.
+commit c5fb70c9114bd0a8289444d3d5c7e360eda08232
+Author: Stefano Babic <sbabic@denx.de>
+Date: Fri Feb 5 15:13:58 2010 +0100
- Two later additions to the Configuration Option section unfortunately
- split the description of Show boot progress and the list of its call outs.
+ Add initial support for Freescale mx51evk board
- Signed-off-by: Detlev Zundel <dzu@denx.de>
+ The patch adds initial support for the Freescale mx51evk board.
+ Network (FEC) and SD controller (fsl_esdhc) are supported.
-commit c81296c16fd9d12422c9968cc0f1d9bf440a7d88
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Tue Nov 24 16:42:10 2009 -0600
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Signed-off-by: Fred Fan <fanyefeng@gmail.com>
- tools/mkimage: Print FIT image contents after creation
+commit c67bee1460a0da89ef08cbc28375171acc9a4227
+Author: Stefano Babic <sbabic@denx.de>
+Date: Fri Feb 5 15:11:27 2010 +0100
- Previously, there was no indication to the user that a FIT image was
- successfully created after executing mkimage. For example:
+ fsl_esdhc: add support for mx51 processor
- $ mkimage -f uImage.its uImage.itb
- DTC: dts->dtb on file "uImage.its"
+ The esdhc controller in the mx51 processor is quite
+ the same as the one in some powerpc processors
+ (MPC83xx, MPC85xx). This patches adapts the driver
+ to support the arm mx51.
- Adding some additional output after creating a FIT image lets the user
- know exactly what is contained in their image, eg:
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
- $ mkimage -f uImage.its uImage.itb
- DTC: dts->dtb on file "uImage.its"
- FIT description: Linux kernel 2.6.32-rc7-00201-g7550d6f-dirty
- Created: Tue Nov 24 15:43:01 2009
- Image 0 (kernel@1)
- Description: Linux Kernel 2.6.32-rc7-00201-g7550d6f-dirty
- Type: Kernel Image
- Compression: gzip compressed
- Data Size: 2707311 Bytes = 2643.86 kB = 2.58 MB
- Architecture: PowerPC
- OS: Linux
- Load Address: 0x00000000
- Entry Point: 0x00000000
- Hash algo: crc32
- Hash value: efe0798b
- Hash algo: sha1
- Hash value: ecafba8c95684f2c8fec67e33c41ec88df1534d7
- Image 1 (fdt@1)
- Description: Flattened Device Tree blob
- Type: Flat Device Tree
- Compression: uncompressed
- Data Size: 12288 Bytes = 12.00 kB = 0.01 MB
- Architecture: PowerPC
- Hash algo: crc32
- Hash value: a5cab676
- Hash algo: sha1
- Hash value: 168722b13e305283cfd6603dfe8248cc329adea6
- Default Configuration: 'config@1'
- Configuration 0 (config@1)
- Description: Default Linux kernel
- Kernel: kernel@1
- FDT: fdt@1
+commit 69df00f9d9c2f45b4576d1eae79bfac8bebb8821
+Author: Stefano Babic <sbabic@denx.de>
+Date: Fri Feb 5 15:07:33 2010 +0100
- This brings the behavior of creating a FIT image in line with creating a
- standard uImage, which also prints out the uImage contents after
- creation.
+ ARM: add accessors functions
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Some Freescale's processors of different architecture
+ have the same peripheral (eSDHC controller in PowerPC
+ and i.MX51). This patch adds accessors for
+ the internal registers of the SOCs, as already
+ implemented in the PowerPC architecture.
-commit 8e1c89663cc8796b85588910046e03b388a7597c
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Tue Nov 24 16:42:09 2009 -0600
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
- tools/fit_image.c: Remove unused fit_set_header()
+commit 11fdade294b4d60c19ae861515aabddca1278deb
+Author: Stefano Babic <sbabic@denx.de>
+Date: Fri Feb 5 15:04:43 2010 +0100
- The FIT fit_set_header() function was copied from the standard uImage's
- image_set_header() function during mkimage reorganization. However, the
- fit_set_header() function is not used since FIT images use a standard
- device tree blob header.
+ MMC: add weak function to detect MMC/SD card
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Most controllers can check if there is a card in the slot.
+ However, they require pins that could be not available because
+ required by other functions and the detection of a card must
+ be performed in another way. This patch adds a weak function
+ that a board can implement to add its internal custom way
+ to check the presence of a MMC/SD card.
-commit 1a99de2cb4d08eb3bf9fb3f60a9d533150de8c0e
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Tue Nov 24 16:42:08 2009 -0600
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
- tools/mkimage: Assume FDT image type for FIT images
+commit 250de12bc2f7842807d25e16971c5bea59c3a4b1
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed Jan 20 18:20:39 2010 +0100
- When building a Flattened Image Tree (FIT) the image type needs to be
- "flat_dt". Commit 89a4d6b12fd6394898b8a454cbabeaf1cd59bae5 introduced a
- regression which caused the user to need to specify the "-T flat_dt"
- parameter on the command line when building a FIT image. The "-T
- flat_dt" parameter should not be needed and is at odds with the current
- FIT image documentation.
+ mmc: check correctness of the voltage mask in ocr
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Most cards do not answer if some reserved bits
+ in the ocr are set. However, some controllers
+ can set bit 7 (reserved for low voltages), but
+ how to manage low voltages SD card is not yet
+ specified.
-commit 270737acca21f3939f814de5dcf350a1c3d80d83
-Author: Michael Brandt <Michael.Brandt@emsyso.de>
-Date: Sun Nov 22 14:13:27 2009 +0100
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
- EXT2FS: fix inode size for ext2fs rev#0
+commit 71d64c0e4fa5910c15eca175a8f3b0e1c1d6711c
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed Jan 20 18:20:19 2010 +0100
- extfs.c assumes that there is always a valid inode_size field in the
- superblock. But this is not true for ext2fs rev 0. Such ext2fs images
- are for instance generated by genext2fs. Symptoms on ARM machines are
- messages like: "raise: Signal # 8 caught"; on PowerPC "ext2ls" will
- print nothing.
- This fix checks for rev 0 and uses then 128 bytes as inode size.
+ serial_mxc: add support for MX51 processor
- Signed-off-by: Michael Brandt <Michael.Brandt@emsyso.de>
- Tested on: TQM5200S
- Tested-by: Wolfgang Denk <wd@denx.de>
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+ The patch adds support for the Freescale mx51 processor.
-commit bcb324d68f7955c1136dafc944eb55db8ebaa601
-Author: Robert P. J. Day <rpjday@crashcourse.ca>
-Date: Thu Nov 19 11:00:28 2009 -0500
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Signed-off-by: Fred Fan <fanyefeng@gmail.com>
- Remove superfluous preprocessor tests from some cmd_*.c files.
+commit 67adcee0e091f0935e7dd722404d2a864cdecbe7
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed Jan 20 18:20:04 2010 +0100
- A small number of common/cmd_*.c files contain preprocessor tests that
- are apparently superfluous since those same tests are used in the
- Makefile to control the compilation of those files. Those tests are
- clearly redundant as long as they surround the entirety of the source
- in those files.
+ MX51: Add pin and multiplexer definitions.
- Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+ The patch add header files to support the pin multiplexer
+ of the the Freescale i.MX51 processor.
-commit ad53226156fa64b6d04c0d1d6e91e09979cbea15
-Author: Robert P. J. Day <rpjday@crashcourse.ca>
-Date: Tue Nov 17 01:59:29 2009 -0500
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Signed-off-by: Fred Fan <fanyefeng@gmail.com>
- README: Update the list of directories.
+commit fb87a1ed9205bf5f843e1f264198ce946602deda
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed Jan 20 18:19:51 2010 +0100
- Bring the directory listing more into line with current content.
+ MX51: Add register definitions
- Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+ The patch add header files to support the Freescale i.MX51
+ processor, setting definitions for internal registers.
-commit bd3784df94bfeca43fbf34094df9cb1bd3ecca3b
-Author: Pratap Chandu <pratap.rrke@gmail.com>
-Date: Thu Nov 12 19:28:25 2009 +0530
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Signed-off-by: Fred Fan <fanyefeng@gmail.com>
- Removes dead code in the file common/cmd_i2c.c
+commit 64fdf452a85718935d82416d141be144b262c542
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed Jan 20 18:19:32 2010 +0100
- There is some dead code enclosed by #if 0 .... #endif in the file
- common/cmd_i2c.c
- This patch removes the dead code.
+ MX51: Add initial support for the Freescale MX51
- Signed-off-by: Pratap Chandu <pratap.rrke@gmail.com>
+ The patch add initial support for the Freescale i.MX51 processor
+ (family arm cortex_a8).
-commit 64a480601a5614b441de692ae15a62c51e0bb381
-Author: Mike Frysinger <vapier@gentoo.org>
-Date: Wed Nov 11 17:51:56 2009 -0500
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Signed-off-by: Fred Fan <fanyefeng@gmail.com>
- smc91111_eeprom: drop CONFIG stub protection
+commit 18ba012b9b919a7c264dc6299f954d7f53d06605
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Wed Feb 24 19:45:39 2010 +0100
- Since the Makefile now controls the compilation of this, there is no need
- for CONFIG checking nor the stub function.
+ edb93xx: Fix SDRAM initialization
- Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ edb93xx: Fix SDRAM initialization by issuing a precharge all command before
+ forcing the precharge and select mode register update mode before programming
+ the mode registers. Write to the SDRAM banks in order to force a precharge,
+ reading causes the edb93xx boards to hang
-commit f3a7bddc06c927c36a1a99a97131299479ef207a
-Author: Magnus Lilja <lilja.magnus@gmail.com>
-Date: Wed Nov 11 19:56:58 2009 +0100
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
- RTC: Fix return code in MC13783 RTC driver.
+commit cade7d9577d4d17f55404b5e60cd5e5b0b605c31
+Author: Anders Darander <anders.darander@gmail.com>
+Date: Thu Feb 25 15:57:03 2010 +0100
- Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+ Add bootcount to AT91
-commit d52e3e0176a74c30549251e16c5c00a363c544d2
-Author: Magnus Lilja <lilja.magnus@gmail.com>
-Date: Wed Nov 11 19:56:36 2009 +0100
+ Use AT91_GPBR 3 as a bootcount register.
+ The bootmagic and the bootcount shares AT91_GPBR 3.
- cmd_date: Fix spelling in error message.
+ Signed-off-by: Anders Darander <ad@datarespons.se>
- Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+commit 5f353484093876d7021f20fa4bd63f82d32941b9
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Thu Feb 25 12:05:32 2010 -0600
-commit c253122395753abb9e531d8906c5265dc8803fb1
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Wed Nov 11 10:36:28 2009 -0600
+ ARM Update mach-types
- Move do_irqinfo() to common/cmd_irq.c
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
- cmd_irq.c is a much better home and it is already conditionally
- compiled based on CONFIG_CMD_IRQ.
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit aea187c46f7d03ce985e55eb1398d0776a15b928
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
-commit a5dd4dc64fe68e549c5ffcf6a048281b5ba94752
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Wed Nov 11 10:36:19 2009 -0600
+commit c7ad13a24295ded880d7bcd17181df4a5f3bac58
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Wed Feb 24 00:22:09 2010 +0100
- cmd_license: Remove unneeded #ifdef CONFIG_CMD_LICENSE
+ ep93xx: Refactoring of timer code
- cmd_license is already conditionally compiled at the Makefile-level.
+ ep93xx: Refactoring of the timer code, including the following changes
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ * use a free running timer instead of a periodical one
+ * use unsigned long long for total number of ticks
+ * hold the timer state in a structure instead of separate variables
+ * increment the timer counter instead of decrementing it
+ * remove unused function udelay_masked()
+ * remove unused function set_timer()
-commit 06015146a15adc7455440c491d543f6a8091551d
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Mon Nov 9 15:18:52 2009 -0600
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
- m41t11: Remove unused functions
+commit d9f505e3cddbb7afce26dcfe0fd19b207ee57c09
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Wed Feb 24 00:22:00 2010 +0100
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ ep93xx: Fix calculation of sys ticks in clk_to_systicks()
-commit 9ef78511cda39987e5fc10febf386fd19f58ecf7
-Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Mon Nov 9 15:17:50 2009 -0600
+ ep93xx: Use unsigned long long for calculation of sys ticks in clk_to_systicks()
+ for proper handling of large intermediate values
- circbuf: Move to lib_generic and conditionally compile
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
- circbuf could be used as a generic library and is only currently
- needed when CONFIG_USB_TTY is defined.
+commit 041d42e789aba20296ffcde92173f100a9592880
+Author: Siarhei Siamashka <siarhei.siamashka@gmail.com>
+Date: Tue Feb 23 23:56:36 2010 -0500
- Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ OMAP3: workaround for ARM Cortex-A8 erratum 725233
-commit 604f7ce55ad74694ef8743ad2e99933dc0265e46
-Author: Sanjeev Premi <premi@ti.com>
-Date: Mon Nov 9 22:43:00 2009 +0530
+ 725233: PLD instructions executed with PLD data forwarding
+ enabled can result in a processor deadlock
- Fix build failure in examples/standalone
+ This deadlock can happen when NEON load instructions are used together
+ with cache preload instructions (PLD). The problematic conditions
+ can be triggered in-the-wild by NEON optimized functions from pixman
+ library (http://cgit.freedesktop.org/pixman), which perform dynamic
+ adjustment of prefetch distance.
- Some versions of 'make' do not handle trailing white-spaces
- properly. Trailing spaces in ELF causes a 'fake' source to
- be added to the variable COBJS; leading to build failure
- (listed below). The problem was found with GNU Make 3.80.
+ The workaround disables PLD data forwarding by setting PLD_FWD bit
+ in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8
+ errata list.
- Using text-function 'strip' as a workaround for the problem.
+ The deadlock can only happen on r1pX revisions of Cortex-A8 (used in
+ OMAP34xx/OMAP35xx). Performance impact of the workaround is practically
+ non-existant.
- make[1]: Entering directory `/home/sanjeev/u-boot/examples/standalone'
- arm-none-linux-gnueabi-gcc -g -Os -fno-common -ffixed-r8 -msoft-float
- -D__KERNEL__ -DTEXT_BASE=0x80e80000 -I/home/sanjeev/u-boot/include
- -fno-builtin -ffreestanding -nostdinc -isystem /opt/codesourcery/2009q1-
- 203/bin/../lib/gcc/arm-none-linux-gnueabi/4.3.3/include -pipe -DCONFIG_
- ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5
- -Wall -Wstrict-prototypes -fno-stack-protector -g -Os -fno-common -ff
- ixed-r8 -msoft-float -D__KERNEL__ -DTEXT_BASE=0x80e80000 -I/home/sanje
- ev/u-boot/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/co
- desourcery/2009q1-203/bin/../lib/gcc/arm-none-linux-gnueabi/4.3.3/includ
- e -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-inte
- rwork -march=armv5 -I.. -Bstatic -T u-boot.lds -Ttext 0x80e80000 -o .c
- arm-none-linux-gnueabi-gcc: no input files
- make[1]: *** [.c] Error 1
- make[1]: Leaving directory `/home/sanjeev/u-boot/examples/standalone'
- make: *** [examples/standalone] Error 2
- premi #
+ Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Signed-off-by: Sanjeev Premi <premi@ti.com>
+commit 7c966a8bdfdab80cafbfed035d7ae6ea6f58f756
+Author: Achim Ehrlich <aehrlich@taskit.de>
+Date: Wed Feb 24 10:29:16 2010 +0100
- Fixed typo (s/ElF/ELF/).
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+ ARM change name of defines for AT91 arm926ejs
-commit af860962b544ddf323c4ff68454f00d31e44df0a
-Author: Becky Bruce <beckyb@kernel.crashing.org>
-Date: Wed Nov 4 18:30:08 2009 -0600
+ Configuration defines should be preceeded with CONFIG_SYS_. Renamed
+ some at91 specific defines to conform to this naming convention:
- 85xx: Remove unused CONFIG_ASSUME_AMD_FLASH from config files
+ AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME
+ AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK
- A bunch of the 85xx boards have this cruft in them - it's not used
- anywhere. Delete it.
+ Signed-off-by: Achim Ehrlich <aehrlich@taskit.de>
- Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+commit 5c97a1de196fdcbe9d098948ecf4fccfbea23b78
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Wed Feb 17 21:29:45 2010 -0500
-commit deec1fbd4f704dded2e668bb9e368631981ea139
-Author: Wolfgang Denk <wd@denx.de>
-Date: Wed Dec 2 22:26:30 2009 +0100
+ VoiceBlue: fix linker errors
+
+ linking eeprom with libgeneric.a is not really needed and causes following
+ error:
+ ../../lib_generic/libgeneric.a(string.o): In function `strcmp':
+ /home/ladis/src/u-boot-ti/lib_generic/string.c:152: multiple definition of `strcmp'
+ ../../examples/standalone/libstubs.a(stubs.o):include/_exports.h:24: first defined here
+ make[1]: *** [eeprom.srec] Error 1
+
+ Fix undefined reference to memset generated by some versions of gcc
+ to zero out initialized structure on the stack:
+ eeprom.o: In function `eeprom':
+ board/voiceblue/eeprom.c:152: undefined reference to `memset'
+ make[1]: *** [eeprom] Error 1
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit a32c1e0ecd563c65c617b0eb9080a10d286bb0b4
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Wed Feb 17 21:29:39 2010 -0500
+
+ VoiceBlue: limit line lenght to 80 characters
+
+ Reindent configuration header to limit line lenght to 80 characters by
+ removing obvious and sometimes misleading comments.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 779b534385adf0a1efdd8b40dbacae11598575b8
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Wed Feb 17 21:13:53 2010 -0500
+
+ netstar.h: do not exceed 80 columns
+
+ Limit line length to 80 characters mostly by removing obvious and sometimes
+ misleading comments. Fix indentation, too.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 3fca29294abd73915de2bd0fcf2650e03cc9becc
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Wed Feb 17 21:09:21 2010 -0500
+
+ DaVinci: Adding entry to MAKEALL for DM365 EVM
+
+ The patch adds an entry for the DM365 EVM to MAKEALL
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 37cffdad06af5a4538dd090794f213292135adbc
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Wed Feb 17 20:37:24 2010 -0500
+
+ da830evm: Add support for TI EMAC
+
+ Adds support for ethernet networking on the da830evm platform.
+
+ This platform uses an SoC EMAC interface and a 3 port ethernet
+ switch as a PHY with an RMII interface. The PHY also has a i2c
+ interface for configuring the switch functions.
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit d8775d03f3f0116241cfb45c7ef27fd080904c4a
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Mon Feb 8 14:19:06 2010 -0500
+
+ NetStar: make mtdparts default ready for recent kernels
+
+ Recent kernels are using generic NAND and NOR drivers. Change
+ default mtdparts to reflect it.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit de9a1e0d08301ea4925ee137af240424b107a608
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Mon Feb 8 14:17:45 2010 -0500
+
+ NetStar: fix default environment
+
+ Correct switching partitions after upgrade and make it more readable.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 3a67566c1def7d2eb935b31b3b282ba893c3f330
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Mon Feb 8 14:15:47 2010 -0500
+
+ NetStar: eeprom - fix linker error
+
+ linking eeprom with libgeneric.a is not really needed and causes following
+ error:
+ ../../lib_generic/libgeneric.a(string.o): In function `strcmp':
+ lib_generic/string.c:152: multiple definition of `strcmp'
+ ../../examples/standalone/libstubs.a(stubs.o):include/_exports.h:24: first defined here
+ Remove eeprom linker script as well and generate entry point object
+ (to start application by jumping on its beginning) on the fly.
+ Out-of-tree build tested as well.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 308d463eaf6f4ada00193306a6e643298d1990d8
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Mon Feb 8 14:15:43 2010 -0500
+
+ NetStar: eeprom - be less verbose
+
+ Use shorter yet descriptive messages, replace printf() with
+ puts() where appropriate. This saves few bytes.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit b29ff6277239f5c8bc9366e74afac5a36ab3b23e
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Mon Feb 8 14:15:15 2010 -0500
+
+ NetStar: eeprom - undefined reference to `memset'
+
+ Defining partially initialized struct eth_device on stack means
+ gcc has to zero out it, and some gcc versions optimize this with
+ an implicit call to memset. Move definition to data section
+ to avoid that (it has also nice side effect that we need not
+ to pass it to helper functions anymore)
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 8f9a221045a4ace14fe006e1353c593619d1001a
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Tue Mar 2 10:59:19 2010 +0100
+
+ ] fix monitor protection for CONFIG_MONITOR_IS_IN_RAM
+
+ For platforms with flash below ram addresses, the current check to
+ activate monitor protection is wrong/insufficient. This patch fixes
+ CONFIG_MONITOR_IS_IN_RAM for these systems by adding a check for
+ this configuration.
+
+ Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c7de810c79a00aa6fc08900ee0bb57bd295db733
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Tue Mar 2 10:59:20 2010 +0100
+
+ allow MCF532x to use CONFIG_MONITOR_IS_IN_RAM
+
+ CONFIG_MONITOR_IS_IN_RAM is broken for MCF532x. This patch fixes this
+ by conditionally
+ - removing the vector table at the beginning of code
+ - not overwriting the vector base register
+ - removing the code to re-set the PLL, which effectively disables
+ SDRAM access
+
+ Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
+
+commit bb907ab51fd04255923b7ecf9dab352078808351
+Author: Richard Retanubun <RichardRetanubun at RuggedCom.com>
+Date: Mon Oct 26 14:19:17 2009 -0400
+
+ MCF5271-only: Added a weak board_reset function to allow custom reset
+
+ This patch adds a board_reset function to allow boards to specify
+ their own custom reset sequence (e.g. resetting by timing out watchdog).
+ Tested only on MCF5271, can be expanded if needed.
+
+ Based on Mike Frysinger's suggestion on:
+ http://article.gmane.org/gmane.comp.boot-loaders.u-boot/70304
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun at RuggedCom.com>
+
+commit 992d7129500d239d684c15fa2d61e0a8f2e64457
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Wed Oct 28 15:11:00 2009 -0500
+
+ MCF532x: make icache_enable use CONFIG_SYS_SDRAM_SIZE
+
+ in cpu/mcf532x/start.S, the function icache_enable enables the cache for
+ a fixed 32MB region starting at the SDRAM start address; this patch
+ changes the function to cover the region defined by CONFIG_SYS_SDRAM_SIZE
+
+ Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
+
+commit 870bf3ee60320b58f8970ffe3ddebda0e8ac62f7
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Wed Dec 9 17:32:12 2009 -0500
+
+ add include/asm-m68k/unaligned.h
+
+ lib_generic/zlib.c needs include/asm/unaligned.h since commit
+ cd514aeb996e2f7aefbe1f78481965d9d074aed4, which broke compilation for
+ Coldfire/M68K. This patch adds the missing header for these
+ architectures.
+
+ Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
+
+commit da5e083590bb62ca6d7f08d3714d07ba736da863
+Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Mon Feb 8 11:50:16 2010 +0900
+
+ sh: Add asm/unaligned.h and asm/unaligned-sh4a.h from Linux kernel
+
+ zlib.c demands asm/unaligned.h. But, SH does not have these.
+ This commit add asm/unaligned.h and asm/unaligned-sh4a.h from Linux
+ kernel and modifyf for u-boot.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit fe389da6ae739816879606ecde4ab25f4292377d
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Mar 1 11:10:17 2010 -0600
+
+ mpc83xx: fix out-of-tree mpc8315 nand build
+
+ commit 2e95004deb6e33e33bf1b8a92a38cd2115bac4c2 "mpc83xx: Add NAND boot support
+ for MPC8315E-RDB boards" symlinked nand_spl/board/freescale/mpc8315erdb to
+ mpc8313erdb in order to not duplicate code.
+
+ Since the main makefile builds nand_spl/board/$(BOARDDIR) (which makes sense),
+ and the board Makefile and linker script are the only two necessary files
+ to enable out-of-tree building, and other boards have duplicated nand makefiles
+ (e.g. 8536ds & 8569mds), it only seems prudent to copy these two files in the
+ name of the 8315 too.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+ Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Cc: Wolfgang Denk <wd@denx.de>
+
+commit 4e7e12dfa103cb8ec6dc7547dd1c9976337dc1fd
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Feb 22 19:39:16 2010 -0600
+
+ mpc83xx: vme8349: fix incorrect BR0_PRELIM port size comment
+
+ commit 98d92d8c9f4021629a45261ad5ec3f3595f3a27a "sbc8349: fix incorrect
+ comment" missed this one.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 87800f72414b830756aefc757dd191688febacf9
+Author: Eugene O'Brien <eugene.g.obrien@gmail.com>
+Date: Wed Feb 24 14:10:24 2010 -0500
+
+ ppc4xx: Corrected EBC register bit definitions
+
+ Corrected the bit field positions of the external master priority low
+ and the external master priority high values in the EBC configuration
+ register. These bit field positions differ between PPC405 and PPC440
+ processors
+
+ Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f3651764e57e353251695691677bd95ba5a420bc
+Author: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+Date: Mon Feb 22 22:49:06 2010 +0100
+
+ cmd_itest.c: fix pointer dereferencing
+
+ fix pointer dereferencing
+ if the size is .b and .w an 8 or 16 bit access is done.
+
+ Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+ Acked-by: Detlev Zundel <dzu@denx.de>
+
+commit 0ad22703f06af5fe100cfe6f08b1f32ea89cd5b1
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Feb 22 19:37:56 2010 -0600
+
+ tools: fix imximage warning
+
+ Fix build warning:
+
+ Configuring for MPC837XEMDS board...
+ imximage.c: In function `imximage_parse_cfg_file':
+ imximage.c:146: warning: passing argument 2 of `getline' from incompatible pointer type
+ /usr/include/bits/stdio.h:116: note: expected `size_t *' but argument is of type `uint32_t *'
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5b28e913f4519870ad2ca06cd7845b053f78bf0f
+Author: Stefano Babic <sbabic@denx.de>
+Date: Fri Feb 5 15:16:02 2010 +0100
+
+ mkimage: SEGFAULT with imximage on 64 bit systems
+
+ Running mkimage to generate an imximage produces a SEGFAULT
+ on 64 bit machines due to pointer arithmetic limited to 32 bit.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit ecd1a09b81f2ed6e6ba7bd1d0bfb0cc3d0ea2ad0
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Feb 18 19:28:12 2010 -0600
+
+ mpc83xx: remove hardcoded network addresses from config files
+
+ and avoid e.g., two identical boards from causing random networking
+ conflicts when hooked up to the same network.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 4c006dd1501283eecaea813a0e5e225e9ee6fdeb
+Author: Michael Zaidman <michael.zaidman@gmail.com>
+Date: Mon Feb 15 10:02:32 2010 +0200
+
+ Bug: do_reset issued via netconsole does not reset mpc83xx cpu.
+
+ The do_reset routine in the cpu/mpc83xx/cpu.c file does not reset
+ the mpc83xx cpu when issued via netconsole.
+
+ Moving the console output "resetting the board." to the beginning of
+ the routine before disabling interrupts solved the problem.
+
+ Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
+ Acked-by: Detlev Zundel <dzu@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 77e7273c40315abd2f3c17ad8d46a78950e3e65f
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:48:09 2010 +0100
+
+ new board (eb_cpux9k2)
+
+ * new board (eb_cpux9k2)
+ * support for EB+CPUx9K2 board by BuS Elektronik GmbH & Co. KG
+ * select via make eb_cpux9k2_config
+ * this also demonstrates, how to use boards with AT91RM9200 cpu
+ in at91 arch tree
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 6799a80f7644d78988187390dfd37352f20ad710
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:47:57 2010 +0100
+
+ new at91_emac network driver (NET_MULTI api)
+
+ * add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
+ * enable driver with CONFIG_DRIVER_AT91EMAC
+ * generic PHY initialization
+ * modify AT91RM9200 boards to use NET_MULTI driver
+ * the drivers has been tested with LXT971 Phy and DM9161 Phy at MII and RMII
+ interface
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 98250e8e17fc76b3981708c6e63d41f875bf0359
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:47:35 2010 +0100
+
+ prepare joining at91rm9200 into at91
+
+ * prepare joining at91 and at91rm9200
+ * add modified copy of soc files to cpu/arm920t/at91 to make
+ possible to compile at91rm9200 boards in at91 tree instead
+ of at91rm9200
+ * add header files with c structure defs for AT91 MC, ST and TC
+ * the new cpu files are using at91 c structure soc access
+ * please read README.soc-at91 for details
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 1b34f00c28a3023693d9b31e7bd1a9212af8352f
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:47:18 2010 +0100
+
+ update at91sam9263ek board to new SoC access
+
+ * convert at91sam9263ek board to use c stucture SoC access
+ * change gpio access to at91_gpio syntax
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 0cf0b93161beb3f3ed5e37e6112aedf15da17e8a
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:46:58 2010 +0100
+
+ convert common files to new SoC access
+
+ * add's a warning to all files, which need update to new SoC access
+ * convert common files in cpu/../at91 and a lot of drivers to use
+ c stucture SoC access
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 7f9e8633ac9c846e7e4f867507cbd5de1bd99e0c
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:46:46 2010 +0100
+
+ convert all at91 files to use at91_gpio driver syntax
+
+ * convert all files cpu/../at91 to use at91_gpio driver syntax
+ * change AT91_PINP([A-F])(\d+) to AT91_PIO_PORT\1, \2
+ this makes all 160 AT91_PINPxxx defines obsolete
+ * AT91_PINPxxx defines and gpio.h can be remove, if all boards converted to new SoC access
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit ea8fbba73184a40437bdeccd888cf448d5f1105e
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:46:16 2010 +0100
+
+ add a new AT91 GPIO driver
+
+ * add a real AT91 GPIO driver instead of header inline code
+ * resolve the mixing of port and pins
+ * change board config files to use new driver
+ * add macros to gpio to realize backward compatibility
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 5d8e359c38d3ab80015e47d0cab792efe75cacf9
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:46:01 2010 +0100
+
+ add c structures for SoC access
+
+ * add's c structures for SoC access to pheriperials head files
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 425de62d40f84524b90e776b141b060cd438a9fe
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Wed Feb 3 22:45:42 2010 +0100
+
+ add new CONFIG_AT91_LEGACY
+
+ * add's the new temporary CONFIG_AT91_LEGACY to all board configs
+ This will need for backward compatiblity, while change the SoC access
+ to c structures. If CONFIG_AT91_LEGACY is defined, the deprecated
+ SoC is used.
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+
+commit 3a4e43921d2599453ea87c623099e5f347c9e54a
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Mon Feb 8 11:36:16 2010 -0500
+
+ DA830 EVM: Enable NAND support on Spectrum Digital EVM
+
+ The EVM UI extender card has a NAND device. This change will enable
+ saveenv to work with NAND and Linux to be booted using:
+
+ mtdparts default
+ nboot kernel
+ bootm
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 6228e6389e5ef472d5f43cc5ec4f309323305638
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Mon Feb 8 11:34:58 2010 -0500
+
+ Davinci: Add EMIF-A macros for setting chip select parameters
+
+ The patch adds EMIF-A macros for setting chip select parameters
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit b74064a0e2984a166e3575852f3697ef5595a97b
+Author: Sanjeev Premi <premi@ti.com>
+Date: Mon Feb 8 11:33:25 2010 -0500
+
+ OMAP3: Avoid re-write to PRM_CLKSRC_CTRL
+
+ In function get_osc_clk_speed(), do not change/ update
+ the divider for SYS_CLK as it can has cascading effect
+ on the other derived clocks.
+
+ Sudden change in divider value can lead to inconsistent
+ behavior in the system - often leading to crashes.
+
+ The problem was found when working with OMAP3EVM using
+ DM3730 processor card.
+
+ The patch has been tested with OMAP3530 on OMAP3EVM as
+ well
+
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+ Signed-off-by: Hiremath Vaibhav <hvaibhav@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit eff536befd3efab538bba10bad07ecff63c9f470
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Tue Feb 9 22:05:39 2010 +0100
+
+ SPI: Fix 32 bit transfers in mxc_spi.c
+
+ Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI
+ driver for shorter than 32 bit" broke 32 bit transfers. This patch
+ makes single 32 bit transfer work again.
+
+ Transfer lengths that are known not to work will abort and print
+ an error message.
+
+ Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to
+ the MC13783/ATLAS chip (using the 'date' command).
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit 39a9142203e610bf2b1a216085e374277fd28f9f
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date: Sat Feb 6 20:54:05 2010 +0100
+
+ edb93xx: enable the uart in devicecfg register
+
+ printf goes to uart1, but it will block forever waiting for
+ busy to go off unless the uart is enabled first.
+
+ Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+
+commit 822bd70db49773b4d57eaa484dca83386a6b3479
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date: Sat Feb 6 20:53:54 2010 +0100
+
+ edb93xx: change calculation un early_udelay.h
+
+ Previous code compiled with gcc-4.2.2 makes a call to
+ __aeabi_uidiv to divide by 20. As a side effect it was
+ not inline any more, and so sdram_cfg used the stack
+ as well, but this is early code that has no stack yet.
+ The patch explicitly removes the division, so no stack is used.
+
+ The calculation of the counter calls a division by 20
+
+ Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+
+commit c50a0f503967d435150bbb9f2f816ce33afdf231
+Author: Alessandro Rubini <rubini-list@gnudd.com>
+Date: Sat Feb 6 20:53:43 2010 +0100
+
+ EP93xx: fix syscon_regs definition
+
+ The structure was missing a reserved entry (not listed in the manual,
+ actually), so the last registers had a wrong offset. This prevented
+ all swlocked registers to be modified as swlock is last in the structure.
+
+ Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+
+commit fcfb632bd1e9de645b015cf73a78183c299743d8
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Mon Feb 1 21:29:39 2010 +0100
+
+ ARM: Add support for EP93xx SoCs
+
+ Add support for the Cirrus EP93xx platform
+
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+ Acked-by: Tom <Tom.Rix@windriver.com>
+
+commit cf3c142ee4be0f077f8b84593f1b24b35d14039e
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Mon Feb 1 21:29:48 2010 +0100
+
+ Add support for EDB93xx boards
+
+ Added support for the following EDB93xx boards:
+
+ EDB9301
+ EDB9302
+ EDB9302A
+ EDB9307
+ EDB9307A
+ EDB93012
+ EDB9315
+ EDB9315A
+
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+
+commit d798e27b14543762f9f5d0561a3430c7f9e2153b
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Wed Jan 27 11:12:28 2010 -0500
+
+ NetStar: Remove debug junk leaked into eeprom utility
+
+ This patch removes debug junk leaked into eeprom utility.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 89e94d81eda9af2e1c35e97125b0c049335c70fc
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Wed Jan 27 11:12:23 2010 -0500
+
+ NetStar: make crcit utility more readable
+
+ This patch makes the crcit utility more readable
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 3843e7dc934d8ef7c592f5a2106885efe32eac7f
+Author: Ladislav Michl <Ladislav.Michl@seznam.cz>
+Date: Wed Jan 27 11:12:08 2010 -0500
+
+ NetStar: Disable CONFIG_CMD_JFFS2
+
+ This patch removes "CONFIG_CMD_JFFS" from the board config
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 632e1d9014848ec8d983a629c2e35b4423816336
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Wed Jan 27 11:11:55 2010 -0500
+
+ OMAP3 Move declaration of gpmc_cfg.
+
+ Every omap3 board config file declared the global variable gpmc_cfg.
+ This changes moves the declaration to a better location in the
+ arch dependent header file cpu.h.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 093d6018cf0a8dae614c2924c0013d97e2a48662
+Author: Scott Ellis <scott@jumpnowtek.com>
+Date: Wed Jan 27 11:11:46 2010 -0500
+
+ Overo GPMC registers
+
+ Use appropriate GPMC timings for the LAN9221 controller on the
+ Gumstix Overo expansion boards not the values in arch-omap3/mem.h
+ which are for a different ethernet controller.
+
+ Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 63a47dfd07536e399665ca7504bac512bf21491e
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Wed Jan 27 11:11:28 2010 -0500
+
+ da830evm: Use table driven pin mux configuration
+
+ Tidyup the pin muxer configuration using the Davinci table driven
+ pinmux configuration function and data tables.
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 8ed5885693b39c5c2cca5574dd98d6ad8a982702
+Author: Sekhar Nori <nsekhar@ti.com>
+Date: Wed Jan 27 11:10:40 2010 -0500
+
+ TI DaVinci: Driver for the davinci SPI controller
+
+ This adds a driver for the SPI controller found on davinci
+ based SoCs from Texas Instruments.
+
+ Signed-off-by: Sekhar Nori <nsekhar@ti.com>
+ Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 44d80256229d05862622f4dd886466fd70fe04ae
+Author: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+Date: Mon Jan 25 10:50:41 2010 +0100
+
+ at91: Add esd gmbh OTC570 board support
+
+ This patch adds support for esd gmbh OTC570 board.
+ The OTC570 is based on an Atmel AT91SAM9263 SoC.
+
+ Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+
+commit e39bf1e2a9e437174687de687c127ec980a93eeb
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Feb 8 15:30:16 2010 -0500
+
+ kgdb: cpu/mpc* cpu/74xx: include kgdb.h when needed
+
+ Commit cbb0cab1d929839d broke some platforms which used kgdb code but
+ didn't actually include kgdb.h. So include kgdb.h in all the relevant
+ traps code.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ab5a0dcb9c8f19e351fc33c5db91469bfb1d9438
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 2 13:43:48 2010 +0100
+
+ net: Use 0.5 sec timeout in miiphy_reset() instead of counting loop
+
+ This patch fixes a problem I've notived on a buggy PPC4xx system. This
+ system has problems with the PHY MDIO communication and seemed to be
+ stuck/crashed in miiphy_reset(). But degugging revealed, that the CPU
+ didn't crash, but "only" hung in this counting loop for about 2 minutes.
+
+ This patch now uses a real timeout of 0.5 seconds (as mentioned in the
+ comment in miiphy_reset).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 4294b2485bf0e8d68c893190a96bb0e7856b12c4
+Author: Stefano Babic <sbabic@denx.de>
+Date: Mon Feb 1 14:51:30 2010 +0100
+
+ fec_mxc: add support for MX51 processor
+
+ The patch add support for the Freescale mx51 processor
+ to the FEC ethernet driver.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e66b19ce6dbe6f91b18ba47273cbe89eb5a80e78
+Author: Siddarth Gore <gores@marvell.com>
+Date: Tue Jan 19 11:09:07 2010 +0530
+
+ NET: kirkwood-egiga smi access fix
+
+ Although the datasheet mentions seperate smi registers for each
+ port, using Port 1 smi register to access ethernet phys does not
+ work. Hence only Port 0 smi register should be used to access all
+ devices connected to the smi bus. This behavior is consistant with
+ the mv643xx driver in the linux kernel.
+
+ Signed-off-by: Siddarth Gore <gores@marvell.com>
+ Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit a1b322a98319de568b3bc38029ef7e123643c1e8
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Mon Feb 1 23:34:25 2010 +0100
+
+ ns16550: kick watchdog while waiting for a character
+
+ ns16550 busyloops waiting for incoming byte causing watchdog to reboot
+ while waiting for a key press. A call to WATCHDOG_RESET in NS16550_getc
+ loop fixes it.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+
+commit 84d36b30181acfb72f22d1105c15574b30ea2fa1
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Mon Feb 1 19:40:47 2010 +0100
+
+ USB: usb_control_msg wait for driver ISR to set status.
+
+ This patch changes usb_control_msg back to the state prior to commit
+ 48867208444cb2a82e2af9c3249e90b7ed4a1751.
+
+ The USB driver ISR routine may update the status.
+
+ Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
+
+commit 6e20e64f5c6deb5b48e40a0cba4877f9170545e0
+Author: Prathap Srinivas <msprathap@ti.com>
+Date: Mon Jan 11 15:36:46 2010 +0530
+
+ musb: Add host support for DM365 EVM
+
+ Add support for musb host on DM365 EVM.
+
+ Signed-off-by: Prathap Srinivas <msprathap@ti.com>
+
+commit ec2aadb40855cecb088b68c062e3534d6ce39128
+Author: Cliff Cai <cliff.cai@analog.com>
+Date: Tue Jan 19 00:10:42 2010 -0500
+
+ usb: musb: fix Blackfin DMA register padding
+
+ The conversion from offsets to C structs lost a little padding in the DMA
+ register map. Accessing endpoints other than ep0 with DMA would fail as
+ the addresses wouldn't be adjusted correctly.
+
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d0750bc9e5932baf4c90eda2456106f21a26bdc1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Feb 1 11:36:29 2010 +0100
+
+ EXBITGEN: drop support for unmaintained board
+
+ The EXBITGEN board has not been maintained for a long time; it has
+ build problems, but no hardware is available any more for testing.
+
+ Drop support for this board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 9461a939cabd606d7f0e9b8490b40841af104ff5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jan 31 22:03:15 2010 +0100
+
+ mpc5xxx/cpu_init.c: fix warning: unused variable 'cdm'
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Detlev Zundel <dzu@denx.de>
+
+commit 13d8bfe26c0dd2c08b76c5f077e800a718859bbc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jan 31 21:58:48 2010 +0100
+
+ mpc5xxx/cpu_init.c: fix warning: unused variable 'gpt0'
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Detlev Zundel <dzu@denx.de>
+
+commit 4710cee1b5292fe077a67cc23193cc43060fbe3d
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Mon Feb 1 13:54:09 2010 +0100
+
+ ppc4xx: Remove unused feature from AR405 board
+
+ This patch fixes building for AR405 boards by remove an unused feature.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 976c21ad8e136df0ec361aca0c4bc287c5637c01
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Mon Feb 1 13:53:59 2010 +0100
+
+ ppc4xx: Fix building for PLU405 boards
+
+ The init_coupler() function from board/esd/plu405/plu405.c
+ got lost somehow! This patch readds it.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 59c1db6dab52b981e6ea25a203d0a919ede61ed2
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Mon Feb 1 13:53:47 2010 +0100
+
+ ppc4xx: Fix building of PMC440 board
+
+ Remove some unused features and default environment variable
+ to shrink the PMC440 u-boot.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6f6c26e430ffae87b6b3d74ba7cbf9439703feea
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 26 13:33:29 2010 +0100
+
+ ppc4xx: Fix compilation error on ML2 board
+
+ Recently this compilation error occurs:
+
+ Configuring for ML2 board...
+ traps.c: In function 'MachineCheckException':
+ traps.c:159: error: 'debugger_exception_handler' undeclared (first use
+ in this function)
+ traps.c:159: error: (Each undeclared identifier is reported only once
+ traps.c:159: error: for each function it appears in.)
+
+ This patch now fixes it by including kgdb.h
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f3dec798d9ebf7f17c11ec7671b979ce3d251955
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Thu Jan 28 12:27:14 2010 +0100
+
+ CFI: fix eraseregions numblocks
+
+ eraseregions numblocks was sometimes one less than actual, possibly producing
+ erase regions with zero blocks. As MTD code touches eraseregions only if
+ numeraseregions is greater that zero, allocate eraseregions only for non
+ uniform erase size flash.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c041e9d212162f6c85cd3b6a40ad6ba9d9292451
+Author: Jens Scharsig <js_at_ng@scharsoft.de>
+Date: Sat Jan 23 12:03:45 2010 +0100
+
+ new at91_emac network driver (NET_MULTI api)
+
+ * add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
+ * enable driver with CONFIG_DRIVER_AT91EMAC
+ * generic PHY initialization
+ * modify AT91RM9200 boards to use NET_MULTI driver
+ * the drivers has been tested with LXT971 Phy and DM9161 Phy at
+ MII and RMII interface
+
+ Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 594d57d0ccce649d6ccd881b8d9c5ea8d0c307ef
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Sun Jan 31 17:39:49 2010 +0100
+
+ Add EP93xx ethernet driver
+
+ Added ethernet driver for EP93xx SoCs
+
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 582c55a0274f38e6e7e35b95e7ab81d3e912f700
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Jan 20 09:04:28 2010 +0100
+
+ 83xx, uec: split enet_interface in two variables
+
+ There's no sensible reason to unite speed and interface type into
+ one variable. So split this variable enet_interface into two
+ vars: enet_interface_type, which hold the interface type and speed.
+
+ Also: add the possibility for switching between 10 and 100 MBit
+ interfaces on the fly, when running in FAST_ETH mode.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d7e354374c8eb0a5d8b8226b881c5ee276c77a60
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Fri Dec 18 13:33:07 2009 +0000
+
+ TI: DaVinci: Updating EMAC driver for DM365, DM646x and DA8XX
+
+ The EMAC IP on DM365, DM646x and DA830 is slightly different
+ from that on DM644x. This change updates the DaVinci EMAC driver
+ so that EMAC becomes operational on SOCs with EMAC v2.
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 0f751d6ef3e6fb1d28ac272c39c34831d629a59e
+Author: Semih Hazar <semih.hazar@indefia.com>
+Date: Thu Dec 17 15:07:15 2009 +0200
+
+ macb: Fix mii_phy_read and mii_phy_write functions
+
+ Enabling CONFIG_CMD_MII in AVR32 boards was not possible due to
+ compile errors.
+
+ This patch fixes miiphy_read and miiphy_write functions and
+ registers them properly.
+
+ Signed-off-by: Semih Hazar <semih.hazar@indefia.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 5f6b1442218fcb6a3ef0d2be05d84119cebfe0ae
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 13:09:48 2009 -0600
+
+ tsec: Add TSEC_FIBER flag
+
+ The TSEC_FIBER flag should be set when a PHY is operating with an
+ external fiber interface. Currently it is only used to notify a user
+ that the PHY is operating in fiber mode.
+
+ A short description was also added to the other TSEC flag defines so
+ that it is clear how they differ from one another.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 8abb8dcc8d6f2a9e31551a6fa41de97bd1f15350
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 13:09:47 2009 -0600
+
+ tsec: Add support for using the BCM5482 PHY in fiber mode
+
+ The BCM5482 PHY supports both copper and fiber as an ethernet medium.
+ By enabling its copper/fiber mode auto-detection feature it can
+ dynamically determine if it should be configured for copper or fiber.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c6dbdfda5393c155bb13a90d9d6be4fe75ec3498
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 13:09:46 2009 -0600
+
+ tsec: General cleanup
+
+ - Cleanup formatting of phy_info structures
+
+ - Fix lines > 80 chars
+
+ - Fix some random indentation inconsistencies
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit e1957ef02c0d949c27f7386e5fa509a57e033d5a
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 13:09:45 2009 -0600
+
+ tsec: Make functions/data static when possible
+
+ This is generally good practice and saves ~150 bytes.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 27165b5c328464b706601b1cd586e359a3dc2f6d
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 13:09:44 2009 -0600
+
+ tsec: Clean up Broadcom PHY status parsing
+
+ - Remove unnecessary printing "Enet starting in <speed>/<duplex>"
+ This same information is already printed during normal ethernet
+ operation in the form "Speed: 1000, full duplex".
+
+ - Add a check for link before determining link speed and duplex
+ If there is no link, speed/duplex don't matter. This also removes
+ the annoying and unneeded "Auto-neg error, defaulting to 10BT/HD"
+ message that occurs when no link is detected.
+
+ - Whitespace and line > 80 characters cleanup
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Nov 3 17:52:07 2009 -0600
+
+ tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
+
+ In SGMII mode the link between a processor's internal TBI PHY and an
+ external PHY should always be 1000Mbps, full duplex. Also, the SGMII
+ interface between an internal TBI PHY and external PHY does not
+ support in-band auto-negotation.
+
+ Previously, when configured for SGMII mode a TBI PHY would attempt to
+ restart auto-negotation during initializtion. This auto-negotation
+ between a TBI PHY and external PHY would fail and result in unusable
+ ethernet operation.
+
+ Forcing the TBI PHY and and external PHY to link at 1000Mbps full duplex
+ in SGMII mode resolves this issue of auto-negotation failing.
+
+ Note that 10Mbps and 100Mbps operation is still possible on the external
+ side of the external PHY even when SGMII is operating at 1000Mbps.
+ The SGMII interface still operates at 1000Mbps, but each byte of data
+ is repeated 100 or 10 times for 10/100Mbps and the external PHY handles
+ converting this data stream into proper 10/100Mbps signalling.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 76771e595aa2640da8c7b5ea81bd9583ccdab8a1
+Author: Seunghyeon Rhee <seunghyeon@lpmtec.com>
+Date: Mon Nov 2 00:00:00 2009 -0800
+
+ NET: Fix MAC addr handling for smc911x
+
+ This patch turns off MAC address mismatch warning when
+ optional eeprom programmed with MAC address is not available.
+ In that case, smc911x's MAC address register has its default
+ value ff:ff:ff:ff:ff:ff and it's not a valid address. This
+ makes eth_initialize() show the warning which has no
+ meaningful information while environment variable ethaddr
+ overrides the address read from the register. If there's no
+ eeprom and the value of MAC address register is not valid
+ after initialization, dev->enetaddr had better not be updated
+ and maintain its initial value 00:00:00:00:00:00, which I
+ think is what eth_initialize() expects. This is not a bug fix.
+ Even without this patch, the driver works fine. It's just for
+ enhancing the way of displaying messages.
+
+ Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 07c966066b977b24f4b08b1684eed130f463b4c6
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Thu Jan 21 22:16:34 2010 +0100
+
+ cs8900_initialize() cleanup
+
+ cs8900_initialize(): remove unecessary calls to free() and fix memory leak
+
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c4168af3ba03c17a73751b98c124bbd2e3e1f5b0
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Jan 21 05:04:59 2010 -0500
+
+ smc91111_eeprom: fix linking error
+
+ Building for a bf533-stamp ends up with this error:
+ smc91111_eeprom.o: In function `smc91111_eeprom':
+ examples/standalone/smc91111_eeprom.c:58: undefined reference to `memset'
+ make[2]: *** [smc91111_eeprom] Error 1
+
+ The new eth_struct definition means gcc has to zero out the structure on
+ the stack, and some gcc versions optimize this with an implicit call to
+ memset. So tweak the structure style to avoid that gcc feature.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 5f566f454750be4f2f83288ef382afcb9c4aa8a4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jan 31 21:51:43 2010 +0100
+
+ cmd_ximg.c: fix error: 'i' undeclared
+
+ Fix compile error:
+
+ cmd_ximg.c: In function 'do_imgextract':
+ cmd_ximg.c:234: error: 'i' undeclared (first use in this function)
+ cmd_ximg.c:234: error: (Each undeclared identifier is reported only once
+ cmd_ximg.c:234: error: for each function it appears in.)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a6e42ed097220a82870a32f4e60ac8863a8b05ab
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Sat Dec 12 21:20:57 2009 +0100
+
+ lcd: remove CONFIG_ATMEL_LCD ifdefs from lcd_setfgcolor
+
+ Not all boards defining LCD_COLOR16 are able to set
+ lcd_color_fg/lcd_color_bg correctly. The issue seems to
+ be caused by CONFIG_ATMEL_LCD ifdefs in lcd_setfgcolor()
+ and lcd_setbgcolor(). Actually, the color values passed
+ to these functions are already correct, we don't need
+ to fix them. So remove ifdefs here.
+
+ Reported-by: Alessandro Rubini <rubini@unipv.it>
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit d841978ea616e661e48f8da4045a71d6217823bd
+Author: Alessandro Rubini <rubini@unipv.it>
+Date: Sat Dec 5 13:39:41 2009 +0100
+
+ include/nomadik.h: add physical address for cldc
+
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+ Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+
+commit 3e446cbdf30221b9ca3a89b0f5abbfc691ce7755
+Author: Alessandro Rubini <rubini@unipv.it>
+Date: Sat Dec 5 13:39:31 2009 +0100
+
+ video: add amba-clcd prime-cell
+
+ This adds support for the CLCD logic cell. It accepts precompiled
+ register values for specific configuration through a board-supplied
+ data structure. It is used by the Nomadik nhk8815, added by a later
+ patch in this series.
+
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+ Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+
+commit b081c2e9b9329d7dadc8d13fc9a2bae5c90a1204
+Author: John Rigby <jcrigby@gmail.com>
+Date: Tue Jan 26 19:24:18 2010 -0700
+
+ Nand mxc_nand add v1.1 controller support
+
+ Add support for version 1.1 of the nfc nand flash
+ controller which is on the i.mx25 soc.
+
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
+ CC: Scott Wood <scottwood@freescale.com>
+
+commit f3bb63a304c4e76010a2a4e99da61f7b6ffffc77
+Author: John Rigby <jcrigby@gmail.com>
+Date: Tue Jan 26 19:24:17 2010 -0700
+
+ Add MX25 support to nand_spl fsl nfc driver
+
+ MX25 has a different version of the fsl_nfc
+ flash controller known as version 1.1.
+
+ Add support to the nand_spl fsl_nfc driver
+
+ Versioning differs from mainline mxc kernel driver
+ no consensus yet on if the naming here and in
+ Redboot or the kernel is "correct".
+
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ CC: Scott Wood <scottwood@freescale.com>
+
+commit ef22b50370f7b6d8deba9e9e64d2cb13c542b647
+Author: John Rigby <jcrigby@gmail.com>
+Date: Mon Jan 25 23:12:52 2010 -0700
+
+ arm926ejs: add nand_spl boot support
+
+ Add CONFIG_PRELOADER/CONFIG_NAND_SPL support for nand booting
+ to arm926ejs/start.S
+
+ This is derived from CONFIG_PRELOADER support in arm1136/start.S
+
+ Signed-off-by: John Rigby <jcrigby@gmail.com>
+ CC: Scott Wood <scottwood@freescale.com>
+
+commit 15b86c3d6c9a5a2e917b73d758a556568430021a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Jan 16 21:50:26 2010 -0700
+
+ env_nand.c: print error message and fail gracefully
+
+ env_nand.c would crash silently if a malloc() for the environment
+ buffers failed; make it print an error message and fail gracefully,
+ i. e. use the default environment then.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: John Rigby <jcrigby@gmail.com>
+
+commit 674ef7bd02de948b6d8757f6a43a6f2fa4d88769
+Author: Liu Yu <yu.liu@freescale.com>
+Date: Mon Jan 18 19:03:28 2010 +0800
+
+ Nand boot: Add nand boot support for MPC8569mds board
+
+ This patch add nand boot support for MPC8569mds board.
+
+ Signed-off-by: Liu Yu <yu.liu@freescale.com>
+
+commit 249d4dec69e8d41ca58fe6cb3c56ea6f0480ef16
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Jan 27 10:16:56 2010 -0600
+
+ Fix compiler warning in imximage.c due to getline prototype
+
+ imximage.c: In function 'imximage_parse_cfg_file':
+ imximage.c:142: warning: implicit declaration of function 'getline'
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a9c3ac78d81d7ff4fe239e292e11e0f78ac5d461
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jan 12 12:56:05 2010 -0600
+
+ 85xx: Add support for 'cpu disable' command
+
+ Support disabling of a core via user command 'cpu disable'.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c894852b7aa2ac5f04ca70a073f803aa665c3ec1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jan 12 11:51:52 2010 -0600
+
+ 86xx: Add support for 'cpu disable' command
+
+ Support disabling of a core via user command 'cpu disable'.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 4194b3668a93eee18dd1f7eb1309ca7b05003aa7
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jan 12 11:42:43 2010 -0600
+
+ Add support to disable cpu's in multicore processors
+
+ Add a disable sub-command to the cpu command that allows for disabling
+ cores in multicore processors. This can be useful for systems that are
+ using multicore chips but aren't utilizing all the cores as a way to
+ reduce power and possibly improve performance.
+
+ Also updated an added missing copyright.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8b1760ed9a35a5fd71d1f64981068ca2979f1e3d
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Jan 20 09:05:32 2010 +0100
+
+ 83xx, kmeter1: fix compile error
+
+ - delete double MTDIDS_DEFAULT and MTDPARTS_DEFAULT
+ defines in board config file.
+ - add mising CONFIG_KM_UBI_PARTITION_NAME define
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5912d3650740468329a0df014109132431d2140d
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Thu Dec 10 10:11:21 2009 +0100
+
+ add ability to handle compressed images to imxtract
+
+ imxtract currently can not handle compressed images. This patch adds
+ handling for bzip2 and zip compression. In both cases, a destination
+ address has to be specified for extraction.
+
+ Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
+
+commit a16e9a5b5f23106665dde15d974db17e8aeb83f1
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Jan 19 14:41:57 2010 +0100
+
+ ppc: remove -ffixed-r14 gcc option.
+
+ This is no loger needed, free up r14 for general usage.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit e6bee80814c3a0d7eab89d28142fe68c4a670f31
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Jan 19 14:41:58 2010 +0100
+
+ ppc: Update README about the new GOT ptr.
+
+ r14 is no longer used as non volatile GOT ptr. Instead
+ the volatile r12 is used so be sure to do GET_GOT in
+ asm code when you need to access global data.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 0f8aa159175385ddd77bc91d11b9568583fbbd0c
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Jan 19 14:41:56 2010 +0100
+
+ ppc: Use r12 instead of r14 as GOT pointer.
+
+ r14 is not supposed to be clobbered by functions. Switch
+ to r12 and call GET_GOT when needed. This will allow u-boot
+ to loose the -ffixed-r14 gcc option.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit fc4e188789b01dc9f18c80869c43fdd7d1a51378
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Jan 19 14:41:55 2010 +0100
+
+ ppc: Loose GOT access in IRQ
+
+ Using the GOT in IRQ handlers requires r14 to be -ffixed-r14.
+ Avoid this by relocatate transfer_to_handler too.
+ This will allow to free up r14 later on.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 66e821ebe96123b3a81ec9ca25cec9c0560fe232
+Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+Date: Thu Jan 7 14:27:14 2010 +0530
+
+ 85xx/p1_p2_rdb: enable hwconfig
+
+ Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 46df64f22c471b010161aa68bfdbfe94ea46e7bd
+Author: Liu Yu <yu.liu@freescale.com>
+Date: Fri Jan 15 14:58:40 2010 +0800
+
+ qe: fixup the snum for MPC8569 Rev2.0
+
+ Since 1.0 and 2.0 use different snum table,
+ we fixup the snum value according to SPRN_SVR.
+
+ Signed-off-by: Liu Yu <yu.liu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0fd2fa6cce6eb91271ebf9733878d0f1fcbc9b32
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Nov 17 20:49:05 2009 +0800
+
+ Fix the local bus divider mapping
+
+ The real clock divider is 4 times of the bits LCRR[CLKDIV],
+ according the latest RevF RM.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c95d541e4b46cb3ba19bf35e34b1dc3ca32f7b4b
+Author: Liu Yu <yu.liu@freescale.com>
+Date: Fri Nov 27 15:31:52 2009 +0800
+
+ ppc/85xx: Add ATM config for MPC8569MDS
+
+ Signed-off-by: Liu Yu <yu.liu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d91803826985bfdf151eed66543ce3b1a301682f
+Author: Liu Yu <yu.liu@freescale.com>
+Date: Fri Nov 27 15:31:51 2009 +0800
+
+ ppc/85xx: Add PIB/ATM support for MPC8569mds
+
+ Signed-off-by: Liu Yu <yu.liu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1118cdbfeb8fc3acfe542d08703153ac188f9dbd
+Author: Li Yang <leoli@freescale.com>
+Date: Thu Jan 7 16:00:13 2010 +0800
+
+ fsl_esdhc: fix wrong clock mask
+
+ Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.
+
+ Signed-off-by: Jin Qing <B24347@freescale.com>
+ Signed-off-by: Li Yang <leoli@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 693416fe01d324472d270ac28389022eb82c7217
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jan 25 11:01:51 2010 -0600
+
+ Revert "ppc/p4080: Fix reporting of PME & FM clock frequencies"
+
+ This reverts commit bc20f9a9527afe8ae406a74f74765d4323f04922.
+
+ The original code was correct. I clearly need glasses or a brown
+ paper bag.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 93cedc71647b4b72ac9b48e11997eb2f91645001
+Author: James Yang <James.Yang@freescale.com>
+Date: Tue Jan 12 15:50:18 2010 -0600
+
+ ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RAT
+
+ The masks for MEM_PLL_RAT and SYS_PLL_RAT should have been 5-bits
+ instead of 4.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 2903ad33a71251a3a87485b5b185852c8998f209
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 8 08:03:06 2010 -0500
+
+ jffs2: fix hangs/crashs when not using CONFIG_JFFS2_PART_SIZE
+
+ Commit b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042 caused the sector_size to
+ be calculated incorrectly when the part size was not hardcoded. This is
+ because the new code relied on part->size but tried to do the calculation
+ before it was initialized properly, and it did not take into consideration
+ the magic SIZE_REMAINING define.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 64b150213365db6be97a98d25884f87d83caacaf
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 8 02:48:03 2010 -0500
+
+ getline: split out for darwin systems
+
+ At least on OS X 10.5 and older, getline does not exist. So split out the
+ function from the mingw code so that we can pull it in for Darwin systems.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit e852d36a1e12864ab0656729c45c846e65efa4ee
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Jan 21 19:59:04 2010 -0500
+
+ tools: give explicit libfdt paths
+
+ The current libfdt object rules hard depend implicitly on the .depend file
+ being correct. If it isn't, then it is unable to properly compile the
+ objects. Give it a full path like all the other implicit rules here so it
+ will always work in face of .depend issues.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 44431cabbb66e81a2d77642b6f7d39c6230ea4ba
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Jan 21 19:30:36 2010 -0500
+
+ gzip/zlib: make features optional
+
+ If you really want to slim down U-Boot and you would rather use a higher
+ compression scheme (like LZMA), it'd be nice to disable gzip/zlib since
+ these code bases take up a significant amount of space.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 8edcde5e4e2e7f6bc7e277011fed71e64fd9d294
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed Jan 20 18:19:10 2010 +0100
+
+ mkimage: Add Freescale imx Boot Image support (imximage)
+
+ This patch adds support for "imximage" (MX Boot Image)
+ to the mkimage utility. The imximage is used on the Freescales's
+ MX.25, MX.35 and MX.51 processors.
+
+ Further details under doc/README.imximage.
+
+ This patch was tested on a Freescale mx51evk board.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit a21fb981d533ac6d323a01c7fa2cda20f2d36de5
+Author: Detlev Zundel <dzu@denx.de>
+Date: Wed Jan 20 14:28:48 2010 +0100
+
+ mpc5xxx: Support CPU internal watchdog.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 82826d5422331e9c99e5408dcf0348c8e0c257a6
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Jan 22 14:47:59 2010 +0100
+
+ mpc512x: Add display of reset status register
+
+ Content of the RSR is put into gd early so we can output it together
+ with the CPU info. The clearing of gd in board_init_f is redundant for
+ this architecture as it is done in cpu_init_f so we remove it.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit a3f3897bfda9b4729785bdd328b3b7f30417a67f
+Author: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+Date: Wed Jan 20 08:00:11 2010 +0100
+
+ at91: Enable slow master clock on meesc board
+
+ Normally the processor clock has a divisor of 2.
+ In some cases this this needs to be set to 4.
+ Check the user has set environment mdiv to 4 to change the divisor.
+
+ Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+
+commit 7da692360414d07027c6cf564a15d79cd9dcf488
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:53 2010 +0530
+
+ SPEAr : Support added for SPEAr320 board
+
+ SPEAr320 SoC support contains basic spear320 support along with the
+ usage of following drivers
+ - serial driver(UART)
+ - i2c driver
+ - smi driver
+ - nand driver(FSMC)
+ - usbd driver
+ - emi driver(cfi support)
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 080cfee71459588fd6312e475bb5115bdbda1cb3
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:52 2010 +0530
+
+ SPEAr : Support added for SPEAr310 board
+
+ SPEAr310 SoC support contains basic spear310 support along with the
+ usage of following drivers
+ - serial driver(UART)
+ - i2c driver
+ - smi driver
+ - nand driver(FSMC)
+ - usbd driver
+ - emi driver(cfi support)
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 4bfacad4e796f2e121ee7432705ecc9c61e7b6ca
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:51 2010 +0530
+
+ SPEAr : emi controller initialization for CFI driver support
+
+ SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface
+ Paraller NOR flashes. This patch adds the support for this IP
+
+ The standard CFI driver is used to interface with NOR flashes
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 7e074158ce239380259c5fc97e87be2896169973
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:50 2010 +0530
+
+ SPEAr : Support added for SPEAr300 board
+
+ SPEAr300 SoC support contains basic spear300 support along with the
+ usage of following drivers
+ - serial driver(UART)
+ - i2c driver
+ - smi driver
+ - nand driver(FSMC)
+ - usbd driver
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit f92994f0f7403b84366ce04e554e461f624e6868
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:49 2010 +0530
+
+ SPEAr : Support for HW mac id read/write from i2c mem
+
+ This patch adds the support to read and write mac id from i2c
+ memory.
+ For reading:
+ if (env contains ethaddr)
+ pick env ethaddr
+ else
+ pick ethaddr from i2c memory
+ For writing:
+ chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id
+ in i2c memory
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 566c9c16fe4e501c3193ae6605bc9c663c6ea706
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:48 2010 +0530
+
+ SPEAr : Support added for SPEAr600 board
+
+ SPEAr600 SoC support contains basic spear600 support along with the
+ usage of following drivers
+ - serial driver(UART)
+ - i2c driver
+ - smi driver
+ - nand driver(FSMC)
+ - usbd driver
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 62db1c0d79f1fd75961eec81edc8c0a1bc1f09a6
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:47 2010 +0530
+
+ SPEAr : usbd driver support for SPEAr SoCs
+
+ SPEAr SoCs contain a synopsys usb device controller.
+ USB Device IP can work in 2 modes
+ - DMA mode
+ - Slave mode
+
+ The driver adds support only for slave mode operation of usb
+ device IP. This driver is used along with standard USBTTY
+ driver to obtain a tty interface over USB on the host
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 165fa406ad8c39c0c32a31476a8a9bda3db72851
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:46 2010 +0530
+
+ SPEAr : nand driver support for SPEAr SoCs
+
+ SPEAr SoCs contain an FSMC controller which can be used to interface
+ with a range of memories eg. NAND, SRAM, NOR.
+ Currently, this driver supports interfacing FSMC with NAND memories
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit a6e34f76c51c8514f1b691fc60394f09ae4fb2ff
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:45 2010 +0530
+
+ SPEAr : smi driver support for SPEAr SoCs
+
+ SPEAr SoCs contain a serial memory interface controller. This
+ controller is used to interface with spi based memories.
+ This patch adds the driver for this IP.
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 2403f8f417b1b94701bb5949903d701f1f414a42
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:44 2010 +0530
+
+ SPEAr : i2c driver support added for SPEAr SoCs
+
+ SPEAr SoCs contain a synopsys i2c controller.
+ This patch adds the driver for this IP.
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 81c0ebf623ddbb6a4da8e051441c83e99a01b00b
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:43 2010 +0530
+
+ SPEAr : Adding basic SPEAr architecture support.
+
+ SPEAr Architecture support added. It contains the support for
+ following SPEAr blocks
+ - Timer
+ - System controller
+ - Misc registers
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit 6fffcdf8c869a3d8436be8eff6428d8121aa76e6
+Author: Vipin KUMAR <vipin.kumar@st.com>
+Date: Fri Jan 15 19:15:42 2010 +0530
+
+ SPEAr : Adding README.spear in doc
+
+ README.spear contains information about SPEAr architecture and
+ build options etc
+
+ Signed-off-by: Vipin <vipin.kumar@st.com>
+
+commit e4c43c20b87d5c9a7ac3b5250ca009311c62945c
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Wed Jan 20 18:00:28 2010 -0600
+
+ ARM Update mach-types
+
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
+
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit 2045124ffd1a5e46d157349016a2c50f19c8c91d
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit bfb6d510e9acbec97e4e1cc855ec1269538689f8
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date: Mon Nov 16 18:29:25 2009 +0530
+
+ Kirkwood: Makefile cleanup- fixed ordering (cosmetic change)
+
+ As per coding guidlines, it is good to maintain proper ordering
+ in the makefiles.
+ This was missed during initial coding, corrected here.
+
+ This was discovered during orion5x code review
+ Thanks to Albert Aribaud for this.
+
+ Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit beca04dd2446fc9ec46ca17163dadb7f82420e7c
+Author: Prafulla Wadaskar <prafulla@marvell.com>
+Date: Thu Dec 24 02:55:23 2009 +0530
+
+ Kirkwood: Upgated licencing for files imported from linux source to GPLv2 or later
+
+ These are few files directly imported from Linux kernel source.
+ Those are not modifyed at all ar per strategy.
+ These files contains source with GPLv2 only
+ whereas u-boot expects GPLv2 or latter
+
+ These files are updated for the same from prior permission from original writes
+
+ Acked-by: Nicolas Pitre <nico@marvell.com>
+ Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
+
+commit d8e5f55475e621e793a15d93e2dd2549c5138735
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Fri Dec 18 15:03:51 2009 +0900
+
+ s5pc1xx: update cache routines
+
+ Because of v7_flush_dcache_all is moved to omap3/cache.S
+ and s5pc110 needs cache routines, update s5pc1xx cache routines.
+
+ l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
+ and invalidate_dcache is modified for SoC specific.
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 17ef9104ae11220979e1870f22dcaf535d9baacf
+Author: Seunghyeon Rhee <seunghyeon@lpmtec.com>
+Date: Thu Dec 3 09:41:49 2009 +0900
+
+ samsung: fix DMC1_MEM_CFG for s3c64xx
+
+ The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
+ for S3C6400. In the configuration of SMDK6400, however, two 16-bit
+ mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
+ memory bus and there is no need to control CKE for each chip
+ separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
+ used. Futhermore, it should be '0' always for S3C6410. When tested
+ with a board which has a S3C6410 and the same memory configuration,
+ a side effect is observed that u-boot command "reset" doesn't work
+ leading to system hang. Leaving the bit clear is safe in most cases.
+
+ Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 9998b1366e7e42089c3f579b4d1d790d3c295387
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 21 11:37:31 2010 +0100
+
+ ppc4xx: Kilauea: Add CPLD version detection and EBC reconfiguration
+
+ A newer CPLD version on the 405EX evaluation board requires a different
+ EBC controller setup for the CPLD register access. This patch adds a CPLD
+ version detection for Kilauea and code to reconfigure the EBC controller
+ (chip select 2) for the old CPLD if no new version is found.
+
+ Additionally the CPLD version is printed upon bootup:
+
+ Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+ Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
+
+commit 97c9f29008579f56c3fb86785f29f04dd4f47f94
+Author: Felix Radensky <felix@embedded-sol.com>
+Date: Sat Jan 23 01:35:24 2010 +0200
+
+ ppc4xx: Fix sending type 1 PCI transactions
+
+ The list of 4xx SoCs that should send type 1 PCI transactions
+ is not defined correctly. As a result PCI-PCI bridges and devices
+ behind them are not identified. The following 4xx variants should
+ send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.
+
+ Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 57ae8a5cced612088104303777e71a3dc89c00ef
+Author: Detlev Zundel <dzu@denx.de>
+Date: Thu Jan 21 17:55:58 2010 +0100
+
+ mpc512x: Use in/out accessors for all registers
+
+ This is not only a cosmetic change as it fixes the real bug of board
+ reset not working with the ELDK 4.2 toolchain.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit c7c0d542a199089cf658a7c23c314a5cff248b00
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Jan 21 04:03:22 2010 -0500
+
+ tools: allow people to compile w/out configuring
+
+ It's useful to be able to build up the host tools without having to select
+ a board first. Pretty much all tools in there are config-independent
+ anyways.
+
+ Also add a shortcut "tools-all" to quickly build all host tools that are
+ actually config-independent to allow for simple test builds.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c5a028f085020b60040a2b42966f29b25bd6ee8e
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Jan 21 04:03:21 2010 -0500
+
+ ubsha1: drop unnecessary includes/prototypes
+
+ This code doesn't use any config.h defines, and the sha1.h header already
+ declares a sha1_csum prototype.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 5daa1c18b6a6877b0619a8dbaad0afd783f79e4f
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Jan 21 04:03:20 2010 -0500
+
+ image.h: avoid command.h for host tools
+
+ The u-boot command structures don't get used with host systems, so don't
+ bother including it when building host code. This avoids an implicit need
+ on config.h in the process.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 34be10651704709dfb35f9c57013f02d47cced09
+Author: Matthias Weisser <weisserm@arcor.de>
+Date: Mon Jan 18 10:58:13 2010 +0100
+
+ Removing Atmel from ARM926EJ-S Systems
+
+ Signed-off-by: Matthias Weisser <weisserm@arcor.de>
+
+commit a16028da63c78001823bfb375b3f6d9d86e5a534
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 3 11:35:59 2009 -0500
+
+ lmb: only force on arches that use it
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit dac4d7e8849d275023ea2fcae6caf941db91c042
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sun Jan 17 21:08:00 2010 -0500
+
+ sha1: add dedicated config option
+
+ The sha1 code is currently compiled for everyone, but in reality, it's
+ only used by the FIT code. So make it optional just like MD5.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 33c8c664239f6665b228145d7e5adfa238a300bc
+Author: Felix Radensky <felix@embedded-sol.com>
+Date: Tue Jan 19 21:19:06 2010 +0200
+
+ ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMs
+
+ On platforms where SPD EEPROM and another EEPROM have adjacent
+ I2C addresses SPD_EEPROM_ADDRESS should be defined as a single
+ element array, otherwise DDR2 setup code would fail with the
+ following error:
+
+ ERROR: Unknown DIMM detected in slot 1
+
+ However, fixing SPD_EEPROM_ADDRESS would result in another
+ error:
+
+ ERROR: DIMM's DDR1 and DDR2 type can not be mixed.
+
+ This happens because initdram() routine does not explicitly
+ initialize dimm_populated array. This patch fixes the problem.
+
+ Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d98964aaacc5c54cf7d67bb1e5128ed067086dd7
+Author: Felix Radensky <felix@embedded-sol.com>
+Date: Tue Jan 19 17:37:13 2010 +0200
+
+ ppc4xx: Fix reporting of bootstrap options G and F on 460EX/GT
+
+ Bootstrap options G and F are reported incorrectly (G instead
+ of F and vice versa). This patch fixes this.
+
+ Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 19c292999732996e071caa0782eeef0ce0a60ac0
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Wed Jan 20 21:07:00 2010 +0900
+
+ MIPS: qemu_mips: Import asm/unaligned.h from the Linux kernel
+
+ with a few adjustments for U-Boot. This fixes the following build error:
+
+ make -C lib_generic/
+ zlib.c:31:27: error: asm/unaligned.h: No such file or directory
+ zlib.c: In function 'inflate_fast':
+ zlib.c:641: warning: implicit declaration of function 'get_unaligned'
+ make[1]: *** [zlib.o] Error 1
+ make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic'
+ make: *** [lib_generic/libgeneric.a] Error 2
+
+ Reported-by: Himanshu Chauhan <himanshu@symmetricore.com>
+ Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
+
+commit 38a8b3eafb17d61690e5fc93e6dc45120f79d7d0
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Sun Jan 17 17:46:11 2010 +0100
+
+ MX31: Activate NAND environment on i.MX31 PDK board.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit c4832dffff20519e72879a8da010174ac0526141
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Sun Jan 17 17:46:10 2010 +0100
+
+ MXC: Add large page oob layout for i.MX31 NAND controller.
+
+ Import the large page oob layout from Linux mxc_nand.c driver.
+
+ The CONFIG_SYS_NAND_LARGEPAGE option is used to activate
+ the large page oob layout. Run time detection is not supported
+ as this moment.
+
+ This has been tested on the i.MX31 PDK board with a large
+ page NAND device.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit f6a9748e3261fdccdeb78a2b58e6ad538ba54496
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Wed Nov 11 20:18:43 2009 +0100
+
+ mxc_nand: Update driver to work with i.MX31.
+
+ Tested on i.MX31 Litekit.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit c816dcb118e26ba17e7d73989514fec08a3823ac
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Wed Nov 11 20:18:42 2009 +0100
+
+ MX31: Add struct definition for clock control module in i.MX31.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit 50ef25ef24eccd8e69d2c1ccc97b3f7e30109f51
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Jan 19 12:03:25 2010 +0100
+
+ microblaze: zlib needs asm/unaligned.h
+
+ Microblaze has own hw unaligned handler if is available.
+ Use big endian version.
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 5b8b83bce6fdd0d2ca661de90ae83a0f8b152de6
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Jan 19 12:03:24 2010 +0100
+
+ microblaze: Remove getenv_IPaddr prototype
+
+ Commit 6a45e384955262882375a2785426dc65aeb636c4
+ should remove reference from Microblaze too.
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit b9e6957ca15be8466190794d6d87845491b3411b
+Author: Alessandro Rubini <rubini@unipv.it>
+Date: Mon Jan 18 22:38:38 2010 +0100
+
+ MAINTAINERS: fix nhk8815 board name
+
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+
+commit b40e2320c440c5082020e5036a0cb8d4ed1b3d7d
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Mon Jan 18 11:35:31 2010 -0800
+
+ Fix breakage in SMC EEPROM standalone applications
+
+ Commit 6a45e384955262882375a2785426dc65aeb636c4 (Make getenv_IPaddr() global)
+ inadvertently added ' #include "net.h" ' to the standalone programs, creating
+ duplicate definitions of 'struct eth_device'. This patch removes the local
+ definitions and removes other code that breaks due to the change in definition.
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+ Acked-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2a9987935e3cdb61e7550c87cbc9f500a54f672d
+Author: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
+Date: Mon Jan 18 18:13:39 2010 +0100
+
+ Makefile: fix parallel build
+
+ During parallel build, the top Makefile spawns multiple sub-makes for
+ targets in cpu/$(CPU) and $(dir $(LDSCRIPT)). If the .depend files are
+ not present in these directories, the sub-makes may end up generating
+ these files simultaneously which leads to corrupted content.
+
+ A typical error message is:
+
+ .depend:39: *** multiple target patterns. Stop.
+
+ This patch serializes the creation of .depend in cpu/$(CPU) and
+ $(dir $(LDSCRIPT)) by adding these directories to the depend target
+ in the top Makefile.
+
+ Other directories in $(LIBS) are not affected since they contain only
+ one Make target and thus only one sub-make is spawned per directory.
+
+ Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit f19fd87e9387282b5abbfdafe46ac272320643d8
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 16:35:48 2009 -0500
+
+ Blackfin: add support for kgdb
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3869453f659c22396fecb7c8ed7af909e89f461c
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 17:55:22 2009 -0500
+
+ asm-generic/signal.h: import from linux
+
+ We need signal.h for Blackfin/KGDB, so import the asm-generic/signal.h
+ for people to leverage.
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 88ffb2665cd066b6b20cfaade13929d4e8428dde
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Jan 7 08:55:54 2010 +0100
+
+ CRAMFS: support cramfs in RAM
+
+ cramfsls and cramfsload are added to the command list.
+ A cramfs placed at 'cramfs_addr' can the be listed with 'cramfsls' and files
+ can be loaded with 'cramfsload'. 'cramfs_addr' is an environment variable
+ specifying the address the cramfs is located.
+ This works for powerpc and for ARM.
+
+ Use CONFIG_CMD_CRAMFS.
+
+ Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 4897ee33c98b4b29efd62854052eb7862380b5ae
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Jan 7 08:55:50 2010 +0100
+
+ powerpc: keymile boards updates
+
+ - malloc size 4 MB for all keymile boards
+ - use generic FDT code for fixing up the DTS
+ - enable unit-led at startup for keymile boards
+ - remove some dts updates for keymile boards
+ - ppc_83xx, kmeter1: take FE/GbE PHYs out of reset
+ - ppc_83xx, kmeter1: change from Intel Strata to Spansion 64MB flash
+ changed from Intel Strata to Spansion 64MB flash and changed flash layout.
+ +---------+----------+-----------------------+-----------------------------+
+ | name | size | range | description |
+ +---------+----------+-----------------------+-----------------------------+
+ | u-boot | 768 KB | 0xf0000000-0xf00bffff | for u-boot |
+ | env | 128 KB | 0xf00c0000-0xf00dffff | for environment |
+ | envred | 128 KB | 0xf00e0000-0xf00fffff | for environment (redundant) |
+ | ubi0 | 64512 KB | 0xf0100000-0xf3ffffff | ubi0 for ubi volumes |
+ +---------+----------+-----------------------+-----------------------------+
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 1567b596d9f4a7ff49ebdca29e15a33777dfd670
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Jan 7 08:55:44 2010 +0100
+
+ env, eeprom: add redundant environment support
+
+ Add redundant environment support for environment lying on a EEPROM.
+
+ Tested on uppcoming suen3 support
+
+ Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
+
+commit 548738b4d43af841ff58c787bce297ac6a8bf7d1
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Jan 7 08:55:40 2010 +0100
+
+ cmd_eeprom: I2C updates
+
+ - CONFIG_ENV_EEPROM_IS_ON_I2C
+ define this, if you have I2C and SPI activated, and your
+ EEPROM, which holds the environment, is on the I2C bus.
+
+ - CONFIG_I2C_ENV_EEPROM_BUS
+ if you have an Environment on an EEPROM reached over
+ I2C muxes, you can now define, how to reach this
+ EEPROM.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit b63815e31355b44e65899b361da1d8ef6940ab90
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date: Tue Dec 22 23:05:45 2009 +0100
+
+ move definition of macros likely and unlikely to compiler.h
+
+ the macros likely and unlikely were defined in include/linux/mtd/compat.h,
+ but used in code not related to MTD. moved the macro definitions to compiler.h
+
+ Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+
+commit c3d7eec6d88945dec0626cdd4f4a35cb5f83ef00
+Author: Detlev Zundel <dzu@denx.de>
+Date: Tue Dec 22 12:43:02 2009 +0100
+
+ cmd_bootm.c: Change interpretation of standalone image parameters.
+
+ Current code uses the second argument to bootm for standalone images to
+ override the load address specified in the image instead of passing all
+ parameters as is to the application. This behaviour is not documented
+ and not in line with how the go command works for standalone applications,
+ so we simply drop it.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 8b828a8f44b7ee9953c7ba63e64b1e80790139b3
+Author: Detlev Zundel <dzu@denx.de>
+Date: Tue Dec 22 12:43:01 2009 +0100
+
+ cmd_bootm.c: Do not load a ramdisk when not booting a kernel.
+
+ In case we boot an image marked as 'standalone' and 'linux', the current
+ code erroneously tried to load a ramdisk.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 16035bcd8c81c3c59dddfb54f48e8059a623b13c
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 18:40:44 2009 -0500
+
+ kgdb: update mem2hex/hex2mem funcs
+
+ Convert the funcs to do the conversion inline so that we can do the copy
+ all at once with memcpy. This let's us push out an weird arch-specific
+ issue with accessing different regions of memory to the memcpy function
+ like the MMRs on Blackfin systems, and it should be a bit faster.
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit cbb0cab1d929839d1cf170b54b1fef05896433ea
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Dec 21 18:40:43 2009 -0500
+
+ kgdb: drop duplicate debugger_exception_handler
+
+ The debugger_exception_handler definition is the same for everyone, so use
+ the common one now.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0c909551f88c0d92a919ff70127df7b33cdd473d
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 18:40:42 2009 -0500
+
+ kgdb: add default generic stubs
+
+ The default kgdb functions can be implemented with common U-Boot functions,
+ so rather than force everyone to copy & paste these things, create a set of
+ weak stubs.
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit fa2744de6584c92750f807a006e20a59ee046e76
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Dec 21 14:19:12 2009 -0500
+
+ netconsole: mark local funcs with static
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 7293e0577f149b75595b6f6ceb75bf50a523aff6
+Author: Michael Hennerich <michael.hennerich@analog.com>
+Date: Sat Dec 19 08:19:09 2009 -0500
+
+ easylogo: add support for 16-bit RGB565
+
+ Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0f597bc2a80353bcd0fd4daf42e2047c959485c8
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Dec 18 17:35:57 2009 +0100
+
+ mpc5xxx/cpu_init.c: Convert to IO accessors.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 18e89890625c86be6c971c01b824d14bbdd78e25
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Dec 18 17:35:56 2009 +0100
+
+ mpc5xxx.h: Add structure definition for XLB arbiter block.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 10c32ff59f7abe352b548066918bc5ea39e7c47b
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Dec 2 21:15:03 2009 -0500
+
+ config_defaults.h: new header for common u-boot config defaults
+
+ There are a bunch of features in U-Boot that we want to enable by default,
+ and it's best if we centralize them in one place rather than updating all
+ the board files out there.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 64917ca38933d10b3763f61df7a1e58e1e127b52
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Sun Jan 17 15:38:26 2010 -0600
+
+ PCIe, USB: Replace 'end point' references with 'endpoint'
+
+ When referring to PCIe and USB 'endpoint' is the standard naming
+ convention.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+ Acked-by: Remy Bohmer <linux@bohmer.net>
+
+commit 6a45e384955262882375a2785426dc65aeb636c4
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Sun Jan 3 08:33:58 2010 +0100
+
+ Make getenv_IPaddr() global
+
+ There are boards out there that do not have network support in
+ U-Boot (CONFIG_CMD_NET not set), but they do so in Linux. This
+ makes it desirable to be able to port network configuration (like
+ the IP address) to the Linux kernel.
+
+ We should not make the passing of the IP configuration to Linux
+ dependent on U-Boot features / settings.
+
+ For this, make getenv_IPaddr() global. This fixes build error
+
+ u-boot/lib_xxx/board.c:360: undefined reference to `getenv_IPaddr'
+
+ on various architectures.
+
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+ Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 846a6391e4bc9fdd721753a1021953ff0ca17c27
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 15 04:50:40 2010 -0500
+
+ Blackfin: drop .eh_frame from linker script
+
+ Nothing in U-Boot uses runtime C++ exceptions/unwinding, so there is no
+ need to list this section.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ed912d4d659e67910edca04498803db24d826615
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 15 04:47:06 2010 -0500
+
+ Blackfin: use sort funcs in the linker script
+
+ This is just Blackfin catching up with every one else.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2aeda2d054bb32027bed33d9c3a63d152164b5e0
+Author: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
+Date: Wed Jan 13 09:04:53 2010 -0500
+
+ Blackfin: tcm-bf518: new board port
+
+ Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit c46a0ebf82d3fd27dd21ad7d4fe7f11c2b2b0b21
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 8 07:56:17 2010 -0500
+
+ Blackfin: enable JFFS summary support for ADI boards
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 912da8d606997822d44905b83ef47799a130a1b9
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jan 8 06:14:13 2010 -0500
+
+ Blackfin: bf518f-ezbrd: increase monitor length
+
+ The addition of KGDB overflowed the current linker section.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 03642aeee0d51660c35c9dbdde78882eb3efb350
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 17:02:48 2009 -0500
+
+ Blackfin: handle anomaly 05000257
+
+ Need to reload the loop counters to keep from corrupting hardware loops.
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b6db2834407d49ec48ac8e9281fdd704d5ee3eba
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 16:59:21 2009 -0500
+
+ Blackfin: keep hwtrace on CPLB miss
+
+ Crashes rarely happen in the CPLB miss handler compared to the rest of
+ U-Boot code, so disable hardware tracing when processing misses. This
+ way a crash due to other functions will be shown properly.
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 0097870e3d72f10ec58ae22488945fd9ee37289f
+Author: Robin Getz <robin.getz@analog.com>
+Date: Mon Dec 21 15:31:08 2009 -0500
+
+ Blackfin: add a netconsole helper
+
+ Signed-off-by: Robin Getz <robin.getz@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 10eafa10be2deaba4939d0c19cd21648f2d3d4aa
+Author: Michael Hennerich <michael.hennerich@analog.com>
+Date: Thu Dec 10 09:19:21 2009 +0000
+
+ Blackfin: add support for BF527-EZKIT v2.1
+
+ The new board revision has a different LCD.
+
+ Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 9442c4a1337dbcf82e3bc02a12e24f491e0e6122
+Author: Cliff Cai <cliff.cai@analog.com>
+Date: Tue Dec 8 07:25:57 2009 +0000
+
+ Blackfin: bf527-ezkit/bf548-ezkit: add musb board specific initialization
+
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 581d92eefc1a060ea5c6eb42028880a37095953d
+Author: Cliff Cai <cliff.cai@analog.com>
+Date: Mon Dec 7 08:03:06 2009 +0000
+
+ Blackfin: bfin_spi: round up clock divider
+
+ If the requested clock cannot be exactly obtained, round it up so that we
+ err on the side of slightly slower rather than slightly faster.
+
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit a52ad4f99486ce3f404f83f75263e321956bb6d5
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 30 13:51:24 2009 -0500
+
+ Blackfin: pull io funcs from linux
+
+ Some common code uses more of the io.h funcs than we currently provide, so
+ pull in all of the ones from the linux kernel.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 5eefe7e99537ca3641496185f23b1dc9e76b405c
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 30 13:34:07 2009 -0500
+
+ Blackfin: section off the CF/IDE io.h hacks
+
+ These need to be rethought, but until that happens, isolate the hack so
+ that we can extend the common code without breaking things.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3b062da326f9b37d34aa8f80bf9d2f9e74f55c86
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 30 13:30:18 2009 -0500
+
+ Blackfin: drop unused funcs from io.h
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 5f79644d2665763d522ef2db53c026c5f4865b02
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 30 13:08:39 2009 -0500
+
+ Blackfin: bf533-stamp: split and cleanup CF/IDE code
+
+ Give the CF/IDE code its own file to keep things cleanly separated. While
+ we're here, clean up the code to use common functions.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit e54c8209913a3f26ae28819e3515df53ec2b4548
+Author: Cliff Cai <cliff.cai@analog.com>
+Date: Fri Nov 20 08:24:43 2009 +0000
+
+ Blackfin: convert bfin_sdh to generic mmc
+
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 17ebd5bf3393144f3ead19384318a6e5b01c4f90
+Author: Cliff Cai <cliff.cai@analog.com>
+Date: Tue Nov 17 09:36:21 2009 +0000
+
+ Blackfin: bfin_spi: let boards control idle value
+
+ Some SPI devices like to see high idle values rather than low.
+
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ea693f22d8dbd8a65867a60a7f3faac30f85d65b
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Sat Nov 14 13:53:00 2009 -0500
+
+ Blackfin: asm/string.h: drop useless includes
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit f948158f72e6b880d02e4fa549362e4dc285eb1c
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Nov 12 18:42:53 2009 -0500
+
+ Blackfin: use new bfin read/write mmr helper funcs
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 313e8aacc1c9f5ca06085fa19b1429fa18a01aaa
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Nov 12 18:42:07 2009 -0500
+
+ Blackfin: move watchdog config check to Makefile
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit dc6bc645e0cc1939b31cc54346415cf8e0dffc88
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Nov 11 19:08:33 2009 -0500
+
+ Blackfin: fix L1 Instruction sizes on BF52x/BF54x
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b7659ef2e764f62fc334f0d970721496823e4888
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Nov 11 17:29:35 2009 -0500
+
+ Blackfin: bf527-ezkit: auto-select NAND settings
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 7527feef06b13e9fd5b6d10a4bfc81b59ee56f27
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 9 19:38:23 2009 -0500
+
+ Blackfin: support boards with no external memory
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit dbda2c65e5fec92d0791367b53042983746ce95b
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 9 19:44:04 2009 -0500
+
+ Blackfin: re-architect initcode
+
+ The single initcode function was growing unwieldy, so split it up the
+ distinct steps into their own function. This should making digesting the
+ result much easier on people.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit f5402d4c27e471c333cb84a82a437e60c6182449
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Nov 9 18:08:09 2009 -0500
+
+ Blackfin: global_data.h: make pull in needed headers
+
+ We need the definition of bd_t in this header, so pull in asm/u-boot.h.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit fa45bd498a1970574f4b7539b67cc2286f1324fa
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 3 06:28:22 2009 -0500
+
+ Blackfin: kill off useless initdram() usage
+
+ While the initdram() function makes sense on some arches, it doesn't for
+ Blackfin systems as it's always implemented the same way.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit b1e2c5519a06f9a5841a7a434bf4da4d393f8df5
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 3 06:11:31 2009 -0500
+
+ Blackfin: move section length calculation to linker script
+
+ The length of the sections is fixed at link time, so let the linker do the
+ calculation rather than doing it ourselves at runtime.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 446707c90f52e5fcafecd468920cfad685ee9fc7
+Author: Valentin Yakovenkov <yakovenkov@niistt.ru>
+Date: Mon Oct 26 18:43:04 2009 -0400
+
+ Blackfin: bf561-acvilon: new board port
+
+ Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 16ada4f66ffea53662b7a61a5222cbc825d67175
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Oct 15 14:59:46 2009 -0400
+
+ Blackfin: ADI settings: enable silent console support
+
+ Very little additional code overhead, and only works when the user sets an
+ env var ahead of time, so default to on makes sense.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ac41c7a0e76fe6384949571373dc84a6098965ac
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Oct 15 14:55:21 2009 -0400
+
+ Blackfin: bf537-stamp: rename SPI/MMC define
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit fd04a05b89d848c7841d8512751b8cce8b791e69
+Author: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
+Date: Wed Oct 14 08:37:32 2009 -0400
+
+ Blackfin: update tiny board settings (voltage/default env)
+
+ The tinyboards like to run at a little lower voltage than the default, and
+ they prefer to boot over the network. For the latter, extend the common
+ code a little to make this easier.
+
+ Also fix the cm-bf527 env sector size while we're in here to reflect the
+ flash that is actually in use.
+
+ Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 76d82187c6cccbcd8d514015c3b283f05ee8ac5c
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Jul 21 22:17:36 2009 -0400
+
+ Blackfin: tweak embedded LDR env config option
+
+ Use the common config option for extracting the environment for embedding
+ into LDR files and clarify the LDR-specific option.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 2740544881f652566756815dda4da0bcd946e9de
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jan 15 11:20:10 2010 +0100
+
+ malloc: return NULL if not initialized yet
+
+ When malloc() was called before it was properly initialized
+ (as would happen if when used before relocation to RAM) it returned
+ random, non-NULL values, which called all kinds of difficult to debug
+ subsequent errors.
+
+ Make sure to return NULL when initialization was not done yet.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f098337152ca48e135448f5e7836cce938e12bc0
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jan 15 11:10:33 2010 +0100
+
+ JFFS2: drop support for LZARI compression mode
+
+ Support for LZARI compression mode was added based on a MTD CVS
+ snapshot of March 13, 2005. However, fs/jffs2/compr_lzari.c contains
+ contradictory licensing terms: the original copyright clause says "All
+ rights reserved. Permission granted for non-commercial use.", but
+ later reference to the file 'LICENCE' in the jffs2 directory was added
+ which says GPL v2 or later.
+
+ As no boards ever used LZARI compression, and this file is also not
+ present in recent MTD code, we resolve this conflict by removing the
+ conflicting file and references to it.
+
+ Also copy the referenced but missing file 'LICENCE' from the current
+ MTD source tree.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 321790f61bb92fead0fc01b8d055aa331d8dcf85
+Author: Bryan Wu <bryan.wu@analog.com>
+Date: Sat Jan 9 16:53:54 2010 -0500
+
+ usb: musb: add virtual root hub control support
+
+ For MUSB devices that do not support multipoint (hubs), we have to emulate
+ a root hub so that we can support core operations like resetting ports.
+
+ Signed-off-by: Bryan Wu <bryan.wu@analog.com>
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 559e2c87e45ae7261837d4945411c04833937d2a
+Author: Chris Zhang <chris@seamicro.com>
+Date: Wed Jan 6 13:34:06 2010 -0800
+
+ Adds EHCI definitions to sequoia board configuration file.
+
+ Adds required definitions for EHCI support in sequoia configuration file.
+ But still keeps the OHCI as default driver.
+
+ Signed-off-by: Chris Zhang <chris@seamicro.com>
+
+commit 5f82887feecd7895593401f1ccda866bfb299fbb
+Author: Chris Zhang <chris@seamicro.com>
+Date: Wed Jan 6 13:34:05 2010 -0800
+
+ Add ppc440epx USB ehci support.
+
+ Currently ppc440epx uses OHCI for USB full-speed support. This change adds
+ support for EHCI.
+
+ Signed-off-by: Chris Zhang <chris@seamicro.com>
+
+commit b416191a14770c6bcc6fd67be7decf8159b2baee
+Author: Chris Zhang <chris@seamicro.com>
+Date: Wed Jan 6 13:34:04 2010 -0800
+
+ Fix EHCI port reset.
+
+ In USB ehci driver, the port reset is not terminated. EHCI spec says "A host
+ controller must terminate the reset and stabilize the state of the port within
+ 2 milliseconds". Without termination, a port stays at reset state. This is
+ observed on ppc4xx(sequoia) boards.
+
+ Signed-off-by: Chris Zhang <chris@seamicro.com>
+
+commit b301be0599d14be46fc088861bb798648844aea5
+Author: Sanjeev Premi <premi@ti.com>
+Date: Thu Dec 24 14:20:41 2009 +0530
+
+ omap3: fix compile warning
+
+ This patch fixes this warning during compile:
+
+ omap3.c: In function 'musb_platform_init':
+ omap3.c:126: warning: label 'end' defined but not used
+
+ Problem reported by: Dirk Behme[dirk.behme@googlemail.com]
+
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+
+commit e608f221c13943d88e86f44753e23668342c3df3
+Author: Bryan Wu <bryan.wu@analog.com>
+Date: Wed Dec 16 22:04:02 2009 -0500
+
+ usb: musb: add support for Blackfin MUSB
+
+ Signed-off-by: Bryan Wu <bryan.wu@analog.com>
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit bc72a919e037782f64e3ac45c91bc60408e57e85
+Author: Bryan Wu <bryan.wu@analog.com>
+Date: Wed Dec 16 22:04:01 2009 -0500
+
+ usb: musb: change rxcsr register from write to read/modify/write
+
+ The RX Control/Status register has bits that we want to preserve, so don't
+ just write out a single bit. Preserve the others bits in the process.
+
+ The original code posted to the u-boot list had this behavior, but looks
+ like it was lost somewhere along the way to merging.
+
+ Signed-off-by: Bryan Wu <bryan.wu@analog.com>
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 8868fd443b7a52bf433903cc9527403ad055acb9
+Author: Bryan Wu <bryan.wu@analog.com>
+Date: Wed Dec 16 22:04:00 2009 -0500
+
+ usb: musb: make multipoint optional
+
+ The multipoint handling under MUSB is optional, and some parts (like the
+ Blackfin processor) do not implement support for it.
+
+ Signed-off-by: Bryan Wu <bryan.wu@analog.com>
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit df402ba38103df51f6929848b6a797eff4db61f8
+Author: Bryan Wu <bryan.wu@analog.com>
+Date: Wed Dec 16 22:03:59 2009 -0500
+
+ usb: musb: make fifo support configurable
+
+ The dynamic FIFO handling under MUSB is optional, and some parts (like
+ the Blackfin processor) do not implement support for it.
+
+ Due to this, the FIFO reading/writing steps need special handling, so
+ mark the common versions weak so drivers can override.
+
+ Signed-off-by: Bryan Wu <bryan.wu@analog.com>
+ Signed-off-by: Cliff Cai <cliff.cai@analog.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit dc2cd05c91a134d53fada41e8f97a434be22de02
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Dec 16 22:03:58 2009 -0500
+
+ usb: musb: make sure the register layout is packed
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 7b4292883b6fdc42984671fbe4e0a352ec704bde
+Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Tue Dec 22 10:56:14 2009 +0530
+
+ DA830: Add usb config
+
+ Adding USB configuration. Default is set for USB MSC host.
+
+ Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+ Signed-off-by: Swaminathan S <swami.iyer@ti.com>
+
+commit 7359273d946a7dcde04c5e8d5bad669146efc87c
+Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Tue Dec 22 10:56:13 2009 +0530
+
+ DA8xx: Add MUSB host support
+
+ Tested USB host functionality on DA830 EVM.
+
+ Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+ Signed-off-by: Swaminathan S <swami.iyer@ti.com>
+
+commit 0b232310b2087d4278fb224fa01e228136fb8bdf
+Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Tue Dec 22 10:56:12 2009 +0530
+
+ DA8xx: Add GPIO register definitions
+
+ Added DA8xx GPIO base addresses in gpio_defs.h and pointers
+ to different BANKs which can be used to program GPIOs.
+
+ Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+ Signed-off-by: Swaminathan S <swami.iyer@ti.com>
+
+commit 82a821f89bee913d7ba17cb500c778cf08dce321
+Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Tue Dec 22 10:56:11 2009 +0530
+
+ DA830: Add pinmux for USB0_DRVVBUS
+
+ USB0_DRVVBUS pinmux configuration is required for USB functinality
+ in uboot.
+
+ Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+ Signed-off-by: Swaminathan S <swami.iyer@ti.com>
+
+commit a3f5da1bee9a8c343a411080d7d468bdc78794a4
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Jan 7 08:56:00 2010 +0100
+
+ mpc83xx: add support configure bus parking
+
+ Add support to configure bus parking mode and master in bus arbitration
+ configuration (ACR). Add this for the kmeter1 port:
+
+ Configure bus arbiter with recommended values from Freescale
+ to improve bus latency/throughput for application with
+ intensive QuiccEngine activity.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit a0daa2e06f05d97c03c59b656d50371319bf29ec
+Author: Reinhard Arlt <reinhard.arlt@esd.eu>
+Date: Tue Dec 8 09:21:41 2009 +0100
+
+ mpc83xx: vme8349: Fix power up reset sequence for tsi148
+
+ Remove PCI reset, if there is a monarch PMC module.
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+ convert clrbits_be32 + setbits_be32 to clrsetbits_be32, use out_be32 to set gcr.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 1dee9be683c9b0f060452aaf1a97a34fae87f07a
+Author: Reinhard Arlt <reinhard.arlt@esd.eu>
+Date: Tue Dec 8 09:13:08 2009 +0100
+
+ mpc83xx: Add support for MPC8349 esd caddy2
+
+ The caddy2 is a variant of the already supported vme8349. So we just
+ add the differences to this board port. To better support those two
+ boards we switched from fixed SDRAM configuration to usage of
+ spd_sdram(). This is done by providing a board specific SPD EEPROM
+ routine with different values for both boards.
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+ changed to use mkconfig -t option instead, plus misc codingstyle fixes.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 7693640acd5222f5a64e59ccf5e3bc511e8054b9
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Dec 8 09:10:04 2009 +0100
+
+ mpc83xx: spd_sdram.c: Disable memory controller before initializing
+
+ The memory controller could already be enabled, when spd_sdram() is
+ called. This could be the case for example, when the SDRAM is initialized
+ by the JTAG debugger.
+
+ The "sync" after the register access via the accessor function is
+ still needed, because the macro uses the sync before the real write
+ is done. So until not all accesses are converted to using accessor
+ functions, this sync still needs to be made "manually" here.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Cc: Reinhard Arlt <reinhard.arlt@esd.eu>
+ Acked-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 2e95004deb6e33e33bf1b8a92a38cd2115bac4c2
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Tue Nov 24 20:12:12 2009 +0300
+
+ mpc83xx: Add NAND boot support for MPC8315E-RDB boards
+
+ The core support for NAND booting is there already, so this patch
+ is pretty straightforward.
+
+ There is one trick though: top level Makefile expects nand_spl to
+ be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
+ from mpc8313erdb boards, and so to not duplicate the code we just
+ symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+
+ o silence make during ln echo
+ o update documentation
+ o and avoid:
+
+ $ ./MAKEALL MPC8315ERDB_NAND
+ Configuring for MPC8315ERDB board...
+ sdram.o: In function `fixed_sdram':
+ /home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'
+
+ by renaming udelay -> __udelay in the spirit of commit
+ 3eb90bad651fab39cffba750ec4421a9c01d60e7 "Generic udelay() with watchdog
+ support".
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit b821cead7d2147724d5f1d8ccbca40710faad38a
+Author: Sanjeev Premi <premi@ti.com>
+Date: Fri Dec 18 14:55:24 2009 +0530
+
+ onenand: Fix compile errors due to FlexOneNAND
+
+ This patch fixes the compile error while trying to
+ compile for omap3evm.
+
+ env_onenand.c: In function 'env_relocate_spec':
+ env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared
+ (first use in this function)
+ env_onenand.c:70: error: (Each undeclared identifier is re
+ ported only once
+ env_onenand.c:70: error: for each function it appears in.)
+ env_onenand.c: In function 'saveenv':
+ env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclare
+ d (first use in this function)
+ env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclare
+ d (first use in this function)
+
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+ Acked-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 20da6f4d93db270c57eb67968e441a20faf61938
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Wed Dec 16 11:15:58 2009 +0000
+
+ Davinci: davinci_nand.c performance enhancments
+
+ Introduces various optimisations that approximately triple the
+ read data rate from NAND when run on da830evm.
+
+ Most of these optimisations depend on the endianess of the machine
+ and most of them are very similar to optimisations already present
+ in the Linux Kernel.
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+
+commit 06f95959bc5421e516a9a25012e303dea8833385
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Wed Jan 6 09:36:24 2010 -0600
+
+ ARM Update mach-types
+
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
+
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit c9f937e4a3f4ebf9924ec21d80632e5eb61d949c
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 8b0ab304943b07d13a29db6d3d2ca3edad32cdcb
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Tue Nov 17 21:10:21 2009 -0600
+
+ ppc/p4080: Add Corenet Platform Cache (CPC) registers
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3e731aaba30c7011edf6391072eee845ed1b816f
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Dec 16 10:24:39 2009 -0600
+
+ fsl-ddr: setup ODT_RD_CFG & ODT_WR_CFG when we interleave
+
+ In chip-select interleaving case, we also need set the ODT_RD_CFG
+ and ODT_WR_CFG in cs1_config register.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1aa3d08a0244506b94031522e54fe06ee7a5ae0e
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Dec 16 10:24:38 2009 -0600
+
+ fsl-ddr: add override for the Rtt_Wr
+
+ Different boards may require different settings of Dynamic ODT (Rtt_Wr).
+ We provide a means to allow the board specific code to provide its own
+ value of Rtt_Wr.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit bdc9f7b5eab8d5edd8a8cc5d80ef080836b00e85
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Dec 16 10:24:37 2009 -0600
+
+ fsl-ddr: add the override for write leveling
+
+ add the override for write leveling sampling and
+ start time according to specific board.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0a71c92c7e1e565111cb34cd389a21ec500ca5c1
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Dec 16 10:24:36 2009 -0600
+
+ fsl-ddr: Fix power-down timing settings
+
+ 1. TIMING_CFG_0[ACT_PD_EXIT] was set to 6 clocks, but
+ It should be set to tXP parameter, tXP=max(3CK, 7.5ns)
+ 2. TIMING_CFG_0[PRE_PD_EXIT] was set to 6 clocks, but
+ It should be set to tXP (if MR0[A12]=1) else to tXPDLL parameter
+ We are setting the mode register MR0[A12]='1'
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c4ca10f1db36c3ce649c656dec14f7aab644dd86
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Wed Dec 16 01:14:31 2009 +0300
+
+ mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
+
+ Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
+ Family Reference Manual, Rev. 0" document, which describes all eSDHC
+ pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit bc20f9a9527afe8ae406a74f74765d4323f04922
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Dec 9 17:28:17 2009 -0600
+
+ ppc/p4080: Fix reporting of PME & FM clock frequencies
+
+ We incorrectly had the sense of PME_CLK_SEL, FM1_CLK_SEL, FM2_CLK_SEL
+ backwards so we report the wrong frequency.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit de3cbd78c9a485389b233f8ca705a9e5f51afaf3
+Author: Li Yang <leoli@freescale.com>
+Date: Wed Dec 9 14:26:08 2009 +0800
+
+ fsl_law: add SRIO2 target id and law_size_bits() macro
+
+ Signed-off-by: Li Yang <leoli@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit abc76eb6a6936a99811eda256222b3927427f8e2
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Nov 17 20:21:20 2009 -0600
+
+ ppc/85xx: Map boot page guarded for MP boot
+
+ We already map the page cache-inhibited. There is no reason we
+ shouldn't also be marking it guarded to prevent speculative accesses.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit effe4973f2f349e6e87d455ae718aabaf919a75d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Nov 17 22:44:52 2009 -0600
+
+ ppc: Added macro to test for specific SVR revision
+
+ Various SoC errata are specific to a given revision of silicon. This
+ patch gives us a simple macro to use when doing such tests.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f5ecc6e027150289c2a46db7cec197b2b6da893c
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Nov 17 20:01:24 2009 -0600
+
+ p4080: add readback to bootpage translation window
+
+ We need to add the readback to bootpage translation LAW
+ to make it effect.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5fb6ea3ad3562f78df8693ed8c4ca89654236c4f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Nov 13 09:25:07 2009 -0600
+
+ ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
+
+ Rather than hard coding which TLB entry the FLASH is mapped with we can
+ use find_tlb_idx to determine the entry.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 783852e467f32a3a5568b542379e9fec3d26a173
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Nov 13 09:09:10 2009 -0600
+
+ ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
+
+ Now that we dynamically determine TLB CAM entries to use we dont need
+ CONFIG_SYS_DDR_TLB_START anymore.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 355f4f85e90ce2e6d91883012c2993be7970c8b1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Fri Nov 13 09:04:19 2009 -0600
+
+ ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocation
+
+ Now that we track which TLB CAM entries are used we can allocate
+ entries on the fly. Change the SPD DDR TLB setup code to assume
+ we use at most 8 TLBs (or the number free, which ever is fewer).
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 94e9411b9dda182dd63d53ba6ea640c98b35db5f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Nov 12 10:26:16 2009 -0600
+
+ ppc/85xx: Add tracking of TLB CAM usage
+
+ We need to track which TLB CAM entries are used to allow us to
+ "dynamically" allocate entries later in the code. For example the SPD
+ DDR code today hard codes which TLB entries it uses. We can now make
+ that pick entries that are free.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ee53650dad2fede057e93fdf6f8cd72b29ef7cd0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 13:00:55 2009 -0600
+
+ ppc/8xxx: Remove is_fsl_pci_agent
+
+ All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
+ that uses the standard PCI programming model to determine host vs
+ agent/end-point.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7cb8f79b44c70a3c66891f407254d9c739e2e7da
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 11:39:55 2009 -0600
+
+ ppc/85xx: Move to using fsl_setup_hose on TQM 85xx
+
+ We can use fsl_setup_hose to determine if we are a agent/end-point or
+ a host. Rather than using some SoC specific register we can just look
+ at the PCI cfg space of the host controller to determine this.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 9263e829f025661cbd3a80675285b42c14350ea4
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 13:01:51 2009 -0600
+
+ ppc/85xx: Move to using fsl_setup_hose on P2020 DS
+
+ We can use fsl_setup_hose to determine if we are a agent/end-point or
+ a host. Rather than using some SoC specific register we can just look
+ at the PCI cfg space of the host controller to determine this.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1e21ba8f6d0708fe7f44066059927cfa6bfedf7a
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 13:01:38 2009 -0600
+
+ ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB
+
+ We can use fsl_setup_hose to determine if we are a agent/end-point or
+ a host. Rather than using some SoC specific register we can just look
+ at the PCI cfg space of the host controller to determine this.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 42c01b9d1f0132a6d82e2c8333b236b1e3b0831f
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 13:01:17 2009 -0600
+
+ ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
+
+ We can use fsl_setup_hose to determine if we are a agent/end-point or
+ a host. Rather than using some SoC specific register we can just look
+ at the PCI cfg space of the host controller to determine this.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 5e3d7050cf127dfcd6ab260c551e9183299d0dca
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 12:51:10 2009 -0600
+
+ ppc/86xx: Clean up MPC8610 HPCD PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7b626880b4e1fd8d2297c9341b92c2253fc27fd0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 11:15:29 2009 -0600
+
+ ppc/85xx: Clean up MPC8548 CDS PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit feadd5d53ba5047c3bc912ff5b7c7a690c8c53cf
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 11:05:02 2009 -0600
+
+ ppc/85xx: Clean up ATUM8548 PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 4681457e2aace8dff09dc4c6c02185231b970d6b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 10:31:53 2009 -0600
+
+ ppc/85xx: Clean up MPC8568 MDS PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c847e98b143c154cc466f9d03e90a3495329172b
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 10:26:30 2009 -0600
+
+ ppc/85xx: Clean up MPC8569 MDS PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 645d5a7838058ce603803935cd40a62a26aea04d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Nov 4 10:22:26 2009 -0600
+
+ ppc/85xx: Clean up MPC8544 DS PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 8a414c4258aeeab93fb83fad0544894597c8bd35
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date: Wed Oct 28 10:49:31 2009 +0800
+
+ ppc/85xx: Clean up MPC8536 DS PCI setup code
+
+ Use new fsl_pci_init_port() that reduces amount of duplicated code in the
+ board ports, use IO accessors and clean up printing of status info.
+
+ Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 3ad89c4ecba51564c97075f031aef4fa5eafbb16
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Sat Oct 31 11:23:41 2009 -0500
+
+ NET: Base support for etsec2.0
+
+ 1. Modified the tsec_mdio structure to include the new regs
+ 2. Modified the MDIO_BASE_ADDR so that it will handle both
+ older version and new version of etsec.
+
+ Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit b9e186fc31683a4f1b6880c086950b2270e62e24
+Author: Sandeep Gopalpet <sandeep.kumar@freescale.com>
+Date: Sat Oct 31 00:35:04 2009 +0530
+
+ NET: Move MDIO regs out of TSEC Space
+
+ Moved the mdio regs out of the tsec structure,and
+ provided different offsets for tsec base and mdio
+ base so that provision for etsec2.0 can be provided.
+
+ This patch helps in providing the support for etsec2.0
+ In etsec2.0, the MDIO register space and the etsec reg
+ space are different.
+
+ Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
+ platform specific files.
+
+ Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit bcad21fda187f7d8d5d2c026c395cca35a9c700e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Mar 19 02:46:28 2009 -0500
+
+ 85xx: Add support to set DPAA (data path) devices clock frequencies
+
+ Set clock-frequency for Frame Manager 0/1 and Patter Match Engine on p4080.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 178e39e199e9c985e5e5e968d60d7243fceb5616
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Sep 17 00:01:14 2009 -0500
+
+ ppc/8xxx: Don't use pci_cfg on FSL_CORENET platforms
+
+ The FSL_CORENET platforms use a completely different means to determine
+ which PCIe port is enabled as well as if its a host or agent/end-point.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 11588b5dc4c581b2a68a24e3298ab14e83c59d31
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Oct 15 23:22:10 2009 -0500
+
+ ppc/p4080: Added p4080 SERDES registers & USB offset
+
+ Added immap definition for SERDES registers on p4080, the USB offset
+ (since it was missing) and a GPL header.
+
+ Signed-off-by: Li Yang <leoli@freescale.com>
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 82fd1f8da9add2d74532cf78d224485f0042d00d
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Mar 19 02:53:01 2009 -0500
+
+ 85xx: Add support for e500mc cache stashing
+
+ The e500mc core supports the ability to stash into the L1 or L2 cache,
+ however we need to uniquely identify the caches with an id.
+
+ We use the following equation to set the various stash-ids:
+
+ 32 + coreID*2 + 0(L1) or 1(L2)
+
+ The 0 (for L1) or 1 (for L2) matches the CT field used be various cache
+ control instructions.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 26be2c53d671ecfd3e0483f0870649ac28322293
+Author: Nick Thompson <nick.thompson@ge.com>
+Date: Sat Dec 12 12:13:10 2009 -0500
+
+ Davinci: NAND enable ECC even when not in NAND boot mode
+
+ Davinci: NAND enable ECC even when not in NAND boot mode
+
+ On Davinci platforms, the default NAND device is enabled (for ECC)
+ in low level boot code when NAND boot mode is used. If booting in
+ another mode, NAND ECC is not enabled. The driver should make
+ sure ECC is enabled regardless of boot mode if NAND is configured
+ in U-Boot.
+
+ Signed-off-by: Nick Thompson <nick.thompson@ge.com>
+
+commit 97f4eb8cfb97c7c5b158e3c0df4611efbf50f403
+Author: Nick Thompson <nick.thompson@gefanuc.com>
+Date: Sat Dec 12 12:12:26 2009 -0500
+
+ Davinci: Configurable NAND chip selects
+
+ Davinci: Configurable NAND chip selects
+
+ Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
+ use it to setup the NAND controller in the davinci_nand
+ mtd driver.
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit 90110e0eab5ac6ab714109ce1fd8873c858dd552
+Author: Nick Thompson <nick.thompson@gefanuc.com>
+Date: Sat Dec 12 12:10:51 2009 -0500
+
+ Davinci: Table driven pinmux configuration
+
+ Davinci: Table driven pinmux configuration
+
+ Add code to allow pinmux_config tables to be grouped and configured
+ as a single resource. This removes multiple calls to the pinmux
+ configuration code from board_init and allows pinmuxes to be
+ individually configured and added by data manipulation only.
+
+ All related #ifdefs can the be removed from board_init code and
+ since the compiler optimises away statics, #ifdefs can be reduced in
+ the data definitions as well.
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit 1270ec13d4fbae48a537dc76d418a6efa72f5725
+Author: Robert P. J. Day <rpjday@crashcourse.ca>
+Date: Sat Dec 12 12:10:33 2009 -0500
+
+ Remove superfluous uses of V_PROMPT macro.
+
+ A number of config files define the V_PROMPT macro for the
+ command-line prompt, only to immediately use that macro to define
+ CONFIG_SYS_PROMPT, making V_PROMPT entirely superfluous.
+
+ Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+
+commit 8b432bebc205a959684559477472c048e31d137d
+Author: Grazvydas Ignotas <notasas@gmail.com>
+Date: Fri Dec 11 15:07:30 2009 +0200
+
+ pandora: don't enable VAUX3, VDAC and VPLL2 regulators
+
+ These regulators are not needed to start the kernel and only
+ cause "incomplete constraints" warnings from kernel, so don't
+ turn them on to save power.
+
+ Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+
+commit ead39d7aa3ddccb2e374217aeab23bd65cedb762
+Author: Grazvydas Ignotas <notasas@gmail.com>
+Date: Thu Dec 10 17:10:21 2009 +0200
+
+ TWL4030: make LEDs selectable for twl4030_led_init()
+
+ Not all boards have both LEDs hooked, so enabling both on
+ boards with single LED will just waste power. Make it
+ possible to choose LEDs by adding argument to
+ twl4030_led_init().
+
+ Using this turn on only LEDB for pandora, leave both LEDs
+ on for all other boards, as it was before this patch.
+
+ Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+
+commit be34fef7fdcfaffc68495e50929669ac5e4bd800
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Dec 16 09:27:31 2009 +0100
+
+ ppc4xx: alpr: Remove some not needed commands to make image fit again
+
+ The latest changes increased the size of the alpr image a bit more.
+ Now it doesn't fit into the 256k reserved for it. This patch now removes
+ the commands "ping" and "diag" which are not needed in the production
+ systems.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
+
+commit 072e754b6b9bef438fc0870318755e33051baa7d
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Dec 3 11:23:17 2009 +0100
+
+ i2c, ppc4xx: fix compiling KAREF and METROBOX boards.
+
+ commit eb5eb2b0f744f0cba405160c5d01335c40f09acf
+
+ ppc4xx: Cleanup PPC4xx I2C infrastructure
+
+ This patch cleans up the PPC4xx I2C intrastructure:
+
+ - Use C struct to describe the I2C registers instead of defines
+ - Coding style cleanup (braces, whitespace, comments, line length)
+ - Extract common code from i2c_read() and i2c_write()
+ - Remove unneeded IIC defines from ppc405.h & ppc440.h
+
+ breaks comiling for the KAREF and METROBOX boards.
+
+ This patch fixes this issue.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 87d93a1ba2ae23550e1370adb7a3b00af0831165
+Author: Wolfgang Wegner <w.wegner@astro-kom.de>
+Date: Wed Dec 9 15:16:47 2009 +0100
+
+ move prototypes for gunzip() and zunzip() to common.h
+
+ Prototype for gunzip/zunzip was only in lib_generic/gunzip.c and thus
+ repeated in every file using it. This patch moves the prototypes to
+ common.h and removes all prototypes distributed anywhere else.
+
+ Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
+
+commit 127e10842b2474ac20e40572a4102dd4d5ed80f1
+Author: Mahavir Jain <mjain@marvell.com>
+Date: Tue Nov 3 12:22:10 2009 +0530
+
+ usb: write command for RAW partition.
+
+ This patch implements write support to usb device with raw partition.
+ It will be useful for filesystem write support to usb device from
+ u-boot in future.
+
+ Tested with writing kernel image to raw usb disk & booting with usb
+ read command into ram.
+
+ [Note: run usb part to get info about start sector & number of
+ sectors on a partition for usb write operation.]
+
+ Signed-off-by: Mahavir Jain <mjain@marvell.com>
+
+commit 73c8640e93881439b87a5734485a9e56a494ef50
+Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
+Date: Wed Nov 4 15:58:23 2009 -0600
+
+ omap3evm: musb: add USB config
+
+ Added USB host and device config for host (MSC, Keyboard) and
+ device (ACM) functionalities.
+
+ Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+
+commit ae4caf2fb53cc7be5d59a649b8aee86d542cbb6f
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:46 2009 -0500
+
+ OMAP3 USB Initialize twl4030 only if required
+
+ OMAP3EVM uses ISP1504 phy and so twl4030 related init is not required.
+
+ Submitted-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 2ec1abea4359b94523d45a20d68d8582e09ace46
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:45 2009 -0500
+
+ OMAP3 zoom2 Use usbtty if the debug board is not connected.
+
+ The preferred serial output comes from the debug board.
+ When the debug board is disconnected, fall back on using
+ usbtty from the usb connector on the Zoom2 board.
+
+ This shows up as /dev/ttyACM0 in a linux host.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 6299487ef5dcdb06e0394f5955755c8dd9ce707b
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:44 2009 -0500
+
+ USBTTY make some function declarations easier to use.
+
+ Zoom2 needs to use these declarations and the include directory is a
+ better place from them than in the middle of the driver directory.
+ It did not make sense to create a new file for just a couple of
+ lines so they were appended to the serial.h
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 25374bfbf3a6c6624d8db512c95a4960e3a84635
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:43 2009 -0500
+
+ OMAP3 beagle Add usbtty configuration
+
+ The primary console of beagle is the serial header.
+
+ A secondary console is to use the usbtty. The user can set this
+ manually by doing
+
+ setenv stdout usbtty; setenv stdin usbtty; setenv stderr usbtty
+ saveenv
+
+ usbtty will be usable by accessing the /dev/ttyACM0 on a linux host.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 05be5a60e98eb1243901f556fefd66b1691fabe4
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:42 2009 -0500
+
+ OMAP3 zoom1 Add usbtty configuration
+
+ The primary console of zoom1 is the serial out from the jumpers
+ accessed by removing the back panel.
+
+ A secondary console is to use the usbtty. The user can set this
+ manually by doing
+
+ setenv stdout usbtty; setenv stdin usbtty; setenv stderr usbtty
+ saveenv
+
+ usbtty will be usable by accessing the /dev/ttyACM0 on a linux host.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit f298e4b6dd56df3e35a13a6ddd572ca3baf06ad2
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:41 2009 -0500
+
+ OMAP3 Add usb device support
+
+ This change adds the usb device support for musb.
+
+ Omap3 platform support added at the same level as davinci.
+
+ The interface for usbtty to use the musb device support was added.
+
+ Verified on omap3 beagle, zoom1 and zoom2.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit bffbb2a86d2a3aa28bd8f9869aa553082fb5af5f
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:40 2009 -0500
+
+ TWL4030 Add usb PHY support
+
+ The twl4030 provides a PHY device for connecting a link device,
+ like musb, to physical connection.
+
+ This change adds the twl4030 usb registers and functions for
+ initializing the PHY as required by omap3.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 988365a2048356f94ed0c294009233317c9fb4b2
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:39 2009 -0500
+
+ USB add macros for debugging usb device setup.
+
+ When developing usb device features, it is useful to print out
+ common usb structures.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 8f8bd565f35ff8a068727bfcf8975c50df082043
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 31 12:37:38 2009 -0500
+
+ USB Consolidate descriptor definitions
+
+ The header files usb.h and usbdescriptors.h have the same nameed
+ structure definitions for
+
+ usb_config_descriptor
+ usb_interface_descriptor
+ usb_endpoint_descriptor
+ usb_device_descriptor
+ usb_string_descriptor
+
+ These are out right duplicates in usb.h
+
+ usb_device_descriptor
+ usb_string_descriptor
+
+ This one has extra unused elements
+
+ usb_endpoint_descriptor
+
+ unsigned char bRefresh
+ unsigned char bSynchAddress;
+
+ These in usb.h have extra elements at the end of the usb 2.0
+ specified descriptor and are used.
+
+ usb_config_descriptor
+ usb_interface_descriptor
+
+ The change is to consolidate the definition of the descriptors
+ to usbdescriptors.h. The dublicates in usb.h are removed.
+ The extra element structure will have their name shorted by
+ removing the '_descriptor' suffix.
+
+ So
+
+ usb_config_descriptor -> usb_config
+ usb_interface_descriptor -> usb_interface
+
+ For these, the common descriptor elements are accessed now
+ by an element 'desc'.
+
+ As an example
+
+ - if (iface->bInterfaceClass != USB_CLASS_HUB)
+ + if (iface->desc.bInterfaceClass != USB_CLASS_HUB)
+
+ This has been compile tested on MAKEALL arm, ppc and mips.
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit e5e4e705ce402856a4800ebf4c0cc163d41b58b0
+Author: Li Yang <leoli@freescale.com>
+Date: Wed Dec 9 18:13:26 2009 +0800
+
+ Update Makefile for tag generating
+
+ Get tag directories from the $(__LIB) and also generate tag for .S files.
+
+ Signed-off-by: Li Yang <leoli@freescale.com>
+
+commit d02ffbf8d72085035f746c63c2609daf20a84765
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Dec 16 14:12:11 2009 -0600
+
+ drivers/bios_emulator: Fix compile error in .depend not being generated
+
+ make -C drivers/bios_emulator/
+ make[2]: Entering directory
+ `drivers/bios_emulator'
+ In file included from atibios.c:49:
+ biosemui.h:47:21: error: biosemu.h: No such file or directory
+ ...
+ x86emu/decode.c:40:28: error: x86emu/x86emui.h: No such file or directory
+ ...
+
+ Due to lack of proper CPPFLAGS being passed to .depend generation rule
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit a200a7c04d89853d2a1395b96d8ca5e3dd754551
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Dec 15 23:20:54 2009 +0100
+
+ Update CHANGELOG; prepare Prepare v2009.11
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f9476902b789b0481b9df49af88d6ca94fb16fa0
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Dec 15 12:10:47 2009 -0600
+
+ mpc85xx, mpc86xx: Fix gd->cpu pointer after relocation
+
+ The gd->cpu pointer is set to an address located in flash when the
+ probecpu() function is called while U-Boot is executing from flash.
+ This pointer needs to be updated to point to an address in RAM after
+ relocation has occurred otherwise Linux may not be able to boot due to
+ "fdt board" crashing if flash has been erased or changed.
+
+ This bug was introduced in commit
+ a0e2066f392782730f0398095e583c87812d97f2.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Tested-by: Kumar Gala <galak@kernel.crashing.org>
+ Tested on MPC8527DS.
+ Tested by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 1ab70f6fff9fa3b7910c11b874f625e004256c50
+Author: Ben Warren <biggerbadderben@gmail.com>
+Date: Mon Dec 14 16:30:39 2009 -0800
+
+ Net: Clean up LAN91C96 Support
+
+ A previous Commit converted the LAN91C96 Ethernet driver to using the
+ CONFIG_NET_MULTI API, but did not include full board support. This patch
+ finishes the job.
+
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 3363a34b9eeda9783afcbbed5cdd738926d1f4bf
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Sun Dec 13 17:58:34 2009 -0600
+
+ MVBLUE: Remove CONFIG_CMD_IRQ
+
+ Neither the MVBLUE nor its underlying architecture implement the
+ do_irqinfo() function which is required when CONFIG_CMD_IRQ is defined.
+ This change fixes the following MVBLUE compiler error:
+
+ -> ./MAKEALL MVBLUE
+ Configuring for MVBLUE board...
+ common/libcommon.a(cmd_irq.o):(.u_boot_cmd+0x24): undefined reference to `do_irqinfo'
+ make: *** [u-boot] Error 1
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+ Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+
+commit 18e8ad60ee87431c01cc2686985b60cc54f5dd3b
+Author: Detlev Zundel <dzu@denx.de>
+Date: Mon Dec 14 17:54:40 2009 +0100
+
+ imx27lite: Reenable MTD support on NOR flash.
+
+ The support for this was silently dropped by a configuration
+ split during the merge of the imx27lite board support in commit
+ 864aa034f3a0e10ce710e8bbda171df3cab59414 (cmd_mtdparts: Move to common
+ handling of FLASH devices via MTD layer).
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 076cd24cb4278c125c8f36df386852dc0fcfefae
+Author: Thomas Weber <weber@corscience.de>
+Date: Wed Dec 9 09:38:04 2009 +0100
+
+ net: dm9000x: fix debug output
+
+ commit 60f61e6d7655400bb785a2ef637581679941f6d1 breaks compile with gcc by introducing __func__
+ instead of constant string "func" in the macro call but missed to change the macro.
+
+ Signed-off-by: Thomas Weber <weber@corscience.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit c179a2896e6a5138e30786f1d7961d880dbd6d31
+Author: John Ogness <john.ogness@linutronix.de>
+Date: Fri Dec 11 09:47:28 2009 +0100
+
+ fec_mxc: incomplete error handling
+
+ fec_init() will only allocate fec->base_ptr if it is non-NULL. But
+ the cleanup routine on error will free the pointer without setting
+ it to NULL. This means that a later call to fec_init() would result
+ in using an invalid pointer.
+
+ Signed-off-by: John Ogness <john.ogness@linutronix.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 2ab4a4d0952b754b1c74f4d2b12b83d600d449c8
+Author: Reinhard Arlt <reinhard.arlt@esd.eu>
+Date: Fri Dec 4 09:52:17 2009 +0100
+
+ net: e1000: Add support for the Intel 82546GB controller
+
+ This chip is equipped for example on the esd PMC-ETH2-GB board. So let's
+ add it to the list of supported chips to the e1000 driver.
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit aafda38fb266b94ca344e5ff014d430790c72279
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Oct 28 22:13:40 2009 +0100
+
+ Add error codes/handling for TFTP-server
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit ac6b362a2598b8cd27beb071fa6224cf8b121e1b
+Author: Nishanth Menon <nm@ti.com>
+Date: Fri Oct 16 00:06:37 2009 -0500
+
+ LAN91C96: Enable NET_MULTI LAN driver
+
+ This modification is NOT tested on any of the
+ platforms modified as I dont have them. please
+ help by testing+building+fixing
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit a1725999b8b7527971183122cdfb54e2f87f61ae
+Author: Nishanth Menon <nm@ti.com>
+Date: Fri Oct 16 00:06:36 2009 -0500
+
+ TI OMAP3: SDP3430 FIX NET_MULTI Warning
+
+ Enable the NET MULTI option and remove build warning
+
+ Tested: SDP3430
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b7ad4109da342dfc787468fc713d88d0a8b9e67a
+Author: Nishanth Menon <nm@ti.com>
+Date: Fri Oct 16 00:06:35 2009 -0500
+
+ NET: LAN91C96 CONFIG_NET_MULTIify
+
+ Make the lan91c96 driver capable of CONFIG_NET_MULTI
+ to be clean for the new arch, add a a lil detect function
+ Most of the formatting change was done to keep checkpatch
+ silent, but a few functions and #if 0ed code which
+ does not make sense for NET_MULTI have been removed
+
+ Now, use the lan91c96_initialize() function to init the driver
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 6ac59c5518e1d2e2ef1c4b8dee99267dfbdf9cdc
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 3 11:35:42 2009 -0500
+
+ net: pull CONFIG checks out of source and into makefile
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit f4cfe42758192d09f8375e384cc000aa70d97029
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Dec 9 09:01:43 2009 +0100
+
+ nand: Fix access to last block in NAND devices
+
+ Currently, the last block of NAND devices can't be accessed. This patch
+ fixes this issue by correcting the boundary checking (off-by-one error).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Cc: Scott Wood <scottwood@freescale.com>
+ Cc: Wolfgang Denk <wd@denx.de>
+
+commit 3b887ca8ce72cc12129183538f6e828db13f4867
+Author: Peter Korsgaard <jacmet@sunsite.dk>
+Date: Tue Dec 8 22:20:34 2009 +0100
+
+ mpc83xx: boot time regression, move LCRR setup back to cpu_init_f
+
+ Commit c7190f02 (retain POR values of non-configured ACR, SPCR, SCCR,
+ and LCRR bitfields) moved the LCRR assignment to after relocation
+ to RAM because of the potential problem with changing the local bus
+ clock while executing from flash.
+
+ This change unfortunately adversely affects the boot time, as running
+ all code up to cpu_init_r can cause significant slowdown.
+
+ E.G. on a 8347 board a bootup time increase of ~600ms has been observed:
+
+ 0.020 CPU: e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
+ 0.168 RS: 232
+ 0.172 I2C: ready
+ 0.176 DRAM: 64 MB
+ 1.236 FLASH: 32 MB
+
+ Versus:
+
+ 0.016 CPU: e300c1, MPC8347_PBGA_EA, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
+ 0.092 RS: 232
+ 0.092 I2C: ready
+ 0.096 DRAM: 64 MB
+ 0.644 FLASH: 32 MB
+
+ So far no boards have needed the late LCRR setup, so simply revert it
+ for now - If it is needed at a later time, those boards can either do
+ their own final LCRR setup in board code (E.G. in board_early_init_r),
+ or we can introduce a CONFIG_SYS_LCRR_LATE config option to only do
+ the setup in cpu_init_r.
+
+ Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 4b142febff71eabdb7ddbb125c7b583b24ddc434
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Dec 3 11:21:21 2009 +0100
+
+ common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
+
+ There is more and more usage of printing 64bit values,
+ so enable this feature generally, and delete the
+ CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
+ defines.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 00b6d927ba8900cdf218b90b277e1090e284bea6
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Dec 3 11:20:06 2009 +0100
+
+ 5xxx, fdt: move fdt_fixup_memory() to cpu.c file
+
+ u-boot updates, before starting Linux, the memory node in the
+ DTS. As this is a "standard" feature, move this functionality
+ to the cpu.c file for mpc5xxx and mpc512x processors.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 386118a896554b13f14ad0f82356276988f7de82
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Dec 8 09:12:49 2009 +0100
+
+ microblaze: Correct ffs regression for Microblaze
+
+ We are using generic implementation of ffs. This should
+ be part of Simon's commit 0413cfecea350000eab5e591a0965c3e3ee0ff00
+
+ Here is warning message which this patch removes.
+
+ In file included from /tmp/u-boot-microblaze/include/common.h:38,
+ from cmd_mtdparts.c:87:
+ /tmp/u-boot-microblaze/include/linux/bitops.h:123:1: warning: "ffs" redefined
+ In file included from /tmp/u-boot-microblaze/include/linux/bitops.h:110,
+ from /tmp/u-boot-microblaze/include/common.h:38,
+ from cmd_mtdparts.c:87:
+ /tmp/u-boot-microblaze/include/asm/bitops.h:269:1:
+ warning: this is the location of the previous definition
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 8fe7b29f9811322931f0192a56431edcf819d6b9
+Author: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
+Date: Mon Dec 7 08:09:57 2009 -0800
+
+ microblaze: Stop stack clobbering in microblaze-generic.
+
+ A typo caused the stack and malloc regions to overlap, which prevented
+ mem_malloc_init() from returning. This commit makes the memory layout match
+ the example described in include/configs/microblaze-generic.h
+
+ Signed-off-by: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 0fc52948bda0734431cb528ee4fd82f1dec8c7b5
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Dec 7 23:14:13 2009 +0100
+
+ Update CHANGELOG, prepare -rc2
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f2352877cb2daac88115192fb09991a2397d0b27
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Sun Dec 6 23:58:28 2009 -0600
+
+ MAKEALL: Fix return value
+
+ Previously MAKEALL would always return a value of 0, even if 1 or more
+ boards did not compile. This change causes MAKEALL to return 0 if all
+ boards were able to build, otherwise 1.
+
+ This change also requires changing the script interpreter from sh to
+ bash to support bash's PIPESTATUS variable.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit fbc1c8f6f6c972524197829c56dd8f2f5da0200a
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Sun Dec 6 01:33:24 2009 -0600
+
+ tools/mkimage: Remove duplicate line of code
+
+ Recent commits 1a99de2cb4d08eb3bf9fb3f60a9d533150de8c0e and
+ 6a590c5f5fd12cdd27f3153522acfac3854590e7 both fixed the same bug in the
+ same manner. Unfortunately git was "smart" enough to merge both changes
+ which resulted in some duplicate code.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+ Reordered code and comment a bit.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit df002fa6b9cd475909ede35bf95b803c2289c6a4
+Author: Heiko Schocher <hs@denx.de>
+Date: Sat Dec 5 11:59:51 2009 +0100
+
+ i2c: fix dangling comment in do_i2c_mw()
+
+ commit bd3784df94bfeca43fbf34094df9cb1bd3ecca3b deleted some unused
+ code in do_i2c_mw(), but missed to also remove the respective
+ commment. This patch fixes this.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 7cb5fc15f22de46cc6fabc26baf994cf8f7fa546
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Dec 3 11:20:42 2009 +0100
+
+ mpc52xx, manroland: add some commands
+
+ add the following commands for the manroland boards:
+
+ CONFIG_CMDLINE_EDITING
+ CONFIG_COMMAND_HISTORY
+ CONFIG_AUTO_COMPLETE
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 39ff7d5f4cc547a2034a8bfc2a5b5f4b62fd5c20
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Dec 3 06:24:30 2009 +0100
+
+ POST: Remove duplicated post_hotkey_pressed() functions
+
+ This patch introduces a weak default function for post_hotkey_pressed(),
+ returning 0, for boards without hotkey support. The long-running tests
+ won't be started on those boards. This default function was implemented
+ in many board directories. By implementing this weak default we can
+ remove all those duplicate versions.
+
+ Boards with hotkey support, can override this weak default function
+ by defining one in their board specific code.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f8450829f921cf10667af98a8d08edfa3d998f04
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Dec 1 19:30:47 2009 +0100
+
+ 52xx, manroland: add fdt_fixup_memory() in ft_board_setup()
+
+ To update the real memory size in the memory node on the
+ uc101 and mucmc52 boards call fdt_fixup_memory() in
+ ft_board_setup().
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0ec81db20294efdad2454a753e79f1fe244a43ca
+Author: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
+Date: Tue Dec 1 14:05:55 2009 +0100
+
+ Fix computation in nand_util.c:get_len_incl_bad
+
+ Depending on offset, flash size and the number of bad blocks,
+ get_len_incl_bad may return a too small value which may lead to:
+
+ 1) If there are no bad blocks, nand_{read,write}_skip_bad chooses the
+ bad block aware read/write code. This may hurt performance, but does
+ not have any adverse effects.
+
+ 2) If there are bad blocks, the nand_{read,write}_skip_bad may choose
+ the bad block unaware read/write code (if len_incl_bad == *length)
+ which leads to corrupted data.
+
+ Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
+
+commit aabb8cb0818e285aeed0cfaf243635997e07554d
+Author: Evan Samanas <esamanas@xes-inc.com>
+Date: Mon Nov 9 20:08:36 2009 -0600
+
+ nfs: NfsTimeout() updates
+
+ - NfsTimeout() does not correctly update the NFS timeout value which
+ results in NfsTimeout() only being called once in certain situations.
+ This can result in the 'nfs' command hanging indefinetly. For
+ example, the command:
+
+ nfs 192.168.0.1:/home/user/file
+
+ will not exit until ctrl-c is pressed if 192.168.0.1 does not have an
+ NFS server running.
+
+ This issue is resolved by reinitializting the NFS timeout value inside
+ NfsTimeout() when a timeout occurs.
+
+ - Make the 'nfs' command print the 'T' character when a timeout occurs.
+ Previously there was no indication that timeouts were occuring.
+
+ - Mimic the 'tftpboot' command and when a download fails print "Retry
+ count exceeded; starting again", and restart the download taking the
+ 'netretry' environment variable into account.
+
+ Signed-off-by: Evan Samanas <esamanas@xes-inc.com>
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+ Tested on TQM8xxL.
+
+ Tested by: Wolfgang Denk <wd@denx.de>
+
+ Tested on MPC8527DS.
+
+ Tested by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 224c90d1060bf1a83cbf33ca51d060b9d19e0294
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Nov 18 19:08:59 2009 -0600
+
+ bootm: Fix help message's sub-command ordering
+
+ The help message for the 'bootm' command listed the 'cmdline' and 'bdt'
+ sub-commands in the wrong order which resulted in the error below when
+ following the 'help' command's instructions:
+
+ "Trying to execute a command out of order"
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit a93c92cddaedd5f0720e0da15c6664f7a688b582
+Author: Robert P. J. Day <rpjday@crashcourse.ca>
+Date: Tue Nov 17 07:30:23 2009 -0500
+
+ help: Correct syntax of nandecc help output.
+
+ "nandecc" help output should not reproduce the command name, nor have
+ a trailing newline.
+
+ Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+
+commit c2fff331a32ceca837d76eb7827d6340da270d52
+Author: Mike Rapoport <mike@compulab.co.il>
+Date: Wed Nov 11 10:03:03 2009 +0200
+
+ smc911x: update SMC911X related configuration description
+
+ Since commit 736fead8fdbf8a8407048bebc373cd551d01ec98 "Convert SMC911X
+ Ethernet driver to CONFIG_NET_MULTI API" SMC911X configration options
+ are called CONFIG_SMC911X rather than CONFIG_DRIVER_SMC911X. Update
+ README to reflect that change.
+
+ Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+
+commit 45b6b65c6bf06a589ef3123192af94b0381db27b
+Author: Mike Rapoport <mike@compulab.co.il>
+Date: Wed Nov 11 10:03:09 2009 +0200
+
+ smc911x: fix typo in smc911x_handle_mac_address name
+
+ Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+
+commit f64ef9bb995687e24e0b61b52316f4eaa97c3bbc
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Nov 19 02:47:28 2009 -0600
+
+ fix nfs symlink name corruption
+
+ An off by one error may cause nfs readlink lookup fail if
+ nfs_path_buff has non-zero data from a previous use.
+
+ Loading: *** ERROR: File lookup fail
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit e8fac25e83426fdf461c66aa8a2530ec28ec536e
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Dec 7 21:06:40 2009 +0100
+
+ at91sam9261ek.c: fix minor coding style issue.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 4713010adf5beda87410d637ebfc58db0db9a9db
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Dec 6 01:21:28 2009 +0100
+
+ trab: fix warning: implicit declaration of function 'disable_vfd'
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a9f99ab44b473fb394169ba365f8b4380f981584
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Dec 6 00:53:18 2009 +0100
+
+ zlib.c: avoid build conflicts for cradle board
+
+ Commit dce3d79710 updated the zlib code to v0.95; this caused
+ conflicts when building for the "cradle" board, because the (pretty
+ generic) preprocessor variable "OFF" was used in multiple files.
+ Make sure to avoid further conflicts by #undef'ing it in zlib.c
+ before redefining it.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ cc: Giuseppe Condorelli <giuseppe.condorelli@st.com>
+ cc: Angelo Castello <angelo.castello@st.com>
+ cc: Alessandro Rubini <rubini-list@gnudd.com>
+
+commit 8cbf4e4f17121d732e78764f0ba317c9a1838ea6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Dec 6 00:26:19 2009 +0100
+
+ Fix out-of-tree building of "apollon" board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f68ab43de67f59925542efb6bcec30f4a84fe695
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Dec 4 05:35:15 2009 -0500
+
+ lzma: ignore unset filesizes
+
+ The Linux kernel build system changed how it compresses things with LZMA
+ such that the header no longer contains the filesize (it is instead set to
+ all F's). So if we get a LZMA image that has -1 for the 64bit field,
+ let's just assume that the decompressed size is unknown and continue on.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit cccfc2ab77877dbdd2abe26b28d4c1f467feb0c0
+Author: Detlev Zundel <dzu@denx.de>
+Date: Tue Dec 1 17:16:19 2009 +0100
+
+ README: Rearrange paragraphs to regain linear arrangement.
+
+ Two later additions to the Configuration Option section unfortunately
+ split the description of Show boot progress and the list of its call outs.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit cd514aeb996e2f7aefbe1f78481965d9d074aed4
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Thu Nov 19 13:22:44 2009 +0100
+
+ zlib: Optimize decompression
+
+ This patch optimizes the direct copy procedure.
+ Uses get_unaligned() but only in one place.
+ The copy loop just above this one can also use this
+ optimization, but I havn't done so as I have not tested if it
+ is a win there too.
+ On my MPC8321 this is about 17% faster on my JFFS2 root FS
+ than the original. No speed test has been performed in u-boot.
+
+ Size increase on ppc: 484 bytes
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+ Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
+
+commit 20dde48bcadd856c86a91d5463831a10be46db83
+Author: Peter Korsgaard <jacmet@sunsite.dk>
+Date: Thu Nov 19 11:37:51 2009 +0100
+
+ add lzop decompression support
+
+ Add lzop decompression support to the existing lzo bitstream handling
+ (think gzip versus zlib), and support it for uImage decompression if
+ CONFIG_LZO is enabled.
+
+ Lzop doesn't compress as good as gzip (~10% worse), but decompression
+ is very fast (~0.7s faster here on a slow ppc). The lzop decompression
+ code is based on Albin Tonnerre's recent ARM Linux lzo support patch.
+
+ Cc: albin.tonnerre@free-electrons.com
+ Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
+
+commit c81296c16fd9d12422c9968cc0f1d9bf440a7d88
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Nov 24 16:42:10 2009 -0600
+
+ tools/mkimage: Print FIT image contents after creation
+
+ Previously, there was no indication to the user that a FIT image was
+ successfully created after executing mkimage. For example:
+
+ $ mkimage -f uImage.its uImage.itb
+ DTC: dts->dtb on file "uImage.its"
+
+ Adding some additional output after creating a FIT image lets the user
+ know exactly what is contained in their image, eg:
+
+ $ mkimage -f uImage.its uImage.itb
+ DTC: dts->dtb on file "uImage.its"
+ FIT description: Linux kernel 2.6.32-rc7-00201-g7550d6f-dirty
+ Created: Tue Nov 24 15:43:01 2009
+ Image 0 (kernel@1)
+ Description: Linux Kernel 2.6.32-rc7-00201-g7550d6f-dirty
+ Type: Kernel Image
+ Compression: gzip compressed
+ Data Size: 2707311 Bytes = 2643.86 kB = 2.58 MB
+ Architecture: PowerPC
+ OS: Linux
+ Load Address: 0x00000000
+ Entry Point: 0x00000000
+ Hash algo: crc32
+ Hash value: efe0798b
+ Hash algo: sha1
+ Hash value: ecafba8c95684f2c8fec67e33c41ec88df1534d7
+ Image 1 (fdt@1)
+ Description: Flattened Device Tree blob
+ Type: Flat Device Tree
+ Compression: uncompressed
+ Data Size: 12288 Bytes = 12.00 kB = 0.01 MB
+ Architecture: PowerPC
+ Hash algo: crc32
+ Hash value: a5cab676
+ Hash algo: sha1
+ Hash value: 168722b13e305283cfd6603dfe8248cc329adea6
+ Default Configuration: 'config@1'
+ Configuration 0 (config@1)
+ Description: Default Linux kernel
+ Kernel: kernel@1
+ FDT: fdt@1
+
+ This brings the behavior of creating a FIT image in line with creating a
+ standard uImage, which also prints out the uImage contents after
+ creation.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 8e1c89663cc8796b85588910046e03b388a7597c
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Nov 24 16:42:09 2009 -0600
+
+ tools/fit_image.c: Remove unused fit_set_header()
+
+ The FIT fit_set_header() function was copied from the standard uImage's
+ image_set_header() function during mkimage reorganization. However, the
+ fit_set_header() function is not used since FIT images use a standard
+ device tree blob header.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 1a99de2cb4d08eb3bf9fb3f60a9d533150de8c0e
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Nov 24 16:42:08 2009 -0600
+
+ tools/mkimage: Assume FDT image type for FIT images
+
+ When building a Flattened Image Tree (FIT) the image type needs to be
+ "flat_dt". Commit 89a4d6b12fd6394898b8a454cbabeaf1cd59bae5 introduced a
+ regression which caused the user to need to specify the "-T flat_dt"
+ parameter on the command line when building a FIT image. The "-T
+ flat_dt" parameter should not be needed and is at odds with the current
+ FIT image documentation.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 3eb90bad651fab39cffba750ec4421a9c01d60e7
+Author: Ingo van Lil <inguin@gmx.de>
+Date: Tue Nov 24 14:09:21 2009 +0100
+
+ Generic udelay() with watchdog support
+
+ According to the PPC reference implementation the udelay() function is
+ responsible for resetting the watchdog timer as frequently as needed.
+ Most other architectures do not meet that requirement, so long-running
+ operations might result in a watchdog reset.
+
+ This patch adds a generic udelay() function which takes care of
+ resetting the watchdog before calling an architecture-specific
+ __udelay().
+
+ Signed-off-by: Ingo van Lil <inguin@gmx.de>
+
+commit 1c409bc7101a24ecd47a13a4e851845d66dc23ce
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:21 2009 +1100
+
+ i386: Final Relocation
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit cabe5794803fbe18bedac2d9c7f2417a0fa95ec1
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:20 2009 +1100
+
+ i386: Move references to link script exports
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 0fc1b49ecbd7ec7371f9ede0600e4fd28cec7f33
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:19 2009 +1100
+
+ i386: Remove inline asm symbols from .dynsym
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 564a9984bdbf86a02cf4f0d848933a9fff4a1d18
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:18 2009 +1100
+
+ i386: Rearrange Interupt Handling
+
+ In preperation for full relocation
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 27f13075a659da046372dfe249d808f2f6ddb432
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:17 2009 +1100
+
+ i386: Fix race condition when using SC520 timers
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 141a62cc12bfbab49f0f44a394518a360dcddad8
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:16 2009 +1100
+
+ i386: Fix global label in inline asm compile error
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 4ee4e413baa8e951e3c42c17a808578867a63572
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:15 2009 +1100
+
+ i386: Reorder source objects in lib_i386 Makefile
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit aea14421c52f31e39837aa2890e07e9c70ee61fd
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:14 2009 +1100
+
+ i386: Fix link collisions resulting from gcc4.4.1 upgrade
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit b4feeb4e8a1d9124bae39985a97b99d08e06186d
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:13 2009 +1100
+
+ i386: Fix malloc initialization
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit c74bfce0fb20ec4d01809fa0566263894923467b
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Nov 24 20:04:12 2009 +1100
+
+ i386: Fix dlmalloc compile warning
+
+ Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
+
+commit 270737acca21f3939f814de5dcf350a1c3d80d83
+Author: Michael Brandt <Michael.Brandt@emsyso.de>
+Date: Sun Nov 22 14:13:27 2009 +0100
+
+ EXT2FS: fix inode size for ext2fs rev#0
+
+ extfs.c assumes that there is always a valid inode_size field in the
+ superblock. But this is not true for ext2fs rev 0. Such ext2fs images
+ are for instance generated by genext2fs. Symptoms on ARM machines are
+ messages like: "raise: Signal # 8 caught"; on PowerPC "ext2ls" will
+ print nothing.
+ This fix checks for rev 0 and uses then 128 bytes as inode size.
+
+ Signed-off-by: Michael Brandt <Michael.Brandt@emsyso.de>
+ Tested on: TQM5200S
+ Tested-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit bcb324d68f7955c1136dafc944eb55db8ebaa601
+Author: Robert P. J. Day <rpjday@crashcourse.ca>
+Date: Thu Nov 19 11:00:28 2009 -0500
+
+ Remove superfluous preprocessor tests from some cmd_*.c files.
+
+ A small number of common/cmd_*.c files contain preprocessor tests that
+ are apparently superfluous since those same tests are used in the
+ Makefile to control the compilation of those files. Those tests are
+ clearly redundant as long as they surround the entirety of the source
+ in those files.
+
+ Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+
+commit 3ee8c12071f0e3bdda25125b63c9d3fd54a7c9d8
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Thu Nov 19 13:44:16 2009 +0100
+
+ crc32: Impl. linux optimized crc32()
+
+ Ported over the more efficient linux crc32() function.
+ A quick comparsion on ppc:
+ After changing the old crc32 to do 4 bytes in the
+ inner loop to be able to compare with new version one can note:
+ - old inner loop has 61 insn, new has 19 insn.
+ - new crc32 does one 32 bit load of data to crc while
+ the old does four 8 bits loads.
+ - size is bit bigger for the new crc32:
+ 1392(old) 1416(new) of text. The is because the new version
+ shares code with crc32_no_comp() instead of duplicating code.
+ - about 33% faster on ppc:
+ New > crc 0 0xfffffff -> 39 secs
+ Old > crc 0 0xfffffff -> 60 secs
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit ad53226156fa64b6d04c0d1d6e91e09979cbea15
+Author: Robert P. J. Day <rpjday@crashcourse.ca>
+Date: Tue Nov 17 01:59:29 2009 -0500
+
+ README: Update the list of directories.
+
+ Bring the directory listing more into line with current content.
+
+ Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
+
+commit bd3784df94bfeca43fbf34094df9cb1bd3ecca3b
+Author: Pratap Chandu <pratap.rrke@gmail.com>
+Date: Thu Nov 12 19:28:25 2009 +0530
+
+ Removes dead code in the file common/cmd_i2c.c
+
+ There is some dead code enclosed by #if 0 .... #endif in the file
+ common/cmd_i2c.c
+ This patch removes the dead code.
+
+ Signed-off-by: Pratap Chandu <pratap.rrke@gmail.com>
+
+commit 64a480601a5614b441de692ae15a62c51e0bb381
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Nov 11 17:51:56 2009 -0500
+
+ smc91111_eeprom: drop CONFIG stub protection
+
+ Since the Makefile now controls the compilation of this, there is no need
+ for CONFIG checking nor the stub function.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit f3a7bddc06c927c36a1a99a97131299479ef207a
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Wed Nov 11 19:56:58 2009 +0100
+
+ RTC: Fix return code in MC13783 RTC driver.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit d52e3e0176a74c30549251e16c5c00a363c544d2
+Author: Magnus Lilja <lilja.magnus@gmail.com>
+Date: Wed Nov 11 19:56:36 2009 +0100
+
+ cmd_date: Fix spelling in error message.
+
+ Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
+
+commit c253122395753abb9e531d8906c5265dc8803fb1
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Nov 11 10:36:28 2009 -0600
+
+ Move do_irqinfo() to common/cmd_irq.c
+
+ cmd_irq.c is a much better home and it is already conditionally
+ compiled based on CONFIG_CMD_IRQ.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit a5dd4dc64fe68e549c5ffcf6a048281b5ba94752
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Wed Nov 11 10:36:19 2009 -0600
+
+ cmd_license: Remove unneeded #ifdef CONFIG_CMD_LICENSE
+
+ cmd_license is already conditionally compiled at the Makefile-level.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 06015146a15adc7455440c491d543f6a8091551d
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 15:18:52 2009 -0600
+
+ m41t11: Remove unused functions
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 9ef78511cda39987e5fc10febf386fd19f58ecf7
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Mon Nov 9 15:17:50 2009 -0600
+
+ circbuf: Move to lib_generic and conditionally compile
+
+ circbuf could be used as a generic library and is only currently
+ needed when CONFIG_USB_TTY is defined.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 604f7ce55ad74694ef8743ad2e99933dc0265e46
+Author: Sanjeev Premi <premi@ti.com>
+Date: Mon Nov 9 22:43:00 2009 +0530
+
+ Fix build failure in examples/standalone
+
+ Some versions of 'make' do not handle trailing white-spaces
+ properly. Trailing spaces in ELF causes a 'fake' source to
+ be added to the variable COBJS; leading to build failure
+ (listed below). The problem was found with GNU Make 3.80.
+
+ Using text-function 'strip' as a workaround for the problem.
+
+ make[1]: Entering directory `/home/sanjeev/u-boot/examples/standalone'
+ arm-none-linux-gnueabi-gcc -g -Os -fno-common -ffixed-r8 -msoft-float
+ -D__KERNEL__ -DTEXT_BASE=0x80e80000 -I/home/sanjeev/u-boot/include
+ -fno-builtin -ffreestanding -nostdinc -isystem /opt/codesourcery/2009q1-
+ 203/bin/../lib/gcc/arm-none-linux-gnueabi/4.3.3/include -pipe -DCONFIG_
+ ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork -march=armv5
+ -Wall -Wstrict-prototypes -fno-stack-protector -g -Os -fno-common -ff
+ ixed-r8 -msoft-float -D__KERNEL__ -DTEXT_BASE=0x80e80000 -I/home/sanje
+ ev/u-boot/include -fno-builtin -ffreestanding -nostdinc -isystem /opt/co
+ desourcery/2009q1-203/bin/../lib/gcc/arm-none-linux-gnueabi/4.3.3/includ
+ e -pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-inte
+ rwork -march=armv5 -I.. -Bstatic -T u-boot.lds -Ttext 0x80e80000 -o .c
+ arm-none-linux-gnueabi-gcc: no input files
+ make[1]: *** [.c] Error 1
+ make[1]: Leaving directory `/home/sanjeev/u-boot/examples/standalone'
+ make: *** [examples/standalone] Error 2
+ premi #
+
+ Signed-off-by: Sanjeev Premi <premi@ti.com>
+
+ Fixed typo (s/ElF/ELF/).
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d984fed068b3bec8a7edaf7a3de71479abde080a
+Author: Scott Wood <scottwood@freescale.com>
+Date: Wed Nov 4 18:41:41 2009 -0600
+
+ makefiles: fixes for building build tools
+
+ Currently, some of the tools instead set CC to be HOSTCC in order to re-use
+ some pattern rules -- but this fails when the user overrides CC on the make
+ command line. Also, the HOSTCFLAGS in tools/Makefile are currently not
+ being used because config.mk overwrites them.
+
+ This patch adds static pattern rules for files that have been requested to
+ be built with the native compiler using $(HOSTSRCS) and $(HOSTOBJS), and
+ converts the tools to use them.
+
+ It restores easylogo to using the host compiler, which was broken by commit
+ 38d299c2db81bd889c601b5dfc12c4e83ef83333 (if this was an intentional change,
+ please let me know -- but it seems to be a build tool).
+
+ It restores -pedantic and the special flags for darwin and cygwin that were
+ requested in tools/makefile (but keeps the flags added by config.mk) --
+ hopefully someone can test this on those platforms. It no longer
+ conditionalizes -pedantic on not being darwin; it wasn't clear that that was
+ intentional, and unless there's a real problem it's just inviting people to
+ contribute non-pedantic patches to those files (I'm not a fan of -pedantic
+ personally, but if it's on for one platform it should be on for all).
+
+ HOST_LDFLAGS is renamed HOSTLDFLAGS for consistency with the previous
+ HOST_CFLAGS to HOSTCFLAGS rename. A new HOSTCFLAGS_NOPED is made available
+ for those files which currently cannot be built with -pedantic, and replaces
+ the old FIT_CFLAGS.
+
+ imls now uses the cross compiler properly, rather than by trying to
+ reconstruct CC using the typoed $(CROSS_COMPILER).
+
+ envcrc.c is now dependency-processed unconditionally -- previously it would
+ be built without being on (HOST)SRCS if CONFIG_ENV_IS_EMBEDDED was not
+ selected.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit af860962b544ddf323c4ff68454f00d31e44df0a
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Wed Nov 4 18:30:08 2009 -0600
+
+ 85xx: Remove unused CONFIG_ASSUME_AMD_FLASH from config files
+
+ A bunch of the 85xx boards have this cruft in them - it's not used
+ anywhere. Delete it.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit bf44f3f327acddba202ff67f70192926ea47dfd1
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Nov 4 16:34:42 2009 -0500
+
+ exports: rewrite jump table init
+
+ The current jump table init fails to initialize a bunch of exported
+ symbols (forceenv/do_reset/etc...). Rather than fix just these few
+ missing pieces, rewrite the code to utilize the existing list of
+ exported symbols -- _exports.h. Since every exported symbol has to
+ be listed in this header, it makes sense to use it so that we only
+ ever have one list that needs to be updated and things can't fall
+ out of sync again.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit deec1fbd4f704dded2e668bb9e368631981ea139
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Dec 2 22:26:30 2009 +0100
MAINTAINERS: update responsible for MPC85xx/86xx
- Signed-off-by: Wolfgang Denk <wd@denx.de>
- Cc: Kumar Gala <galak@kernel.crashing.org>
- Cc: Becky Bruce <beckyb@kernel.crashing.org>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Cc: Kumar Gala <galak@kernel.crashing.org>
+ Cc: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit 71636fa7c3de63de29c0f514d5c725eccb011657
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sun Nov 29 17:56:36 2009 -0600
+
+ ARM Update mach-types
+
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
+
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit 3fcca9ac6cbce35b3e81e247d375534117d5f4cd
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 7c15121f4007751af8c45c978c4ad7d6c5ff11f9
+Author: Vaibhav Hiremath <hvaibhav@ti.com>
+Date: Mon Nov 23 16:36:05 2009 +0530
+
+ omap3_mmc: Encapsulate twl4030 under option CONFIG_TWL4030_POWER
+
+ Fixes the build/compilation error if we try to re-use the omap3_mmc code
+ without TWL4030_POWER.
+
+ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
+
+commit 6406d6daea51bbeed21f3829b37d3f395c198e54
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 21 13:13:59 2009 -0500
+
+ TI DaVinci: Adding a README for the DaVinci series of SOC's
+
+ Adding an initial README for the DaVinci series of SOC's
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 990f569c4fa6b9e76b31d0a5229981c092b02dcf
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at>
+Date: Sat Jun 6 10:30:58 2009 +0000
+
+ avr32/hsdramc: Move conditional compilation to Makefile
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj <at> jcrosoft.com>
+ Cc: Haavard Skinnemoen <haavard.skinnemoen <at> atmel.com>
+
+commit 3f12f5217e8bdf8f6842bf1b8c5c5b98425ac3db
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 21 13:24:17 2009 -0500
+
+ NAND: Add config option for imx27lite
+
+ We will get compilation warnings without
+ "CONFIG_SYS_64BIT_VSPRINTF" being defined
+ in the board config.
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 43a5f0df2f2e3a2b5eab05d6742501c98d3c0d0c
+Author: Po-Yu Chuang <ratbert.chuang@gmail.com>
+Date: Wed Nov 11 17:27:30 2009 +0800
+
+ arm: A320: Add support for Faraday A320 evaluation board
+
+ This patch adds support for A320 evaluation board from Faraday. This board
+ uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
+ FA526 is an ARMv4 processor and uses the ARM920T source in this patch.
+
+ Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
+
+commit 39ba774f9b02c44b8fd4df44afac932800c18662
+Author: Po-Yu Chuang <ratbert.chuang@gmail.com>
+Date: Wed Nov 11 17:26:00 2009 +0800
+
+ arm: A320: driver for FTRTC010 real time clock
+
+ This patch adds an FTRTC010 driver for Faraday A320 evaluation board.
+
+ Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
+
+commit c1ee63cee89c5822fbbcc63586c8f2a1add70614
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 21 18:08:49 2009 -0500
+
+ TI DaVinci DM646x: Enable NAND on DM6467 EVM
+
+ This patch enables NAND on the DM6467 EVM
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit d414aae552bc229dafcad92028effb4a8306c7a5
+Author: Nishanth Menon <nm@ti.com>
+Date: Mon Nov 9 09:29:34 2009 -0500
+
+ OMAP3: Fix SDRC init
+
+ Defaults are for Infineon DDR timings.
+ Since none of the supported boards currently do
+ XIP boot, these seem to be faulty. fix the values
+ as per the calculations(ACTIMA,B), conf
+ the sdrc power with pwdnen and wakeupproc bits
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit 30563a04bff73fd4fbd840b846f4b6459759a839
+Author: Nishanth Menon <nm@ti.com>
+Date: Sat Nov 7 10:51:24 2009 -0500
+
+ OMAP3:SDRC: introduce DDR types
+
+ Micron DDR timings based on:
+ http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-omap3.git;a=blob;f=include/asm/arch-omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD
+
+ Introduce Micron DDR timings and provide
+ CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
+ options to allow for platform files to setup their timings as
+ per the type of DDR selected
+
+ Reported-by: Steve Sakoman in http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit 169a4c804dbaf11facb041b1333d394c6ceb8d68
+Author: Nishanth Menon <nm@ti.com>
+Date: Sat Nov 7 10:40:47 2009 -0500
+
+ OMAP3:SDRC: Cleanup references to SDP
+
+ Remove SDP referenced unused defines
+
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit 2819e1365be0c81a0141ef5c6a7996b40888f6d8
+Author: Sekhar Nori <nsekhar@ti.com>
+Date: Thu Nov 12 11:09:25 2009 -0500
+
+ TI DA8xx: Integrate DA830 EVM support into U-Boot
+
+ Integrate DA830 EVM support into U-Boot.
+
+ Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
+ Digital EVM board. See http://www.spectrumdigital.com/
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit bdc9c6c7f77a9a63349ecb9f54b20ad34033a2ae
+Author: Sekhar Nori <nsekhar@ti.com>
+Date: Thu Nov 12 11:08:39 2009 -0500
+
+ TI DA8xx: Add new directory for da830evm board
+
+ Add new directory for da830evm board
+
+ Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
+ Digital EVM board. See http://www.spectrumdigital.com/
+
+ Provides:
+ Initial boot and configuration.
+ Support for i2c.
+ UART support (console).
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit 91172baf46a57807233eb7bcd724b9f10109cfe0
+Author: Sekhar Nori <nsekhar@ti.com>
+Date: Thu Nov 12 11:07:22 2009 -0500
+
+ TI DA8xx: Add DA8xx cpu functions
+
+ Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
+ See http://www.ti.com
+
+ Provides:
+ Low level initialisation.
+ System clock API.
+ Timer control.
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit bbed056e550b26712edc173411c9d7ff9cb7e0e6
+Author: Nick Thompson <nick.thompson@gefanuc.com>
+Date: Thu Nov 12 11:06:08 2009 -0500
+
+ Add TI DA8xx support: DA8xx includes
+
+ Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
+ See http://www.ti.com
+
+ The DA8xx devices are similar to DaVinci devices but have a differing
+ memory map and updated peripheral versions.
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+ Signed-off-by: Sekhar Nori <nsekhar@ti.com>
+
+commit ca8480d444bdcc1670e42a613c5a5e4e8366d2d9
+Author: Nick Thompson <nick.thompson@gefanuc.com>
+Date: Thu Nov 12 11:03:23 2009 -0500
+
+ TI Davinci: add a pin multiplexer configuration API
+
+ Creates a method allowing pin settings to be logically grouped into data
+ structure arrays and provides an API to configure the pinmux settings to
+ enable the relevant pin functions.
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit 9868a36dfb8de4bb98b48e4f4eb912312d67279e
+Author: Nick Thompson <nick.thompson@gefanuc.com>
+Date: Thu Nov 12 11:02:17 2009 -0500
+
+ TI Davinci timer.c: Remove volatiles and memory mapped structures
+
+ Remove volatiles and memory mapped structure accesses and replace with
+ readl and writel macro usage.
+
+ Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
+
+commit c90b32739a50ca52d9b8d220ea6875ae994566ec
+Author: Grazvydas Ignotas <notasas@gmail.com>
+Date: Thu Nov 12 11:46:07 2009 +0200
+
+ OMAP3: pandora: fix booting without serial attached
+
+ When the board is booted without serial cable attached (which
+ is how most of them will be used) UART RX is left floating and
+ sometimes picks noise, which interrupts countdown and enters
+ U-Boot prompt instead of booting the kernel.
+
+ Fix this by setting up internal pullup on UART RX pin. This
+ does not prevent serial from working as the internal pullup
+ is weak.
+
+ Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+
+commit ac67804fbb2d82a19170066c02af7053d474ce8d
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date: Tue Nov 17 18:30:34 2009 +0900
+
+ Add a unified s3c24x0 header file
+
+ This patch adds a unified s3c24x0 cpu header file that selects the header
+ file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
+ board config file. This removes the current chain of s3c24-type #ifdef's
+ from the s3c24x0 code.
+
+ Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit a59a23d68ae4f4a1c07d105520c93e6e289d186f
+Author: Seunghyeon Rhee <rhee4j1@gmail.com>
+Date: Fri Nov 13 16:49:41 2009 +0900
+
+ S3C6400/SMDK6400: fix stack_setup in start.S
+
+ Fix stack_setup to place the stack on the correct address in DRAM
+ accroding to U-Boot standard and remove conditional compilation by
+ CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
+ was introduced and used only by this board for some unclear reason.
+
+ The definition of this macro is also removed because it's not
+ referenced elsewhere.
+
+ Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
+ Tested-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 940032260914076b1594906334b2e3f7af6fb7cf
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Tue Nov 10 20:23:50 2009 +0900
+
+ s5pc1xx: serial: fix the error check logic
+
+ Because of Frame error, Parity error and Overrun error are occured only receive
+ operation, need to masking when error checking.
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 9ebfdc202275bcd9eb4af56e32bfb4253ff1b781
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date: Wed Nov 4 17:49:31 2009 +0900
+
+ Clean-up of s3c24x0 header files
+
+ Cleans up the s3c24x0 header files:
+
+ s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
+ S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
+ accessed using the IO accessor functions which cast the register address
+ as 'volatile' anyway so it isn't required here.
+
+ s3c2400.h and s3c2410.h: insert a blank line between the static inline
+ functions
+
+ Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+
+commit 47e801bec360e69e4b087a141d015b318e1b0212
+Author: Minkyu Kang <mk7.kang@samsung.com>
+Date: Wed Nov 4 16:07:59 2009 +0900
+
+ s3c64xx: move s3c64xx header files to asm-arm/arch-s3c64xx
+
+ This patch moves the s3c64xx header files from include/
+ to include/asm-arm/arch-s3c64xx
+
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 492fb1fdbcdd5e21be0b6742c15f76c648f0653b
+Author: kevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>
+Date: Tue Nov 3 18:08:41 2009 +0900
+
+ Move s3c24x0 header files to asm-arm/arch-s3c24x0/
+
+ This patch moves the s3c24x0 header files from include/ to
+ include/asm-arm/arch-s3c24x0/.
+
+ checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
+ to a non-UTF8 character in David M?ller's name:
+
+ ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
+ #489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ + * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
+
+ As David's name correctly contains a non-UTF8 character I haven't fixed
+ these errors.
+
+ The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:
+
+ WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
+ #673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+ +typedef volatile u8 S3C24X0_REG8;
+ +typedef volatile u16 S3C24X0_REG16;
+ +typedef volatile u32 S3C24X0_REG32;
+
+ I'll fix these errors in another patch.
+
+ Tested by running MAKEALL for ARM8 targets and ensuring there were no new
+ errors or warnings.
+
+ Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
+ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
+
+commit 2d251ccaa90997012e0b1f13bf791df2bf03a144
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sun Nov 15 10:58:06 2009 -0600
+
+ ARM Update mach-types
+
+ Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
+ And built with
+
+ repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+ commit 156171c71a0dc4bce12b4408bb1591f8fe32dc1a
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit c88ed4cb2eed29a690ac6689ed1dc2f5e9547d15
+Author: Mark Asselstine <[mark.asselstine@windriver.com]>
+Date: Tue Oct 27 19:40:40 2009 +0530
+
+ sheevaplug: correct SDRAM address control register
+
+ value
+
+ The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
+ two banks for a total of 512MB of RAM. Based on this configuration
+ the existing values for SDRAM address control register are incorrect
+ and result in random kernel oops as memory is incorrectly accessed
+ (while for example extracting a large tarball such as a rootfs).
+ Based on the hardware configuration along with the supporting
+ documentation from Marvell these are the correct values, as
+ well this change mimics values previously used in Marvell's own
+ u-boot git tree for the SheevaPlug.
+
+ Other variants of the hardware such as the PogoPlug and TonidoPlug
+ may have different memory configurations but to properly support
+ those additional board directories should be maintained or a better
+ system to support other kwb*.cfg is needed.
+
+ Tested on SheevaPlug DevKit.
+
+ Signed-off-by: Mark Asselstine <mark.asselstine@windriver.com>
+
+commit 9829cabbaa0474e94075bf7d62c99bdba996518b
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Wed Oct 28 19:16:43 2009 -0400
+
+ Fix for Void function returning value in sbc35-a9g20
+
+ Void function was returning 0 in the m41t94 rtc driver.
+ This makes it similar to m41t62 rtc driver.
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit d5e2d625c74c84aa419ba7fa0c81bad93fc69a60
+Author: Tom Rix <Tom.Rix@windriver.com>
+Date: Sat Oct 24 14:48:33 2009 -0500
+
+ ARM Update mach-types.h
+
+ From http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
+
+ Commit id 0996391139f43d032335b5360db11da62a2cbb39
+
+ Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
+
+commit 34ddbd171ba154e9afd83f07a07ad8b57ac592e3
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Oct 22 23:06:59 2009 +0200
+
+ ppc4xx: Remove autoupdate feature from PLU405 board
+
+ The autoupdate feature is not used on PLU405 boards.
+ So remove it.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 824d82997fbcf28e49081d36fdd5d3be1b92b03d
+Author: Ira W. Snyder <iws@ovro.caltech.edu>
+Date: Wed Nov 4 13:37:59 2009 -0800
+
+ Fix example FIT image source files
+
+ The example FIT image source files do not compile with the latest dtc and
+ mkimage. The following error message is produced:
+
+ DTC: dts->dtb on file "kernel.its"
+ Error: kernel.its 7:0 - 1:0 syntax error
+ FATAL ERROR: Unable to parse input tree
+ ./mkimage: Can't read kernel.itb.tmp: Invalid argument
+
+ The FIT image source files are missing the "/dts-v1/;" directive at the
+ beginning of the file. Add the directive to the examples.
+
+ Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+
+commit fd66066ee3ce15c2966feb9b2be0f0d51a95db48
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Nov 4 16:13:19 2009 -0500
+
+ img2srec: use standard types
+
+ The img2srec code creates a lot of typedefs with common names. These
+ easily clash with system headers that include these typedefs (like mingw).
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 8204e068110e8abe5db9c3b7df9971b58cda8f26
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Nov 4 16:03:25 2009 -0500
+
+ tools: gitignore *.exe binaries
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 425d3b666eee5c58fdb82fb894a535dd71782a05
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Tue Nov 3 23:31:07 2009 -0600
+
+ ppc: Move conditional compilation of kgdb.c to Makefile
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit e06ab6546b332acc55ac4e7c31338662328b0fb3
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 3 11:36:39 2009 -0500
+
+ spi_flash.h: pull in linux/types.h for u## types
+
+commit 0008555f4d57c15ad86ee735861ca0d783042f61
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Tue Nov 3 11:36:26 2009 -0500
+
+ bootm: mark local boot_os[] table static
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit a8fa379d47f06c7d3ed75c8fb26ae43ee38e1fd7
+Author: Nishanth Menon <nm@ti.com>
+Date: Mon Nov 2 09:40:18 2009 -0600
+
+ mkconfig: deny messed up ARCH definition
+
+ Refuse to setup a platform if the command line ARCH= is not the same
+ as the one required for the board. This prevents any user with
+ prehistoric aliases from messing up their builds.
+
+ Reported in thread:
+ http://old.nabble.com/-U-Boot--Build-breaks-on-some-OMAP3-configs-to26132721.html
+
+ Inputs from: Mike Frysinger and Wolfgang Denk:
+ http://lists.denx.de/pipermail/u-boot/2009-November/063642.html
+
+ Cc: Wolfgang Denk <wd@denx.de>
+ Cc: Mike Frysinger <vapier@gentoo.org>
+ Cc: Anand Gadiyar <gadiyar@ti.com>
+ Cc: Dirk Behme <dirk.behme@googlemail.com>
+ Signed-off-by: Nishanth Menon <nm@ti.com>
+
+commit 67b96e87da1b84660fa1e5b78cc760246d116814
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Oct 28 22:13:39 2009 +0100
+
+ Repair the 'netretry=once' option.
+
+ 'netretry = once' does the same as 'netretry = yes', because it is not stored
+ when it was tried once.
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit b25e38fc36e13fa8037fa4d37fe909d1d6e6f372
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Thu Oct 29 14:24:22 2009 +0100
+
+ Repair build fail in case CONFIG_PPC=n and CONFIG_FIT=y
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 01826abc02ce160501534788e63629ccbe31b05c
+Author: Grazvydas Ignotas <notasas@gmail.com>
+Date: Thu Nov 12 11:46:07 2009 +0200
+
+ OMAP3: pandora: fix booting without serial attached
+
+ When the board is booted without serial cable attached (which
+ is how most of them will be used) UART RX is left floating and
+ sometimes picks noise, which interrupts countdown and enters
+ U-Boot prompt instead of booting the kernel.
+
+ Fix this by setting up internal pullup on UART RX pin. This
+ does not prevent serial from working as the internal pullup
+ is weak.
+
+ Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+
+commit 41dfd8a60324243dbe2dc313a607910824a68aa7
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Oct 28 22:13:37 2009 +0100
+
+ Add support for CS2 dataflash for Atmel-SPI.
+
+ The only missing chipselect line support is CS2, and I need it on
+ CS2...
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit faf36c1437c95e4a86835633d9801c5f6396a3c7
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Oct 28 22:13:36 2009 +0100
+
+ Fix mingw tools build
+
+ mkimage does not build due to missing strtok_r() and getline() implementation
+
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit 6a590c5f5fd12cdd27f3153522acfac3854590e7
+Author: Remy Bohmer <linux@bohmer.net>
+Date: Wed Oct 28 22:13:35 2009 +0100
+
+ Building of FIT images does not work.
-commit 824d82997fbcf28e49081d36fdd5d3be1b92b03d
-Author: Ira W. Snyder <iws@ovro.caltech.edu>
-Date: Wed Nov 4 13:37:59 2009 -0800
+ The type is not set for generation of the FIT images, resulting
+ in no images being created without printing or returning an error
- Fix example FIT image source files
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
- The example FIT image source files do not compile with the latest dtc and
- mkimage. The following error message is produced:
+commit 0a7691e820e33b23f61c6ea0ef6fa72099d1a6ae
+Author: Renato Andreola <renato.andreola@imagos.it>
+Date: Mon Nov 23 16:45:14 2009 -0500
- DTC: dts->dtb on file "kernel.its"
- Error: kernel.its 7:0 - 1:0 syntax error
- FATAL ERROR: Unable to parse input tree
- ./mkimage: Can't read kernel.itb.tmp: Invalid argument
+ Nios2: do_boom_linux(): kernel gunzip input data integrity problem due to
+ missing cache flush.
- The FIT image source files are missing the "/dts-v1/;" directive at the
- beginning of the file. Add the directive to the examples.
+ Added instruction and data caches flush.
- Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
-commit fd66066ee3ce15c2966feb9b2be0f0d51a95db48
-Author: Mike Frysinger <vapier@gentoo.org>
-Date: Wed Nov 4 16:13:19 2009 -0500
+commit de03825386eaedb5e17261dd87cde86e9a764ba9
+Author: Scott McNutt <smcnutt@psyent.com>
+Date: Mon Nov 23 16:29:40 2009 -0500
- img2srec: use standard types
+ Nios2: Fix compiler warnings in lib_nios2/board.c (unused variables)
- The img2srec code creates a lot of typedefs with common names. These
- easily clash with system headers that include these typedefs (like mingw).
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
- Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+commit 57baa379cf2f67df89a5c6052767fd25daff20bd
+Author: Scott McNutt <smcnutt@psyent.com>
+Date: Mon Nov 23 15:54:25 2009 -0500
-commit 8204e068110e8abe5db9c3b7df9971b58cda8f26
-Author: Mike Frysinger <vapier@gentoo.org>
-Date: Wed Nov 4 16:03:25 2009 -0500
+ Nios2/Nios: Remove unnecessary (residual) linker Nios command scripts from
+ the standalone examples.
- tools: gitignore *.exe binaries
+ Signed-off-by: Scott McNutt <smcnutt@psyent.com>
- Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+commit eb5eb2b0f744f0cba405160c5d01335c40f09acf
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 19 14:03:17 2009 +0100
-commit 425d3b666eee5c58fdb82fb894a535dd71782a05
+ ppc4xx: Cleanup PPC4xx I2C infrastructure
+
+ This patch cleans up the PPC4xx I2C intrastructure:
+
+ - Use C struct to describe the I2C registers instead of defines
+ - Coding style cleanup (braces, whitespace, comments, line length)
+ - Extract common code from i2c_read() and i2c_write()
+ - Remove unneeded IIC defines from ppc405.h & ppc440.h
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b2f618f2150b15b2674f11d09e1c0fdfe460c1cd
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 19 11:49:36 2009 +0100
+
+ ppc4xx: Remove some testing code from 4xx_pcie.c
+
+ This code got included accidentally.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4e574c4e2d3776d9db62dca4ca3c73be1574af43
+Author: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+Date: Mon May 18 13:20:54 2009 +0200
+
+ at91: Extended soft_i2c driver for AT91SAM9263 SoC
+
+ While hard_i2c support is not available
+ (see http://lists.denx.de/pipermail/u-boot/2009-March/049751.html),
+ this patch enables soft_i2c on AT91SAM9263 SoC.
+
+ Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
+
+commit 396fd17338b9bf1f84f494ec1860427e18868ede
Author: Peter Tyser <ptyser@xes-inc.com>
-Date: Tue Nov 3 23:31:07 2009 -0600
+Date: Fri Oct 16 17:36:27 2009 -0500
- ppc: Move conditional compilation of kgdb.c to Makefile
+ Add 'true' and 'false' commands
+
+ These commands are only enabled when the hush shell is enabled and can
+ be useful in scripts such as:
+
+ while true do
+ echo "Booting OS...";
+ run $bootcmd;
+ echo "Booting OS failed";
+ sleep 10;
+ done
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
-commit e06ab6546b332acc55ac4e7c31338662328b0fb3
-Author: Mike Frysinger <vapier@gentoo.org>
-Date: Tue Nov 3 11:36:39 2009 -0500
+commit 4e1ca93b6bae34b68be9280b43bf0289d994656c
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Fri Oct 16 17:36:26 2009 -0500
- spi_flash.h: pull in linux/types.h for u## types
+ cmd_help: General cleanup
-commit 0008555f4d57c15ad86ee735861ca0d783042f61
+ Shorten the overly-verbose help message of 'help' and clean up some
+ redundant ifdefery while we're at it.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit 6b8f5ad10f567362a3682840f59ba0fc470af319
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Fri Oct 16 17:36:25 2009 -0500
+
+ command.c: Break commands out to appropriate cmd_*.c files
+
+ command.c should contain common code related to commands, not
+ miscellaneous command implementations.
+
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
+
+commit fcffb680e77fcb48598d4a9944dbe2d4503170e0
Author: Mike Frysinger <vapier@gentoo.org>
-Date: Tue Nov 3 11:36:26 2009 -0500
+Date: Wed Oct 14 19:28:03 2009 -0400
- bootm: mark local boot_os[] table static
+ sf: fix stmicro offset setup while erasing
+ Reported-by: Peter Gombos <gombos@protecta.hu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-commit a8fa379d47f06c7d3ed75c8fb26ae43ee38e1fd7
-Author: Nishanth Menon <nm@ti.com>
-Date: Mon Nov 2 09:40:18 2009 -0600
+commit d394a7795027d96ca55799df40bd5c4a13dbeebe
+Author: Jason McMullan <mcmullan@netapp.com>
+Date: Fri Oct 9 17:12:23 2009 -0400
- mkconfig: deny messed up ARCH definition
+ sf: new driver for Winbond W25X16/32/64 devices
- Refuse to setup a platform if the command line ARCH= is not the same
- as the one required for the board. This prevents any user with
- prehistoric aliases from messing up their builds.
+ Signed-off-by: Jason McMullan <jason.mcmullan@gmail.com>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- Reported in thread:
- http://old.nabble.com/-U-Boot--Build-breaks-on-some-OMAP3-configs-to26132721.html
+commit cada315100c88894b85972a91309a6f2413966b6
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date: Thu Oct 1 23:55:17 2009 +0200
- Inputs from: Mike Frysinger and Wolfgang Denk:
- http://lists.denx.de/pipermail/u-boot/2009-November/063642.html
+ mpc8260: move FDT memory node fixup into common CPU code.
- Cc: Wolfgang Denk <wd@denx.de>
- Cc: Mike Frysinger <vapier@gentoo.org>
- Cc: Anand Gadiyar <gadiyar@ti.com>
- Cc: Dirk Behme <dirk.behme@googlemail.com>
- Signed-off-by: Nishanth Menon <nm@ti.com>
+ Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
+ Tested-by: Heiko Schocher <hs@denx.de>
-commit 67b96e87da1b84660fa1e5b78cc760246d116814
-Author: Remy Bohmer <linux@bohmer.net>
-Date: Wed Oct 28 22:13:39 2009 +0100
+commit f2cea405f83da46b72098ea874fb3eefe185d312
+Author: Po-Yu Chuang <ratbert.chuang@gmail.com>
+Date: Wed Sep 23 15:52:35 2009 +0800
- Repair the 'netretry=once' option.
+ Add driver for FTRTC010 real time clock
- 'netretry = once' does the same as 'netretry = yes', because it is not stored
- when it was tried once.
+ Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
+
+ Edited commit message.
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c0356a88011330646e960dfac8a2c909bede3304
+Author: Mark Jackson <mpfj-list@mimc.co.uk>
+Date: Mon Aug 17 16:42:52 2009 +0100
+
+ MIMC200: set default fbmem value
+
+ This patch adds a default bootargs "fbmem" value to the
+ CONFIG_BOOTARGS string for the MIMC200 board.
+
+ Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
+
+commit 10a5a7991258019af155bc19b3b246aaa708b0e2
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Thu Nov 19 23:04:42 2009 -0500
+
+ NAND: Add Support for 4K page size in DaVinci NAND driver
+
+ This patch adds support for NAND devices with a page size of
+ 4K in the DaVinci NAND driver. The layout matches the layout that TI uses
+ for 4K page size NAND devices in the kernel NAND driver.
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 14ce02c88116316a0285cc7d9c05f83367a5aae8
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Wed Nov 18 16:29:29 2009 +0100
+
+ ppc4xx: Remove unused features from PMC440 board support
+
+ This patch shrinks the PMC440 u-boot binary (from next branch)
+ to fit into 384kB again.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 629ab99b3b19c1b7e06a7c4e5d666138bc924c7c
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Wed Nov 18 16:28:42 2009 +0100
+
+ ppc4xx: Remove confusing comment
+
+ This is not the sequoia board.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 79e2d8df3776b667257e609aefefa071b4fe13a2
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 17 15:53:00 2009 +0100
+
+ ppc4xx: alpr: Remove some not needed commands to make image fit again
+
+ The latest changes in the u-boot/next branch increased the size of the
+ alpr image a bit more. Now it doesn't fit into the 256k reserved for it.
+ This patch now removes the commands "askenv" and "irq" which are not
+ needed in the production systems.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
+
+commit 6c70049bd14e8e81764570732be7f34a89831f09
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 12 17:19:37 2009 +0100
+
+ ppc4xx: Consolidate pci_master_init() function
+
+ This patch removes the duplicted implementations of the pci_master_init()
+ function by introducing a weak default function for it. It can be
+ overridden by a board specific version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a760b0203155da6fb8b8e9086169bb87d09d76fa
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 12 16:41:09 2009 +0100
+
+ ppc4xx: Consolidate pci_pre_init() function
+
+ This patch removes the duplicted implementations of the pci_pre_init()
+ function by introducing a weak default function for it. This weak default
+ has a different implementation for some PPC variants. It can be
+ overridden by a board specific version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1095493a5d4c16f481a783f6f54d83ad0e07dfa0
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Nov 12 12:00:49 2009 +0100
+
+ ppc4xx: Consolidate pci_target_init() function
+
+ This patch removes the duplicted implementations of the pci_target_init()
+ function by introducing a weak default function for it. This weak default
+ has a different implementation for 440EP(x)/GR(x) PPC's. It can be
+ overridden by a board specific version (e.g. PMC440, korat).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+
+commit 5e1ded558b7cc28a62c14598f6437023b6262444
+Author: Hui.Tang <zetalabs@gmail.com>
+Date: Wed Nov 18 16:24:04 2009 +0800
+
+ S3C2410 NAND Flash Add Missing Function
+
+ This patch add nand_read_buf() for S3C2410 NAND SPL.
+ In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
+ so nand->select_chip should also be initialized.
+
+ Signed-off-by: Hui.Tang <zetalabs@gmail.com>
+
+commit 6cd752f927e515e63a038fa363edceec5a59c028
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Mon Nov 16 13:32:01 2009 -0500
+
+ NAND: Update read_read_subpage API check
+
+ This patch updates a check condition in the NAND driver.
+ The check condition is similat to what is in linux/next.
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit bb3e9828e7fbcc9e4518e51592876f4a0997d9ec
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Mon Nov 16 13:31:47 2009 -0500
+
+ NAND:Extending the nand_ecclayout structure
+
+ NANDs with page size of lesser than and equal to 2K are
+ reaching EOL. They are bing replaced with NANDs of
+ page size 4K and above.
+ To support this we have to extend the eccpos field
+
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+
+commit 3ffc0d61bad7d986e344ce7062b37c5c8f04fb0e
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Oct 27 19:58:09 2009 +0100
+
+ ppc4xx: Initialize magnetic coupler on VOM405 boards
+
+ This patch fixes an ugly behavior of the IL712 magnetic coupler
+ as used on VOM405. These parts will remember their last state
+ over a power cycle which might cause unwanted behavior.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit be0db3e3141c6c6b4e232b51091f35a284cc54e5
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Mon Oct 26 09:58:45 2009 +0100
+
+ ppc4xx: Initialize magnetic couplers in PLU405
+
+ This patch fixes an ugly behavior of the IL712 magnetic couplers
+ as used on PLU405. These parts will remember their last state
+ over a power cycle which might cause unwanted behavior.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 067f54c66acd469870ef6946e1591bfcc02de1b3
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Mon Oct 26 09:55:40 2009 +0100
+
+ Add minimal SJA1000 header for basic CAN mode
+
+ This patch is in preparation for the upcoming PLU405 board fix.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1d2e96de56cc57e25a19bc40d297f36c4c4443a2
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Mon Nov 2 20:36:26 2009 +0100
+
+ OMAP2/3: I2C: Add support for second and third bus
+
+ Add support to use second and third I2C bus, too.
+
+ Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing
+ I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch
+ back afterwards, then.
- Signed-off-by: Remy Bohmer <linux@bohmer.net>
- Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
-commit b25e38fc36e13fa8037fa4d37fe909d1d6e6f372
-Author: Remy Bohmer <linux@bohmer.net>
-Date: Thu Oct 29 14:24:22 2009 +0100
+commit c758e947aa7d39a2be607ecdedd818ad300807b2
+Author: Amul Kumar Saha <amul.saha@samsung.com>
+Date: Wed Nov 4 10:38:46 2009 +0530
- Repair build fail in case CONFIG_PPC=n and CONFIG_FIT=y
+ ENV Variable support for Flex-OneNAND
- Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX
+ for storing environment variables.
-commit 01826abc02ce160501534788e63629ccbe31b05c
-Author: Grazvydas Ignotas <notasas@gmail.com>
-Date: Thu Nov 12 11:46:07 2009 +0200
+ Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
+ Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
- OMAP3: pandora: fix booting without serial attached
+commit cacbe919584193f64e74088e03f068e52775bb86
+Author: Amul Kumar Saha <amul.saha@samsung.com>
+Date: Fri Nov 6 17:15:31 2009 +0530
- When the board is booted without serial cable attached (which
- is how most of them will be used) UART RX is left floating and
- sometimes picks noise, which interrupts countdown and enters
- U-Boot prompt instead of booting the kernel.
+ Flex-OneNAND driver support
- Fix this by setting up internal pullup on UART RX pin. This
- does not prevent serial from working as the internal pullup
- is weak.
+ This patch adds support for Flex-OneNAND devices.
- Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+ Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
+ Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
-commit 41dfd8a60324243dbe2dc313a607910824a68aa7
-Author: Remy Bohmer <linux@bohmer.net>
-Date: Wed Oct 28 22:13:37 2009 +0100
+commit 35209cbceebe212a8c5ec17d552960f8bd4725f3
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date: Tue Oct 20 16:58:17 2009 +0800
- Add support for CS2 dataflash for Atmel-SPI.
+ fsl_elbc_nand: remove the bbt descriptors relocation fixup
- The only missing chipselect line support is CS2, and I need it on
- CS2...
+ The commit 66372fe2 manually relocated the bbt pattern pointer,
+ which can be removed by using full relocation.
- Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
-commit faf36c1437c95e4a86835633d9801c5f6396a3c7
-Author: Remy Bohmer <linux@bohmer.net>
-Date: Wed Oct 28 22:13:36 2009 +0100
+commit 25643d4da257e51f6200b213c75de4fb5b345780
+Author: Mingkai Hu <Mingkai.hu@freescale.com>
+Date: Tue Oct 20 16:58:16 2009 +0800
- Fix mingw tools build
+ ppc/85xx: make boot from NAND full relocation to RAM
- mkimage does not build due to missing strtok_r() and getline() implementation
+ Take advantage of the latest full relocation commit of PPC platform
+ for boot from NAND.
- Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
+ Acked-by: Kumar Gala <galak@kernel.crashing.org>
-commit 6a590c5f5fd12cdd27f3153522acfac3854590e7
-Author: Remy Bohmer <linux@bohmer.net>
-Date: Wed Oct 28 22:13:35 2009 +0100
+commit 7e86661cd777eec1e81c5e57c468e81138fda983
+Author: David Brownell <dbrownell@users.sourceforge.net>
+Date: Sat Nov 7 16:27:01 2009 -0500
- Building of FIT images does not work.
+ NAND: fix "raw" reads with ECC syndrome layouts
- The type is not set for generation of the FIT images, resulting
- in no images being created without printing or returning an error
+ The syndrome based page read/write routines store ECC, and possibly other
+ "OOB" data, right after each chunk of ECC'd data. With ECC chunk size of
+ 512 bytes and a large page (2KiB) NAND, the layout is:
- Signed-off-by: Remy Bohmer <linux@bohmer.net>
+ data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover
-commit 0a7691e820e33b23f61c6ea0ef6fa72099d1a6ae
-Author: Renato Andreola <renato.andreola@imagos.it>
-Date: Mon Nov 23 16:45:14 2009 -0500
+ Where OOBx is (prepad, ECC, postpad). However, the current "raw" routines
+ use a traditional layout -- data OOB, disregarding the prepad and postpad
+ values -- so when they're used with that type of ECC hardware, those calls
+ mix up the data and OOB. Which means, in particular, that bad block
+ tables won't be found on startup, with data corruption and related chaos
+ ensuing.
- Nios2: do_boom_linux(): kernel gunzip input data integrity problem due to
- missing cache flush.
+ The current syndrome-based drivers in mainline all seem to use one chunk
+ per page; presumably they haven't noticed such bugs.
- Added instruction and data caches flush.
+ Fix this, by adding read/write page_raw_syndrome() routines as siblings of
+ the existing non-raw routines; "raw" just means to bypass the ECC
+ computations, not change data and OOB layout.
- Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+ Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
+ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+ Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-commit de03825386eaedb5e17261dd87cde86e9a764ba9
-Author: Scott McNutt <smcnutt@psyent.com>
-Date: Mon Nov 23 16:29:40 2009 -0500
+commit 5df3c2b62cebaa0ddb2817364f93726e5dbe3525
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 7 14:25:18 2009 -0500
- Nios2: Fix compiler warnings in lib_nios2/board.c (unused variables)
+ NAND: Don't walk past end of oobfree[]
- Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+ When computing oobavail from the list of free areas in the OOB,
+ don't assume there will always be an unused slot at the end.
+ This syncs up with the kernel NAND driver.
-commit 57baa379cf2f67df89a5c6052767fd25daff20bd
-Author: Scott McNutt <smcnutt@psyent.com>
-Date: Mon Nov 23 15:54:25 2009 -0500
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Nios2/Nios: Remove unnecessary (residual) linker Nios command scripts from
- the standalone examples.
+commit 18b5a4b43af3c8359cb568f4fa32d6b9dcebbf26
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 7 14:25:03 2009 -0500
- Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+ NAND: Update check condition for nand_read_page_hwecc API
-commit fcffb680e77fcb48598d4a9944dbe2d4503170e0
-Author: Mike Frysinger <vapier@gentoo.org>
-Date: Wed Oct 14 19:28:03 2009 -0400
+ The patch updates the check condition for determining
+ whether the ECC corrections has failed.
+ This makes it similar to what is in the kernel NAND driver.
- sf: fix stmicro offset setup while erasing
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Reported-by: Peter Gombos <gombos@protecta.hu>
- Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+commit e25ee0396226fb56679702d0361cf2645504e7f6
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 7 14:24:50 2009 -0500
-commit d394a7795027d96ca55799df40bd5c4a13dbeebe
-Author: Jason McMullan <mcmullan@netapp.com>
-Date: Fri Oct 9 17:12:23 2009 -0400
+ NAND: Updating comments/explanations in the NAND driver
- sf: new driver for Winbond W25X16/32/64 devices
+ Patch updates the comments and explanations for
+ the arguments to various functions.
- Signed-off-by: Jason McMullan <jason.mcmullan@gmail.com>
- Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
-commit cada315100c88894b85972a91309a6f2413966b6
-Author: Marcel Ziswiler <marcel@ziswiler.com>
-Date: Thu Oct 1 23:55:17 2009 +0200
+commit aad4a28b2518e1d24ee606d9ea31f9b4dd029777
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 7 14:24:34 2009 -0500
- mpc8260: move FDT memory node fixup into common CPU code.
+ NAND: Subpage shift for ecc_steps equal to 16
- Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
- Tested-by: Heiko Schocher <hs@denx.de>
+ This was originally part of Thomas Gleixner's patch for
+ adding support for 4KiB pages.
+ This is not part of the U-Boot NAND driver so updating the
+ driver with this to sync up with the kernel NAND driver.
-commit f2cea405f83da46b72098ea874fb3eefe185d312
-Author: Po-Yu Chuang <ratbert.chuang@gmail.com>
-Date: Wed Sep 23 15:52:35 2009 +0800
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- Add driver for FTRTC010 real time clock
+commit 36e0b98ec832bb5ec42d6e249058d5b84f75dff8
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 7 14:24:20 2009 -0500
- Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
+ NAND: Remove commented out code
- Edited commit message.
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Patch removes already commented out dead code
-commit c0356a88011330646e960dfac8a2c909bede3304
-Author: Mark Jackson <mpfj-list@mimc.co.uk>
-Date: Mon Aug 17 16:42:52 2009 +0100
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- MIMC200: set default fbmem value
+commit 4f41e7ea1a17ba7207ca41379bf344b317e72c12
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Sat Nov 7 14:24:06 2009 -0500
- This patch adds a default bootargs "fbmem" value to the
- CONFIG_BOOTARGS string for the MIMC200 board.
+ NAND: Correct the "chip_shift" calculation
- Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
+ This patch updates the "chip_shift" calculation in the
+ NAND driver. This is being done to sync up the NAND driver with
+ the kernel NAND driver.
-commit 3ffc0d61bad7d986e344ce7062b37c5c8f04fb0e
-Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
-Date: Tue Oct 27 19:58:09 2009 +0100
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- ppc4xx: Initialize magnetic coupler on VOM405 boards
+commit aaa8eec532876c47acfd31bf9b573a00eaad92ae
+Author: Sandeep Paulraj <s-paulraj@ti.com>
+Date: Fri Oct 30 13:51:23 2009 -0400
- This patch fixes an ugly behavior of the IL712 magnetic coupler
- as used on VOM405. These parts will remember their last state
- over a power cycle which might cause unwanted behavior.
+ NAND: Update to support 64 bit device size
- Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
- Signed-off-by: Stefan Roese <sr@denx.de>
+ This patch adds support for NANDs greater than 2 GB.
+ Patch is based on the MTD NAND driver in the kernel.
-commit be0db3e3141c6c6b4e232b51091f35a284cc54e5
-Author: Matthias Fuchs <matthias.fuchs@esd.eu>
-Date: Mon Oct 26 09:58:45 2009 +0100
+ Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
- ppc4xx: Initialize magnetic couplers in PLU405
+commit 581d04f14d7a39b63d418e2a21e44101233096d1
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Thu Oct 15 10:48:18 2009 -0500
- This patch fixes an ugly behavior of the IL712 magnetic couplers
- as used on PLU405. These parts will remember their last state
- over a power cycle which might cause unwanted behavior.
+ cmd_nand: Move conditional compilation to Makefile
- Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
- Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
-commit 067f54c66acd469870ef6946e1591bfcc02de1b3
-Author: Matthias Fuchs <matthias.fuchs@esd.eu>
-Date: Mon Oct 26 09:55:40 2009 +0100
+commit 9574fd63a97d080e379f30b6a81a1221eaeb797e
+Author: Peter Tyser <ptyser@xes-inc.com>
+Date: Thu Oct 15 10:48:17 2009 -0500
- Add minimal SJA1000 header for basic CAN mode
+ cmd_nand: Remove duplicate include
- This patch is in preparation for the upcoming PLU405 board fix.
+ Also remove vague, unnecessary comment
- Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
- Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
commit cdbdbe65f5f006cba208accee5a126c659d4b867
Author: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ron Lee <ron@debian.org>
+commit efe12bcec55c3d77b9ead56e62010d26b66781f3
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 9 14:15:42 2009 +0100
+
+ ppc4xx: Katmai: Add chip_config command
+
+ This patch removes the Katmai "bootstrap" command and replaces it
+ with the now common command "chip_config".
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cdaed5dc31f4023610f180fe158ec8c6f5e855a3
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 9 14:13:43 2009 +0100
+
+ ppc4xx: Switch to I2C bus numer 0 for chip_config command
+
+ All currently available 4xx derivats have the I2C bootstrap EEPROM
+ located on I2C bus number 0. This patch now first sets this bus number,
+ so that the chip_config command also works for board with multiple
+ I2C busses, like Katmai.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 985edaccc4fbaef6d357d104aed08f839058a32f
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date: Tue Oct 27 12:19:11 2009 +0100
+
+ ppc4xx: Add UBI support to PLU405 boards
+
+ -add UBI support
+ -increase malloc'able memory size
+ -cleanup MONITOR|FLASH_BASE|LEN constants
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit d14c7ec2b51fb92c4a5218b299b772c3d186510d
Author: Ben Warren <biggerbadderben@gmail.com>
Date: Mon Nov 9 13:09:57 2009 -0800
Cc: David Mitchell <dmitchell@amcc.com>
Cc: Jeff Mann <MannJ@embeddedplanet.com>
+commit 56f9b39d1f5d3c51e4b19792adb65bd93a8b6fcb
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 9 13:01:19 2009 +0100
+
+ ppc4xx: Fix NAND booting targets after 4xx linker script consolidation
+
+ Somehow I missed the NAND booting targets in the 4xx linker script
+ consolidation patchset. This patch fixes this issue.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9a81c61249d8361ed57d81f496121f3eb9c0eee8
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Oct 29 16:54:52 2009 +0100
+
+ ppc4xx: Remove duplicated is_pci_host() functions
+
+ This patch introduces a weak default function for is_pci_host(),
+ returning 1. This is the default behaviour, since most boards only
+ implement PCI host functionality. This weak default can be overridden
+ by a board specific version if needed.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b0b867462c569e7accd6f78c942cbab028116ecf
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Oct 29 15:04:35 2009 +0100
+
+ ppc4xx: Consolidate 4xx PCIe board specific configuration
+
+ This patch consolidates the PPC4xx board specific PCIe configuration
+ code. This way the duplicated code is removed. Boards can implement a
+ special, non standard behaviour (e.g. number of PCIe slots, etc) by
+ overriding the weak default functions.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 25793f76bf9a7be59c9415ef0f78d034e8d53dae
Author: Remy Bohmer <linux@bohmer.net>
Date: Thu Oct 29 12:29:37 2009 +0100
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+commit 2cd95a25cb0ee8218b271d23d64fb3f719ac5390
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 27 16:20:05 2009 +0100
+
+ ppc4xx: Remove board specific linker scripts from most PPC4xx boards
+
+ All these linker scripts can be removed since the new common ppc4xx
+ linker script should be able to handle all of those boards.
+
+ Please test and report problems. Thanks.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4649913ea5f440d756d150a6fdf2fb2e8ecb75fd
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 27 16:11:26 2009 +0100
+
+ ppc4xx: Add common ppc4xx linker script
+
+ This linker script can be used by all PPC4xx platforms. It works for
+ PPC405 and PPC440 platforms. Boards which need a board specific linker
+ script can override this default linker script in board/*/config.mk.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b1245dd3c6409c743f6c2768d00e909a4c8cc4ea
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 27 16:16:13 2009 +0100
+
+ ppc4xx: Add custom linker script to board/*/config.mk
+
+ These boards have special linker scripts right now. We can't use the
+ common 4xx linker script here. So overrride the linker script (LDSCRIPT)
+ in board/*/config.mk and choose the board specific version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ceaa62a6f0237a8ddd2a5f659e6535fcd054332f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 27 15:57:24 2009 +0100
+
+ ppc4xx: Fix problems in some ppc4xx board Makefiles
+
+ Some 4xx Makefiles didn't add $(SOBJ) to their board library. This was
+ no till now problem, since those boards included this object (init.o
+ most of the time) directly from their linker scripts. This patch clean
+ this up, so that all objects are now collected in the board library. This
+ is in preparation for the upcoming PPC4xx linker script consolidation.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a0ff1f129a0e1a466e4f8568fce12b7b84578e4c
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 27 11:20:53 2009 +0100
+
+ ppc4xx: sc3: Remove unreferenced external declarations from sc3.h
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Acked-by: Heiko Schocher <hs@denx.de>
+
+commit 7ec1fedda6ac551c67f2214ced94e4b49b6680e4
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 27 11:46:23 2009 +0100
+
+ mkconfig: Create board directory (CONFIG_BOARDDIR) in include/config.h
+
+ This patch extends the mkconfig script to automatically create a define
+ for the board directory in include/config.h:
+
+ #define CONFIG_BOARDDIR board/amcc/canyonlands
+
+ This is needed for the upcoming PPC4xx linker script consolidation,
+ where the PPC440 platforms need to include a board specific file in
+ the common linker script.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit ff88229549e08fdd3f9127c1cc4db11a3576250f
Author: Dave Liu <daveliu@freescale.com>
Date: Sat Oct 31 07:59:55 2009 +0800
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+commit cd12f615e4dd1dd24caab93f4157894783c6c1c0
+Author: Wolfgang Grandegger <wg@denx.de>
+Date: Fri Oct 23 12:03:16 2009 +0200
+
+ mpc52xx: add support for the IPEK01 board
+
+ This patch adds support for the board IPEK01 based on the MPC5200.
+ The Futjitsu Lime graphics controller is configured in 16 bpp mode.
+
+ Signed-off-by: Wolfgang Grandegger <wg@denx.de>
+
+commit 229b6dce675c729ee0ea2d7b61fbcda89b23b6b8
+Author: Wolfgang Grandegger <wg@denx.de>
+Date: Fri Oct 23 12:03:15 2009 +0200
+
+ video: mb862xx: add option VIDEO_FB_16BPP_WORD_SWAP for IPEK01
+
+ In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words
+ for D32 accesses due to the diffferent connecting to the GDC bus. This
+ patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP,
+ which should be set for all board using the mb862xx in 16 bpp mode. For
+ the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set.
+
+ Signed-off-by: Wolfgang Grandegger <wg@denx.de>
+
+commit 5d16ca87100ea58c93c46b9f0264981eaed49568
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Fri Oct 23 12:03:14 2009 +0200
+
+ video: mb862xx: add option CONFIG_VIDEO_MB862xx_ACCEL for 32bpp mode
+
+ The new IPEK01 board can use the 32 bpp mode for the Lime graphics
+ controller. For this mode, video accelaration does not work. This patch
+ makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL,
+ which is enabled for the lwmon5 and the socrates board for backward
+ compatibility.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Signed-off-by: Wolfgang Grandegger <wg@denx.de>
+
+commit c28d3bbe963f4c57937d6fdc1dd63cd3562c147c
+Author: Wolfgang Grandegger <wg@denx.de>
+Date: Fri Oct 23 12:03:13 2009 +0200
+
+ video: mb862xx: improve board-specific Lime configuration
+
+ To avoid board-specific code accessing the mb862xx registers directly,
+ the public function mb862xx_probe() has been introduced. Furthermore,
+ the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
+ are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
+ respectively. The BSPs for the socrates and lwmon5 boards have been
+ adapted accordingly.
+
+ Signed-off-by: Wolfgang Grandegger <wg@denx.de>
+
+commit 08ea550eef310e9d59d83f3cfd57a902373bf17f
+Author: Valentin Yakovenkov <yakovenkov@niistt.ru>
+Date: Mon Oct 26 18:49:06 2009 -0400
+
+ new PCA9564 i2c bridge driver
+
+ Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru>
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 08a1c6258c2a04cead33eac50d96ea89979dcb94
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Oct 14 19:27:27 2009 -0400
+
+ Blackfin: TWI/I2C: implement bus speed get/set functions
+
+ While we're here, improve the speed calculation a bit to match the HRM.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3814ea4f0002536ac592480b2cdafa319a16e329
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Oct 14 19:27:26 2009 -0400
+
+ Blackfin: TWI/I2C: add timeout to transfer
+
+ The current transfer code relies on ctrlc() to abort transfers, but this
+ requires user interactivity. Naturalize the process with a timeout.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
commit 59434fe243962758742af5cb8e2ced976e17c302
Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Date: Fri Oct 30 10:16:27 2009 +0900
CU824 MPC8240
Sandpoint8240 MPC8240
- SL8245 MPC8245
ATC MPC8250
PM825 MPC8250
Sandpoint8240 \
Sandpoint8245 \
sbc8240 \
- SL8245 \
utx8245 \
"
# MA 02111-1307 USA
#
-VERSION = 2009
-PATCHLEVEL = 11
+VERSION = 2010
+PATCHLEVEL = 03
SUBLEVEL =
-EXTRAVERSION =
+EXTRAVERSION = -rc1
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else
LIBS += drivers/mtd/spi/libspi_flash.a
LIBS += drivers/net/libnet.a
LIBS += drivers/net/phy/libphy.a
-LIBS += drivers/net/sk98lin/libsk98lin.a
LIBS += drivers/pci/libpci.a
LIBS += drivers/pcmcia/libpcmcia.a
LIBS += drivers/power/libpower.a
sbc8240_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x sbc8240
-SL8245_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc824x sl8245
-
utx8245_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x utx8245
working with an in-memory copy. In case the Flash area containing the
environment is erased by accident, a default environment is provided.
-Some configuration options can be set using Environment Variables:
+Some configuration options can be set using Environment Variables.
+
+List of environment variables (most likely not complete):
baudrate - see CONFIG_BAUDRATE
available network interfaces.
It just stays at the currently selected interface.
- netretry - When set to "no" each network operation will
+ netretry - When set to "no" each network operation will
either succeed or fail without retrying.
When set to "once" the network operation will
fail when all the available network interfaces
tftpdstport - If this is set, the value is used for TFTP's UDP
destination port instead of the Well Know Port 69.
- vlan - When set to a value < 4095 the traffic over
+ tftpblocksize - Block size to use for TFTP transfers; if not set,
+ we use the TFTP server's default block size
+
+ tftptimeout - Retransmission timeout for TFTP packets (in milli-
+ seconds, minimum value is 1000 = 1 second). Defines
+ when a packet is considered to be lost so it has to
+ be retransmitted. The default is 5000 = 5 seconds.
+ Lowering this value may make downloads succeed
+ faster in networks with high packet loss rates or
+ with unreliable TFTP servers.
+
+ vlan - When set to a value < 4095 the traffic over
Ethernet is encapsulated/received over 802.1q
VLAN tagged frames.
puts("]\n");
return 0;
}
-
/*
* ATTENTION: Although partially referenced initdram does NOT make real
- * use of CONFIG_SYS_SDRAM_BASE. The code does not work if
- * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000.
+ * use of CONFIG_SYS_SDRAM_BASE. The code does not work if
+ * CONFIG_SYS_SDRAM_BASE is something else than 0x00000000.
*/
phys_size_t initdram (int board_type)
int board_eth_init(bd_t *bis)
{
- cpu_eth_init(bis); /* Built in FEC comes first */
- return pci_eth_init(bis);
+ cpu_eth_init(bis); /* Built in FEC comes first */
+ return pci_eth_init(bis);
}
#ifdef CONFIG_VIDEO
sinclude $(obj).depend
#########################################################################
-
+++ /dev/null
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-#
-# (C) Copyright 2001 - 2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# SL8245 board
-#
-
-TEXT_BASE = 0xFFF00000
-
-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
-PLATFORM_LIBS += $(shell $(CC) -print-libgcc-file-name)
+++ /dev/null
-/*
- * (C) Copyright 2001 - 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-#if defined(CONFIG_ENV_IS_IN_FLASH)
-# ifndef CONFIG_ENV_ADDR
-# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-# endif
-# ifndef CONFIG_ENV_SIZE
-# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-# endif
-# ifndef CONFIG_ENV_SECT_SIZE
-# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-# endif
-#endif
-
-#define FLASH_BANK_SIZE 0x800000
-#define MAIN_SECT_SIZE 0x40000
-#define PARAM_SECT1_SIZE 0x20000
-#define PARAM_SECT23_SIZE 0x8000
-#define PARAM_SECT4_SIZE 0x10000
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-static int write_data (flash_info_t *info, ulong dest, ulong *data);
-static void write_via_fpu(vu_long *addr, ulong *data);
-static __inline__ unsigned long get_msr(void);
-static __inline__ void set_msr(unsigned long msr);
-
-/*---------------------------------------------------------------------*/
-#undef DEBUG_FLASH
-
-/*---------------------------------------------------------------------*/
-#ifdef DEBUG_FLASH
-#define DEBUGF(fmt,args...) printf(fmt ,##args)
-#else
-#define DEBUGF(fmt,args...)
-#endif
-/*---------------------------------------------------------------------*/
-
-#define __align__ __attribute__ ((aligned (8)))
-static __align__ ulong precmd0[2] = { 0x00aa00aa, 0x00aa00aa };
-static __align__ ulong precmd1[2] = { 0x00550055, 0x00550055 };
-static __align__ ulong cmdid[2] = { 0x00900090, 0x00900090 };
-static __align__ ulong cmderase[2] = { 0x00800080, 0x00800080 };
-static __align__ ulong cmdersusp[2] = { 0x00b000b0, 0x00b000b0 };
-static __align__ ulong cmdsecter[2] = { 0x00300030, 0x00300030 };
-static __align__ ulong cmdprog[2] = { 0x00a000a0, 0x00a000a0 };
-static __align__ ulong cmdres[2] = { 0x00f000f0, 0x00f000f0 };
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- vu_long *addr = (vu_long *) (CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE);
-
- write_via_fpu (&addr[0xaaa], precmd0);
- write_via_fpu (&addr[0x554], precmd1);
- write_via_fpu (&addr[0xaaa], cmdid);
-
- DEBUGF ("Flash bank # %d:\n"
- "\tManuf. ID @ 0x%08lX: 0x%08lX\n"
- "\tDevice ID @ 0x%08lX: 0x%08lX\n",
- i,
- (ulong) (&addr[0]), addr[0],
- (ulong) (&addr[2]), addr[2]);
-
- if ((addr[0] == addr[1]) && (addr[0] == AMD_MANUFACT) &&
- (addr[2] == addr[3]) && (addr[2] == AMD_ID_LV160T)) {
- flash_info[i].flash_id = (FLASH_MAN_AMD & FLASH_VENDMASK) |
- (FLASH_AM160T & FLASH_TYPEMASK);
- } else {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- write_via_fpu (addr, cmdres);
- goto Done;
- }
-
- DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
-
- write_via_fpu (addr, cmdres);
-
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- for (j = 0; j < 32; j++) {
- flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE +
- i * FLASH_BANK_SIZE + j * MAIN_SECT_SIZE;
- }
- flash_info[i].start[32] =
- flash_info[i].start[31] + PARAM_SECT1_SIZE;
- flash_info[i].start[33] =
- flash_info[i].start[32] + PARAM_SECT23_SIZE;
- flash_info[i].start[34] =
- flash_info[i].start[33] + PARAM_SECT23_SIZE;
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[1]);
-#else
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-#endif
-
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
-#if CONFIG_ENV_ADDR >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[1]);
-#else
- flash_protect ( FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
-#endif
-#endif
-
-Done:
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch ((i = info->flash_id & FLASH_VENDMASK)) {
- case (FLASH_MAN_AMD & FLASH_VENDMASK):
- printf ("Intel: ");
- break;
- default:
- printf ("Unknown Vendor 0x%04x ", i);
- break;
- }
-
- switch ((i = info->flash_id & FLASH_TYPEMASK)) {
- case (FLASH_AM160T & FLASH_TYPEMASK):
- printf ("AM29LV160BT (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type 0x%04x\n", i);
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong start, now, last;
-
- DEBUGF ("Erase flash bank %d sect %d ... %d\n",
- info - &flash_info[0], s_first, s_last);
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (FLASH_MAN_AMD & FLASH_VENDMASK)) {
- printf ("Can erase only AMD flash types - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- start = get_timer (0);
- last = start;
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- vu_long *addr = (vu_long *) (info->start[sect]);
-
- DEBUGF ("Erase sect %d @ 0x%08lX\n", sect, (ulong) addr);
-
- /* Disable interrupts which might cause a timeout
- * here.
- */
- flag = disable_interrupts ();
-
- write_via_fpu (&addr[0xaaa], precmd0);
- write_via_fpu (&addr[0x554], precmd1);
- write_via_fpu (&addr[0xaaa], cmderase);
- write_via_fpu (&addr[0xaaa], precmd0);
- write_via_fpu (&addr[0x554], precmd1);
- write_via_fpu (&addr[0xaaa], cmdsecter);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- while (((addr[0] & 0x00800080) != 0x00800080) ||
- ((addr[1] & 0x00800080) != 0x00800080)) {
- if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- write_via_fpu (addr, cmdersusp);
- write_via_fpu (addr, cmdres);
- return 1;
- }
-
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
- write_via_fpu (addr, cmdres);
- }
- }
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-#define FLASH_WIDTH 8 /* flash bus width in bytes */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, cp, msr;
- int l, rc, i;
- ulong data[2];
- ulong *datah = &data[0];
- ulong *datal = &data[1];
-
- DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
- addr, (ulong) src, cnt);
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-
- msr = get_msr ();
- set_msr (msr | MSR_FP);
-
- wp = (addr & ~(FLASH_WIDTH - 1)); /* get lower aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- *datah = *datal = 0;
-
- for (i = 0, cp = wp; i < l; i++, cp++) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *) cp);
- }
- for (; i < FLASH_WIDTH && cnt > 0; ++i) {
- char tmp;
-
- tmp = *src;
-
- src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
-
- --cnt;
- ++cp;
- }
-
- for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datah << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, data)) != 0) {
- set_msr (msr);
- return (rc);
- }
-
- wp += FLASH_WIDTH;
- }
-
- /*
- * handle FLASH_WIDTH aligned part
- */
- while (cnt >= FLASH_WIDTH) {
- *datah = *(ulong *) src;
- *datal = *(ulong *) (src + 4);
- if ((rc = write_data (info, wp, data)) != 0) {
- set_msr (msr);
- return (rc);
- }
- wp += FLASH_WIDTH;
- cnt -= FLASH_WIDTH;
- src += FLASH_WIDTH;
- }
-
- if (cnt == 0) {
- set_msr (msr);
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- *datah = *datal = 0;
- for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
- char tmp;
-
- tmp = *src;
-
- src++;
-
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | tmp;
-
- --cnt;
- }
-
- for (; i < FLASH_WIDTH; ++i, ++cp) {
- if (i >= 4) {
- *datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
- }
-
- *datal = (*datal << 8) | (*(uchar *) cp);
- }
-
- rc = write_data (info, wp, data);
- set_msr (msr);
-
- return (rc);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, ulong * data)
-{
- vu_long *chip = (vu_long *) (info->start[0]);
- vu_long *addr = (vu_long *) dest;
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if (((addr[0] & data[0]) != data[0]) ||
- ((addr[1] & data[1]) != data[1])) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- write_via_fpu (&chip[0xaaa], precmd0);
- write_via_fpu (&chip[0x554], precmd1);
- write_via_fpu (&chip[0xaaa], cmdprog);
- write_via_fpu (addr, data);
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- start = get_timer (0);
-
- while (((addr[0] & 0x00800080) != (data[0] & 0x00800080)) ||
- ((addr[1] & 0x00800080) != (data[1] & 0x00800080))) {
- if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- write_via_fpu (chip, cmdres);
- return (1);
- }
- }
-
- write_via_fpu (chip, cmdres);
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void write_via_fpu (vu_long * addr, ulong * data)
-{
- __asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
- __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
-}
-
-/*-----------------------------------------------------------------------
- */
-static __inline__ unsigned long get_msr (void)
-{
- unsigned long msr;
-
- __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
-
- return msr;
-}
-
-static __inline__ void set_msr (unsigned long msr)
-{
- __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
-}
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <pci.h>
-#include <netdev.h>
-
-int checkboard (void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- printf("Board: SL8245, local bus @ %s MHz\n", strmhz(buf, busfreq));
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
-#ifndef CONFIG_SYS_RAMBOOT
- long size;
- long new_bank0_end;
- long mear1;
- long emear1;
-
- size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
-
- new_bank0_end = size - 1;
- mear1 = mpc824x_mpc107_getreg(MEAR1);
- emear1 = mpc824x_mpc107_getreg(EMEAR1);
- mear1 = (mear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
- emear1 = (emear1 & 0xFFFFFF00) |
- ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
- mpc824x_mpc107_setreg(MEAR1, mear1);
- mpc824x_mpc107_setreg(EMEAR1, emear1);
-
- return (size);
-#else
- return CONFIG_SYS_MAX_RAM_SIZE;
-#endif
-}
-
-static struct pci_controller hose;
-
-void pci_init_board(void)
-{
- pci_mpc824x_init(&hose);
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-
-#if defined(CONFIG_SK98)
- rc = skge_initialize(bis);
-#endif
- return rc;
-}
*/
#include <common.h>
+#include <hwconfig.h>
#include <mpc8xx.h>
#ifdef CONFIG_PS2MULT
#include <ps2mult.h>
#endif
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
extern flash_info_t flash_info[]; /* FLASH chips info */
DECLARE_GLOBAL_DATA_PTR;
}
#endif /* CONFIG_LCD_INFO */
+/*
+ * Device Tree Support
+ */
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+int fdt_set_node_and_value (void *blob,
+ char *nodename,
+ char *regname,
+ void *var,
+ int size)
+{
+ int ret = 0;
+ int nodeoffset = 0;
+
+ nodeoffset = fdt_path_offset (blob, nodename);
+ if (nodeoffset >= 0) {
+ ret = fdt_setprop (blob, nodeoffset, regname, var,
+ size);
+ if (ret < 0) {
+ printf("ft_blob_update(): "
+ "cannot set %s/%s property; err: %s\n",
+ nodename, regname, fdt_strerror (ret));
+ }
+ } else {
+ printf("ft_blob_update(): "
+ "cannot find %s node err:%s\n",
+ nodename, fdt_strerror (nodeoffset));
+ }
+ return ret;
+}
+
+int fdt_del_node_name (void *blob, char *nodename)
+{
+ int ret = 0;
+ int nodeoffset = 0;
+
+ nodeoffset = fdt_path_offset (blob, nodename);
+ if (nodeoffset >= 0) {
+ ret = fdt_del_node (blob, nodeoffset);
+ if (ret < 0) {
+ printf("%s: cannot delete %s; err: %s\n",
+ __func__, nodename, fdt_strerror (ret));
+ }
+ } else {
+ printf("%s: cannot find %s node err:%s\n",
+ __func__, nodename, fdt_strerror (nodeoffset));
+ }
+ return ret;
+}
+
+int fdt_del_prop_name (void *blob, char *nodename, char *propname)
+{
+ int ret = 0;
+ int nodeoffset = 0;
+
+ nodeoffset = fdt_path_offset (blob, nodename);
+ if (nodeoffset >= 0) {
+ ret = fdt_delprop (blob, nodeoffset, propname);
+ if (ret < 0) {
+ printf("%s: cannot delete %s %s; err: %s\n",
+ __func__, nodename, propname,
+ fdt_strerror (ret));
+ }
+ } else {
+ printf("%s: cannot find %s node err:%s\n",
+ __func__, nodename, fdt_strerror (nodeoffset));
+ }
+ return ret;
+}
+
+/*
+ * update "brg" property in the blob
+ */
+void ft_blob_update (void *blob, bd_t *bd)
+{
+ uchar enetaddr[6];
+ ulong brg_data = 0;
+
+ /* BRG */
+ brg_data = cpu_to_be32(bd->bi_busfreq);
+ fdt_set_node_and_value(blob,
+ "/soc/cpm", "brg-frequency",
+ &brg_data, sizeof(brg_data));
+
+ /* MAC addr */
+ if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ fdt_set_node_and_value(blob,
+ "ethernet0", "local-mac-address",
+ enetaddr, sizeof(u8) * 6);
+ }
+
+ if (hwconfig_arg_cmp("fec", "off")) {
+ /* no FEC on this plattform, delete DTS nodes */
+ fdt_del_node_name (blob, "ethernet1");
+ fdt_del_node_name (blob, "mdio1");
+ /* also the aliases entries */
+ fdt_del_prop_name (blob, "/aliases", "ethernet1");
+ fdt_del_prop_name (blob, "/aliases", "mdio1");
+ } else {
+ /* adjust local-mac-address for FEC ethernet */
+ if (eth_getenv_enetaddr("eth1addr", enetaddr)) {
+ fdt_set_node_and_value(blob,
+ "ethernet1", "local-mac-address",
+ enetaddr, sizeof(u8) * 6);
+ }
+ }
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+ ft_blob_update(blob, bd);
+}
+#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
+
/* ---------------------------------------------------------------------------- */
/* TK885D specific initializaion */
/* ---------------------------------------------------------------------------- */
#endif
printf ("IP addr = %pI4\n", &bd->bi_ip_addr);
printf ("baudrate = %6ld bps\n", bd->bi_baudrate );
+ print_num ("relocaddr", gd->relocaddr);
return 0;
}
}
U_BOOT_CMD(mmcinfo, 2, 0, do_mmcinfo,
- "mmcinfo <dev num>-- display MMC info\n",
+ "mmcinfo <dev num>-- display MMC info",
""
);
printf("\ndefaults:\n");
printf("mtdids : %s\n",
mtdids_default ? mtdids_default : "none");
- printf("mtdparts: %s\n",
- mtdparts_default ? mtdparts_default : "none");
+ /*
+ * Using printf() here results in printbuffer overflow
+ * if default mtdparts string is greater than console
+ * printbuffer. Use puts() to prevent system crashes.
+ */
+ puts("mtdparts: ");
+ puts(mtdparts_default ? mtdparts_default : "none");
+ puts("\n");
}
/**
printf (" Uncompressing part %d ... ", part);
/*
- * If we've got less than 4 MB of malloc()
+ * If we've got less than 4 MB of malloc()
* space, use slower decompression algorithm
* which requires at most 2300 KB of memory.
*/
#ifdef CONFIG_SPLASH_SCREEN
/*
* suppress all output if splash screen is enabled and we have
- * a bmp to display
+ * a bmp to display. We redirect the output from frame buffer
+ * console to serial console in this case or suppress it if
+ * "silent" mode was requested.
*/
- if (getenv("splashimage") != NULL)
- gd->flags |= GD_FLG_SILENT;
+ if (getenv("splashimage") != NULL) {
+ if (!(gd->flags & GD_FLG_SILENT))
+ outputdev = search_device (DEV_FLAGS_OUTPUT, "serial");
+ }
#endif
/* Scan devices looking for input and output devices */
trab_vfd (bmp);
#endif /* CONFIG_VFD && VFD_TEST_LOGO */
-#if defined(CONFIG_UPDATE_TFTP)
- update_tftp ();
-#endif /* CONFIG_UPDATE_TFTP */
-
#ifdef CONFIG_BOOTCOUNT_LIMIT
bootcount = bootcount_load();
bootcount++;
}
#endif /* CONFIG_PREBOOT */
+#if defined(CONFIG_UPDATE_TFTP)
+ update_tftp ();
+#endif /* CONFIG_UPDATE_TFTP */
+
#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0)
s = getenv ("bootdelay");
bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
/* Get speed from basic control settings. */
return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
- miiphy_read_failed:
+miiphy_read_failed:
printf (" read failed, assuming 10BASE-T\n");
return _10BASET;
}
/* Get speed from basic control settings. */
return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
- miiphy_read_failed:
+miiphy_read_failed:
printf (" read failed, assuming half duplex\n");
return HALF;
}
sinclude $(obj).depend
#########################################################################
-
/*
* Cirrus Logic EP93xx timer support.
*
- * Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias@kaehlcke.net>
+ * Copyright (C) 2009, 2010
+ * Matthias Kaehlcke <matthias@kaehlcke.net>
*
* Copyright (C) 2004, 2005
* Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
static struct ep93xx_timer
{
unsigned long long ticks;
- unsigned long last_read;
+ unsigned long last_update;
} timer;
+static inline unsigned long clk_to_systicks(unsigned long long clk_ticks)
+{
+ unsigned long long sys_ticks = (clk_ticks * CONFIG_SYS_HZ);
+ do_div(sys_ticks, TIMER_FREQ);
+
+ return (unsigned long)sys_ticks;
+}
+
static inline unsigned long long usecs_to_ticks(unsigned long usecs)
{
unsigned long long ticks = (unsigned long long)usecs * TIMER_FREQ;
return ticks;
}
-static inline void read_timer(void)
+static inline unsigned long read_timer(void)
{
- struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
- const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value);
-
- if (now >= timer.last_read)
- timer.ticks += now - timer.last_read;
- else
- /* an overflow occurred */
- timer.ticks += TIMER_MAX_VAL - timer.last_read + now;
+ struct timer_regs *timer = (struct timer_regs *)TIMER_BASE;
- timer.last_read = now;
+ return TIMER_MAX_VAL - readl(&timer->timer3.value);
}
/*
*/
unsigned long long get_ticks(void)
{
- unsigned long long sys_ticks;
+ const unsigned long now = read_timer();
- read_timer();
+ if (now >= timer.last_update)
+ timer.ticks += now - timer.last_update;
+ else
+ /* an overflow occurred */
+ timer.ticks += TIMER_MAX_VAL - timer.last_update + now;
- sys_ticks = timer.ticks * CONFIG_SYS_HZ;
- do_div(sys_ticks, TIMER_FREQ);
+ timer.last_update = now;
- return sys_ticks;
+ return clk_to_systicks(timer.ticks);
}
unsigned long get_timer_masked(void)
void reset_timer_masked(void)
{
- read_timer();
+ timer.last_update = read_timer();
timer.ticks = 0;
}
void __udelay(unsigned long usec)
{
- unsigned long long target;
-
- read_timer();
+ /* read the timer and update timer.ticks */
+ get_ticks();
- target = timer.ticks + usecs_to_ticks(usec);
+ const unsigned long long target = timer.ticks + usecs_to_ticks(usec);
while (timer.ticks < target)
- read_timer();
+ get_ticks();
}
int timer_init(void)
{
- struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
+ struct timer_regs *timer = (struct timer_regs *)TIMER_BASE;
- /* use timer 3 with 508KHz and free running, not enabled now */
- writel(TIMER_CLKSEL, &timer_regs->timer3.control);
+ /* use timer 3 with 508KHz and free running */
+ writel(TIMER_CLKSEL, &timer->timer3.control);
- /* set initial timer value */
- writel(TIMER_MAX_VAL, &timer_regs->timer3.load);
+ /* set initial timer value 3 */
+ writel(TIMER_MAX_VAL, &timer->timer3.load);
/* Enable the timer */
writel(TIMER_ENABLE | TIMER_CLKSEL,
- &timer_regs->timer3.control);
+ &timer->timer3.control);
reset_timer_masked();
mcr 15, 0, r0, c1, c0, 1
/* reconfigure L2 cache aux control reg */
- mov r0, #0xC0 /* tag RAM */
- add r0, r0, #0x4 /* data RAM */
- orr r0, r0, #(1 << 24) /* disable write allocate delay */
- orr r0, r0, #(1 << 23) /* disable write allocate combine */
- orr r0, r0, #(1 << 22) /* disable write allocate */
+ mov r0, #0xC0 /* tag RAM */
+ add r0, r0, #0x4 /* data RAM */
+ orr r0, r0, #(1 << 24) /* disable write allocate delay */
+ orr r0, r0, #(1 << 23) /* disable write allocate combine */
+ orr r0, r0, #(1 << 22) /* disable write allocate */
cmp r3, #0x10 /* r3 contains the silicon rev */
/* Switch peripheral to PLL 3 */
ldr r0, =CCM_BASE_ADDR
- ldr r1, =0x000010C0
+ ldr r1, =0x000010C0
str r1, [r0, #CLKCTL_CBCMR]
ldr r1, =0x13239145
str r1, [r0, #CLKCTL_CBCDR]
str r1, [r0, #0x4]
#ifdef ENABLE_IMPRECISE_ABORT
- mrs r1, spsr /* save old spsr */
- mrs r0, cpsr /* read out the cpsr */
- bic r0, r0, #0x100 /* clear the A bit */
- msr spsr, r0 /* update spsr */
- add lr, pc, #0x8 /* update lr */
- movs pc, lr /* update cpsr */
+ mrs r1, spsr /* save old spsr */
+ mrs r0, cpsr /* read out the cpsr */
+ bic r0, r0, #0x100 /* clear the A bit */
+ msr spsr, r0 /* update spsr */
+ add lr, pc, #0x8 /* update lr */
+ movs pc, lr /* update cpsr */
nop
nop
nop
nop
- msr spsr, r1 /* restore old spsr */
+ msr spsr, r1 /* restore old spsr */
#endif
init_l2cc
struct fb_info *info;
if (mpc5121_diu_init() < 0)
- return;
+ return NULL;
/* fill in Graphic device struct */
- sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz",
+ sprintf(pGD->modeIdent, "%dx%dx%d %dkHz %dHz",
xres, yres, 32, 64, 60);
pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);
--- /dev/null
+/bedbug_603e.c
* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
* Scott McNutt <smcnutt@psyent.com>
*
+ * YANU Support:
+ * Copyright 2010, Renato Andreola <renato.andreola@imagos.it>
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
#include <watchdog.h>
#include <asm/io.h>
#include <nios2-io.h>
+#include <nios2-yanu.h>
DECLARE_GLOBAL_DATA_PTR;
return (c);
}
+#elif defined(CONFIG_CONSOLE_YANU)
+/*-----------------------------------------------------------------*/
+/* YANU Imagos serial port */
+/*-----------------------------------------------------------------*/
+
+static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE;
+
+#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+
+/* Everything's already setup for fixed-baud PTF assignment*/
+
+void serial_setbrg (void)
+{
+ int n, k;
+ const unsigned max_uns = 0xFFFFFFFF;
+ unsigned best_n, best_m, baud;
+
+ /* compute best N and M couple */
+ best_n = YANU_MAX_PRESCALER_N;
+ for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
+ if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
+ (unsigned)CONFIG_BAUDRATE) {
+ best_n = n;
+ break;
+ }
+ }
+ for (k = 0;; k++) {
+ if ((unsigned)CONFIG_BAUDRATE <= (max_uns >> (15+n-k)))
+ break;
+ }
+ best_m =
+ ((unsigned)CONFIG_BAUDRATE * (1 << (15 + n - k))) /
+ ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
+
+ baud = best_m + best_n * YANU_BAUDE;
+ writel(&uart->baud, baud);
+
+ return;
+}
+
+#else
+
+void serial_setbrg (void)
+{
+ int n, k;
+ const unsigned max_uns = 0xFFFFFFFF;
+ unsigned best_n, best_m, baud;
+
+ /* compute best N and M couple */
+ best_n = YANU_MAX_PRESCALER_N;
+ for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
+ if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
+ gd->baudrate) {
+ best_n = n;
+ break;
+ }
+ }
+ for (k = 0;; k++) {
+ if (gd->baudrate <= (max_uns >> (15+n-k)))
+ break;
+ }
+ best_m =
+ (gd->baudrate * (1 << (15 + n - k))) /
+ ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
+
+ baud = best_m + best_n * YANU_BAUDE;
+ writel(&uart->baud, baud);
+
+ return;
+}
+
+
+#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
+
+int serial_init (void)
+{
+ unsigned action,control;
+
+ /* status register cleanup */
+ action = YANU_ACTION_RRRDY |
+ YANU_ACTION_RTRDY |
+ YANU_ACTION_ROE |
+ YANU_ACTION_RBRK |
+ YANU_ACTION_RFE |
+ YANU_ACTION_RPE |
+ YANU_ACTION_RFE | YANU_ACTION_RFIFO_CLEAR | YANU_ACTION_TFIFO_CLEAR;
+
+ writel(&uart->action, action);
+
+ /* control register cleanup */
+ /* no interrupts enabled */
+ /* one stop bit */
+ /* hardware flow control disabled */
+ /* 8 bits */
+ control = (0x7 << YANU_CONTROL_BITS_POS);
+ /* enven parity just to be clean */
+ control |= YANU_CONTROL_PAREVEN;
+ /* we set threshold for fifo */
+ control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY;
+ control |= YANU_CONTROL_TXTHR * YANU_TXFIFO_THR;
+
+ writel(&uart->control, control);
+
+ /* to set baud rate */
+ serial_setbrg();
+
+ return (0);
+}
+
+
+/*-----------------------------------------------------------------------
+ * YANU CONSOLE
+ *---------------------------------------------------------------------*/
+void serial_putc (char c)
+{
+ int tx_chars;
+ unsigned status;
+
+ if (c == '\n')
+ serial_putc ('\r');
+
+ while (1) {
+ status = readl(&uart->status);
+ tx_chars = (status>>YANU_TFIFO_CHARS_POS)
+ & ((1<<YANU_TFIFO_CHARS_N)-1);
+ if (tx_chars < YANU_TXFIFO_SIZE-1)
+ break;
+ WATCHDOG_RESET ();
+ }
+
+ writel(&uart->data, (unsigned char)c);
+}
+
+void serial_puts (const char *s)
+{
+ while (*s != 0) {
+ serial_putc (*s++);
+ }
+}
+
+
+int serial_tstc(void)
+{
+ unsigned status ;
+
+ status = readl(&uart->status);
+ return (((status >> YANU_RFIFO_CHARS_POS) &
+ ((1 << YANU_RFIFO_CHARS_N) - 1)) > 0);
+}
+
+int serial_getc (void)
+{
+ while (serial_tstc() == 0)
+ WATCHDOG_RESET ();
+
+ /* first we pull the char */
+ writel(&uart->action, YANU_ACTION_RFIFO_PULL);
+
+ return(readl(&uart->data) & YANU_DATA_CHAR_MASK);
+}
+
+#else /*CONFIG_CONSOLE_YANU*/
+
/*------------------------------------------------------------------
* UART the serial port
*-----------------------------------------------------------------*/
-#else
static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
--- /dev/null
+To enable this feature just define CONFIG_HWCONFIG in your board
+config file.
+
+This implements a simple hwconfig infrastructure: an
+interface for software knobs to control hardware.
+
+This a is very simple implementation, i.e. it is implemented
+via the `hwconfig' environment variable. Later we could write
+some "hwconfig <enable|disable|list>" commands, ncurses
+interface for Award BIOS-like interface, and frame-buffer
+interface for AMI GUI[1] BIOS-like interface with mouse
+support[2].
+
+Current implementation details/limitations:
+
+1. Doesn't support options dependencies and mutual exclusion.
+ We can implement this by integrating apt-get[3] into Das
+ U-Boot. But I haven't bothered yet.
+
+2. Since we don't implement a hwconfig command, i.e. we're working
+ with the environement directly, there is no way to tell that
+ toggling a particular option will need a reboot to take
+ effect. So, for now it's advised to always reboot the
+ target after modifying the hwconfig variable.
+
+3. We support hwconfig options with arguments. For example,
+
+ set hwconfig "dr_usb:mode=peripheral,phy_type=ulpi"
+
+ This selects three hwconfig options:
+ 1. dr_usb - enable Dual-Role USB controller;
+ 2. dr_usb_mode:peripheral - USB in Function mode;
+ 3. dr_usb_phy_type:ulpi - USB should work with ULPI PHYs.
+
+The purpose of this simple implementation is to refine the
+internal API and then we can continue improving the user
+experience by adding more mature interfaces, like a hwconfig
+command with bells and whistles. Or not adding, if we feel
+that the current interface fits people's needs.
+
+[1] http://en.wikipedia.org/wiki/American_Megatrends
+[2] Regarding ncurses and GUI with mouse support -- I'm just
+ kidding.
+[3] The comment regarding apt-get is also a joke, meaning that
+ dependency tracking could be non-trivial. For example, for
+ enabling HW feature X we may need to disable Y, and turn Z
+ into reduced mode (like RMII-only interface for ethernet,
+ no MII).
+
+ It's quite trivial to implement simple cases though.
Units = cylinders of 16065 * 512 = 8225280 bytes
Disk identifier: 0xb712a870
- Device Boot Start End Blocks Id System
-/dev/mmcblk0p1 3 16 112455 83 Linux
+ Device Boot Start End Blocks Id System
+/dev/mmcblk0p1 3 16 112455 83 Linux
I have set 100MB, leaving the first 2 sectors free. I will copy u-boot
there.
| 0x90-0x93 | 0xFF720000 | Config Addr 3 |
| 0x94-0x97 | 0x80010000 | Config Data 3 |
--------------------------------------------------------
- | 0x98-0x9b | 0xFF72e40e | Config Addr 4 |
+ | 0x98-0x9b | 0xFF72e40c | Config Addr 4 |
| 0x9c-0x9f | 0x00000040 | Config Data 4 |
--------------------------------------------------------
| 0xa0-0xa3 | 0x40000001 | Config Addr 5 |
err = mmc_set_blocklen(mmc, mmc->read_bl_len);
if (err)
- return err;
+ goto free_buffer;
for (i = startblock; i <= endblock; i++) {
int segment_size;
int i;
/* reset sequence */
- writew(STR_STP_CLK_RESET, &host->base->str_stp_clk);
- writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK,
+ writel(STR_STP_CLK_RESET, &host->base->str_stp_clk);
+ writel(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK,
&host->base->str_stp_clk);
for (i = 0; i < 8; i++)
- writew(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
+ writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
- writew(0xff, &host->base->res_to);
+ writel(0xff, &host->base->res_to);
}
static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
host->data = data;
- writew(nob, &host->base->nob);
- writew(blksz, &host->base->blk_len);
+ writel(nob, &host->base->nob);
+ writel(blksz, &host->base->blk_len);
host->datasize = datasize;
}
return -EINVAL;
}
- writew(cmd->cmdidx, &host->base->cmd);
+ writel(cmd->cmdidx, &host->base->cmd);
writel(cmd->cmdarg, &host->base->arg);
- writew(cmdat, &host->base->cmd_dat_cont);
+ writel(cmdat, &host->base->cmd_dat_cont);
return 0;
}
if (cmd->resp_type & MMC_RSP_PRESENT) {
if (cmd->resp_type & MMC_RSP_136) {
for (i = 0; i < 4; i++) {
- a = readw(&host->base->res_fifo);
- b = readw(&host->base->res_fifo);
+ a = readl(&host->base->res_fifo) & 0xFFFF;
+ b = readl(&host->base->res_fifo) & 0xFFFF;
resp[i] = a << 16 | b;
}
} else {
- a = readw(&host->base->res_fifo);
- b = readw(&host->base->res_fifo);
- c = readw(&host->base->res_fifo);
+ a = readl(&host->base->res_fifo) & 0xFFFF;
+ b = readl(&host->base->res_fifo) & 0xFFFF;
+ c = readl(&host->base->res_fifo) & 0xFFFF;
resp[0] = a << 24 | b << 8 | c >> 8;
}
}
prescaler <<= 1;
}
- writew((prescaler << 4) | divider, &host->base->clk_rate);
+ writel((prescaler << 4) | divider, &host->base->clk_rate);
}
static void mxcmci_set_ios(struct mmc *mmc)
if (mmc->clock) {
mxcmci_set_clk_rate(host, mmc->clock);
- writew(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
+ writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk);
} else {
- writew(STR_STP_CLK_STOP_CLK, &host->base->str_stp_clk);
+ writel(STR_STP_CLK_STOP_CLK, &host->base->str_stp_clk);
}
host->clock = mmc->clock;
mxcmci_softreset(host);
- host->rev_no = readw(&host->base->rev_no);
+ host->rev_no = readl(&host->base->rev_no);
if (host->rev_no != 0x400) {
printf("wrong rev.no. 0x%08x. aborting.\n",
host->rev_no);
}
/* recommended in data sheet */
- writew(0x2db4, &host->base->read_to);
+ writel(0x2db4, &host->base->read_to);
writel(0, &host->base->int_cntr);
#include <nand.h>
#include <linux/err.h>
#include <asm/io.h>
-#if defined(CONFIG_MX27) || defined(CONFIG_MX25)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX27)
#include <asm/arch/imx-regs.h>
#endif
}
#endif
-
-
static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
{
+++ /dev/null
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# File: drivers/net/sk98lin/Makefile
-#
-# Makefile for the SysKonnect SK-98xx device driver.
-#
-
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libsk98lin.a
-
-COBJS-$(CONFIG_SK98) += skge.o skaddr.o skgehwt.o skgeinit.o skgepnmi.o \
- skgesirq.o ski2c.o sklm80.o skqueue.o skrlmt.o sktimer.o \
- skvpd.o skxmac2.o skcsum.o
-#COBJS-y += skproc.o
-
-COBJS-$(CONFIG_SK98) += uboot_skb.o uboot_drv.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-# DBGDEF = \
-# -DDEBUG
-
-ifdef DEBUG
-DBGDEF += \
--DSK_DEBUG_CHKMOD=0x00000000L \
--DSK_DEBUG_CHKCAT=0x00000000L
-endif
-
-
-# **** possible debug modules for SK_DEBUG_CHKMOD *****************
-# SK_DBGMOD_MERR 0x00000001L /* general module error indication */
-# SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
-# SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
-# SK_DBGMOD_VPD 0x00000008L /* VPD module */
-# SK_DBGMOD_I2C 0x00000010L /* I2C module */
-# SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
-# SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
-# SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
-# SK_DBGMOD_DRV 0x00010000L /* DRV module */
-
-# **** possible debug categories for SK_DEBUG_CHKCAT **************
-# *** common modules ***
-# SK_DBGCAT_INIT 0x00000001L module/driver initialization
-# SK_DBGCAT_CTRL 0x00000002L controlling: add/rmv MCA/MAC and other controls (IOCTL)
-# SK_DBGCAT_ERR 0x00000004L error handling paths
-# SK_DBGCAT_TX 0x00000008L transmit path
-# SK_DBGCAT_RX 0x00000010L receive path
-# SK_DBGCAT_IRQ 0x00000020L general IRQ handling
-# SK_DBGCAT_QUEUE 0x00000040L any queue management
-# SK_DBGCAT_DUMP 0x00000080L large data output e.g. hex dump
-# SK_DBGCAT_FATAL 0x00000100L large data output e.g. hex dump
-
-# *** driver (file skge.c) ***
-# SK_DBGCAT_DRV_ENTRY 0x00010000 entry points
-# SK_DBGCAT_DRV_??? 0x00020000 not used
-# SK_DBGCAT_DRV_MCA 0x00040000 multicast
-# SK_DBGCAT_DRV_TX_PROGRESS 0x00080000 tx path
-# SK_DBGCAT_DRV_RX_PROGRESS 0x00100000 rx path
-# SK_DBGCAT_DRV_PROGRESS 0x00200000 general runtime
-# SK_DBGCAT_DRV_??? 0x00400000 not used
-# SK_DBGCAT_DRV_PROM 0x00800000 promiscuous mode
-# SK_DBGCAT_DRV_TX_FRAME 0x01000000 display tx frames
-# SK_DBGCAT_DRV_ERROR 0x02000000 error conditions
-# SK_DBGCAT_DRV_INT_SRC 0x04000000 interrupts sources
-# SK_DBGCAT_DRV_EVENT 0x08000000 driver events
-
-EXTRA_CFLAGS += -I. -DSK_USE_CSUM $(DBGDEF)
-
-CFLAGS += $(EXTRA_CFLAGS)
-HOSTCFLAGS += $(EXTRA_CFLAGS)
-
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-/******************************************************************************
- *
- * Name: lm80.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.4 $
- * Date: $Date: 2002/04/25 11:04:10 $
- * Purpose: Contains all defines for the LM80 Chip
- * (National Semiconductor).
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- * $Log: lm80.h,v $
- * Revision 1.4 2002/04/25 11:04:10 rschmidt
- * Editorial changes
- *
- * Revision 1.3 1999/11/22 13:41:19 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.2 1999/03/12 13:26:51 malthoff
- * remove __STDC__.
- *
- * Revision 1.1 1998/06/19 09:28:31 malthoff
- * created.
- *
- *
- ******************************************************************************/
-
-#ifndef __INC_LM80_H
-#define __INC_LM80_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/* defines ********************************************************************/
-
-/*
- * LM80 register definition
- *
- * All registers are 8 bit wide
- */
-#define LM80_CFG 0x00 /* Configuration Register */
-#define LM80_ISRC_1 0x01 /* Interrupt Status Register 1 */
-#define LM80_ISRC_2 0x02 /* Interrupt Status Register 2 */
-#define LM80_IMSK_1 0x03 /* Interrupt Mask Register 1 */
-#define LM80_IMSK_2 0x04 /* Interrupt Mask Register 2 */
-#define LM80_FAN_CTRL 0x05 /* Fan Devisor/RST#/OS# Register */
-#define LM80_TEMP_CTRL 0x06 /* OS# Config, Temp Res. Reg */
- /* 0x07 - 0x1f reserved */
- /* current values */
-#define LM80_VT0_IN 0x20 /* current Voltage 0 value */
-#define LM80_VT1_IN 0x21 /* current Voltage 1 value */
-#define LM80_VT2_IN 0x22 /* current Voltage 2 value */
-#define LM80_VT3_IN 0x23 /* current Voltage 3 value */
-#define LM80_VT4_IN 0x24 /* current Voltage 4 value */
-#define LM80_VT5_IN 0x25 /* current Voltage 5 value */
-#define LM80_VT6_IN 0x26 /* current Voltage 6 value */
-#define LM80_TEMP_IN 0x27 /* current Temperature value */
-#define LM80_FAN1_IN 0x28 /* current Fan 1 count */
-#define LM80_FAN2_IN 0x29 /* current Fan 2 count */
- /* limit values */
-#define LM80_VT0_HIGH_LIM 0x2a /* high limit val for Voltage 0 */
-#define LM80_VT0_LOW_LIM 0x2b /* low limit val for Voltage 0 */
-#define LM80_VT1_HIGH_LIM 0x2c /* high limit val for Voltage 1 */
-#define LM80_VT1_LOW_LIM 0x2d /* low limit val for Voltage 1 */
-#define LM80_VT2_HIGH_LIM 0x2e /* high limit val for Voltage 2 */
-#define LM80_VT2_LOW_LIM 0x2f /* low limit val for Voltage 2 */
-#define LM80_VT3_HIGH_LIM 0x30 /* high limit val for Voltage 3 */
-#define LM80_VT3_LOW_LIM 0x31 /* low limit val for Voltage 3 */
-#define LM80_VT4_HIGH_LIM 0x32 /* high limit val for Voltage 4 */
-#define LM80_VT4_LOW_LIM 0x33 /* low limit val for Voltage 4 */
-#define LM80_VT5_HIGH_LIM 0x34 /* high limit val for Voltage 5 */
-#define LM80_VT5_LOW_LIM 0x35 /* low limit val for Voltage 5 */
-#define LM80_VT6_HIGH_LIM 0x36 /* high limit val for Voltage 6 */
-#define LM80_VT6_LOW_LIM 0x37 /* low limit val for Voltage 6 */
-#define LM80_THOT_LIM_UP 0x38 /* hot temperature limit (high) */
-#define LM80_THOT_LIM_LO 0x39 /* hot temperature limit (low) */
-#define LM80_TOS_LIM_UP 0x3a /* OS temperature limit (high) */
-#define LM80_TOS_LIM_LO 0x3b /* OS temperature limit (low) */
-#define LM80_FAN1_COUNT_LIM 0x3c /* Fan 1 count limit (high) */
-#define LM80_FAN2_COUNT_LIM 0x3d /* Fan 2 count limit (low) */
- /* 0x3e - 0x3f reserved */
-
-/*
- * LM80 bit definitions
- */
-
-/* LM80_CFG Configuration Register */
-#define LM80_CFG_START (1<<0) /* start monitoring operation */
-#define LM80_CFG_INT_ENA (1<<1) /* enables the INT# Interrupt output */
-#define LM80_CFG_INT_POL (1<<2) /* INT# pol: 0 act low, 1 act high */
-#define LM80_CFG_INT_CLR (1<<3) /* disables INT#/RST_OUT#/OS# outputs */
-#define LM80_CFG_RESET (1<<4) /* signals a reset */
-#define LM80_CFG_CHASS_CLR (1<<5) /* clears Chassis Intrusion (CI) pin */
-#define LM80_CFG_GPO (1<<6) /* drives the GPO# pin */
-#define LM80_CFG_INIT (1<<7) /* restore power on defaults */
-
-/* LM80_ISRC_1 Interrupt Status Register 1 */
-/* LM80_IMSK_1 Interrupt Mask Register 1 */
-#define LM80_IS_VT0 (1<<0) /* limit exceeded for Voltage 0 */
-#define LM80_IS_VT1 (1<<1) /* limit exceeded for Voltage 1 */
-#define LM80_IS_VT2 (1<<2) /* limit exceeded for Voltage 2 */
-#define LM80_IS_VT3 (1<<3) /* limit exceeded for Voltage 3 */
-#define LM80_IS_VT4 (1<<4) /* limit exceeded for Voltage 4 */
-#define LM80_IS_VT5 (1<<5) /* limit exceeded for Voltage 5 */
-#define LM80_IS_VT6 (1<<6) /* limit exceeded for Voltage 6 */
-#define LM80_IS_INT_IN (1<<7) /* state of INT_IN# */
-
-/* LM80_ISRC_2 Interrupt Status Register 2 */
-/* LM80_IMSK_2 Interrupt Mask Register 2 */
-#define LM80_IS_TEMP (1<<0) /* HOT temperature limit exceeded */
-#define LM80_IS_BTI (1<<1) /* state of BTI# pin */
-#define LM80_IS_FAN1 (1<<2) /* count limit exceeded for Fan 1 */
-#define LM80_IS_FAN2 (1<<3) /* count limit exceeded for Fan 2 */
-#define LM80_IS_CI (1<<4) /* Chassis Intrusion occured */
-#define LM80_IS_OS (1<<5) /* OS temperature limit exceeded */
- /* bit 6 and 7 are reserved in LM80_ISRC_2 */
-#define LM80_IS_HT_IRQ_MD (1<<6) /* Hot temperature interrupt mode */
-#define LM80_IS_OT_IRQ_MD (1<<7) /* OS temperature interrupt mode */
-
-/* LM80_FAN_CTRL Fan Devisor/RST#/OS# Register */
-#define LM80_FAN1_MD_SEL (1<<0) /* Fan 1 mode select */
-#define LM80_FAN2_MD_SEL (1<<1) /* Fan 2 mode select */
-#define LM80_FAN1_PRM_CTL (3<<2) /* Fan 1 speed control */
-#define LM80_FAN2_PRM_CTL (3<<4) /* Fan 2 speed control */
-#define LM80_FAN_OS_ENA (1<<6) /* enable OS mode on RST_OUT#/OS# pins*/
-#define LM80_FAN_RST_ENA (1<<7) /* sets RST_OUT#/OS# pins in RST mode */
-
-/* LM80_TEMP_CTRL OS# Config, Temp Res. Reg */
-#define LM80_TEMP_OS_STAT (1<<0) /* mirrors the state of RST_OUT#/OS# */
-#define LM80_TEMP_OS_POL (1<<1) /* select OS# polarity */
-#define LM80_TEMP_OS_MODE (1<<2) /* selects Interrupt mode */
-#define LM80_TEMP_RES (1<<3) /* selects 9 or 11 bit temp resulution*/
-#define LM80_TEMP_LSB (0xf<<4)/* 4 LSBs of 11 bit temp data */
-#define LM80_TEMP_LSB_9 (1<<7) /* LSB of 9 bit temperature data */
-
- /* 0x07 - 0x1f reserved */
-/* LM80_VT0_IN current Voltage 0 value */
-/* LM80_VT1_IN current Voltage 1 value */
-/* LM80_VT2_IN current Voltage 2 value */
-/* LM80_VT3_IN current Voltage 3 value */
-/* LM80_VT4_IN current Voltage 4 value */
-/* LM80_VT5_IN current Voltage 5 value */
-/* LM80_VT6_IN current Voltage 6 value */
-/* LM80_TEMP_IN current temperature value */
-/* LM80_FAN1_IN current Fan 1 count */
-/* LM80_FAN2_IN current Fan 2 count */
-/* LM80_VT0_HIGH_LIM high limit val for Voltage 0 */
-/* LM80_VT0_LOW_LIM low limit val for Voltage 0 */
-/* LM80_VT1_HIGH_LIM high limit val for Voltage 1 */
-/* LM80_VT1_LOW_LIM low limit val for Voltage 1 */
-/* LM80_VT2_HIGH_LIM high limit val for Voltage 2 */
-/* LM80_VT2_LOW_LIM low limit val for Voltage 2 */
-/* LM80_VT3_HIGH_LIM high limit val for Voltage 3 */
-/* LM80_VT3_LOW_LIM low limit val for Voltage 3 */
-/* LM80_VT4_HIGH_LIM high limit val for Voltage 4 */
-/* LM80_VT4_LOW_LIM low limit val for Voltage 4 */
-/* LM80_VT5_HIGH_LIM high limit val for Voltage 5 */
-/* LM80_VT5_LOW_LIM low limit val for Voltage 5 */
-/* LM80_VT6_HIGH_LIM high limit val for Voltage 6 */
-/* LM80_VT6_LOW_LIM low limit val for Voltage 6 */
-/* LM80_THOT_LIM_UP hot temperature limit (high) */
-/* LM80_THOT_LIM_LO hot temperature limit (low) */
-/* LM80_TOS_LIM_UP OS temperature limit (high) */
-/* LM80_TOS_LIM_LO OS temperature limit (low) */
-/* LM80_FAN1_COUNT_LIM Fan 1 count limit (high) */
-/* LM80_FAN2_COUNT_LIM Fan 2 count limit (low) */
- /* 0x3e - 0x3f reserved */
-
-#define LM80_ADDR 0x28 /* LM80 default addr */
-
-/* typedefs *******************************************************************/
-
-
-/* function prototypes ********************************************************/
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __INC_LM80_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skaddr.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.26 $
- * Date: $Date: 2002/11/15 07:24:42 $
- * Purpose: Header file for Address Management (MC, UC, Prom).
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skaddr.h,v $
- * Revision 1.26 2002/11/15 07:24:42 tschilli
- * SK_ADDR_EQUAL macro fixed.
- *
- * Revision 1.25 2002/06/10 13:55:18 tschilli
- * Changes for handling YUKON.
- * All changes are internally and not visible to the programmer
- * using this module.
- *
- * Revision 1.24 2001/01/22 13:41:34 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.23 2000/08/10 11:27:50 rassmann
- * Editorial changes.
- * Preserving 32-bit alignment in structs for the adapter context.
- *
- * Revision 1.22 2000/08/07 11:10:40 rassmann
- * Editorial changes.
- *
- * Revision 1.21 2000/05/04 09:39:59 rassmann
- * Editorial changes.
- * Corrected multicast address hashing.
- *
- * Revision 1.20 1999/11/22 13:46:14 cgoos
- * Changed license header to GPL.
- * Allowing overwrite for SK_ADDR_EQUAL.
- *
- * Revision 1.19 1999/05/28 10:56:07 rassmann
- * Editorial changes.
- *
- * Revision 1.18 1999/04/06 17:22:04 rassmann
- * Added private "ActivePort".
- *
- * Revision 1.17 1999/01/14 16:18:19 rassmann
- * Corrected multicast initialization.
- *
- * Revision 1.16 1999/01/04 10:30:36 rassmann
- * SkAddrOverride only possible after SK_INIT_IO phase.
- *
- * Revision 1.15 1998/12/29 13:13:11 rassmann
- * An address override is now preserved in the SK_INIT_IO phase.
- * All functions return an int now.
- * Extended parameter checking.
- *
- * Revision 1.14 1998/11/24 12:39:45 rassmann
- * Reserved multicast entry for BPDU address.
- * 13 multicast entries left for protocol.
- *
- * Revision 1.13 1998/11/13 17:24:32 rassmann
- * Changed return value of SkAddrOverride to int.
- *
- * Revision 1.12 1998/11/13 16:56:19 rassmann
- * Added macro SK_ADDR_COMPARE.
- * Changed return type of SkAddrOverride to SK_BOOL.
- *
- * Revision 1.11 1998/10/28 18:16:35 rassmann
- * Avoiding I/Os before SK_INIT_RUN level.
- * Aligning InexactFilter.
- *
- * Revision 1.10 1998/10/22 11:39:10 rassmann
- * Corrected signed/unsigned mismatches.
- *
- * Revision 1.9 1998/10/15 15:15:49 rassmann
- * Changed Flags Parameters from SK_U8 to int.
- * Checked with lint.
- *
- * Revision 1.8 1998/09/24 19:15:12 rassmann
- * Code cleanup.
- *
- * Revision 1.7 1998/09/18 20:22:13 rassmann
- * Added HW access.
- *
- * Revision 1.6 1998/09/04 19:40:20 rassmann
- * Interface enhancements.
- *
- * Revision 1.5 1998/09/04 12:40:57 rassmann
- * Interface cleanup.
- *
- * Revision 1.4 1998/09/04 12:14:13 rassmann
- * Interface cleanup.
- *
- * Revision 1.3 1998/09/02 16:56:40 rassmann
- * Updated interface.
- *
- * Revision 1.2 1998/08/27 14:26:09 rassmann
- * Updated interface.
- *
- * Revision 1.1 1998/08/21 08:31:08 rassmann
- * First public version.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This module is intended to manage multicast addresses and promiscuous mode
- * on GEnesis adapters.
- *
- * Include File Hierarchy:
- *
- * "skdrv1st.h"
- * ...
- * "sktypes.h"
- * "skqueue.h"
- * "skaddr.h"
- * ...
- * "skdrv2nd.h"
- *
- ******************************************************************************/
-
-#ifndef __INC_SKADDR_H
-#define __INC_SKADDR_H
-
-#ifdef __cplusplus
-#error C++ is not yet supported.
-extern "C" {
-#endif /* cplusplus */
-
-/* defines ********************************************************************/
-
-#define SK_MAC_ADDR_LEN 6 /* Length of MAC address. */
-#define SK_MAX_ADDRS 14 /* #Addrs for exact match. */
-
-/* ----- Common return values ----- */
-
-#define SK_ADDR_SUCCESS 0 /* Function returned successfully. */
-#define SK_ADDR_ILLEGAL_PORT 100 /* Port number too high. */
-#define SK_ADDR_TOO_EARLY 101 /* Function called too early. */
-
-/* ----- Clear/Add flag bits ----- */
-
-#define SK_ADDR_PERMANENT 1 /* RLMT Address */
-
-/* ----- Additional Clear flag bits ----- */
-
-#define SK_MC_SW_ONLY 2 /* Do not update HW when clearing. */
-
-/* ----- Override flag bits ----- */
-
-#define SK_ADDR_LOGICAL_ADDRESS 0
-#define SK_ADDR_VIRTUAL_ADDRESS (SK_ADDR_LOGICAL_ADDRESS) /* old */
-#define SK_ADDR_PHYSICAL_ADDRESS 1
-#define SK_ADDR_CLEAR_LOGICAL 2
-#define SK_ADDR_SET_LOGICAL 4
-
-/* ----- Override return values ----- */
-
-#define SK_ADDR_OVERRIDE_SUCCESS (SK_ADDR_SUCCESS)
-#define SK_ADDR_DUPLICATE_ADDRESS 1
-#define SK_ADDR_MULTICAST_ADDRESS 2
-
-/* ----- Partitioning of excact match table ----- */
-
-#define SK_ADDR_EXACT_MATCHES 16 /* #Exact match entries. */
-
-#define SK_ADDR_FIRST_MATCH_RLMT 1
-#define SK_ADDR_LAST_MATCH_RLMT 2
-#define SK_ADDR_FIRST_MATCH_DRV 3
-#define SK_ADDR_LAST_MATCH_DRV (SK_ADDR_EXACT_MATCHES - 1)
-
-/* ----- SkAddrMcAdd/SkAddrMcUpdate return values ----- */
-
-#define SK_MC_FILTERING_EXACT 0 /* Exact filtering. */
-#define SK_MC_FILTERING_INEXACT 1 /* Inexact filtering. */
-
-/* ----- Additional SkAddrMcAdd return values ----- */
-
-#define SK_MC_ILLEGAL_ADDRESS 2 /* Illegal address. */
-#define SK_MC_ILLEGAL_PORT 3 /* Illegal port (not the active one). */
-#define SK_MC_RLMT_OVERFLOW 4 /* Too many RLMT mc addresses. */
-
-/* Promiscuous mode bits ----- */
-
-#define SK_PROM_MODE_NONE 0 /* Normal receive. */
-#define SK_PROM_MODE_LLC 1 /* Receive all LLC frames. */
-#define SK_PROM_MODE_ALL_MC 2 /* Receive all multicast frames. */
-/* #define SK_PROM_MODE_NON_LLC 4 */ /* Receive all non-LLC frames. */
-
-/* Macros */
-
-#if 0
-#ifndef SK_ADDR_EQUAL
-/*
- * "&" instead of "&&" allows better optimization on IA-64.
- * The replacement is safe here, as all bytes exist.
- */
-#ifndef SK_ADDR_DWORD_COMPARE
-#define SK_ADDR_EQUAL(A1,A2) ( \
- (((SK_U8 *)(A1))[5] == ((SK_U8 *)(A2))[5]) & \
- (((SK_U8 *)(A1))[4] == ((SK_U8 *)(A2))[4]) & \
- (((SK_U8 *)(A1))[3] == ((SK_U8 *)(A2))[3]) & \
- (((SK_U8 *)(A1))[2] == ((SK_U8 *)(A2))[2]) & \
- (((SK_U8 *)(A1))[1] == ((SK_U8 *)(A2))[1]) & \
- (((SK_U8 *)(A1))[0] == ((SK_U8 *)(A2))[0]))
-#else /* SK_ADDR_DWORD_COMPARE */
-#define SK_ADDR_EQUAL(A1,A2) ( \
- (*(SK_U32 *)&(((SK_U8 *)(A1))[2]) == *(SK_U32 *)&(((SK_U8 *)(A2))[2])) & \
- (*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
-#endif /* SK_ADDR_DWORD_COMPARE */
-#endif /* SK_ADDR_EQUAL */
-#endif /* 0 */
-
-#ifndef SK_ADDR_EQUAL
-#ifndef SK_ADDR_DWORD_COMPARE
-#define SK_ADDR_EQUAL(A1,A2) ( \
- (((SK_U8 *)(A1))[5] == ((SK_U8 *)(A2))[5]) & \
- (((SK_U8 *)(A1))[4] == ((SK_U8 *)(A2))[4]) & \
- (((SK_U8 *)(A1))[3] == ((SK_U8 *)(A2))[3]) & \
- (((SK_U8 *)(A1))[2] == ((SK_U8 *)(A2))[2]) & \
- (((SK_U8 *)(A1))[1] == ((SK_U8 *)(A2))[1]) & \
- (((SK_U8 *)(A1))[0] == ((SK_U8 *)(A2))[0]))
-#else /* SK_ADDR_DWORD_COMPARE */
-#define SK_ADDR_EQUAL(A1,A2) ( \
- (*(SK_U16 *)&(((SK_U8 *)(A1))[4]) == *(SK_U16 *)&(((SK_U8 *)(A2))[4])) && \
- (*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
-#endif /* SK_ADDR_DWORD_COMPARE */
-#endif /* SK_ADDR_EQUAL */
-
-/* typedefs *******************************************************************/
-
-typedef struct s_MacAddr {
- SK_U8 a[SK_MAC_ADDR_LEN];
-} SK_MAC_ADDR;
-
-
-/* SK_FILTER is used to ensure alignment of the filter. */
-typedef union s_InexactFilter {
- SK_U8 Bytes[8];
- SK_U64 Val; /* Dummy entry for alignment only. */
-} SK_FILTER64;
-
-
-typedef struct s_AddrNet SK_ADDR_NET;
-
-
-typedef struct s_AddrPort {
-
-/* ----- Public part (read-only) ----- */
-
- SK_MAC_ADDR CurrentMacAddress; /* Current physical MAC Address. */
- SK_MAC_ADDR PermanentMacAddress; /* Permanent physical MAC Address. */
- int PromMode; /* Promiscuous Mode. */
-
-/* ----- Private part ----- */
-
- SK_MAC_ADDR PreviousMacAddress; /* Prev. phys. MAC Address. */
- SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
- SK_U8 Align01;
-
- SK_U32 FirstExactMatchRlmt;
- SK_U32 NextExactMatchRlmt;
- SK_U32 FirstExactMatchDrv;
- SK_U32 NextExactMatchDrv;
- SK_MAC_ADDR Exact[SK_ADDR_EXACT_MATCHES];
- SK_FILTER64 InexactFilter; /* For 64-bit hash register. */
- SK_FILTER64 InexactRlmtFilter; /* For 64-bit hash register. */
- SK_FILTER64 InexactDrvFilter; /* For 64-bit hash register. */
-} SK_ADDR_PORT;
-
-
-struct s_AddrNet {
-/* ----- Public part (read-only) ----- */
-
- SK_MAC_ADDR CurrentMacAddress; /* Logical MAC Address. */
- SK_MAC_ADDR PermanentMacAddress; /* Logical MAC Address. */
-
-/* ----- Private part ----- */
-
- SK_U32 ActivePort; /* View of module ADDR. */
- SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
- SK_U8 Align01;
- SK_U16 Align02;
-};
-
-
-typedef struct s_Addr {
-
-/* ----- Public part (read-only) ----- */
-
- SK_ADDR_NET Net[SK_MAX_NETS];
- SK_ADDR_PORT Port[SK_MAX_MACS];
-
-/* ----- Private part ----- */
-} SK_ADDR;
-
-/* function prototypes ********************************************************/
-
-#ifndef SK_KR_PROTO
-
-/* Functions provided by SkAddr */
-
-/* ANSI/C++ compliant function prototypes */
-
-extern int SkAddrInit(
- SK_AC *pAC,
- SK_IOC IoC,
- int Level);
-
-extern int SkAddrMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
-extern int SkAddrXmacMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
-extern int SkAddrGmacMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
-extern int SkAddrMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
-extern int SkAddrXmacMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
-extern int SkAddrGmacMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
-extern int SkAddrMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
-extern int SkAddrXmacMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
-extern int SkAddrGmacMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
-extern int SkAddrOverride(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pNewAddr,
- int Flags);
-
-extern int SkAddrPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
-extern int SkAddrXmacPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
-extern int SkAddrGmacPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
-extern int SkAddrSwap(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 FromPortNumber,
- SK_U32 ToPortNumber);
-
-#else /* defined(SK_KR_PROTO)) */
-
-/* Non-ANSI/C++ compliant function prototypes */
-
-#error KR-style prototypes are not yet provided.
-
-#endif /* defined(SK_KR_PROTO)) */
-
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __INC_SKADDR_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skcsum.h
- * Project: GEnesis - SysKonnect SK-NET Gigabit Ethernet (SK-98xx)
- * Version: $Revision: 1.9 $
- * Date: $Date: 2001/02/06 11:21:39 $
- * Purpose: Store/verify Internet checksum in send/receive packets.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skcsum.h,v $
- * Revision 1.9 2001/02/06 11:21:39 rassmann
- * Editorial changes.
- *
- * Revision 1.8 2001/02/06 11:15:36 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.7 2000/06/29 13:17:05 rassmann
- * Corrected reception of a packet with UDP checksum == 0 (which means there
- * is no UDP checksum).
- *
- * Revision 1.6 2000/02/28 12:33:44 cgoos
- * Changed C++ style comments to C style.
- *
- * Revision 1.5 2000/02/21 12:10:05 cgoos
- * Fixed license comment.
- *
- * Revision 1.4 2000/02/21 11:08:37 cgoos
- * Merged changes back into common source.
- *
- * Revision 1.1 1999/07/26 14:47:49 mkarl
- * changed from common source to windows specific source
- * added return SKCS_STATUS_IP_CSUM_ERROR_UDP and
- * SKCS_STATUS_IP_CSUM_ERROR_TCP to pass the NidsTester
- * changes for Tx csum offload
- *
- * Revision 1.2 1998/09/04 12:16:34 mhaveman
- * Checked in for Stephan to allow compilation.
- * -Added definition SK_CSUM_EVENT_CLEAR_PROTO_STATS to clear statistic
- * -Added prototype for SkCsEvent()
- *
- * Revision 1.1 1998/09/01 15:36:53 swolf
- * initial revision
- *
- * 01-Sep-1998 sw Created.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * Public header file for the "GEnesis" common module "CSUM".
- *
- * "GEnesis" is an abbreviation of "Gigabit Ethernet Network System in Silicon"
- * and is the code name of this SysKonnect project.
- *
- * Compilation Options:
- *
- * SK_USE_CSUM - Define if CSUM is to be used. Otherwise, CSUM will be an
- * empty module.
- *
- * SKCS_OVERWRITE_PROTO - Define to overwrite the default protocol id
- * definitions. In this case, all SKCS_PROTO_xxx definitions must be made
- * external.
- *
- * SKCS_OVERWRITE_STATUS - Define to overwrite the default return status
- * definitions. In this case, all SKCS_STATUS_xxx definitions must be made
- * external.
- *
- * Include File Hierarchy:
- *
- * "h/skcsum.h"
- * "h/sktypes.h"
- * "h/skqueue.h"
- *
- ******************************************************************************/
-
-#ifndef __INC_SKCSUM_H
-#define __INC_SKCSUM_H
-
-#include "h/sktypes.h"
-#include "h/skqueue.h"
-
-/* defines ********************************************************************/
-
-/*
- * Define the default bit flags for 'SKCS_PACKET_INFO.ProtocolFlags' if no user
- * overwrite.
- */
-#ifndef SKCS_OVERWRITE_PROTO /* User overwrite? */
-#define SKCS_PROTO_IP 0x1 /* IP (Internet Protocol version 4) */
-#define SKCS_PROTO_TCP 0x2 /* TCP (Transmission Control Protocol) */
-#define SKCS_PROTO_UDP 0x4 /* UDP (User Datagram Protocol) */
-
-/* Indices for protocol statistics. */
-#define SKCS_PROTO_STATS_IP 0
-#define SKCS_PROTO_STATS_UDP 1
-#define SKCS_PROTO_STATS_TCP 2
-#define SKCS_NUM_PROTOCOLS 3 /* Number of supported protocols. */
-#endif /* !SKCS_OVERWRITE_PROTO */
-
-/*
- * Define the default SKCS_STATUS type and values if no user overwrite.
- *
- * SKCS_STATUS_UNKNOWN_IP_VERSION - Not an IP v4 frame.
- * SKCS_STATUS_IP_CSUM_ERROR - IP checksum error.
- * SKCS_STATUS_IP_CSUM_ERROR_TCP - IP checksum error in TCP frame.
- * SKCS_STATUS_IP_CSUM_ERROR_UDP - IP checksum error in UDP frame
- * SKCS_STATUS_IP_FRAGMENT - IP fragment (IP checksum ok).
- * SKCS_STATUS_IP_CSUM_OK - IP checksum ok (not a TCP or UDP frame).
- * SKCS_STATUS_TCP_CSUM_ERROR - TCP checksum error (IP checksum ok).
- * SKCS_STATUS_UDP_CSUM_ERROR - UDP checksum error (IP checksum ok).
- * SKCS_STATUS_TCP_CSUM_OK - IP and TCP checksum ok.
- * SKCS_STATUS_UDP_CSUM_OK - IP and UDP checksum ok.
- * SKCS_STATUS_IP_CSUM_OK_NO_UDP - IP checksum OK and no UDP checksum.
- */
-#ifndef SKCS_OVERWRITE_STATUS /* User overwrite? */
-#define SKCS_STATUS int /* Define status type. */
-
-#define SKCS_STATUS_UNKNOWN_IP_VERSION 1
-#define SKCS_STATUS_IP_CSUM_ERROR 2
-#define SKCS_STATUS_IP_FRAGMENT 3
-#define SKCS_STATUS_IP_CSUM_OK 4
-#define SKCS_STATUS_TCP_CSUM_ERROR 5
-#define SKCS_STATUS_UDP_CSUM_ERROR 6
-#define SKCS_STATUS_TCP_CSUM_OK 7
-#define SKCS_STATUS_UDP_CSUM_OK 8
-/* needed for Microsoft */
-#define SKCS_STATUS_IP_CSUM_ERROR_UDP 9
-#define SKCS_STATUS_IP_CSUM_ERROR_TCP 10
-/* UDP checksum may be omitted */
-#define SKCS_STATUS_IP_CSUM_OK_NO_UDP 11
-#endif /* !SKCS_OVERWRITE_STATUS */
-
-/* Clear protocol statistics event. */
-#define SK_CSUM_EVENT_CLEAR_PROTO_STATS 1
-
-/*
- * Add two values in one's complement.
- *
- * Note: One of the two input values may be "longer" than 16-bit, but then the
- * resulting sum may be 17 bits long. In this case, add zero to the result using
- * SKCS_OC_ADD() again.
- *
- * Result = Value1 + Value2
- */
-#define SKCS_OC_ADD(Result, Value1, Value2) { \
- unsigned long Sum; \
- \
- Sum = (unsigned long) (Value1) + (unsigned long) (Value2); \
- /* Add-in any carry. */ \
- (Result) = (Sum & 0xffff) + (Sum >> 16); \
-}
-
-/*
- * Subtract two values in one's complement.
- *
- * Result = Value1 - Value2
- */
-#define SKCS_OC_SUB(Result, Value1, Value2) \
- SKCS_OC_ADD((Result), (Value1), ~(Value2) & 0xffff)
-
-/* typedefs *******************************************************************/
-
-/*
- * SKCS_PROTO_STATS - The CSUM protocol statistics structure.
- *
- * There is one instance of this structure for each protocol supported.
- */
-typedef struct s_CsProtocolStatistics {
- SK_U64 RxOkCts; /* Receive checksum ok. */
- SK_U64 RxUnableCts; /* Unable to verify receive checksum. */
- SK_U64 RxErrCts; /* Receive checksum error. */
- SK_U64 TxOkCts; /* Transmit checksum ok. */
- SK_U64 TxUnableCts; /* Unable to calculate checksum in hw. */
-} SKCS_PROTO_STATS;
-
-/*
- * s_Csum - The CSUM module context structure.
- */
-typedef struct s_Csum {
- /* Enabled receive SK_PROTO_XXX bit flags. */
- unsigned ReceiveFlags[SK_MAX_NETS];
-#ifdef TX_CSUM
- unsigned TransmitFlags[SK_MAX_NETS];
-#endif /* TX_CSUM */
-
- /* The protocol statistics structure; one per supported protocol. */
- SKCS_PROTO_STATS ProtoStats[SK_MAX_NETS][SKCS_NUM_PROTOCOLS];
-} SK_CSUM;
-
-/*
- * SKCS_PACKET_INFO - The packet information structure.
- */
-typedef struct s_CsPacketInfo {
- /* Bit field specifiying the desired/found protocols. */
- unsigned ProtocolFlags;
-
- /* Length of complete IP header, including any option fields. */
- unsigned IpHeaderLength;
-
- /* IP header checksum. */
- unsigned IpHeaderChecksum;
-
- /* TCP/UDP pseudo header checksum. */
- unsigned PseudoHeaderChecksum;
-} SKCS_PACKET_INFO;
-
-/* function prototypes ********************************************************/
-
-#ifndef SkCsCalculateChecksum
-extern unsigned SkCsCalculateChecksum(
- void *pData,
- unsigned Length);
-#endif
-
-extern int SkCsEvent(
- SK_AC *pAc,
- SK_IOC Ioc,
- SK_U32 Event,
- SK_EVPARA Param);
-
-extern SKCS_STATUS SkCsGetReceiveInfo(
- SK_AC *pAc,
- void *pIpHeader,
- unsigned Checksum1,
- unsigned Checksum2,
- int NetNumber);
-
-extern void SkCsGetSendInfo(
- SK_AC *pAc,
- void *pIpHeader,
- SKCS_PACKET_INFO *pPacketInfo,
- int NetNumber);
-
-extern void SkCsSetReceiveFlags(
- SK_AC *pAc,
- unsigned ReceiveFlags,
- unsigned *pChecksum1Offset,
- unsigned *pChecksum2Offset,
- int NetNumber);
-
-#endif /* __INC_SKCSUM_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skdebug.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.12 $
- * Date: $Date: 2002/07/15 15:37:13 $
- * Purpose: SK specific DEBUG support
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- * $Log: skdebug.h,v $
- * Revision 1.12 2002/07/15 15:37:13 rschmidt
- * Power Management support
- * Editorial changes
- *
- * Revision 1.11 2002/04/25 11:04:39 rschmidt
- * Editorial changes
- *
- * Revision 1.10 1999/11/22 13:47:40 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.9 1999/09/14 14:02:43 rwahl
- * Added SK_DBGMOD_PECP.
- *
- * Revision 1.8 1998/11/25 08:31:54 gklug
- * fix: no C++ comments allowed in common sources
- *
- * Revision 1.7 1998/11/24 16:47:24 swolf
- * Driver may now define its own SK_DBG_MSG() (eg. in "h/skdrv1st.h").
- *
- * Revision 1.6 1998/10/28 10:23:55 rassmann
- * ADDED SK_DBGMOD_ADDR.
- *
- * Revision 1.5 1998/10/22 09:43:55 gklug
- * add: CSUM module
- *
- * Revision 1.4 1998/10/01 07:54:44 gklug
- * add: PNMI debug module
- *
- * Revision 1.3 1998/09/18 08:32:34 afischer
- * Macros changed according ssr-spec.:
- * SK_DBG_MODCHK -> SK_DBG_CHKMOD
- * SK_DBG_CATCHK -> SK_DBG_CHKCAT
- *
- * Revision 1.2 1998/07/03 14:38:25 malthoff
- * Add category SK_DBGCAT_FATAL.
- *
- * Revision 1.1 1998/06/19 13:39:01 malthoff
- * created.
- *
- *
- ******************************************************************************/
-
-#ifndef __INC_SKDEBUG_H
-#define __INC_SKDEBUG_H
-
-#ifdef DEBUG
-#ifndef SK_DBG_MSG
-#define SK_DBG_MSG(pAC,comp,cat,arg) \
- if ( ((comp) & SK_DBG_CHKMOD(pAC)) && \
- ((cat) & SK_DBG_CHKCAT(pAC)) ) { \
- SK_DBG_PRINTF arg ; \
- }
-#endif
-#else
-#define SK_DBG_MSG(pAC,comp,lev,arg)
-#endif
-
-/* PLS NOTE:
- * =========
- * Due to any restrictions of kernel printf routines do not use other
- * format identifiers as: %x %d %c %s .
- * Never use any combined format identifiers such as: %lx %ld in your
- * printf - argument (arg) because some OS specific kernel printfs may
- * only support some basic identifiers.
- */
-
-/* Debug modules */
-
-#define SK_DBGMOD_MERR 0x00000001L /* general module error indication */
-#define SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
-#define SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
-#define SK_DBGMOD_VPD 0x00000008L /* VPD module */
-#define SK_DBGMOD_I2C 0x00000010L /* I2C module */
-#define SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
-#define SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
-#define SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
-#define SK_DBGMOD_PECP 0x00000100L /* PECP module */
-#define SK_DBGMOD_POWM 0x00000200L /* Power Management module */
-
-/* Debug events */
-
-#define SK_DBGCAT_INIT 0x00000001L /* module/driver initialization */
-#define SK_DBGCAT_CTRL 0x00000002L /* controlling devices */
-#define SK_DBGCAT_ERR 0x00000004L /* error handling paths */
-#define SK_DBGCAT_TX 0x00000008L /* transmit path */
-#define SK_DBGCAT_RX 0x00000010L /* receive path */
-#define SK_DBGCAT_IRQ 0x00000020L /* general IRQ handling */
-#define SK_DBGCAT_QUEUE 0x00000040L /* any queue management */
-#define SK_DBGCAT_DUMP 0x00000080L /* large data output e.g. hex dump */
-#define SK_DBGCAT_FATAL 0x00000100L /* fatal error */
-
-#endif /* __INC_SKDEBUG_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skdrv1st.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.11 $
- * Date: $Date: 2003/02/25 14:16:40 $
- * Purpose: First header file for driver and all other modules
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skdrv1st.h,v $
- * Revision 1.11 2003/02/25 14:16:40 mlindner
- * Fix: Copyright statement
- *
- * Revision 1.10 2002/10/02 12:46:02 mlindner
- * Add: Support for Yukon
- *
- * Revision 1.9.2.2 2001/12/07 12:06:42 mlindner
- * Fix: malloc -> slab changes
- *
- * Revision 1.9.2.1 2001/03/12 16:50:59 mlindner
- * chg: kernel 2.4 adaption
- *
- * Revision 1.9 2001/01/22 14:16:04 mlindner
- * added ProcFs functionality
- * Dual Net functionality integrated
- * Rlmt networks added
- *
- * Revision 1.8 2000/02/21 12:19:18 cgoos
- * Added default for SK_DEBUG_CHKMOD/_CHKCAT
- *
- * Revision 1.7 1999/11/22 13:50:00 cgoos
- * Changed license header to GPL.
- * Added overwrite for several functions.
- * Removed linux 2.0.x definitions.
- * Removed PCI vendor ID definition (now in kernel).
- *
- * Revision 1.6 1999/07/27 08:03:33 cgoos
- * Changed SK_IN/OUT macros to readX/writeX instead of memory
- * accesses (necessary for ALPHA).
- *
- * Revision 1.5 1999/07/23 12:10:21 cgoos
- * Removed SK_RLMT_SLOW_LOOKAHEAD define.
- *
- * Revision 1.4 1999/07/14 12:31:13 cgoos
- * Added SK_RLMT_SLOW_LOOKAHEAD define.
- *
- * Revision 1.3 1999/04/07 10:12:54 cgoos
- * Added check for KERNEL and OPTIMIZATION defines.
- *
- * Revision 1.2 1999/03/01 08:51:47 cgoos
- * Fixed pcibios_read/write definitions.
- *
- * Revision 1.1 1999/02/16 07:40:49 cgoos
- * First version.
- *
- *
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This is the first include file of the driver, which includes all
- * neccessary system header files and some of the GEnesis header files.
- * It also defines some basic items.
- *
- * Include File Hierarchy:
- *
- * see skge.c
- *
- ******************************************************************************/
-
-#ifndef __INC_SKDRV1ST_H
-#define __INC_SKDRV1ST_H
-
-#if 0
-/* Check kernel version */
-#include <linux/version.h>
-#if (LINUX_VERSION_CODE > 0x020300)
-#endif
-#endif
-
-typedef struct s_AC SK_AC;
-
-/* override some default functions with optimized linux functions */
-
-#define SK_PNMI_STORE_U16(p,v) memcpy((char*)(p),(char*)&(v),2)
-#define SK_PNMI_STORE_U32(p,v) memcpy((char*)(p),(char*)&(v),4)
-#define SK_PNMI_STORE_U64(p,v) memcpy((char*)(p),(char*)&(v),8)
-#define SK_PNMI_READ_U16(p,v) memcpy((char*)&(v),(char*)(p),2)
-#define SK_PNMI_READ_U32(p,v) memcpy((char*)&(v),(char*)(p),2)
-#define SK_PNMI_READ_U64(p,v) memcpy((char*)&(v),(char*)(p),2)
-
-#define SkCsCalculateChecksum(p,l) ((~ip_compute_csum(p, l)) & 0xffff)
-
-#define SK_ADDR_EQUAL(a1,a2) (!memcmp(a1,a2,6))
-
-
-#if !defined(__OPTIMIZE__) || !defined(__KERNEL__)
-#warning You must compile this file with the correct options!
-#warning See the last lines of the source file.
-#error You must compile this driver with "-O".
-#endif
-
-#if 0
-#include <linux/version.h>
-#endif
-#include <linux/types.h>
-#if 0
-#include <linux/kernel.h>
-#endif
-#include <linux/string.h>
-#if 0
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#endif
-#include <asm/byteorder.h>
-#include <asm/bitops.h>
-#include <asm/io.h>
-#if 0
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-
-#include <linux/init.h>
-#include <asm/uaccess.h>
-#include <net/checksum.h>
-#endif
-
-#include "h/sktypes.h"
-#include "h/skerror.h"
-#include "h/skdebug.h"
-#include "h/lm80.h"
-#include "h/xmac_ii.h"
-
-#include "u-boot_compat.h"
-
-#ifdef __LITTLE_ENDIAN
-#define SK_LITTLE_ENDIAN
-#else
-#define SK_BIG_ENDIAN
-#endif
-
-#if 0
-#define SK_NET_DEVICE net_device
-#else
-#define SK_NET_DEVICE eth_device
-#endif
-
-
-/* we use gethrtime(), return unit: nanoseconds */
-#if 0
-#define SK_TICKS_PER_SEC HZ
-#else
-#define SK_TICKS_PER_SEC CONFIG_SYS_HZ
-#endif
-
-#define SK_MEM_MAPPED_IO
-
-/* #define SK_RLMT_SLOW_LOOKAHEAD */
-
-#define SK_MAX_MACS 2
-#define SK_MAX_NETS 2
-
-#define SK_IOC char*
-
-typedef struct s_DrvRlmtMbuf SK_MBUF;
-
-#define SK_CONST64 INT64_C
-#define SK_CONSTU64 UINT64_C
-
-#define SK_MEMCPY(dest,src,size) memcpy(dest,src,size)
-#define SK_MEMCMP(s1,s2,size) memcmp(s1,s2,size)
-#define SK_MEMSET(dest,val,size) memset(dest,val,size)
-#define SK_STRLEN(pStr) strlen((char*)(pStr))
-#define SK_STRNCPY(pDest,pSrc,size) strncpy((char*)(pDest),(char*)(pSrc),size)
-#define SK_STRCMP(pStr1,pStr2) strcmp((char*)(pStr1),(char*)(pStr2))
-
-/* macros to access the adapter */
-#define SK_OUT8(b,a,v) writeb((v), ((b)+(a)))
-#define SK_OUT16(b,a,v) writew((v), ((b)+(a)))
-#define SK_OUT32(b,a,v) writel((v), ((b)+(a)))
-#define SK_IN8(b,a,pv) (*(pv) = readb((b)+(a)))
-#define SK_IN16(b,a,pv) (*(pv) = readw((b)+(a)))
-#define SK_IN32(b,a,pv) (*(pv) = readl((b)+(a)))
-
-#define int8_t char
-#define int16_t short
-#define int32_t long
-#define int64_t long long
-#define uint8_t u_char
-#define uint16_t u_short
-#define uint32_t u_long
-#define uint64_t unsigned long long
-#define t_scalar_t int
-#define t_uscalar_t unsigned int
-#define uintptr_t unsigned long
-
-#define __CONCAT__(A,B) A##B
-
-#define INT32_C(a) __CONCAT__(a,L)
-#define INT64_C(a) __CONCAT__(a,LL)
-#define UINT32_C(a) __CONCAT__(a,UL)
-#define UINT64_C(a) __CONCAT__(a,ULL)
-
-#ifdef DEBUG
-#define SK_DBG_PRINTF printk
-#ifndef SK_DEBUG_CHKMOD
-#define SK_DEBUG_CHKMOD 0
-#endif
-#ifndef SK_DEBUG_CHKCAT
-#define SK_DEBUG_CHKCAT 0
-#endif
-/* those come from the makefile */
-#define SK_DBG_CHKMOD(pAC) (SK_DEBUG_CHKMOD)
-#define SK_DBG_CHKCAT(pAC) (SK_DEBUG_CHKCAT)
-
-extern void SkDbgPrintf(const char *format,...);
-
-#define SK_DBGMOD_DRV 0x00010000
-
-/**** possible driver debug categories ********************************/
-#define SK_DBGCAT_DRV_ENTRY 0x00010000
-#define SK_DBGCAT_DRV_SAP 0x00020000
-#define SK_DBGCAT_DRV_MCA 0x00040000
-#define SK_DBGCAT_DRV_TX_PROGRESS 0x00080000
-#define SK_DBGCAT_DRV_RX_PROGRESS 0x00100000
-#define SK_DBGCAT_DRV_PROGRESS 0x00200000
-#define SK_DBGCAT_DRV_MSG 0x00400000
-#define SK_DBGCAT_DRV_PROM 0x00800000
-#define SK_DBGCAT_DRV_TX_FRAME 0x01000000
-#define SK_DBGCAT_DRV_ERROR 0x02000000
-#define SK_DBGCAT_DRV_INT_SRC 0x04000000
-#define SK_DBGCAT_DRV_EVENT 0x08000000
-
-#endif
-
-#define SK_ERR_LOG SkErrorLog
-
-extern void SkErrorLog(SK_AC*, int, int, char*);
-
-#endif
+++ /dev/null
-/******************************************************************************
- *
- * Name: skdrv2nd.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.15 $
- * Date: $Date: 2003/02/25 14:16:40 $
- * Purpose: Second header file for driver and all other modules
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skdrv2nd.h,v $
- * Revision 1.15 2003/02/25 14:16:40 mlindner
- * Fix: Copyright statement
- *
- * Revision 1.14 2003/02/25 13:26:26 mlindner
- * Add: Support for various vendors
- *
- * Revision 1.13 2002/10/02 12:46:02 mlindner
- * Add: Support for Yukon
- *
- * Revision 1.12.2.2 2001/09/05 12:14:50 mlindner
- * add: New hardware revision int
- *
- * Revision 1.12.2.1 2001/03/12 16:50:59 mlindner
- * chg: kernel 2.4 adaption
- *
- * Revision 1.12 2001/03/01 12:52:15 mlindner
- * Fixed ring size
- *
- * Revision 1.11 2001/02/19 13:28:02 mlindner
- * Changed PNMI parameter values
- *
- * Revision 1.10 2001/01/22 14:16:04 mlindner
- * added ProcFs functionality
- * Dual Net functionality integrated
- * Rlmt networks added
- *
- * Revision 1.1 2000/10/05 19:46:50 phargrov
- * Add directory src/vipk_devs_nonlbl/vipk_sk98lin/
- * This is the SysKonnect SK-98xx Gigabit Ethernet driver,
- * contributed by SysKonnect.
- *
- * Revision 1.9 2000/02/21 10:39:55 cgoos
- * Added flag for jumbo support usage.
- *
- * Revision 1.8 1999/11/22 13:50:44 cgoos
- * Changed license header to GPL.
- * Fixed two comments.
- *
- * Revision 1.7 1999/09/28 12:38:21 cgoos
- * Added CheckQueue to SK_AC.
- *
- * Revision 1.6 1999/07/27 08:04:05 cgoos
- * Added checksumming variables to SK_AC.
- *
- * Revision 1.5 1999/03/29 12:33:26 cgoos
- * Rreversed to fine lock granularity.
- *
- * Revision 1.4 1999/03/15 12:14:02 cgoos
- * Added DriverLock to SK_AC.
- * Removed other locks.
- *
- * Revision 1.3 1999/03/01 08:52:27 cgoos
- * Changed pAC->PciDev declaration.
- *
- * Revision 1.2 1999/02/18 10:57:14 cgoos
- * Removed SkDrvTimeStamp prototype.
- * Fixed SkGeOsGetTime prototype.
- *
- * Revision 1.1 1999/02/16 07:41:01 cgoos
- * First version.
- *
- *
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This is the second include file of the driver, which includes all other
- * neccessary files and defines all structures and constants used by the
- * driver and the common modules.
- *
- * Include File Hierarchy:
- *
- * see skge.c
- *
- ******************************************************************************/
-
-#ifndef __INC_SKDRV2ND_H
-#define __INC_SKDRV2ND_H
-
-#include "h/skqueue.h"
-#include "h/skgehwt.h"
-#include "h/sktimer.h"
-#include "h/ski2c.h"
-#include "h/skgepnmi.h"
-#include "h/skvpd.h"
-#include "h/skgehw.h"
-#include "h/skgeinit.h"
-#include "h/skaddr.h"
-#include "h/skgesirq.h"
-#include "h/skcsum.h"
-#include "h/skrlmt.h"
-#include "h/skgedrv.h"
-
-#define SK_PCI_ISCOMPLIANT(result, pdev) { \
- result = SK_FALSE; /* default */ \
- /* 3Com (0x10b7) */ \
- if (pdev->vendor == 0x10b7) { \
- /* Gigabit Ethernet Adapter (0x1700) */ \
- if ((pdev->device == 0x1700)) { \
- result = SK_TRUE; \
- } \
- /* SysKonnect (0x1148) */ \
- } else if (pdev->vendor == 0x1148) { \
- /* SK-98xx Gigabit Ethernet Server Adapter (0x4300) */ \
- /* SK-98xx V2 Gigabit Ethernet Adapter (0x4320) */ \
- if ((pdev->device == 0x4300) || \
- (pdev->device == 0x4320)) { \
- result = SK_TRUE; \
- } \
- /* D-Link (0x1186) */ \
- } else if (pdev->vendor == 0x1186) { \
- /* Gigabit Ethernet Adapter (0x4c00) */ \
- if ((pdev->device == 0x4c00)) { \
- result = SK_TRUE; \
- } \
- /* CNet (0x1371) */ \
- } else if (pdev->vendor == 0x1371) { \
- /* GigaCard Network Adapter (0x434e) */ \
- if ((pdev->device == 0x434e)) { \
- result = SK_TRUE; \
- } \
- /* Linksys (0x1737) */ \
- } else if (pdev->vendor == 0x1737) { \
- /* Gigabit Network Adapter (0x1032) */ \
- /* Gigabit Network Adapter (0x1064) */ \
- if ((pdev->device == 0x1032) || \
- (pdev->device == 0x1064)) { \
- result = SK_TRUE; \
- } \
- } else { \
- result = SK_FALSE; \
- } \
-}
-
-
-extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
-extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
-extern SK_U64 SkOsGetTime(SK_AC*);
-extern int SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
-extern int SkPciReadCfgWord(SK_AC*, int, SK_U16*);
-extern int SkPciReadCfgByte(SK_AC*, int, SK_U8*);
-extern int SkPciWriteCfgDWord(SK_AC*, int, SK_U32);
-extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16);
-extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8);
-extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
-
-struct s_DrvRlmtMbuf {
- SK_MBUF *pNext; /* Pointer to next RLMT Mbuf. */
- SK_U8 *pData; /* Data buffer (virtually contig.). */
- unsigned Size; /* Data buffer size. */
- unsigned Length; /* Length of packet (<= Size). */
- SK_U32 PortIdx; /* Receiving/transmitting port. */
-#ifdef SK_RLMT_MBUF_PRIVATE
- SK_RLMT_MBUF Rlmt; /* Private part for RLMT. */
-#endif /* SK_RLMT_MBUF_PRIVATE */
- struct sk_buff *pOs; /* Pointer to message block */
-};
-
-
-/*
- * ioctl definitions
- */
-#define SK_IOCTL_BASE (SIOCDEVPRIVATE)
-#define SK_IOCTL_GETMIB (SK_IOCTL_BASE + 0)
-#define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1)
-#define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2)
-
-typedef struct s_IOCTL SK_GE_IOCTL;
-
-struct s_IOCTL {
- char* pData;
- unsigned int Len;
-};
-
-
-/*
- * define sizes of descriptor rings in bytes
- */
-
-#if 0
-#define TX_RING_SIZE (8*1024)
-#define RX_RING_SIZE (24*1024)
-#else
-#define TX_RING_SIZE (10 * 40)
-#define RX_RING_SIZE (10 * 40)
-#endif
-
-/*
- * Buffer size for ethernet packets
- */
-#define ETH_BUF_SIZE 1540
-#define ETH_MAX_MTU 1514
-#define ETH_MIN_MTU 60
-#define ETH_MULTICAST_BIT 0x01
-#define SK_JUMBO_MTU 9000
-
-/*
- * transmit priority selects the queue: LOW=asynchron, HIGH=synchron
- */
-#define TX_PRIO_LOW 0
-#define TX_PRIO_HIGH 1
-
-/*
- * alignment of rx/tx descriptors
- */
-#define DESCR_ALIGN 8
-
-/*
- * definitions for pnmi. TODO
- */
-#define SK_DRIVER_RESET(pAC, IoC) 0
-#define SK_DRIVER_SENDEVENT(pAC, IoC) 0
-#define SK_DRIVER_SELFTEST(pAC, IoC) 0
-/* For get mtu you must add an own function */
-#define SK_DRIVER_GET_MTU(pAc,IoC,i) 0
-#define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0
-#define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v) 0
-
-
-/* TX and RX descriptors *****************************************************/
-
-typedef struct s_RxD RXD; /* the receive descriptor */
-
-struct s_RxD {
- volatile SK_U32 RBControl; /* Receive Buffer Control */
- SK_U32 VNextRxd; /* Next receive descriptor,low dword */
- SK_U32 VDataLow; /* Receive buffer Addr, low dword */
- SK_U32 VDataHigh; /* Receive buffer Addr, high dword */
- SK_U32 FrameStat; /* Receive Frame Status word */
- SK_U32 TimeStamp; /* Time stamp from XMAC */
- SK_U32 TcpSums; /* TCP Sum 2 / TCP Sum 1 */
- SK_U32 TcpSumStarts; /* TCP Sum Start 2 / TCP Sum Start 1 */
- RXD *pNextRxd; /* Pointer to next Rxd */
- struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
-};
-
-typedef struct s_TxD TXD; /* the transmit descriptor */
-
-struct s_TxD {
- volatile SK_U32 TBControl; /* Transmit Buffer Control */
- SK_U32 VNextTxd; /* Next transmit descriptor,low dword */
- SK_U32 VDataLow; /* Transmit Buffer Addr, low dword */
- SK_U32 VDataHigh; /* Transmit Buffer Addr, high dword */
- SK_U32 FrameStat; /* Transmit Frame Status Word */
- SK_U32 TcpSumOfs; /* Reserved / TCP Sum Offset */
- SK_U16 TcpSumSt; /* TCP Sum Start */
- SK_U16 TcpSumWr; /* TCP Sum Write */
- SK_U32 TcpReserved; /* not used */
- TXD *pNextTxd; /* Pointer to next Txd */
- struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
-};
-
-
-/* definition of flags in descriptor control field */
-#define RX_CTRL_OWN_BMU UINT32_C(0x80000000)
-#define RX_CTRL_STF UINT32_C(0x40000000)
-#define RX_CTRL_EOF UINT32_C(0x20000000)
-#define RX_CTRL_EOB_IRQ UINT32_C(0x10000000)
-#define RX_CTRL_EOF_IRQ UINT32_C(0x08000000)
-#define RX_CTRL_DEV_NULL UINT32_C(0x04000000)
-#define RX_CTRL_STAT_VALID UINT32_C(0x02000000)
-#define RX_CTRL_TIME_VALID UINT32_C(0x01000000)
-#define RX_CTRL_CHECK_DEFAULT UINT32_C(0x00550000)
-#define RX_CTRL_CHECK_CSUM UINT32_C(0x00560000)
-#define RX_CTRL_LEN_MASK UINT32_C(0x0000FFFF)
-
-#define TX_CTRL_OWN_BMU UINT32_C(0x80000000)
-#define TX_CTRL_STF UINT32_C(0x40000000)
-#define TX_CTRL_EOF UINT32_C(0x20000000)
-#define TX_CTRL_EOB_IRQ UINT32_C(0x10000000)
-#define TX_CTRL_EOF_IRQ UINT32_C(0x08000000)
-#define TX_CTRL_ST_FWD UINT32_C(0x04000000)
-#define TX_CTRL_DISAB_CRC UINT32_C(0x02000000)
-#define TX_CTRL_SOFTWARE UINT32_C(0x01000000)
-#define TX_CTRL_CHECK_DEFAULT UINT32_C(0x00550000)
-#define TX_CTRL_CHECK_CSUM UINT32_C(0x00560000)
-#define TX_CTRL_LEN_MASK UINT32_C(0x0000FFFF)
-
-
-/* The offsets of registers in the TX and RX queue control io area ***********/
-
-#define RX_Q_BUF_CTRL_CNT 0x00
-#define RX_Q_NEXT_DESCR_LOW 0x04
-#define RX_Q_BUF_ADDR_LOW 0x08
-#define RX_Q_BUF_ADDR_HIGH 0x0c
-#define RX_Q_FRAME_STAT 0x10
-#define RX_Q_TIME_STAMP 0x14
-#define RX_Q_CSUM_1_2 0x18
-#define RX_Q_CSUM_START_1_2 0x1c
-#define RX_Q_CUR_DESCR_LOW 0x20
-#define RX_Q_DESCR_HIGH 0x24
-#define RX_Q_CUR_ADDR_LOW 0x28
-#define RX_Q_CUR_ADDR_HIGH 0x2c
-#define RX_Q_CUR_BYTE_CNT 0x30
-#define RX_Q_CTRL 0x34
-#define RX_Q_FLAG 0x38
-#define RX_Q_TEST1 0x3c
-#define RX_Q_TEST2 0x40
-#define RX_Q_TEST3 0x44
-
-#define TX_Q_BUF_CTRL_CNT 0x00
-#define TX_Q_NEXT_DESCR_LOW 0x04
-#define TX_Q_BUF_ADDR_LOW 0x08
-#define TX_Q_BUF_ADDR_HIGH 0x0c
-#define TX_Q_FRAME_STAT 0x10
-#define TX_Q_CSUM_START 0x14
-#define TX_Q_CSUM_START_POS 0x18
-#define TX_Q_RESERVED 0x1c
-#define TX_Q_CUR_DESCR_LOW 0x20
-#define TX_Q_DESCR_HIGH 0x24
-#define TX_Q_CUR_ADDR_LOW 0x28
-#define TX_Q_CUR_ADDR_HIGH 0x2c
-#define TX_Q_CUR_BYTE_CNT 0x30
-#define TX_Q_CTRL 0x34
-#define TX_Q_FLAG 0x38
-#define TX_Q_TEST1 0x3c
-#define TX_Q_TEST2 0x40
-#define TX_Q_TEST3 0x44
-
-/* definition of flags in the queue control field */
-#define RX_Q_CTRL_POLL_ON 0x00000080
-#define RX_Q_CTRL_POLL_OFF 0x00000040
-#define RX_Q_CTRL_STOP 0x00000020
-#define RX_Q_CTRL_START 0x00000010
-#define RX_Q_CTRL_CLR_I_PAR 0x00000008
-#define RX_Q_CTRL_CLR_I_EOB 0x00000004
-#define RX_Q_CTRL_CLR_I_EOF 0x00000002
-#define RX_Q_CTRL_CLR_I_ERR 0x00000001
-
-#define TX_Q_CTRL_POLL_ON 0x00000080
-#define TX_Q_CTRL_POLL_OFF 0x00000040
-#define TX_Q_CTRL_STOP 0x00000020
-#define TX_Q_CTRL_START 0x00000010
-#define TX_Q_CTRL_CLR_I_EOB 0x00000004
-#define TX_Q_CTRL_CLR_I_EOF 0x00000002
-#define TX_Q_CTRL_CLR_I_ERR 0x00000001
-
-
-/* Interrupt bits in the interrupts source register **************************/
-#define IRQ_HW_ERROR 0x80000000
-#define IRQ_RESERVED 0x40000000
-#define IRQ_PKT_TOUT_RX1 0x20000000
-#define IRQ_PKT_TOUT_RX2 0x10000000
-#define IRQ_PKT_TOUT_TX1 0x08000000
-#define IRQ_PKT_TOUT_TX2 0x04000000
-#define IRQ_I2C_READY 0x02000000
-#define IRQ_SW 0x01000000
-#define IRQ_EXTERNAL_REG 0x00800000
-#define IRQ_TIMER 0x00400000
-#define IRQ_MAC1 0x00200000
-#define IRQ_LINK_SYNC_C_M1 0x00100000
-#define IRQ_MAC2 0x00080000
-#define IRQ_LINK_SYNC_C_M2 0x00040000
-#define IRQ_EOB_RX1 0x00020000
-#define IRQ_EOF_RX1 0x00010000
-#define IRQ_CHK_RX1 0x00008000
-#define IRQ_EOB_RX2 0x00004000
-#define IRQ_EOF_RX2 0x00002000
-#define IRQ_CHK_RX2 0x00001000
-#define IRQ_EOB_SY_TX1 0x00000800
-#define IRQ_EOF_SY_TX1 0x00000400
-#define IRQ_CHK_SY_TX1 0x00000200
-#define IRQ_EOB_AS_TX1 0x00000100
-#define IRQ_EOF_AS_TX1 0x00000080
-#define IRQ_CHK_AS_TX1 0x00000040
-#define IRQ_EOB_SY_TX2 0x00000020
-#define IRQ_EOF_SY_TX2 0x00000010
-#define IRQ_CHK_SY_TX2 0x00000008
-#define IRQ_EOB_AS_TX2 0x00000004
-#define IRQ_EOF_AS_TX2 0x00000002
-#define IRQ_CHK_AS_TX2 0x00000001
-
-#define DRIVER_IRQS (IRQ_SW | IRQ_EOF_RX1 | IRQ_EOF_RX2 | \
- IRQ_EOF_SY_TX1 | IRQ_EOF_AS_TX1 | \
- IRQ_EOF_SY_TX2 | IRQ_EOF_AS_TX2)
-
-#define SPECIAL_IRQS (IRQ_HW_ERROR | IRQ_PKT_TOUT_RX1 | IRQ_PKT_TOUT_RX2 | \
- IRQ_PKT_TOUT_TX1 | IRQ_PKT_TOUT_TX2 | \
- IRQ_I2C_READY | IRQ_EXTERNAL_REG | IRQ_TIMER | \
- IRQ_MAC1 | IRQ_LINK_SYNC_C_M1 | \
- IRQ_MAC2 | IRQ_LINK_SYNC_C_M2 | \
- IRQ_CHK_RX1 | IRQ_CHK_RX2 | \
- IRQ_CHK_SY_TX1 | IRQ_CHK_AS_TX1 | \
- IRQ_CHK_SY_TX2 | IRQ_CHK_AS_TX2)
-
-#define IRQ_MASK (IRQ_SW | IRQ_EOB_RX1 | IRQ_EOF_RX1 | \
- IRQ_EOB_RX2 | IRQ_EOF_RX2 | \
- IRQ_EOB_SY_TX1 | IRQ_EOF_SY_TX1 | \
- IRQ_EOB_AS_TX1 | IRQ_EOF_AS_TX1 | \
- IRQ_EOB_SY_TX2 | IRQ_EOF_SY_TX2 | \
- IRQ_EOB_AS_TX2 | IRQ_EOF_AS_TX2 | \
- IRQ_HW_ERROR | IRQ_PKT_TOUT_RX1 | IRQ_PKT_TOUT_RX2 | \
- IRQ_PKT_TOUT_TX1 | IRQ_PKT_TOUT_TX2 | \
- IRQ_I2C_READY | IRQ_EXTERNAL_REG | IRQ_TIMER | \
- IRQ_MAC1 | \
- IRQ_MAC2 | \
- IRQ_CHK_RX1 | IRQ_CHK_RX2 | \
- IRQ_CHK_SY_TX1 | IRQ_CHK_AS_TX1 | \
- IRQ_CHK_SY_TX2 | IRQ_CHK_AS_TX2)
-
-#define IRQ_HWE_MASK 0x00000FFF /* enable all HW irqs */
-
-typedef struct s_DevNet DEV_NET;
-
-struct s_DevNet {
- int PortNr;
- int NetNr;
- int Mtu;
- int Up;
- SK_AC *pAC;
-};
-
-typedef struct s_TxPort TX_PORT;
-
-struct s_TxPort {
- /* the transmit descriptor rings */
- caddr_t pTxDescrRing; /* descriptor area memory */
- SK_U64 VTxDescrRing; /* descr. area bus virt. addr. */
- TXD *pTxdRingHead; /* Head of Tx rings */
- TXD *pTxdRingTail; /* Tail of Tx rings */
- TXD *pTxdRingPrev; /* descriptor sent previously */
- int TxdRingFree; /* # of free entrys */
-#if 0
- spinlock_t TxDesRingLock; /* serialize descriptor accesses */
-#endif
- caddr_t HwAddr; /* bmu registers address */
- int PortIndex; /* index number of port (0 or 1) */
-};
-
-typedef struct s_RxPort RX_PORT;
-
-struct s_RxPort {
- /* the receive descriptor rings */
- caddr_t pRxDescrRing; /* descriptor area memory */
- SK_U64 VRxDescrRing; /* descr. area bus virt. addr. */
- RXD *pRxdRingHead; /* Head of Rx rings */
- RXD *pRxdRingTail; /* Tail of Rx rings */
- RXD *pRxdRingPrev; /* descriptor given to BMU previously */
- int RxdRingFree; /* # of free entrys */
-#if 0
- spinlock_t RxDesRingLock; /* serialize descriptor accesses */
-#endif
- int RxFillLimit; /* limit for buffers in ring */
- caddr_t HwAddr; /* bmu registers address */
- int PortIndex; /* index number of port (0 or 1) */
-};
-
-typedef struct s_PerStrm PER_STRM;
-
-#define SK_ALLOC_IRQ 0x00000001
-
-/****************************************************************************
- * Per board structure / Adapter Context structure:
- * Allocated within attach(9e) and freed within detach(9e).
- * Contains all 'per device' necessary handles, flags, locks etc.:
- */
-struct s_AC {
- SK_GEINIT GIni; /* GE init struct */
- SK_PNMI Pnmi; /* PNMI data struct */
- SK_VPD vpd; /* vpd data struct */
- SK_QUEUE Event; /* Event queue */
- SK_HWT Hwt; /* Hardware Timer control struct */
- SK_TIMCTRL Tim; /* Software Timer control struct */
- SK_I2C I2c; /* I2C relevant data structure */
- SK_ADDR Addr; /* for Address module */
- SK_CSUM Csum; /* for checksum module */
- SK_RLMT Rlmt; /* for rlmt module */
-#if 0
- spinlock_t SlowPathLock; /* Normal IRQ lock */
-#endif
- SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */
- int RlmtMode; /* link check mode to set */
- int RlmtNets; /* Number of nets */
-
- SK_IOC IoBase; /* register set of adapter */
- int BoardLevel; /* level of active hw init (0-2) */
- char DeviceStr[80]; /* adapter string from vpd */
- SK_U32 AllocFlag; /* flag allocation of resources */
-#if 0
- struct pci_dev *PciDev; /* for access to pci config space */
- SK_U32 PciDevId; /* pci device id */
-#else
- int PciDev;
-#endif
- struct SK_NET_DEVICE *dev[2]; /* pointer to device struct */
- char Name[30]; /* driver name */
- struct SK_NET_DEVICE *Next; /* link all devices (for clearing) */
- int RxBufSize; /* length of receive buffers */
-#if 0
- struct net_device_stats stats; /* linux 'netstat -i' statistics */
-#endif
- int Index; /* internal board index number */
-
- /* adapter RAM sizes for queues of active port */
- int RxQueueSize; /* memory used for receive queue */
- int TxSQueueSize; /* memory used for sync. tx queue */
- int TxAQueueSize; /* memory used for async. tx queue */
-
- int PromiscCount; /* promiscuous mode counter */
- int AllMultiCount; /* allmulticast mode counter */
- int MulticCount; /* number of different MC */
- /* addresses for this board */
- /* (may be more than HW can)*/
-
- int HWRevision; /* Hardware revision */
- int ActivePort; /* the active XMAC port */
- int MaxPorts; /* number of activated ports */
- int TxDescrPerRing; /* # of descriptors per tx ring */
- int RxDescrPerRing; /* # of descriptors per rx ring */
-
- caddr_t pDescrMem; /* Pointer to the descriptor area */
- dma_addr_t pDescrMemDMA; /* PCI DMA address of area */
-
- /* the port structures with descriptor rings */
- TX_PORT TxPort[SK_MAX_MACS][2];
- RX_PORT RxPort[SK_MAX_MACS];
-
- unsigned int CsOfs1; /* for checksum calculation */
- unsigned int CsOfs2; /* for checksum calculation */
- SK_U32 CsOfs; /* for checksum calculation */
-
- SK_BOOL CheckQueue; /* check event queue soon */
-
- /* Only for tests */
- int PortUp;
- int PortDown;
-
-};
-
-#endif /* __INC_SKDRV2ND_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skerror.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.5 $
- * Date: $Date: 2002/04/25 11:05:10 $
- * Purpose: SK specific Error log support
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- * $Log: skerror.h,v $
- * Revision 1.5 2002/04/25 11:05:10 rschmidt
- * Editorial changes
- *
- * Revision 1.4 1999/11/22 13:51:59 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.3 1999/09/14 14:04:42 rwahl
- * Added error base SK_ERRBASE_PECP.
- * Changed error base for driver.
- *
- * Revision 1.2 1998/08/11 11:15:41 gklug
- * chg: comments
- *
- * Revision 1.1 1998/08/11 11:09:38 gklug
- * add: error bases
- * add: error Classes
- * first version
- *
- *
- *
- ******************************************************************************/
-
-#ifndef _INC_SKERROR_H_
-#define _INC_SKERROR_H_
-
-/*
- * Define Error Classes
- */
-#define SK_ERRCL_OTHER (0) /* Other error */
-#define SK_ERRCL_CONFIG (1L<<0) /* Configuration error */
-#define SK_ERRCL_INIT (1L<<1) /* Initialization error */
-#define SK_ERRCL_NORES (1L<<2) /* Out of Resources error */
-#define SK_ERRCL_SW (1L<<3) /* Internal Software error */
-#define SK_ERRCL_HW (1L<<4) /* Hardware Failure */
-#define SK_ERRCL_COMM (1L<<5) /* Communication error */
-
-
-/*
- * Define Error Code Bases
- */
-#define SK_ERRBASE_RLMT 100 /* Base Error number for RLMT */
-#define SK_ERRBASE_HWINIT 200 /* Base Error number for HWInit */
-#define SK_ERRBASE_VPD 300 /* Base Error number for VPD */
-#define SK_ERRBASE_PNMI 400 /* Base Error number for PNMI */
-#define SK_ERRBASE_CSUM 500 /* Base Error number for Checksum */
-#define SK_ERRBASE_SIRQ 600 /* Base Error number for Special IRQ */
-#define SK_ERRBASE_I2C 700 /* Base Error number for I2C module */
-#define SK_ERRBASE_QUEUE 800 /* Base Error number for Scheduler */
-#define SK_ERRBASE_ADDR 900 /* Base Error number for Address module */
-#define SK_ERRBASE_PECP 1000 /* Base Error number for PECP */
-#define SK_ERRBASE_DRV 1100 /* Base Error number for Driver */
-
-#endif /* _INC_SKERROR_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgedrv.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.6 $
- * Date: $Date: 2002/07/15 15:38:01 $
- * Purpose: Interface with the driver
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgedrv.h,v $
- * Revision 1.6 2002/07/15 15:38:01 rschmidt
- * Power Management support
- * Editorial changes
- *
- * Revision 1.5 2002/04/25 11:05:47 rschmidt
- * Editorial changes
- *
- * Revision 1.4 1999/11/22 13:52:46 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.3 1998/12/01 13:31:39 cgoos
- * SWITCH INTERN Event added.
- *
- * Revision 1.2 1998/11/25 08:28:38 gklug
- * rmv: PORT SWITCH Event
- *
- * Revision 1.1 1998/09/29 06:14:07 gklug
- * add: driver events (initial version)
- *
- *
- ******************************************************************************/
-
-#ifndef __INC_SKGEDRV_H_
-#define __INC_SKGEDRV_H_
-
-/* defines ********************************************************************/
-
-/*
- * Define the driver events.
- * Usually the events are defined by the destination module.
- * In case of the driver we put the definition of the events here.
- */
-#define SK_DRV_PORT_RESET 1 /* The port needs to be reset */
-#define SK_DRV_NET_UP 2 /* The net is operational */
-#define SK_DRV_NET_DOWN 3 /* The net is down */
-#define SK_DRV_SWITCH_SOFT 4 /* Ports switch with both links connected */
-#define SK_DRV_SWITCH_HARD 5 /* Port switch due to link failure */
-#define SK_DRV_RLMT_SEND 6 /* Send a RLMT packet */
-#define SK_DRV_ADAP_FAIL 7 /* The whole adapter fails */
-#define SK_DRV_PORT_FAIL 8 /* One port fails */
-#define SK_DRV_SWITCH_INTERN 9 /* Port switch by the driver itself */
-#define SK_DRV_POWER_DOWN 10 /* Power down mode */
-
-#endif /* __INC_SKGEDRV_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgehw.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.49 $
- * Date: $Date: 2003/01/28 09:43:49 $
- * Purpose: Defines and Macros for the Gigabit Ethernet Adapter Product Family
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- * $Log: skgehw.h,v $
- * Revision 1.49 2003/01/28 09:43:49 rschmidt
- * Added defines for PCI-Spec. 2.3 IRQ
- * Added defines for CLK_RUN (YUKON-Lite)
- * Editorial changes
- *
- * Revision 1.48 2002/12/05 10:25:11 rschmidt
- * Added defines for Half Duplex Burst Mode On/Off
- * Added defines for Rx GMAC FIFO Flush feature
- * Editorial changes
- *
- * Revision 1.47 2002/11/12 17:01:31 rschmidt
- * Added defines for WOL_CTL_DEFAULT
- * Editorial changes
- *
- * Revision 1.46 2002/10/14 14:47:57 rschmidt
- * Corrected bit mask for HW self test results
- * Added defines for WOL Registers
- * Editorial changes
- *
- * Revision 1.45 2002/10/11 09:25:22 mkarl
- * Added bit mask for HW self test results.
- *
- * Revision 1.44 2002/08/16 14:44:36 rschmidt
- * Added define GPC_HWCFG_GMII_FIB for YUKON Fiber
- *
- * Revision 1.43 2002/08/12 13:31:50 rschmidt
- * Corrected macros for GMAC Address Registers: GM_INADDR(),
- * GM_OUTADDR(), GM_INHASH, GM_OUTHASH.
- * Editorial changes
- *
- * Revision 1.42 2002/08/08 15:37:56 rschmidt
- * Added defines for Power Management Capabilities
- * Editorial changes
- *
- * Revision 1.41 2002/07/23 16:02:25 rschmidt
- * Added macro WOL_REG() to access WOL reg. (HW-Bug in YUKON 1st rev.)
- *
- * Revision 1.40 2002/07/15 15:41:37 rschmidt
- * Added new defines for Power Management Cap. & Control
- * Editorial changes
- *
- * Revision 1.39 2002/06/10 09:37:07 rschmidt
- * Added macros for the ADDR-Modul
- *
- * Revision 1.38 2002/06/05 08:15:19 rschmidt
- * Added defines for WOL Registers
- * Editorial changes
- *
- * Revision 1.37 2002/04/25 11:39:23 rschmidt
- * Added new defines for PCI Our Register 1
- * Added new registers and defines for YUKON (Rx FIFO, Tx FIFO,
- * Time Stamp Timer, GMAC Control, GPHY Control,Link Control,
- * GMAC IRQ Source and Mask, Wake-up Frame Pattern Match);
- * Added new defines for Control/Status (VAUX available)
- * Added Chip ID for YUKON
- * Added define for descriptors with UDP ext. for YUKON
- * Added macros to access the GMAC
- * Added new Phy Type for Marvell 88E1011S (GPHY)
- * Editorial changes
- *
- * Revision 1.36 2000/11/09 12:32:49 rassmann
- * Renamed variables.
- *
- * Revision 1.35 2000/05/19 10:17:13 cgoos
- * Added inactivity check in PHY_READ (in DEBUG mode only).
- *
- * Revision 1.34 1999/11/22 13:53:40 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.33 1999/08/27 11:17:10 malthoff
- * It's more savely to put brackets around macro parameters.
- * Brackets added for PHY_READ and PHY_WRITE.
- *
- * Revision 1.32 1999/05/19 07:31:01 cgoos
- * Changes for 1000Base-T.
- * Added HWAC_LINK_LED macro.
- *
- * Revision 1.31 1999/03/12 13:27:40 malthoff
- * Remove __STDC__.
- *
- * Revision 1.30 1999/02/09 09:28:20 malthoff
- * Add PCI_ERRBITS.
- *
- * Revision 1.29 1999/01/26 08:55:48 malthoff
- * Bugfix: The 16 bit field relations inside the descriptor are
- * endianess dependend if the descriptor reversal feature
- * (PCI_REV_DESC bit in PCI_OUR_REG_2) is enabled.
- * Drivers which use this feature has to set the define
- * SK_USE_REV_DESC.
- *
- * Revision 1.28 1998/12/10 11:10:22 malthoff
- * bug fix: IS_IRQ_STAT and IS_IRQ_MST_ERR has been twisted.
- *
- * Revision 1.27 1998/11/13 14:19:21 malthoff
- * Bug Fix: The bit definition of B3_PA_CTRL has completely
- * changed from HW Spec v1.3 to v1.5.
- *
- * Revision 1.26 1998/11/04 08:31:48 cgoos
- * Fixed byte ordering in XM_OUTADDR/XM_OUTHASH macros.
- *
- * Revision 1.25 1998/11/04 07:16:25 cgoos
- * Changed byte ordering in XM_INADDR/XM_INHASH again.
- *
- * Revision 1.24 1998/11/02 11:08:43 malthoff
- * RxCtrl and TxCtrl must be volatile.
- *
- * Revision 1.23 1998/10/28 13:50:45 malthoff
- * Fix: Endian support missing in XM_IN/OUT-ADDR/HASH macros.
- *
- * Revision 1.22 1998/10/26 08:01:36 malthoff
- * RX_MFF_CTRL1 is split up into RX_MFF_CTRL1,
- * RX_MFF_STAT_TO, and RX_MFF_TIST_TO.
- * TX_MFF_CTRL1 is split up TX_MFF_CTRL1 and TX_MFF_WAF.
- *
- * Revision 1.21 1998/10/20 07:43:10 malthoff
- * Fix: XM_IN/OUT/ADDR/HASH macros:
- * The pointer must be casted.
- *
- * Revision 1.20 1998/10/19 15:53:59 malthoff
- * Remove ML proto definitions.
- *
- * Revision 1.19 1998/10/16 14:40:17 gklug
- * fix: typo B0_XM_IMSK regs
- *
- * Revision 1.18 1998/10/16 09:46:54 malthoff
- * Remove temp defines for ML diag prototype.
- * Fix register definition for B0_XM1_PHY_DATA, B0_XM1_PHY_DATA
- * B0_XM2_PHY_DATA, B0_XM2_PHY_ADDR, B0_XA1_CSR, B0_XS1_CSR,
- * B0_XS2_CSR, and B0_XA2_CSR.
- *
- * Revision 1.17 1998/10/14 06:03:14 cgoos
- * Changed shifted constant to ULONG.
- *
- * Revision 1.16 1998/10/09 07:05:41 malthoff
- * Rename ALL_PA_ENA_TO to PA_ENA_TO_ALL.
- *
- * Revision 1.15 1998/10/05 07:54:23 malthoff
- * Split up RB_CTRL and it's bit definition into
- * RB_CTRL, RB_TST1, and RB_TST2.
- * Rename RB_RX_HTPP to RB_RX_LTPP.
- * Add ALL_PA_ENA_TO. Modify F_WATER_MARK
- * according to HW Spec. v1.5.
- * Add MFF_TX_CTRL_DEF.
- *
- * Revision 1.14 1998/09/28 13:31:16 malthoff
- * bug fix: B2_MAC_3 is 0x110 not 0x114
- *
- * Revision 1.13 1998/09/24 14:42:56 malthoff
- * Split the RX_MFF_TST into RX_MFF_CTRL2,
- * RX_MFF_TST1, and RX_MFF_TST2.
- * Rename RX_MFF_CTRL to RX_MFF_CTRL1.
- * Add BMU bit CSR_SV_IDLE.
- * Add macros PHY_READ() and PHY_WRITE().
- * Rename macro SK_ADDR() to SK_HW_ADDR()
- * because of conflicts with the Address Module.
- *
- * Revision 1.12 1998/09/16 07:25:33 malthoff
- * Change the parameter order in the XM_INxx and XM_OUTxx macros,
- * to have the IoC as first parameter.
- *
- * Revision 1.11 1998/09/03 09:58:41 malthoff
- * Rework the XM_xxx macros. Use {} instead of () to
- * be compatible with SK_xxx macros which are defined
- * with {}.
- *
- * Revision 1.10 1998/09/02 11:16:39 malthoff
- * Temporary modify B2_I2C_SW to make tests with
- * the GE/ML prototype.
- *
- * Revision 1.9 1998/08/19 09:11:49 gklug
- * fix: struct are removed from c-source (see CCC)
- * add: typedefs for all structs
- *
- * Revision 1.8 1998/08/18 08:27:27 malthoff
- * Add some temporary workarounds to test GE
- * sources with the ML.
- *
- * Revision 1.7 1998/07/03 14:42:26 malthoff
- * bug fix: Correct macro XMA().
- * Add temporary workaround to access the PCI config space over I/O
- *
- * Revision 1.6 1998/06/23 11:30:36 malthoff
- * Remove ';' with ',' in macors.
- *
- * Revision 1.5 1998/06/22 14:20:57 malthoff
- * Add macro SK_ADDR(Base,Addr).
- *
- * Revision 1.4 1998/06/19 13:35:43 malthoff
- * change 'pGec' with 'pAC'
- *
- * Revision 1.3 1998/06/17 14:58:16 cvs
- * Lost keywords reinserted.
- *
- * Revision 1.1 1998/06/17 14:16:36 cvs
- * created
- *
- *
- ******************************************************************************/
-
-#ifndef __INC_SKGEHW_H
-#define __INC_SKGEHW_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/* defines ********************************************************************/
-
-#define BIT_31 (1UL << 31)
-#define BIT_30 (1L << 30)
-#define BIT_29 (1L << 29)
-#define BIT_28 (1L << 28)
-#define BIT_27 (1L << 27)
-#define BIT_26 (1L << 26)
-#define BIT_25 (1L << 25)
-#define BIT_24 (1L << 24)
-#define BIT_23 (1L << 23)
-#define BIT_22 (1L << 22)
-#define BIT_21 (1L << 21)
-#define BIT_20 (1L << 20)
-#define BIT_19 (1L << 19)
-#define BIT_18 (1L << 18)
-#define BIT_17 (1L << 17)
-#define BIT_16 (1L << 16)
-#define BIT_15 (1L << 15)
-#define BIT_14 (1L << 14)
-#define BIT_13 (1L << 13)
-#define BIT_12 (1L << 12)
-#define BIT_11 (1L << 11)
-#define BIT_10 (1L << 10)
-#define BIT_9 (1L << 9)
-#define BIT_8 (1L << 8)
-#define BIT_7 (1L << 7)
-#define BIT_6 (1L << 6)
-#define BIT_5 (1L << 5)
-#define BIT_4 (1L << 4)
-#define BIT_3 (1L << 3)
-#define BIT_2 (1L << 2)
-#define BIT_1 (1L << 1)
-#define BIT_0 1L
-
-#define BIT_15S (1U << 15)
-#define BIT_14S (1 << 14)
-#define BIT_13S (1 << 13)
-#define BIT_12S (1 << 12)
-#define BIT_11S (1 << 11)
-#define BIT_10S (1 << 10)
-#define BIT_9S (1 << 9)
-#define BIT_8S (1 << 8)
-#define BIT_7S (1 << 7)
-#define BIT_6S (1 << 6)
-#define BIT_5S (1 << 5)
-#define BIT_4S (1 << 4)
-#define BIT_3S (1 << 3)
-#define BIT_2S (1 << 2)
-#define BIT_1S (1 << 1)
-#define BIT_0S 1
-
-#define SHIFT31(x) ((x) << 31)
-#define SHIFT30(x) ((x) << 30)
-#define SHIFT29(x) ((x) << 29)
-#define SHIFT28(x) ((x) << 28)
-#define SHIFT27(x) ((x) << 27)
-#define SHIFT26(x) ((x) << 26)
-#define SHIFT25(x) ((x) << 25)
-#define SHIFT24(x) ((x) << 24)
-#define SHIFT23(x) ((x) << 23)
-#define SHIFT22(x) ((x) << 22)
-#define SHIFT21(x) ((x) << 21)
-#define SHIFT20(x) ((x) << 20)
-#define SHIFT19(x) ((x) << 19)
-#define SHIFT18(x) ((x) << 18)
-#define SHIFT17(x) ((x) << 17)
-#define SHIFT16(x) ((x) << 16)
-#define SHIFT15(x) ((x) << 15)
-#define SHIFT14(x) ((x) << 14)
-#define SHIFT13(x) ((x) << 13)
-#define SHIFT12(x) ((x) << 12)
-#define SHIFT11(x) ((x) << 11)
-#define SHIFT10(x) ((x) << 10)
-#define SHIFT9(x) ((x) << 9)
-#define SHIFT8(x) ((x) << 8)
-#define SHIFT7(x) ((x) << 7)
-#define SHIFT6(x) ((x) << 6)
-#define SHIFT5(x) ((x) << 5)
-#define SHIFT4(x) ((x) << 4)
-#define SHIFT3(x) ((x) << 3)
-#define SHIFT2(x) ((x) << 2)
-#define SHIFT1(x) ((x) << 1)
-#define SHIFT0(x) ((x) << 0)
-
-/*
- * Configuration Space header
- * Since this module is used for different OS', those may be
- * duplicate on some of them (e.g. Linux). But to keep the
- * common source, we have to live with this...
- */
-#define PCI_VENDOR_ID 0x00 /* 16 bit Vendor ID */
-#define PCI_DEVICE_ID 0x02 /* 16 bit Device ID */
-#define PCI_COMMAND 0x04 /* 16 bit Command */
-#define PCI_STATUS 0x06 /* 16 bit Status */
-#define PCI_REV_ID 0x08 /* 8 bit Revision ID */
-#if 0
-#define PCI_CLASS_CODE 0x09 /* 24 bit Class Code */
-#endif
-#define PCI_CACHE_LSZ 0x0c /* 8 bit Cache Line Size */
-#define PCI_LAT_TIM 0x0d /* 8 bit Latency Timer */
-#define PCI_HEADER_T 0x0e /* 8 bit Header Type */
-#define PCI_BIST 0x0f /* 8 bit Built-in selftest */
-#define PCI_BASE_1ST 0x10 /* 32 bit 1st Base address */
-#define PCI_BASE_2ND 0x14 /* 32 bit 2nd Base address */
- /* Byte 0x18..0x2b: reserved */
-#define PCI_SUB_VID 0x2c /* 16 bit Subsystem Vendor ID */
-#define PCI_SUB_ID 0x2e /* 16 bit Subsystem ID */
-#define PCI_BASE_ROM 0x30 /* 32 bit Expansion ROM Base Address */
-#define PCI_CAP_PTR 0x34 /* 8 bit Capabilities Ptr */
- /* Byte 35..3b: reserved */
-#define PCI_IRQ_LINE 0x3c /* 8 bit Interrupt Line */
-#define PCI_IRQ_PIN 0x3d /* 8 bit Interrupt Pin */
-#define PCI_MIN_GNT 0x3e /* 8 bit Min_Gnt */
-#define PCI_MAX_LAT 0x3f /* 8 bit Max_Lat */
- /* Device Dependent Region */
-#define PCI_OUR_REG_1 0x40 /* 32 bit Our Register 1 */
-#define PCI_OUR_REG_2 0x44 /* 32 bit Our Register 2 */
- /* Power Management Region */
-#define PCI_PM_CAP_ID 0x48 /* 8 bit Power Management Cap. ID */
-#define PCI_PM_NITEM 0x49 /* 8 bit Next Item Ptr */
-#define PCI_PM_CAP_REG 0x4a /* 16 bit Power Management Capabilities */
-#define PCI_PM_CTL_STS 0x4c /* 16 bit Power Manag. Control/Status */
- /* Byte 0x4e: reserved */
-#define PCI_PM_DAT_REG 0x4f /* 8 bit Power Manag. Data Register */
- /* VPD Region */
-#define PCI_VPD_CAP_ID 0x50 /* 8 bit VPD Cap. ID */
-#define PCI_VPD_NITEM 0x51 /* 8 bit Next Item Ptr */
-#define PCI_VPD_ADR_REG 0x52 /* 16 bit VPD Address Register */
-#define PCI_VPD_DAT_REG 0x54 /* 32 bit VPD Data Register */
- /* Byte 0x58..0xff: reserved */
-
-/*
- * I2C Address (PCI Config)
- *
- * Note: The temperature and voltage sensors are relocated on a different
- * I2C bus.
- */
-#define I2C_ADDR_VPD 0xA0 /* I2C address for the VPD EEPROM */
-
-/*
- * Define Bits and Values of the registers
- */
-/* PCI_COMMAND 16 bit Command */
- /* Bit 15..11: reserved */
-#define PCI_INT_DIS BIT_10S /* Interrupt INTx# disable (PCI 2.3) */
-#define PCI_FBTEN BIT_9S /* Fast Back-To-Back enable */
-#define PCI_SERREN BIT_8S /* SERR enable */
-#define PCI_ADSTEP BIT_7S /* Address Stepping */
-#define PCI_PERREN BIT_6S /* Parity Report Response enable */
-#define PCI_VGA_SNOOP BIT_5S /* VGA palette snoop */
-#define PCI_MWIEN BIT_4S /* Memory write an inv cycl ena */
-#define PCI_SCYCEN BIT_3S /* Special Cycle enable */
-#define PCI_BMEN BIT_2S /* Bus Master enable */
-#define PCI_MEMEN BIT_1S /* Memory Space Access enable */
-#define PCI_IOEN BIT_0S /* I/O Space Access enable */
-
-#define PCI_COMMAND_VAL (PCI_FBTEN | PCI_SERREN | PCI_PERREN | PCI_MWIEN |\
- PCI_BMEN | PCI_MEMEN | PCI_IOEN)
-
-/* PCI_STATUS 16 bit Status */
-#define PCI_PERR BIT_15S /* Parity Error */
-#define PCI_SERR BIT_14S /* Signaled SERR */
-#define PCI_RMABORT BIT_13S /* Received Master Abort */
-#define PCI_RTABORT BIT_12S /* Received Target Abort */
- /* Bit 11: reserved */
-#define PCI_DEVSEL (3<<9) /* Bit 10.. 9: DEVSEL Timing */
-#define PCI_DEV_FAST (0<<9) /* fast */
-#define PCI_DEV_MEDIUM (1<<9) /* medium */
-#define PCI_DEV_SLOW (2<<9) /* slow */
-#define PCI_DATAPERR BIT_8S /* DATA Parity error detected */
-#define PCI_FB2BCAP BIT_7S /* Fast Back-to-Back Capability */
-#define PCI_UDF BIT_6S /* User Defined Features */
-#define PCI_66MHZCAP BIT_5S /* 66 MHz PCI bus clock capable */
-#define PCI_NEWCAP BIT_4S /* New cap. list implemented */
-#define PCI_INT_STAT BIT_3S /* Interrupt INTx# Status (PCI 2.3) */
- /* Bit 2.. 0: reserved */
-
-#define PCI_ERRBITS (PCI_PERR | PCI_SERR | PCI_RMABORT | PCI_RTABORT |\
- PCI_DATAPERR)
-
-/* PCI_CLASS_CODE 24 bit Class Code */
-/* Byte 2: Base Class (02) */
-/* Byte 1: SubClass (00) */
-/* Byte 0: Programming Interface (00) */
-
-/* PCI_CACHE_LSZ 8 bit Cache Line Size */
-/* Possible values: 0,2,4,8,16,32,64,128 */
-
-/* PCI_HEADER_T 8 bit Header Type */
-#define PCI_HD_MF_DEV BIT_7S /* 0= single, 1= multi-func dev */
-#define PCI_HD_TYPE 0x7f /* Bit 6..0: Header Layout 0= normal */
-
-/* PCI_BIST 8 bit Built-in selftest */
-/* Built-in Self test not supported (optional) */
-
-/* PCI_BASE_1ST 32 bit 1st Base address */
-#define PCI_MEMSIZE 0x4000L /* use 16 kB Memory Base */
-#define PCI_MEMBASE_MSK 0xffffc000L /* Bit 31..14: Memory Base Address */
-#define PCI_MEMSIZE_MSK 0x00003ff0L /* Bit 13.. 4: Memory Size Req. */
-#define PCI_PREFEN BIT_3 /* Prefetchable */
-#define PCI_MEM_TYP (3L<<2) /* Bit 2.. 1: Memory Type */
-#define PCI_MEM32BIT (0L<<1) /* Base addr anywhere in 32 Bit range */
-#define PCI_MEM1M (1L<<1) /* Base addr below 1 MegaByte */
-#define PCI_MEM64BIT (2L<<1) /* Base addr anywhere in 64 Bit range */
-#define PCI_MEMSPACE BIT_0 /* Memory Space Indic. */
-
-/* PCI_BASE_2ND 32 bit 2nd Base address */
-#define PCI_IOBASE 0xffffff00L /* Bit 31.. 8: I/O Base address */
-#define PCI_IOSIZE 0x000000fcL /* Bit 7.. 2: I/O Size Requirements */
- /* Bit 1: reserved */
-#define PCI_IOSPACE BIT_0 /* I/O Space Indicator */
-
-/* PCI_BASE_ROM 32 bit Expansion ROM Base Address */
-#define PCI_ROMBASE 0xfffe0000L /* Bit 31..17: ROM BASE address (1st)*/
-#define PCI_ROMBASZ (0x1cL<<14) /* Bit 16..14: Treat as BASE or SIZE */
-#define PCI_ROMSIZE (0x38L<<11) /* Bit 13..11: ROM Size Requirements */
- /* Bit 10.. 1: reserved */
-#define PCI_ROMEN BIT_0 /* Address Decode enable */
-
-/* Device Dependent Region */
-/* PCI_OUR_REG_1 32 bit Our Register 1 */
- /* Bit 31..29: reserved */
-#define PCI_PHY_COMA BIT_28 /* Set PHY to Coma Mode */
-#define PCI_EN_CAL BIT_27 /* Enable PCI buffer strength calibr. */
-#define PCI_DIS_CAL BIT_26 /* Disable PCI buffer strength calibr. */
-#define PCI_VIO BIT_25 /* PCI I/O Voltage, 0 = 3.3V, 1 = 5V */
-#define PCI_DIS_BOOT BIT_24 /* Disable BOOT via ROM */
-#define PCI_EN_IO BIT_23 /* Mapping to I/O space */
-#define PCI_EN_FPROM BIT_22 /* Enable FLASH mapping to memory */
- /* 1 = Map Flash to memory */
- /* 0 = Disable addr. dec */
-#define PCI_PAGESIZE (3L<<20) /* Bit 21..20: FLASH Page Size */
-#define PCI_PAGE_16 (0L<<20) /* 16 k pages */
-#define PCI_PAGE_32K (1L<<20) /* 32 k pages */
-#define PCI_PAGE_64K (2L<<20) /* 64 k pages */
-#define PCI_PAGE_128K (3L<<20) /* 128 k pages */
- /* Bit 19: reserved */
-#define PCI_PAGEREG (7L<<16) /* Bit 18..16: Page Register */
-#define PCI_NOTAR BIT_15 /* No turnaround cycle */
-#define PCI_FORCE_BE BIT_14 /* Assert all BEs on MR */
-#define PCI_DIS_MRL BIT_13 /* Disable Mem Read Line */
-#define PCI_DIS_MRM BIT_12 /* Disable Mem Read Multiple */
-#define PCI_DIS_MWI BIT_11 /* Disable Mem Write & Invalidate */
-#define PCI_DISC_CLS BIT_10 /* Disc: cacheLsz bound */
-#define PCI_BURST_DIS BIT_9 /* Burst Disable */
-#define PCI_DIS_PCI_CLK BIT_8 /* Disable PCI clock driving */
-#define PCI_SKEW_DAS (0xfL<<4) /* Bit 7.. 4: Skew Ctrl, DAS Ext */
-#define PCI_SKEW_BASE 0xfL /* Bit 3.. 0: Skew Ctrl, Base */
-
-
-/* PCI_OUR_REG_2 32 bit Our Register 2 */
-#define PCI_VPD_WR_THR (0xffL<<24) /* Bit 31..24: VPD Write Threshold */
-#define PCI_DEV_SEL (0x7fL<<17) /* Bit 23..17: EEPROM Device Select */
-#define PCI_VPD_ROM_SZ (7L<<14) /* Bit 16..14: VPD ROM Size */
- /* Bit 13..12: reserved */
-#define PCI_PATCH_DIR (0xfL<<8) /* Bit 11.. 8: Ext Patches dir 3..0 */
-#define PCI_PATCH_DIR_3 BIT_11
-#define PCI_PATCH_DIR_2 BIT_10
-#define PCI_PATCH_DIR_1 BIT_9
-#define PCI_PATCH_DIR_0 BIT_8
-#define PCI_EXT_PATCHS (0xfL<<4) /* Bit 7.. 4: Extended Patches 3..0 */
-#define PCI_EXT_PATCH_3 BIT_7
-#define PCI_EXT_PATCH_2 BIT_6
-#define PCI_EXT_PATCH_1 BIT_5
-#define PCI_EXT_PATCH_0 BIT_4
-#define PCI_EN_DUMMY_RD BIT_3 /* Enable Dummy Read */
-#define PCI_REV_DESC BIT_2 /* Reverse Desc. Bytes */
- /* Bit 1: reserved */
-#define PCI_USEDATA64 BIT_0 /* Use 64Bit Data bus ext */
-
-
-/* Power Management Region */
-/* PCI_PM_CAP_REG 16 bit Power Management Capabilities */
-#define PCI_PME_SUP_MSK (0x1f<<11) /* Bit 15..11: PM Event Support Mask */
-#define PCI_PME_D3C_SUP BIT_15S /* PME from D3cold Support (if Vaux) */
-#define PCI_PME_D3H_SUP BIT_14S /* PME from D3hot Support */
-#define PCI_PME_D2_SUP BIT_13S /* PME from D2 Support */
-#define PCI_PME_D1_SUP BIT_12S /* PME from D1 Support */
-#define PCI_PME_D0_SUP BIT_11S /* PME from D0 Support */
-#define PCI_PM_D2_SUP BIT_10S /* D2 Support in 33 MHz mode */
-#define PCI_PM_D1_SUP BIT_9S /* D1 Support */
- /* Bit 8.. 6: reserved */
-#define PCI_PM_DSI BIT_5S /* Device Specific Initialization */
-#define PCI_PM_APS BIT_4S /* Auxialiary Power Source */
-#define PCI_PME_CLOCK BIT_3S /* PM Event Clock */
-#define PCI_PM_VER_MSK 7 /* Bit 2.. 0: PM PCI Spec. version */
-
-/* PCI_PM_CTL_STS 16 bit Power Management Control/Status */
-#define PCI_PME_STATUS BIT_15S /* PME Status (YUKON only) */
-#define PCI_PM_DAT_SCL (3<<13) /* Bit 14..13: Data Reg. scaling factor */
-#define PCI_PM_DAT_SEL (0xf<<9) /* Bit 12.. 9: PM data selector field */
-#define PCI_PME_EN BIT_8S /* Enable PME# generation (YUKON only) */
- /* Bit 7.. 2: reserved */
-#define PCI_PM_STATE_MSK 3 /* Bit 1.. 0: Power Management State */
-
-#define PCI_PM_STATE_D0 0 /* D0: Operational (default) */
-#define PCI_PM_STATE_D1 1 /* D1: (YUKON only) */
-#define PCI_PM_STATE_D2 2 /* D2: (YUKON only) */
-#define PCI_PM_STATE_D3 3 /* D3: HOT, Power Down and Reset */
-
-/* VPD Region */
-/* PCI_VPD_ADR_REG 16 bit VPD Address Register */
-#define PCI_VPD_FLAG BIT_15S /* starts VPD rd/wr cycle */
-#define PCI_VPD_ADR_MSK 0x7fffL /* Bit 14.. 0: VPD address mask */
-
-/* Control Register File (Address Map) */
-
-/*
- * Bank 0
- */
-#define B0_RAP 0x0000 /* 8 bit Register Address Port */
- /* 0x0001 - 0x0003: reserved */
-#define B0_CTST 0x0004 /* 16 bit Control/Status register */
-#define B0_LED 0x0006 /* 8 Bit LED register */
-#define B0_POWER_CTRL 0x0007 /* 8 Bit Power Control reg (YUKON only) */
-#define B0_ISRC 0x0008 /* 32 bit Interrupt Source Register */
-#define B0_IMSK 0x000c /* 32 bit Interrupt Mask Register */
-#define B0_HWE_ISRC 0x0010 /* 32 bit HW Error Interrupt Src Reg */
-#define B0_HWE_IMSK 0x0014 /* 32 bit HW Error Interrupt Mask Reg */
-#define B0_SP_ISRC 0x0018 /* 32 bit Special Interrupt Source Reg */
- /* 0x001c: reserved */
-
-/* B0 XMAC 1 registers (GENESIS only) */
-#define B0_XM1_IMSK 0x0020 /* 16 bit r/w XMAC 1 Interrupt Mask Register*/
- /* 0x0022 - 0x0027: reserved */
-#define B0_XM1_ISRC 0x0028 /* 16 bit ro XMAC 1 Interrupt Status Reg */
- /* 0x002a - 0x002f: reserved */
-#define B0_XM1_PHY_ADDR 0x0030 /* 16 bit r/w XMAC 1 PHY Address Register */
- /* 0x0032 - 0x0033: reserved */
-#define B0_XM1_PHY_DATA 0x0034 /* 16 bit r/w XMAC 1 PHY Data Register */
- /* 0x0036 - 0x003f: reserved */
-
-/* B0 XMAC 2 registers (GENESIS only) */
-#define B0_XM2_IMSK 0x0040 /* 16 bit r/w XMAC 2 Interrupt Mask Register*/
- /* 0x0042 - 0x0047: reserved */
-#define B0_XM2_ISRC 0x0048 /* 16 bit ro XMAC 2 Interrupt Status Reg */
- /* 0x004a - 0x004f: reserved */
-#define B0_XM2_PHY_ADDR 0x0050 /* 16 bit r/w XMAC 2 PHY Address Register */
- /* 0x0052 - 0x0053: reserved */
-#define B0_XM2_PHY_DATA 0x0054 /* 16 bit r/w XMAC 2 PHY Data Register */
- /* 0x0056 - 0x005f: reserved */
-
-/* BMU Control Status Registers */
-#define B0_R1_CSR 0x0060 /* 32 bit BMU Ctrl/Stat Rx Queue 1 */
-#define B0_R2_CSR 0x0064 /* 32 bit BMU Ctrl/Stat Rx Queue 2 */
-#define B0_XS1_CSR 0x0068 /* 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */
-#define B0_XA1_CSR 0x006c /* 32 bit BMU Ctrl/Stat Async Tx Queue 1*/
-#define B0_XS2_CSR 0x0070 /* 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
-#define B0_XA2_CSR 0x0074 /* 32 bit BMU Ctrl/Stat Async Tx Queue 2*/
- /* 0x0078 - 0x007f: reserved */
-
-/*
- * Bank 1
- * - completely empty (this is the RAP Block window)
- * Note: if RAP = 1 this page is reserved
- */
-
-/*
- * Bank 2
- */
-/* NA reg = 48 bit Network Address Register, 3x16 or 8x8 bit readable */
-#define B2_MAC_1 0x0100 /* NA reg MAC Address 1 */
- /* 0x0106 - 0x0107: reserved */
-#define B2_MAC_2 0x0108 /* NA reg MAC Address 2 */
- /* 0x010e - 0x010f: reserved */
-#define B2_MAC_3 0x0110 /* NA reg MAC Address 3 */
- /* 0x0116 - 0x0117: reserved */
-#define B2_CONN_TYP 0x0118 /* 8 bit Connector type */
-#define B2_PMD_TYP 0x0119 /* 8 bit PMD type */
-#define B2_MAC_CFG 0x011a /* 8 bit MAC Configuration / Chip Revision */
-#define B2_CHIP_ID 0x011b /* 8 bit Chip Identification Number */
- /* Eprom registers are currently of no use */
-#define B2_E_0 0x011c /* 8 bit EPROM Byte 0 (ext. SRAM size */
-#define B2_E_1 0x011d /* 8 bit EPROM Byte 1 (PHY type) */
-#define B2_E_2 0x011e /* 8 bit EPROM Byte 2 */
-#define B2_E_3 0x011f /* 8 bit EPROM Byte 3 */
-#define B2_FAR 0x0120 /* 32 bit Flash-Prom Addr Reg/Cnt */
-#define B2_FDP 0x0124 /* 8 bit Flash-Prom Data Port */
- /* 0x0125 - 0x0127: reserved */
-#define B2_LD_CRTL 0x0128 /* 8 bit EPROM loader control register */
-#define B2_LD_TEST 0x0129 /* 8 bit EPROM loader test register */
- /* 0x012a - 0x012f: reserved */
-#define B2_TI_INI 0x0130 /* 32 bit Timer Init Value */
-#define B2_TI_VAL 0x0134 /* 32 bit Timer Value */
-#define B2_TI_CRTL 0x0138 /* 8 bit Timer Control */
-#define B2_TI_TEST 0x0139 /* 8 Bit Timer Test */
- /* 0x013a - 0x013f: reserved */
-#define B2_IRQM_INI 0x0140 /* 32 bit IRQ Moderation Timer Init Reg.*/
-#define B2_IRQM_VAL 0x0144 /* 32 bit IRQ Moderation Timer Value */
-#define B2_IRQM_CTRL 0x0148 /* 8 bit IRQ Moderation Timer Control */
-#define B2_IRQM_TEST 0x0149 /* 8 bit IRQ Moderation Timer Test */
-#define B2_IRQM_MSK 0x014c /* 32 bit IRQ Moderation Mask */
-#define B2_IRQM_HWE_MSK 0x0150 /* 32 bit IRQ Moderation HW Error Mask */
- /* 0x0154 - 0x0157: reserved */
-#define B2_TST_CTRL1 0x0158 /* 8 bit Test Control Register 1 */
-#define B2_TST_CTRL2 0x0159 /* 8 bit Test Control Register 2 */
- /* 0x015a - 0x015b: reserved */
-#define B2_GP_IO 0x015c /* 32 bit General Purpose I/O Register */
-#define B2_I2C_CTRL 0x0160 /* 32 bit I2C HW Control Register */
-#define B2_I2C_DATA 0x0164 /* 32 bit I2C HW Data Register */
-#define B2_I2C_IRQ 0x0168 /* 32 bit I2C HW IRQ Register */
-#define B2_I2C_SW 0x016c /* 32 bit I2C SW Port Register */
-
-/* Blink Source Counter (GENESIS only) */
-#define B2_BSC_INI 0x0170 /* 32 bit Blink Source Counter Init Val */
-#define B2_BSC_VAL 0x0174 /* 32 bit Blink Source Counter Value */
-#define B2_BSC_CTRL 0x0178 /* 8 bit Blink Source Counter Control */
-#define B2_BSC_STAT 0x0179 /* 8 bit Blink Source Counter Status */
-#define B2_BSC_TST 0x017a /* 16 bit Blink Source Counter Test Reg */
- /* 0x017c - 0x017f: reserved */
-
-/*
- * Bank 3
- */
-/* RAM Random Registers */
-#define B3_RAM_ADDR 0x0180 /* 32 bit RAM Address, to read or write */
-#define B3_RAM_DATA_LO 0x0184 /* 32 bit RAM Data Word (low dWord) */
-#define B3_RAM_DATA_HI 0x0188 /* 32 bit RAM Data Word (high dWord) */
- /* 0x018c - 0x018f: reserved */
-
-/* RAM Interface Registers */
-/*
- * The HW-Spec. calls this registers Timeout Value 0..11. But this names are
- * not usable in SW. Please notice these are NOT real timeouts, these are
- * the number of qWords transferred continuously.
- */
-#define B3_RI_WTO_R1 0x0190 /* 8 bit WR Timeout Queue R1 (TO0) */
-#define B3_RI_WTO_XA1 0x0191 /* 8 bit WR Timeout Queue XA1 (TO1) */
-#define B3_RI_WTO_XS1 0x0192 /* 8 bit WR Timeout Queue XS1 (TO2) */
-#define B3_RI_RTO_R1 0x0193 /* 8 bit RD Timeout Queue R1 (TO3) */
-#define B3_RI_RTO_XA1 0x0194 /* 8 bit RD Timeout Queue XA1 (TO4) */
-#define B3_RI_RTO_XS1 0x0195 /* 8 bit RD Timeout Queue XS1 (TO5) */
-#define B3_RI_WTO_R2 0x0196 /* 8 bit WR Timeout Queue R2 (TO6) */
-#define B3_RI_WTO_XA2 0x0197 /* 8 bit WR Timeout Queue XA2 (TO7) */
-#define B3_RI_WTO_XS2 0x0198 /* 8 bit WR Timeout Queue XS2 (TO8) */
-#define B3_RI_RTO_R2 0x0199 /* 8 bit RD Timeout Queue R2 (TO9) */
-#define B3_RI_RTO_XA2 0x019a /* 8 bit RD Timeout Queue XA2 (TO10)*/
-#define B3_RI_RTO_XS2 0x019b /* 8 bit RD Timeout Queue XS2 (TO11)*/
-#define B3_RI_TO_VAL 0x019c /* 8 bit Current Timeout Count Val */
- /* 0x019d - 0x019f: reserved */
-#define B3_RI_CTRL 0x01a0 /* 16 bit RAM Interface Control Register */
-#define B3_RI_TEST 0x01a2 /* 8 bit RAM Interface Test Register */
- /* 0x01a3 - 0x01af: reserved */
-
-/* MAC Arbiter Registers (GENESIS only) */
-/* these are the no. of qWord transferred continuously and NOT real timeouts */
-#define B3_MA_TOINI_RX1 0x01b0 /* 8 bit Timeout Init Val Rx Path MAC 1 */
-#define B3_MA_TOINI_RX2 0x01b1 /* 8 bit Timeout Init Val Rx Path MAC 2 */
-#define B3_MA_TOINI_TX1 0x01b2 /* 8 bit Timeout Init Val Tx Path MAC 1 */
-#define B3_MA_TOINI_TX2 0x01b3 /* 8 bit Timeout Init Val Tx Path MAC 2 */
-#define B3_MA_TOVAL_RX1 0x01b4 /* 8 bit Timeout Value Rx Path MAC 1 */
-#define B3_MA_TOVAL_RX2 0x01b5 /* 8 bit Timeout Value Rx Path MAC 1 */
-#define B3_MA_TOVAL_TX1 0x01b6 /* 8 bit Timeout Value Tx Path MAC 2 */
-#define B3_MA_TOVAL_TX2 0x01b7 /* 8 bit Timeout Value Tx Path MAC 2 */
-#define B3_MA_TO_CTRL 0x01b8 /* 16 bit MAC Arbiter Timeout Ctrl Reg */
-#define B3_MA_TO_TEST 0x01ba /* 16 bit MAC Arbiter Timeout Test Reg */
- /* 0x01bc - 0x01bf: reserved */
-#define B3_MA_RCINI_RX1 0x01c0 /* 8 bit Recovery Init Val Rx Path MAC 1 */
-#define B3_MA_RCINI_RX2 0x01c1 /* 8 bit Recovery Init Val Rx Path MAC 2 */
-#define B3_MA_RCINI_TX1 0x01c2 /* 8 bit Recovery Init Val Tx Path MAC 1 */
-#define B3_MA_RCINI_TX2 0x01c3 /* 8 bit Recovery Init Val Tx Path MAC 2 */
-#define B3_MA_RCVAL_RX1 0x01c4 /* 8 bit Recovery Value Rx Path MAC 1 */
-#define B3_MA_RCVAL_RX2 0x01c5 /* 8 bit Recovery Value Rx Path MAC 1 */
-#define B3_MA_RCVAL_TX1 0x01c6 /* 8 bit Recovery Value Tx Path MAC 2 */
-#define B3_MA_RCVAL_TX2 0x01c7 /* 8 bit Recovery Value Tx Path MAC 2 */
-#define B3_MA_RC_CTRL 0x01c8 /* 16 bit MAC Arbiter Recovery Ctrl Reg */
-#define B3_MA_RC_TEST 0x01ca /* 16 bit MAC Arbiter Recovery Test Reg */
- /* 0x01cc - 0x01cf: reserved */
-
-/* Packet Arbiter Registers (GENESIS only) */
-/* these are real timeouts */
-#define B3_PA_TOINI_RX1 0x01d0 /* 16 bit Timeout Init Val Rx Path MAC 1 */
- /* 0x01d2 - 0x01d3: reserved */
-#define B3_PA_TOINI_RX2 0x01d4 /* 16 bit Timeout Init Val Rx Path MAC 2 */
- /* 0x01d6 - 0x01d7: reserved */
-#define B3_PA_TOINI_TX1 0x01d8 /* 16 bit Timeout Init Val Tx Path MAC 1 */
- /* 0x01da - 0x01db: reserved */
-#define B3_PA_TOINI_TX2 0x01dc /* 16 bit Timeout Init Val Tx Path MAC 2 */
- /* 0x01de - 0x01df: reserved */
-#define B3_PA_TOVAL_RX1 0x01e0 /* 16 bit Timeout Val Rx Path MAC 1 */
- /* 0x01e2 - 0x01e3: reserved */
-#define B3_PA_TOVAL_RX2 0x01e4 /* 16 bit Timeout Val Rx Path MAC 2 */
- /* 0x01e6 - 0x01e7: reserved */
-#define B3_PA_TOVAL_TX1 0x01e8 /* 16 bit Timeout Val Tx Path MAC 1 */
- /* 0x01ea - 0x01eb: reserved */
-#define B3_PA_TOVAL_TX2 0x01ec /* 16 bit Timeout Val Tx Path MAC 2 */
- /* 0x01ee - 0x01ef: reserved */
-#define B3_PA_CTRL 0x01f0 /* 16 bit Packet Arbiter Ctrl Register */
-#define B3_PA_TEST 0x01f2 /* 16 bit Packet Arbiter Test Register */
- /* 0x01f4 - 0x01ff: reserved */
-
-/*
- * Bank 4 - 5
- */
-/* Transmit Arbiter Registers MAC 1 and 2, use MR_ADDR() to access */
-#define TXA_ITI_INI 0x0200 /* 32 bit Tx Arb Interval Timer Init Val*/
-#define TXA_ITI_VAL 0x0204 /* 32 bit Tx Arb Interval Timer Value */
-#define TXA_LIM_INI 0x0208 /* 32 bit Tx Arb Limit Counter Init Val */
-#define TXA_LIM_VAL 0x020c /* 32 bit Tx Arb Limit Counter Value */
-#define TXA_CTRL 0x0210 /* 8 bit Tx Arbiter Control Register */
-#define TXA_TEST 0x0211 /* 8 bit Tx Arbiter Test Register */
-#define TXA_STAT 0x0212 /* 8 bit Tx Arbiter Status Register */
- /* 0x0213 - 0x027f: reserved */
- /* 0x0280 - 0x0292: MAC 2 */
- /* 0x0213 - 0x027f: reserved */
-
-/*
- * Bank 6
- */
-/* External registers (GENESIS only) */
-#define B6_EXT_REG 0x0300
-
-/*
- * Bank 7
- */
-/* This is a copy of the Configuration register file (lower half) */
-#define B7_CFG_SPC 0x0380
-
-/*
- * Bank 8 - 15
- */
-/* Receive and Transmit Queue Registers, use Q_ADDR() to access */
-#define B8_Q_REGS 0x0400
-
-/* Queue Register Offsets, use Q_ADDR() to access */
-#define Q_D 0x00 /* 8*32 bit Current Descriptor */
-#define Q_DA_L 0x20 /* 32 bit Current Descriptor Address Low dWord */
-#define Q_DA_H 0x24 /* 32 bit Current Descriptor Address High dWord */
-#define Q_AC_L 0x28 /* 32 bit Current Address Counter Low dWord */
-#define Q_AC_H 0x2c /* 32 bit Current Address Counter High dWord */
-#define Q_BC 0x30 /* 32 bit Current Byte Counter */
-#define Q_CSR 0x34 /* 32 bit BMU Control/Status Register */
-#define Q_F 0x38 /* 32 bit Flag Register */
-#define Q_T1 0x3c /* 32 bit Test Register 1 */
-#define Q_T1_TR 0x3c /* 8 bit Test Register 1 Transfer SM */
-#define Q_T1_WR 0x3d /* 8 bit Test Register 1 Write Descriptor SM */
-#define Q_T1_RD 0x3e /* 8 bit Test Register 1 Read Descriptor SM */
-#define Q_T1_SV 0x3f /* 8 bit Test Register 1 Supervisor SM */
-#define Q_T2 0x40 /* 32 bit Test Register 2 */
-#define Q_T3 0x44 /* 32 bit Test Register 3 */
- /* 0x48 - 0x7f: reserved */
-
-/*
- * Bank 16 - 23
- */
-/* RAM Buffer Registers */
-#define B16_RAM_REGS 0x0800
-
-/* RAM Buffer Register Offsets, use RB_ADDR() to access */
-#define RB_START 0x00 /* 32 bit RAM Buffer Start Address */
-#define RB_END 0x04 /* 32 bit RAM Buffer End Address */
-#define RB_WP 0x08 /* 32 bit RAM Buffer Write Pointer */
-#define RB_RP 0x0c /* 32 bit RAM Buffer Read Pointer */
-#define RB_RX_UTPP 0x10 /* 32 bit Rx Upper Threshold, Pause Pack */
-#define RB_RX_LTPP 0x14 /* 32 bit Rx Lower Threshold, Pause Pack */
-#define RB_RX_UTHP 0x18 /* 32 bit Rx Upper Threshold, High Prio */
-#define RB_RX_LTHP 0x1c /* 32 bit Rx Lower Threshold, High Prio */
- /* 0x10 - 0x1f: reserved at Tx RAM Buffer Registers */
-#define RB_PC 0x20 /* 32 bit RAM Buffer Packet Counter */
-#define RB_LEV 0x24 /* 32 bit RAM Buffer Level Register */
-#define RB_CTRL 0x28 /* 8 bit RAM Buffer Control Register */
-#define RB_TST1 0x29 /* 8 bit RAM Buffer Test Register 1 */
-#define RB_TST2 0x2A /* 8 bit RAM Buffer Test Register 2 */
- /* 0x2c - 0x7f: reserved */
-
-/*
- * Bank 24
- */
-/*
- * Receive MAC FIFO, Receive LED, and Link_Sync regs (GENESIS only)
- * use MR_ADDR() to access
- */
-#define RX_MFF_EA 0x0c00 /* 32 bit Receive MAC FIFO End Address */
-#define RX_MFF_WP 0x0c04 /* 32 bit Receive MAC FIFO Write Pointer */
- /* 0x0c08 - 0x0c0b: reserved */
-#define RX_MFF_RP 0x0c0c /* 32 bit Receive MAC FIFO Read Pointer */
-#define RX_MFF_PC 0x0c10 /* 32 bit Receive MAC FIFO Packet Cnt */
-#define RX_MFF_LEV 0x0c14 /* 32 bit Receive MAC FIFO Level */
-#define RX_MFF_CTRL1 0x0c18 /* 16 bit Receive MAC FIFO Control Reg 1*/
-#define RX_MFF_STAT_TO 0x0c1a /* 8 bit Receive MAC Status Timeout */
-#define RX_MFF_TIST_TO 0x0c1b /* 8 bit Receive MAC Time Stamp Timeout */
-#define RX_MFF_CTRL2 0x0c1c /* 8 bit Receive MAC FIFO Control Reg 2*/
-#define RX_MFF_TST1 0x0c1d /* 8 bit Receive MAC FIFO Test Reg 1 */
-#define RX_MFF_TST2 0x0c1e /* 8 bit Receive MAC FIFO Test Reg 2 */
- /* 0x0c1f: reserved */
-#define RX_LED_INI 0x0c20 /* 32 bit Receive LED Cnt Init Value */
-#define RX_LED_VAL 0x0c24 /* 32 bit Receive LED Cnt Current Value */
-#define RX_LED_CTRL 0x0c28 /* 8 bit Receive LED Cnt Control Reg */
-#define RX_LED_TST 0x0c29 /* 8 bit Receive LED Cnt Test Register */
- /* 0x0c2a - 0x0c2f: reserved */
-#define LNK_SYNC_INI 0x0c30 /* 32 bit Link Sync Cnt Init Value */
-#define LNK_SYNC_VAL 0x0c34 /* 32 bit Link Sync Cnt Current Value */
-#define LNK_SYNC_CTRL 0x0c38 /* 8 bit Link Sync Cnt Control Register */
-#define LNK_SYNC_TST 0x0c39 /* 8 bit Link Sync Cnt Test Register */
- /* 0x0c3a - 0x0c3b: reserved */
-#define LNK_LED_REG 0x0c3c /* 8 bit Link LED Register */
- /* 0x0c3d - 0x0c3f: reserved */
-
-/* Receive GMAC FIFO (YUKON only), use MR_ADDR() to access */
-#define RX_GMF_EA 0x0c40 /* 32 bit Rx GMAC FIFO End Address */
-#define RX_GMF_AF_THR 0x0c44 /* 32 bit Rx GMAC FIFO Almost Full Thresh. */
-#define RX_GMF_CTRL_T 0x0c48 /* 32 bit Rx GMAC FIFO Control/Test */
-#define RX_GMF_FL_MSK 0x0c4c /* 32 bit Rx GMAC FIFO Flush Mask */
-#define RX_GMF_FL_THR 0x0c50 /* 32 bit Rx GMAC FIFO Flush Threshold */
- /* 0x0c54 - 0x0c5f: reserved */
-#define RX_GMF_WP 0x0c60 /* 32 bit Rx GMAC FIFO Write Pointer */
- /* 0x0c64 - 0x0c67: reserved */
-#define RX_GMF_WLEV 0x0c68 /* 32 bit Rx GMAC FIFO Write Level */
- /* 0x0c6c - 0x0c6f: reserved */
-#define RX_GMF_RP 0x0c70 /* 32 bit Rx GMAC FIFO Read Pointer */
- /* 0x0c74 - 0x0c77: reserved */
-#define RX_GMF_RLEV 0x0c78 /* 32 bit Rx GMAC FIFO Read Level */
- /* 0x0c7c - 0x0c7f: reserved */
-
-/*
- * Bank 25
- */
- /* 0x0c80 - 0x0cbf: MAC 2 */
- /* 0x0cc0 - 0x0cff: reserved */
-
-/*
- * Bank 26
- */
-/*
- * Transmit MAC FIFO and Transmit LED Registers (GENESIS only),
- * use MR_ADDR() to access
- */
-#define TX_MFF_EA 0x0d00 /* 32 bit Transmit MAC FIFO End Address */
-#define TX_MFF_WP 0x0d04 /* 32 bit Transmit MAC FIFO WR Pointer */
-#define TX_MFF_WSP 0x0d08 /* 32 bit Transmit MAC FIFO WR Shadow Ptr */
-#define TX_MFF_RP 0x0d0c /* 32 bit Transmit MAC FIFO RD Pointer */
-#define TX_MFF_PC 0x0d10 /* 32 bit Transmit MAC FIFO Packet Cnt */
-#define TX_MFF_LEV 0x0d14 /* 32 bit Transmit MAC FIFO Level */
-#define TX_MFF_CTRL1 0x0d18 /* 16 bit Transmit MAC FIFO Ctrl Reg 1 */
-#define TX_MFF_WAF 0x0d1a /* 8 bit Transmit MAC Wait after flush */
- /* 0x0c1b: reserved */
-#define TX_MFF_CTRL2 0x0d1c /* 8 bit Transmit MAC FIFO Ctrl Reg 2 */
-#define TX_MFF_TST1 0x0d1d /* 8 bit Transmit MAC FIFO Test Reg 1 */
-#define TX_MFF_TST2 0x0d1e /* 8 bit Transmit MAC FIFO Test Reg 2 */
- /* 0x0d1f: reserved */
-#define TX_LED_INI 0x0d20 /* 32 bit Transmit LED Cnt Init Value */
-#define TX_LED_VAL 0x0d24 /* 32 bit Transmit LED Cnt Current Val */
-#define TX_LED_CTRL 0x0d28 /* 8 bit Transmit LED Cnt Control Reg */
-#define TX_LED_TST 0x0d29 /* 8 bit Transmit LED Cnt Test Reg */
- /* 0x0d2a - 0x0d3f: reserved */
-
-/* Transmit GMAC FIFO (YUKON only), use MR_ADDR() to access */
-#define TX_GMF_EA 0x0d40 /* 32 bit Tx GMAC FIFO End Address */
-#define TX_GMF_AE_THR 0x0d44 /* 32 bit Tx GMAC FIFO Almost Empty Thresh.*/
-#define TX_GMF_CTRL_T 0x0d48 /* 32 bit Tx GMAC FIFO Control/Test */
- /* 0x0d4c - 0x0d5f: reserved */
-#define TX_GMF_WP 0x0d60 /* 32 bit Tx GMAC FIFO Write Pointer */
-#define TX_GMF_WSP 0x0d64 /* 32 bit Tx GMAC FIFO Write Shadow Ptr. */
-#define TX_GMF_WLEV 0x0d68 /* 32 bit Tx GMAC FIFO Write Level */
- /* 0x0d6c - 0x0d6f: reserved */
-#define TX_GMF_RP 0x0d70 /* 32 bit Tx GMAC FIFO Read Pointer */
-#define TX_GMF_RSTP 0x0d74 /* 32 bit Tx GMAC FIFO Restart Pointer */
-#define TX_GMF_RLEV 0x0d78 /* 32 bit Tx GMAC FIFO Read Level */
- /* 0x0d7c - 0x0d7f: reserved */
-
-/*
- * Bank 27
- */
- /* 0x0d80 - 0x0dbf: MAC 2 */
- /* 0x0daa - 0x0dff: reserved */
-
-/*
- * Bank 28
- */
-/* Descriptor Poll Timer Registers */
-#define B28_DPT_INI 0x0e00 /* 24 bit Descriptor Poll Timer Init Val */
-#define B28_DPT_VAL 0x0e04 /* 24 bit Descriptor Poll Timer Curr Val */
-#define B28_DPT_CTRL 0x0e08 /* 8 bit Descriptor Poll Timer Ctrl Reg */
- /* 0x0e09: reserved */
-#define B28_DPT_TST 0x0e0a /* 8 bit Descriptor Poll Timer Test Reg */
- /* 0x0e0b: reserved */
-
-/* Time Stamp Timer Registers (YUKON only) */
- /* 0x0e10: reserved */
-#define GMAC_TI_ST_VAL 0x0e14 /* 32 bit Time Stamp Timer Curr Val */
-#define GMAC_TI_ST_CTRL 0x0e18 /* 8 bit Time Stamp Timer Ctrl Reg */
- /* 0x0e19: reserved */
-#define GMAC_TI_ST_TST 0x0e1a /* 8 bit Time Stamp Timer Test Reg */
- /* 0x0e1b - 0x0e7f: reserved */
-
-/*
- * Bank 29
- */
- /* 0x0e80 - 0x0efc: reserved */
-
-/*
- * Bank 30
- */
-/* GMAC and GPHY Control Registers (YUKON only) */
-#define GMAC_CTRL 0x0f00 /* 32 bit GMAC Control Reg */
-#define GPHY_CTRL 0x0f04 /* 32 bit GPHY Control Reg */
-#define GMAC_IRQ_SRC 0x0f08 /* 8 bit GMAC Interrupt Source Reg */
- /* 0x0f09 - 0x0f0b: reserved */
-#define GMAC_IRQ_MSK 0x0f0c /* 8 bit GMAC Interrupt Mask Reg */
- /* 0x0f0d - 0x0f0f: reserved */
-#define GMAC_LINK_CTRL 0x0f10 /* 16 bit Link Control Reg */
- /* 0x0f14 - 0x0f1f: reserved */
-
-/* Wake-up Frame Pattern Match Control Registers (YUKON only) */
-
-#define WOL_REG_OFFS 0x20 /* HW-Bug: Address is + 0x20 against spec. */
-
-#define WOL_CTRL_STAT 0x0f20 /* 16 bit WOL Control/Status Reg */
-#define WOL_MATCH_CTL 0x0f22 /* 8 bit WOL Match Control Reg */
-#define WOL_MATCH_RES 0x0f23 /* 8 bit WOL Match Result Reg */
-#define WOL_MAC_ADDR_LO 0x0f24 /* 32 bit WOL MAC Address Low */
-#define WOL_MAC_ADDR_HI 0x0f28 /* 16 bit WOL MAC Address High */
-#define WOL_PATT_RPTR 0x0f2c /* 8 bit WOL Pattern Read Ptr */
-
-/* use this macro to access above registers */
-#define WOL_REG(Reg) ((Reg) + (pAC->GIni.GIWolOffs))
-
-
-/* WOL Pattern Length Registers (YUKON only) */
-
-#define WOL_PATT_LEN_LO 0x0f30 /* 32 bit WOL Pattern Length 3..0 */
-#define WOL_PATT_LEN_HI 0x0f34 /* 24 bit WOL Pattern Length 6..4 */
-
-/* WOL Pattern Counter Registers (YUKON only) */
-
-#define WOL_PATT_CNT_0 0x0f38 /* 32 bit WOL Pattern Counter 3..0 */
-#define WOL_PATT_CNT_4 0x0f3c /* 24 bit WOL Pattern Counter 6..4 */
- /* 0x0f40 - 0x0f7f: reserved */
-
-/*
- * Bank 31
- */
-/* 0x0f80 - 0x0fff: reserved */
-
-/*
- * Bank 32 - 33
- */
-#define WOL_PATT_RAM_1 0x1000 /* WOL Pattern RAM Link 1 */
-
-/*
- * Bank 0x22 - 0x3f
- */
-/* 0x1100 - 0x1fff: reserved */
-
-/*
- * Bank 0x40 - 0x4f
- */
-#define BASE_XMAC_1 0x2000 /* XMAC 1 registers */
-
-/*
- * Bank 0x50 - 0x5f
- */
-
-#define BASE_GMAC_1 0x2800 /* GMAC 1 registers */
-
-/*
- * Bank 0x60 - 0x6f
- */
-#define BASE_XMAC_2 0x3000 /* XMAC 2 registers */
-
-/*
- * Bank 0x70 - 0x7f
- */
-#define BASE_GMAC_2 0x3800 /* GMAC 2 registers */
-
-/*
- * Control Register Bit Definitions:
- */
-/* B0_RAP 8 bit Register Address Port */
- /* Bit 7: reserved */
-#define RAP_RAP 0x3f /* Bit 6..0: 0 = block 0,..,6f = block 6f */
-
-/* B0_CTST 16 bit Control/Status register */
- /* Bit 15..14: reserved */
-#define CS_CLK_RUN_HOT BIT_13S /* CLK_RUN hot m. (YUKON-Lite only) */
-#define CS_CLK_RUN_RST BIT_12S /* CLK_RUN reset (YUKON-Lite only) */
-#define CS_CLK_RUN_ENA BIT_11S /* CLK_RUN enable (YUKON-Lite only) */
-#define CS_VAUX_AVAIL BIT_10S /* VAUX available (YUKON only) */
-#define CS_BUS_CLOCK BIT_9S /* Bus Clock 0/1 = 33/66 MHz */
-#define CS_BUS_SLOT_SZ BIT_8S /* Slot Size 0/1 = 32/64 bit slot */
-#define CS_ST_SW_IRQ BIT_7S /* Set IRQ SW Request */
-#define CS_CL_SW_IRQ BIT_6S /* Clear IRQ SW Request */
-#define CS_STOP_DONE BIT_5S /* Stop Master is finished */
-#define CS_STOP_MAST BIT_4S /* Command Bit to stop the master */
-#define CS_MRST_CLR BIT_3S /* Clear Master reset */
-#define CS_MRST_SET BIT_2S /* Set Master reset */
-#define CS_RST_CLR BIT_1S /* Clear Software reset */
-#define CS_RST_SET BIT_0S /* Set Software reset */
-
-/* B0_LED 8 Bit LED register */
- /* Bit 7.. 2: reserved */
-#define LED_STAT_ON BIT_1S /* Status LED on */
-#define LED_STAT_OFF BIT_0S /* Status LED off */
-
-/* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */
-#define PC_VAUX_ENA BIT_7 /* Switch VAUX Enable */
-#define PC_VAUX_DIS BIT_6 /* Switch VAUX Disable */
-#define PC_VCC_ENA BIT_5 /* Switch VCC Enable */
-#define PC_VCC_DIS BIT_4 /* Switch VCC Disable */
-#define PC_VAUX_ON BIT_3 /* Switch VAUX On */
-#define PC_VAUX_OFF BIT_2 /* Switch VAUX Off */
-#define PC_VCC_ON BIT_1 /* Switch VCC On */
-#define PC_VCC_OFF BIT_0 /* Switch VCC Off */
-
-/* B0_ISRC 32 bit Interrupt Source Register */
-/* B0_IMSK 32 bit Interrupt Mask Register */
-/* B0_SP_ISRC 32 bit Special Interrupt Source Reg */
-/* B2_IRQM_MSK 32 bit IRQ Moderation Mask */
-#define IS_ALL_MSK 0xbfffffffL /* All Interrupt bits */
-#define IS_HW_ERR BIT_31 /* Interrupt HW Error */
- /* Bit 30: reserved */
-#define IS_PA_TO_RX1 BIT_29 /* Packet Arb Timeout Rx1 */
-#define IS_PA_TO_RX2 BIT_28 /* Packet Arb Timeout Rx2 */
-#define IS_PA_TO_TX1 BIT_27 /* Packet Arb Timeout Tx1 */
-#define IS_PA_TO_TX2 BIT_26 /* Packet Arb Timeout Tx2 */
-#define IS_I2C_READY BIT_25 /* IRQ on end of I2C Tx */
-#define IS_IRQ_SW BIT_24 /* SW forced IRQ */
-#define IS_EXT_REG BIT_23 /* IRQ from LM80 or PHY (GENESIS only) */
- /* IRQ from PHY (YUKON only) */
-#define IS_TIMINT BIT_22 /* IRQ from Timer */
-#define IS_MAC1 BIT_21 /* IRQ from MAC 1 */
-#define IS_LNK_SYNC_M1 BIT_20 /* Link Sync Cnt wrap MAC 1 */
-#define IS_MAC2 BIT_19 /* IRQ from MAC 2 */
-#define IS_LNK_SYNC_M2 BIT_18 /* Link Sync Cnt wrap MAC 2 */
-/* Receive Queue 1 */
-#define IS_R1_B BIT_17 /* Q_R1 End of Buffer */
-#define IS_R1_F BIT_16 /* Q_R1 End of Frame */
-#define IS_R1_C BIT_15 /* Q_R1 Encoding Error */
-/* Receive Queue 2 */
-#define IS_R2_B BIT_14 /* Q_R2 End of Buffer */
-#define IS_R2_F BIT_13 /* Q_R2 End of Frame */
-#define IS_R2_C BIT_12 /* Q_R2 Encoding Error */
-/* Synchronous Transmit Queue 1 */
-#define IS_XS1_B BIT_11 /* Q_XS1 End of Buffer */
-#define IS_XS1_F BIT_10 /* Q_XS1 End of Frame */
-#define IS_XS1_C BIT_9 /* Q_XS1 Encoding Error */
-/* Asynchronous Transmit Queue 1 */
-#define IS_XA1_B BIT_8 /* Q_XA1 End of Buffer */
-#define IS_XA1_F BIT_7 /* Q_XA1 End of Frame */
-#define IS_XA1_C BIT_6 /* Q_XA1 Encoding Error */
-/* Synchronous Transmit Queue 2 */
-#define IS_XS2_B BIT_5 /* Q_XS2 End of Buffer */
-#define IS_XS2_F BIT_4 /* Q_XS2 End of Frame */
-#define IS_XS2_C BIT_3 /* Q_XS2 Encoding Error */
-/* Asynchronous Transmit Queue 2 */
-#define IS_XA2_B BIT_2 /* Q_XA2 End of Buffer */
-#define IS_XA2_F BIT_1 /* Q_XA2 End of Frame */
-#define IS_XA2_C BIT_0 /* Q_XA2 Encoding Error */
-
-
-/* B0_HWE_ISRC 32 bit HW Error Interrupt Src Reg */
-/* B0_HWE_IMSK 32 bit HW Error Interrupt Mask Reg */
-/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
-#define IS_ERR_MSK 0x00000fffL /* All Error bits */
- /* Bit 31..14: reserved */
-#define IS_IRQ_TIST_OV BIT_13 /* Time Stamp Timer Overflow (YUKON only) */
-#define IS_IRQ_SENSOR BIT_12 /* IRQ from Sensor (YUKON only) */
-#define IS_IRQ_MST_ERR BIT_11 /* IRQ master error detected */
-#define IS_IRQ_STAT BIT_10 /* IRQ status exception */
-#define IS_NO_STAT_M1 BIT_9 /* No Rx Status from MAC 1 */
-#define IS_NO_STAT_M2 BIT_8 /* No Rx Status from MAC 2 */
-#define IS_NO_TIST_M1 BIT_7 /* No Time Stamp from MAC 1 */
-#define IS_NO_TIST_M2 BIT_6 /* No Time Stamp from MAC 2 */
-#define IS_RAM_RD_PAR BIT_5 /* RAM Read Parity Error */
-#define IS_RAM_WR_PAR BIT_4 /* RAM Write Parity Error */
-#define IS_M1_PAR_ERR BIT_3 /* MAC 1 Parity Error */
-#define IS_M2_PAR_ERR BIT_2 /* MAC 2 Parity Error */
-#define IS_R1_PAR_ERR BIT_1 /* Queue R1 Parity Error */
-#define IS_R2_PAR_ERR BIT_0 /* Queue R2 Parity Error */
-
-/* B2_CONN_TYP 8 bit Connector type */
-/* B2_PMD_TYP 8 bit PMD type */
-/* Values of connector and PMD type comply to SysKonnect internal std */
-
-/* B2_MAC_CFG 8 bit MAC Configuration / Chip Revision */
-#define CONFIG_SYS_CHIP_R_MSK (0xf<<4) /* Bit 7.. 4: Chip Revision */
- /* Bit 3.. 2: reserved */
-#define CONFIG_SYS_DIS_M2_CLK BIT_1S /* Disable Clock for 2nd MAC */
-#define CONFIG_SYS_SNG_MAC BIT_0S /* MAC Config: 0=2 MACs / 1=1 MAC*/
-
-/* B2_CHIP_ID 8 bit Chip Identification Number */
-#define CHIP_ID_GENESIS 0x0a /* Chip ID for GENESIS */
-#define CHIP_ID_YUKON 0xb0 /* Chip ID for YUKON */
-
-/* B2_FAR 32 bit Flash-Prom Addr Reg/Cnt */
-#define FAR_ADDR 0x1ffffL /* Bit 16.. 0: FPROM Address mask */
-
-/* B2_LD_CRTL 8 bit EPROM loader control register */
-/* Bits are currently reserved */
-
-/* B2_LD_TEST 8 bit EPROM loader test register */
- /* Bit 7.. 4: reserved */
-#define LD_T_ON BIT_3S /* Loader Test mode on */
-#define LD_T_OFF BIT_2S /* Loader Test mode off */
-#define LD_T_STEP BIT_1S /* Decrement FPROM addr. Counter */
-#define LD_START BIT_0S /* Start loading FPROM */
-
-/*
- * Timer Section
- */
-/* B2_TI_CRTL 8 bit Timer control */
-/* B2_IRQM_CTRL 8 bit IRQ Moderation Timer Control */
- /* Bit 7.. 3: reserved */
-#define TIM_START BIT_2S /* Start Timer */
-#define TIM_STOP BIT_1S /* Stop Timer */
-#define TIM_CLR_IRQ BIT_0S /* Clear Timer IRQ (!IRQM) */
-
-/* B2_TI_TEST 8 Bit Timer Test */
-/* B2_IRQM_TEST 8 bit IRQ Moderation Timer Test */
-/* B28_DPT_TST 8 bit Descriptor Poll Timer Test Reg */
- /* Bit 7.. 3: reserved */
-#define TIM_T_ON BIT_2S /* Test mode on */
-#define TIM_T_OFF BIT_1S /* Test mode off */
-#define TIM_T_STEP BIT_0S /* Test step */
-
-/* B28_DPT_INI 32 bit Descriptor Poll Timer Init Val */
-/* B28_DPT_VAL 32 bit Descriptor Poll Timer Curr Val */
- /* Bit 31..24: reserved */
-#define DPT_MSK 0x00ffffffL /* Bit 23.. 0: Desc Poll Timer Bits */
-
-/* B28_DPT_CTRL 8 bit Descriptor Poll Timer Ctrl Reg */
- /* Bit 7.. 2: reserved */
-#define DPT_START BIT_1S /* Start Descriptor Poll Timer */
-#define DPT_STOP BIT_0S /* Stop Descriptor Poll Timer */
-
-/* B2_E_3 8 bit lower 4 bits used for HW self test result */
-#define B2_E3_RES_MASK 0x0f
-
-/* B2_TST_CTRL1 8 bit Test Control Register 1 */
-#define TST_FRC_DPERR_MR BIT_7S /* force DATAPERR on MST RD */
-#define TST_FRC_DPERR_MW BIT_6S /* force DATAPERR on MST WR */
-#define TST_FRC_DPERR_TR BIT_5S /* force DATAPERR on TRG RD */
-#define TST_FRC_DPERR_TW BIT_4S /* force DATAPERR on TRG WR */
-#define TST_FRC_APERR_M BIT_3S /* force ADDRPERR on MST */
-#define TST_FRC_APERR_T BIT_2S /* force ADDRPERR on TRG */
-#define TST_CFG_WRITE_ON BIT_1S /* Enable Config Reg WR */
-#define TST_CFG_WRITE_OFF BIT_0S /* Disable Config Reg WR */
-
-/* B2_TST_CTRL2 8 bit Test Control Register 2 */
- /* Bit 7.. 4: reserved */
- /* force the following error on the next master read/write */
-#define TST_FRC_DPERR_MR64 BIT_3S /* DataPERR RD 64 */
-#define TST_FRC_DPERR_MW64 BIT_2S /* DataPERR WR 64 */
-#define TST_FRC_APERR_1M64 BIT_1S /* AddrPERR on 1. phase */
-#define TST_FRC_APERR_2M64 BIT_0S /* AddrPERR on 2. phase */
-
-/* B2_GP_IO 32 bit General Purpose I/O Register */
- /* Bit 31..26: reserved */
-#define GP_DIR_9 BIT_25 /* IO_9 direct, 0=I/1=O */
-#define GP_DIR_8 BIT_24 /* IO_8 direct, 0=I/1=O */
-#define GP_DIR_7 BIT_23 /* IO_7 direct, 0=I/1=O */
-#define GP_DIR_6 BIT_22 /* IO_6 direct, 0=I/1=O */
-#define GP_DIR_5 BIT_21 /* IO_5 direct, 0=I/1=O */
-#define GP_DIR_4 BIT_20 /* IO_4 direct, 0=I/1=O */
-#define GP_DIR_3 BIT_19 /* IO_3 direct, 0=I/1=O */
-#define GP_DIR_2 BIT_18 /* IO_2 direct, 0=I/1=O */
-#define GP_DIR_1 BIT_17 /* IO_1 direct, 0=I/1=O */
-#define GP_DIR_0 BIT_16 /* IO_0 direct, 0=I/1=O */
- /* Bit 15..10: reserved */
-#define GP_IO_9 BIT_9 /* IO_9 pin */
-#define GP_IO_8 BIT_8 /* IO_8 pin */
-#define GP_IO_7 BIT_7 /* IO_7 pin */
-#define GP_IO_6 BIT_6 /* IO_6 pin */
-#define GP_IO_5 BIT_5 /* IO_5 pin */
-#define GP_IO_4 BIT_4 /* IO_4 pin */
-#define GP_IO_3 BIT_3 /* IO_3 pin */
-#define GP_IO_2 BIT_2 /* IO_2 pin */
-#define GP_IO_1 BIT_1 /* IO_1 pin */
-#define GP_IO_0 BIT_0 /* IO_0 pin */
-
-/* B2_I2C_CTRL 32 bit I2C HW Control Register */
-#define I2C_FLAG BIT_31 /* Start read/write if WR */
-#define I2C_ADDR (0x7fffL<<16) /* Bit 30..16: Addr to be RD/WR */
-#define I2C_DEV_SEL (0x7fL<<9) /* Bit 15.. 9: I2C Device Select */
- /* Bit 8.. 5: reserved */
-#define I2C_BURST_LEN BIT_4 /* Burst Len, 1/4 bytes */
-#define I2C_DEV_SIZE (7L<<1) /* Bit 3.. 1: I2C Device Size */
-#define I2C_025K_DEV (0L<<1) /* 0: 256 Bytes or smal. */
-#define I2C_05K_DEV (1L<<1) /* 1: 512 Bytes */
-#define I2C_1K_DEV (2L<<1) /* 2: 1024 Bytes */
-#define I2C_2K_DEV (3L<<1) /* 3: 2048 Bytes */
-#define I2C_4K_DEV (4L<<1) /* 4: 4096 Bytes */
-#define I2C_8K_DEV (5L<<1) /* 5: 8192 Bytes */
-#define I2C_16K_DEV (6L<<1) /* 6: 16384 Bytes */
-#define I2C_32K_DEV (7L<<1) /* 7: 32768 Bytes */
-#define I2C_STOP BIT_0 /* Interrupt I2C transfer */
-
-/* B2_I2C_IRQ 32 bit I2C HW IRQ Register */
- /* Bit 31.. 1 reserved */
-#define I2C_CLR_IRQ BIT_0 /* Clear I2C IRQ */
-
-/* B2_I2C_SW 32 bit (8 bit access) I2C HW SW Port Register */
- /* Bit 7.. 3: reserved */
-#define I2C_DATA_DIR BIT_2S /* direction of I2C_DATA */
-#define I2C_DATA BIT_1S /* I2C Data Port */
-#define I2C_CLK BIT_0S /* I2C Clock Port */
-
-/*
- * I2C Address
- */
-#define I2C_SENS_ADDR LM80_ADDR /* I2C Sensor Address, (Volt and Temp)*/
-
-
-/* B2_BSC_CTRL 8 bit Blink Source Counter Control */
- /* Bit 7.. 2: reserved */
-#define BSC_START BIT_1S /* Start Blink Source Counter */
-#define BSC_STOP BIT_0S /* Stop Blink Source Counter */
-
-/* B2_BSC_STAT 8 bit Blink Source Counter Status */
- /* Bit 7.. 1: reserved */
-#define BSC_SRC BIT_0S /* Blink Source, 0=Off / 1=On */
-
-/* B2_BSC_TST 16 bit Blink Source Counter Test Reg */
-#define BSC_T_ON BIT_2S /* Test mode on */
-#define BSC_T_OFF BIT_1S /* Test mode off */
-#define BSC_T_STEP BIT_0S /* Test step */
-
-
-/* B3_RAM_ADDR 32 bit RAM Address, to read or write */
- /* Bit 31..19: reserved */
-#define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */
-
-/* RAM Interface Registers */
-/* B3_RI_CTRL 16 bit RAM Iface Control Register */
- /* Bit 15..10: reserved */
-#define RI_CLR_RD_PERR BIT_9S /* Clear IRQ RAM Read Parity Err */
-#define RI_CLR_WR_PERR BIT_8S /* Clear IRQ RAM Write Parity Err*/
- /* Bit 7.. 2: reserved */
-#define RI_RST_CLR BIT_1S /* Clear RAM Interface Reset */
-#define RI_RST_SET BIT_0S /* Set RAM Interface Reset */
-
-/* B3_RI_TEST 8 bit RAM Iface Test Register */
- /* Bit 15.. 4: reserved */
-#define RI_T_EV BIT_3S /* Timeout Event occured */
-#define RI_T_ON BIT_2S /* Timeout Timer Test On */
-#define RI_T_OFF BIT_1S /* Timeout Timer Test Off */
-#define RI_T_STEP BIT_0S /* Timeout Timer Step */
-
-/* MAC Arbiter Registers */
-/* B3_MA_TO_CTRL 16 bit MAC Arbiter Timeout Ctrl Reg */
- /* Bit 15.. 4: reserved */
-#define MA_FOE_ON BIT_3S /* XMAC Fast Output Enable ON */
-#define MA_FOE_OFF BIT_2S /* XMAC Fast Output Enable OFF */
-#define MA_RST_CLR BIT_1S /* Clear MAC Arbiter Reset */
-#define MA_RST_SET BIT_0S /* Set MAC Arbiter Reset */
-
-/* B3_MA_RC_CTRL 16 bit MAC Arbiter Recovery Ctrl Reg */
- /* Bit 15.. 8: reserved */
-#define MA_ENA_REC_TX2 BIT_7S /* Enable Recovery Timer TX2 */
-#define MA_DIS_REC_TX2 BIT_6S /* Disable Recovery Timer TX2 */
-#define MA_ENA_REC_TX1 BIT_5S /* Enable Recovery Timer TX1 */
-#define MA_DIS_REC_TX1 BIT_4S /* Disable Recovery Timer TX1 */
-#define MA_ENA_REC_RX2 BIT_3S /* Enable Recovery Timer RX2 */
-#define MA_DIS_REC_RX2 BIT_2S /* Disable Recovery Timer RX2 */
-#define MA_ENA_REC_RX1 BIT_1S /* Enable Recovery Timer RX1 */
-#define MA_DIS_REC_RX1 BIT_0S /* Disable Recovery Timer RX1 */
-
-/* Packet Arbiter Registers */
-/* B3_PA_CTRL 16 bit Packet Arbiter Ctrl Register */
- /* Bit 15..14: reserved */
-#define PA_CLR_TO_TX2 BIT_13S /* Clear IRQ Packet Timeout TX2 */
-#define PA_CLR_TO_TX1 BIT_12S /* Clear IRQ Packet Timeout TX1 */
-#define PA_CLR_TO_RX2 BIT_11S /* Clear IRQ Packet Timeout RX2 */
-#define PA_CLR_TO_RX1 BIT_10S /* Clear IRQ Packet Timeout RX1 */
-#define PA_ENA_TO_TX2 BIT_9S /* Enable Timeout Timer TX2 */
-#define PA_DIS_TO_TX2 BIT_8S /* Disable Timeout Timer TX2 */
-#define PA_ENA_TO_TX1 BIT_7S /* Enable Timeout Timer TX1 */
-#define PA_DIS_TO_TX1 BIT_6S /* Disable Timeout Timer TX1 */
-#define PA_ENA_TO_RX2 BIT_5S /* Enable Timeout Timer RX2 */
-#define PA_DIS_TO_RX2 BIT_4S /* Disable Timeout Timer RX2 */
-#define PA_ENA_TO_RX1 BIT_3S /* Enable Timeout Timer RX1 */
-#define PA_DIS_TO_RX1 BIT_2S /* Disable Timeout Timer RX1 */
-#define PA_RST_CLR BIT_1S /* Clear MAC Arbiter Reset */
-#define PA_RST_SET BIT_0S /* Set MAC Arbiter Reset */
-
-#define PA_ENA_TO_ALL (PA_ENA_TO_RX1 | PA_ENA_TO_RX2 |\
- PA_ENA_TO_TX1 | PA_ENA_TO_TX2)
-
-/* Rx/Tx Path related Arbiter Test Registers */
-/* B3_MA_TO_TEST 16 bit MAC Arbiter Timeout Test Reg */
-/* B3_MA_RC_TEST 16 bit MAC Arbiter Recovery Test Reg */
-/* B3_PA_TEST 16 bit Packet Arbiter Test Register */
-/* Bit 15, 11, 7, and 3 are reserved in B3_PA_TEST */
-#define TX2_T_EV BIT_15S /* TX2 Timeout/Recv Event occured */
-#define TX2_T_ON BIT_14S /* TX2 Timeout/Recv Timer Test On */
-#define TX2_T_OFF BIT_13S /* TX2 Timeout/Recv Timer Tst Off */
-#define TX2_T_STEP BIT_12S /* TX2 Timeout/Recv Timer Step */
-#define TX1_T_EV BIT_11S /* TX1 Timeout/Recv Event occured */
-#define TX1_T_ON BIT_10S /* TX1 Timeout/Recv Timer Test On */
-#define TX1_T_OFF BIT_9S /* TX1 Timeout/Recv Timer Tst Off */
-#define TX1_T_STEP BIT_8S /* TX1 Timeout/Recv Timer Step */
-#define RX2_T_EV BIT_7S /* RX2 Timeout/Recv Event occured */
-#define RX2_T_ON BIT_6S /* RX2 Timeout/Recv Timer Test On */
-#define RX2_T_OFF BIT_5S /* RX2 Timeout/Recv Timer Tst Off */
-#define RX2_T_STEP BIT_4S /* RX2 Timeout/Recv Timer Step */
-#define RX1_T_EV BIT_3S /* RX1 Timeout/Recv Event occured */
-#define RX1_T_ON BIT_2S /* RX1 Timeout/Recv Timer Test On */
-#define RX1_T_OFF BIT_1S /* RX1 Timeout/Recv Timer Tst Off */
-#define RX1_T_STEP BIT_0S /* RX1 Timeout/Recv Timer Step */
-
-
-/* Transmit Arbiter Registers MAC 1 and 2, use MR_ADDR() to access */
-/* TXA_ITI_INI 32 bit Tx Arb Interval Timer Init Val */
-/* TXA_ITI_VAL 32 bit Tx Arb Interval Timer Value */
-/* TXA_LIM_INI 32 bit Tx Arb Limit Counter Init Val */
-/* TXA_LIM_VAL 32 bit Tx Arb Limit Counter Value */
- /* Bit 31..24: reserved */
-#define TXA_MAX_VAL 0x00ffffffL /* Bit 23.. 0: Max TXA Timer/Cnt Val */
-
-/* TXA_CTRL 8 bit Tx Arbiter Control Register */
-#define TXA_ENA_FSYNC BIT_7S /* Enable force of sync Tx queue */
-#define TXA_DIS_FSYNC BIT_6S /* Disable force of sync Tx queue */
-#define TXA_ENA_ALLOC BIT_5S /* Enable alloc of free bandwidth */
-#define TXA_DIS_ALLOC BIT_4S /* Disable alloc of free bandwidth */
-#define TXA_START_RC BIT_3S /* Start sync Rate Control */
-#define TXA_STOP_RC BIT_2S /* Stop sync Rate Control */
-#define TXA_ENA_ARB BIT_1S /* Enable Tx Arbiter */
-#define TXA_DIS_ARB BIT_0S /* Disable Tx Arbiter */
-
-/* TXA_TEST 8 bit Tx Arbiter Test Register */
- /* Bit 7.. 6: reserved */
-#define TXA_INT_T_ON BIT_5S /* Tx Arb Interval Timer Test On */
-#define TXA_INT_T_OFF BIT_4S /* Tx Arb Interval Timer Test Off */
-#define TXA_INT_T_STEP BIT_3S /* Tx Arb Interval Timer Step */
-#define TXA_LIM_T_ON BIT_2S /* Tx Arb Limit Timer Test On */
-#define TXA_LIM_T_OFF BIT_1S /* Tx Arb Limit Timer Test Off */
-#define TXA_LIM_T_STEP BIT_0S /* Tx Arb Limit Timer Step */
-
-/* TXA_STAT 8 bit Tx Arbiter Status Register */
- /* Bit 7.. 1: reserved */
-#define TXA_PRIO_XS BIT_0S /* sync queue has prio to send */
-
-/* Q_BC 32 bit Current Byte Counter */
- /* Bit 31..16: reserved */
-#define BC_MAX 0xffff /* Bit 15.. 0: Byte counter */
-
-/* BMU Control Status Registers */
-/* B0_R1_CSR 32 bit BMU Ctrl/Stat Rx Queue 1 */
-/* B0_R2_CSR 32 bit BMU Ctrl/Stat Rx Queue 2 */
-/* B0_XA1_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */
-/* B0_XS1_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 1 */
-/* B0_XA2_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */
-/* B0_XS2_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 2 */
-/* Q_CSR 32 bit BMU Control/Status Register */
- /* Bit 31..25: reserved */
-#define CSR_SV_IDLE BIT_24 /* BMU SM Idle */
- /* Bit 23..22: reserved */
-#define CSR_DESC_CLR BIT_21 /* Clear Reset for Descr */
-#define CSR_DESC_SET BIT_20 /* Set Reset for Descr */
-#define CSR_FIFO_CLR BIT_19 /* Clear Reset for FIFO */
-#define CSR_FIFO_SET BIT_18 /* Set Reset for FIFO */
-#define CSR_HPI_RUN BIT_17 /* Release HPI SM */
-#define CSR_HPI_RST BIT_16 /* Reset HPI SM to Idle */
-#define CSR_SV_RUN BIT_15 /* Release Supervisor SM */
-#define CSR_SV_RST BIT_14 /* Reset Supervisor SM */
-#define CSR_DREAD_RUN BIT_13 /* Release Descr Read SM */
-#define CSR_DREAD_RST BIT_12 /* Reset Descr Read SM */
-#define CSR_DWRITE_RUN BIT_11 /* Release Descr Write SM */
-#define CSR_DWRITE_RST BIT_10 /* Reset Descr Write SM */
-#define CSR_TRANS_RUN BIT_9 /* Release Transfer SM */
-#define CSR_TRANS_RST BIT_8 /* Reset Transfer SM */
-#define CSR_ENA_POL BIT_7 /* Enable Descr Polling */
-#define CSR_DIS_POL BIT_6 /* Disable Descr Polling */
-#define CSR_STOP BIT_5 /* Stop Rx/Tx Queue */
-#define CSR_START BIT_4 /* Start Rx/Tx Queue */
-#define CSR_IRQ_CL_P BIT_3 /* (Rx) Clear Parity IRQ */
-#define CSR_IRQ_CL_B BIT_2 /* Clear EOB IRQ */
-#define CSR_IRQ_CL_F BIT_1 /* Clear EOF IRQ */
-#define CSR_IRQ_CL_C BIT_0 /* Clear ERR IRQ */
-
-#define CSR_SET_RESET (CSR_DESC_SET | CSR_FIFO_SET | CSR_HPI_RST |\
- CSR_SV_RST | CSR_DREAD_RST | CSR_DWRITE_RST |\
- CSR_TRANS_RST)
-#define CSR_CLR_RESET (CSR_DESC_CLR | CSR_FIFO_CLR | CSR_HPI_RUN |\
- CSR_SV_RUN | CSR_DREAD_RUN | CSR_DWRITE_RUN |\
- CSR_TRANS_RUN)
-
-/* Q_F 32 bit Flag Register */
- /* Bit 31..28: reserved */
-#define F_ALM_FULL BIT_27 /* Rx FIFO: almost full */
-#define F_EMPTY BIT_27 /* Tx FIFO: empty flag */
-#define F_FIFO_EOF BIT_26 /* Tag (EOF Flag) bit in FIFO */
-#define F_WM_REACHED BIT_25 /* Watermark reached */
- /* reserved */
-#define F_FIFO_LEVEL (0x1fL<<16) /* Bit 23..16: # of Qwords in FIFO */
- /* Bit 15..11: reserved */
-#define F_WATER_MARK 0x0007ffL /* Bit 10.. 0: Watermark */
-
-/* Q_T1 32 bit Test Register 1 */
-/* Holds four State Machine control Bytes */
-#define SM_CRTL_SV_MSK (0xffL<<24) /* Bit 31..24: Control Supervisor SM */
-#define SM_CRTL_RD_MSK (0xffL<<16) /* Bit 23..16: Control Read Desc SM */
-#define SM_CRTL_WR_MSK (0xffL<<8) /* Bit 15.. 8: Control Write Desc SM */
-#define SM_CRTL_TR_MSK 0xffL /* Bit 7.. 0: Control Transfer SM */
-
-/* Q_T1_TR 8 bit Test Register 1 Transfer SM */
-/* Q_T1_WR 8 bit Test Register 1 Write Descriptor SM */
-/* Q_T1_RD 8 bit Test Register 1 Read Descriptor SM */
-/* Q_T1_SV 8 bit Test Register 1 Supervisor SM */
-
-/* The control status byte of each machine looks like ... */
-#define SM_STATE 0xf0 /* Bit 7.. 4: State which shall be loaded */
-#define SM_LOAD BIT_3S /* Load the SM with SM_STATE */
-#define SM_TEST_ON BIT_2S /* Switch on SM Test Mode */
-#define SM_TEST_OFF BIT_1S /* Go off the Test Mode */
-#define SM_STEP BIT_0S /* Step the State Machine */
-/* The encoding of the states is not supported by the Diagnostics Tool */
-
-/* Q_T2 32 bit Test Register 2 */
- /* Bit 31.. 8: reserved */
-#define T2_AC_T_ON BIT_7 /* Address Counter Test Mode on */
-#define T2_AC_T_OFF BIT_6 /* Address Counter Test Mode off */
-#define T2_BC_T_ON BIT_5 /* Byte Counter Test Mode on */
-#define T2_BC_T_OFF BIT_4 /* Byte Counter Test Mode off */
-#define T2_STEP04 BIT_3 /* Inc AC/Dec BC by 4 */
-#define T2_STEP03 BIT_2 /* Inc AC/Dec BC by 3 */
-#define T2_STEP02 BIT_1 /* Inc AC/Dec BC by 2 */
-#define T2_STEP01 BIT_0 /* Inc AC/Dec BC by 1 */
-
-/* Q_T3 32 bit Test Register 3 */
- /* Bit 31.. 7: reserved */
-#define T3_MUX_MSK (7<<4) /* Bit 6.. 4: Mux Position */
- /* Bit 3: reserved */
-#define T3_VRAM_MSK 7 /* Bit 2.. 0: Virtual RAM Buffer Address */
-
-/* RAM Buffer Register Offsets, use RB_ADDR(Queue, Offs) to access */
-/* RB_START 32 bit RAM Buffer Start Address */
-/* RB_END 32 bit RAM Buffer End Address */
-/* RB_WP 32 bit RAM Buffer Write Pointer */
-/* RB_RP 32 bit RAM Buffer Read Pointer */
-/* RB_RX_UTPP 32 bit Rx Upper Threshold, Pause Pack */
-/* RB_RX_LTPP 32 bit Rx Lower Threshold, Pause Pack */
-/* RB_RX_UTHP 32 bit Rx Upper Threshold, High Prio */
-/* RB_RX_LTHP 32 bit Rx Lower Threshold, High Prio */
-/* RB_PC 32 bit RAM Buffer Packet Counter */
-/* RB_LEV 32 bit RAM Buffer Level Register */
- /* Bit 31..19: reserved */
-#define RB_MSK 0x0007ffff /* Bit 18.. 0: RAM Buffer Pointer Bits */
-
-/* RB_TST2 8 bit RAM Buffer Test Register 2 */
- /* Bit 7.. 4: reserved */
-#define RB_PC_DEC BIT_3S /* Packet Counter Decrem */
-#define RB_PC_T_ON BIT_2S /* Packet Counter Test On */
-#define RB_PC_T_OFF BIT_1S /* Packet Counter Tst Off */
-#define RB_PC_INC BIT_0S /* Packet Counter Increm */
-
-/* RB_TST1 8 bit RAM Buffer Test Register 1 */
- /* Bit 7: reserved */
-#define RB_WP_T_ON BIT_6S /* Write Pointer Test On */
-#define RB_WP_T_OFF BIT_5S /* Write Pointer Test Off */
-#define RB_WP_INC BIT_4S /* Write Pointer Increm */
- /* Bit 3: reserved */
-#define RB_RP_T_ON BIT_2S /* Read Pointer Test On */
-#define RB_RP_T_OFF BIT_1S /* Read Pointer Test Off */
-#define RB_RP_DEC BIT_0S /* Read Pointer Decrement */
-
-/* RB_CTRL 8 bit RAM Buffer Control Register */
- /* Bit 7.. 6: reserved */
-#define RB_ENA_STFWD BIT_5S /* Enable Store & Forward */
-#define RB_DIS_STFWD BIT_4S /* Disable Store & Forward */
-#define RB_ENA_OP_MD BIT_3S /* Enable Operation Mode */
-#define RB_DIS_OP_MD BIT_2S /* Disable Operation Mode */
-#define RB_RST_CLR BIT_1S /* Clear RAM Buf STM Reset */
-#define RB_RST_SET BIT_0S /* Set RAM Buf STM Reset */
-
-
-/* Receive and Transmit MAC FIFO Registers (GENESIS only) */
-
-/* RX_MFF_EA 32 bit Receive MAC FIFO End Address */
-/* RX_MFF_WP 32 bit Receive MAC FIFO Write Pointer */
-/* RX_MFF_RP 32 bit Receive MAC FIFO Read Pointer */
-/* RX_MFF_PC 32 bit Receive MAC FIFO Packet Counter */
-/* RX_MFF_LEV 32 bit Receive MAC FIFO Level */
-/* TX_MFF_EA 32 bit Transmit MAC FIFO End Address */
-/* TX_MFF_WP 32 bit Transmit MAC FIFO Write Pointer */
-/* TX_MFF_WSP 32 bit Transmit MAC FIFO WR Shadow Pointer */
-/* TX_MFF_RP 32 bit Transmit MAC FIFO Read Pointer */
-/* TX_MFF_PC 32 bit Transmit MAC FIFO Packet Cnt */
-/* TX_MFF_LEV 32 bit Transmit MAC FIFO Level */
- /* Bit 31.. 6: reserved */
-#define MFF_MSK 0x007fL /* Bit 5.. 0: MAC FIFO Address/Ptr Bits */
-
-/* RX_MFF_CTRL1 16 bit Receive MAC FIFO Control Reg 1 */
- /* Bit 15..14: reserved */
-#define MFF_ENA_RDY_PAT BIT_13S /* Enable Ready Patch */
-#define MFF_DIS_RDY_PAT BIT_12S /* Disable Ready Patch */
-#define MFF_ENA_TIM_PAT BIT_11S /* Enable Timing Patch */
-#define MFF_DIS_TIM_PAT BIT_10S /* Disable Timing Patch */
-#define MFF_ENA_ALM_FUL BIT_9S /* Enable AlmostFull Sign */
-#define MFF_DIS_ALM_FUL BIT_8S /* Disable AlmostFull Sign */
-#define MFF_ENA_PAUSE BIT_7S /* Enable Pause Signaling */
-#define MFF_DIS_PAUSE BIT_6S /* Disable Pause Signaling */
-#define MFF_ENA_FLUSH BIT_5S /* Enable Frame Flushing */
-#define MFF_DIS_FLUSH BIT_4S /* Disable Frame Flushing */
-#define MFF_ENA_TIST BIT_3S /* Enable Time Stamp Gener */
-#define MFF_DIS_TIST BIT_2S /* Disable Time Stamp Gener */
-#define MFF_CLR_INTIST BIT_1S /* Clear IRQ No Time Stamp */
-#define MFF_CLR_INSTAT BIT_0S /* Clear IRQ No Status */
-
-#define MFF_RX_CTRL_DEF MFF_ENA_TIM_PAT
-
-/* TX_MFF_CTRL1 16 bit Transmit MAC FIFO Control Reg 1 */
-#define MFF_CLR_PERR BIT_15S /* Clear Parity Error IRQ */
- /* Bit 14: reserved */
-#define MFF_ENA_PKT_REC BIT_13S /* Enable Packet Recovery */
-#define MFF_DIS_PKT_REC BIT_12S /* Disable Packet Recovery */
-/* MFF_ENA_TIM_PAT (see RX_MFF_CTRL1) Bit 11: Enable Timing Patch */
-/* MFF_DIS_TIM_PAT (see RX_MFF_CTRL1) Bit 10: Disable Timing Patch */
-/* MFF_ENA_ALM_FUL (see RX_MFF_CTRL1) Bit 9: Enable Almost Full Sign */
-/* MFF_DIS_ALM_FUL (see RX_MFF_CTRL1) Bit 8: Disable Almost Full Sign */
-#define MFF_ENA_W4E BIT_7S /* Enable Wait for Empty */
-#define MFF_DIS_W4E BIT_6S /* Disable Wait for Empty */
-/* MFF_ENA_FLUSH (see RX_MFF_CTRL1) Bit 5: Enable Frame Flushing */
-/* MFF_DIS_FLUSH (see RX_MFF_CTRL1) Bit 4: Disable Frame Flushing */
-#define MFF_ENA_LOOPB BIT_3S /* Enable Loopback */
-#define MFF_DIS_LOOPB BIT_2S /* Disable Loopback */
-#define MFF_CLR_MAC_RST BIT_1S /* Clear XMAC Reset */
-#define MFF_SET_MAC_RST BIT_0S /* Set XMAC Reset */
-
-#define MFF_TX_CTRL_DEF (MFF_ENA_PKT_REC | MFF_ENA_TIM_PAT | MFF_ENA_FLUSH)
-
-/* RX_MFF_TST2 8 bit Receive MAC FIFO Test Register 2 */
-/* TX_MFF_TST2 8 bit Transmit MAC FIFO Test Register 2 */
- /* Bit 7: reserved */
-#define MFF_WSP_T_ON BIT_6S /* Tx: Write Shadow Ptr TestOn */
-#define MFF_WSP_T_OFF BIT_5S /* Tx: Write Shadow Ptr TstOff */
-#define MFF_WSP_INC BIT_4S /* Tx: Write Shadow Ptr Increment */
-#define MFF_PC_DEC BIT_3S /* Packet Counter Decrement */
-#define MFF_PC_T_ON BIT_2S /* Packet Counter Test On */
-#define MFF_PC_T_OFF BIT_1S /* Packet Counter Test Off */
-#define MFF_PC_INC BIT_0S /* Packet Counter Increment */
-
-/* RX_MFF_TST1 8 bit Receive MAC FIFO Test Register 1 */
-/* TX_MFF_TST1 8 bit Transmit MAC FIFO Test Register 1 */
- /* Bit 7: reserved */
-#define MFF_WP_T_ON BIT_6S /* Write Pointer Test On */
-#define MFF_WP_T_OFF BIT_5S /* Write Pointer Test Off */
-#define MFF_WP_INC BIT_4S /* Write Pointer Increm */
- /* Bit 3: reserved */
-#define MFF_RP_T_ON BIT_2S /* Read Pointer Test On */
-#define MFF_RP_T_OFF BIT_1S /* Read Pointer Test Off */
-#define MFF_RP_DEC BIT_0S /* Read Pointer Decrement */
-
-/* RX_MFF_CTRL2 8 bit Receive MAC FIFO Control Reg 2 */
-/* TX_MFF_CTRL2 8 bit Transmit MAC FIFO Control Reg 2 */
- /* Bit 7..4: reserved */
-#define MFF_ENA_OP_MD BIT_3S /* Enable Operation Mode */
-#define MFF_DIS_OP_MD BIT_2S /* Disable Operation Mode */
-#define MFF_RST_CLR BIT_1S /* Clear MAC FIFO Reset */
-#define MFF_RST_SET BIT_0S /* Set MAC FIFO Reset */
-
-
-/* Link LED Counter Registers (GENESIS only) */
-
-/* RX_LED_CTRL 8 bit Receive LED Cnt Control Reg */
-/* TX_LED_CTRL 8 bit Transmit LED Cnt Control Reg */
-/* LNK_SYNC_CTRL 8 bit Link Sync Cnt Control Register */
- /* Bit 7.. 3: reserved */
-#define LED_START BIT_2S /* Start Timer */
-#define LED_STOP BIT_1S /* Stop Timer */
-#define LED_STATE BIT_0S /* Rx/Tx: LED State, 1=LED on */
-#define LED_CLR_IRQ BIT_0S /* Lnk: Clear Link IRQ */
-
-/* RX_LED_TST 8 bit Receive LED Cnt Test Register */
-/* TX_LED_TST 8 bit Transmit LED Cnt Test Register */
-/* LNK_SYNC_TST 8 bit Link Sync Cnt Test Register */
- /* Bit 7.. 3: reserved */
-#define LED_T_ON BIT_2S /* LED Counter Test mode On */
-#define LED_T_OFF BIT_1S /* LED Counter Test mode Off */
-#define LED_T_STEP BIT_0S /* LED Counter Step */
-
-/* LNK_LED_REG 8 bit Link LED Register */
- /* Bit 7.. 6: reserved */
-#define LED_BLK_ON BIT_5S /* Link LED Blinking On */
-#define LED_BLK_OFF BIT_4S /* Link LED Blinking Off */
-#define LED_SYNC_ON BIT_3S /* Use Sync Wire to switch LED */
-#define LED_SYNC_OFF BIT_2S /* Disable Sync Wire Input */
-#define LED_ON BIT_1S /* switch LED on */
-#define LED_OFF BIT_0S /* switch LED off */
-
-/* Receive and Transmit GMAC FIFO Registers (YUKON only) */
-
-/* RX_GMF_EA 32 bit Rx GMAC FIFO End Address */
-/* RX_GMF_AF_THR 32 bit Rx GMAC FIFO Almost Full Thresh. */
-/* RX_GMF_WP 32 bit Rx GMAC FIFO Write Pointer */
-/* RX_GMF_WLEV 32 bit Rx GMAC FIFO Write Level */
-/* RX_GMF_RP 32 bit Rx GMAC FIFO Read Pointer */
-/* RX_GMF_RLEV 32 bit Rx GMAC FIFO Read Level */
-/* TX_GMF_EA 32 bit Tx GMAC FIFO End Address */
-/* TX_GMF_AE_THR 32 bit Tx GMAC FIFO Almost Empty Thresh.*/
-/* TX_GMF_WP 32 bit Tx GMAC FIFO Write Pointer */
-/* TX_GMF_WSP 32 bit Tx GMAC FIFO Write Shadow Ptr. */
-/* TX_GMF_WLEV 32 bit Tx GMAC FIFO Write Level */
-/* TX_GMF_RP 32 bit Tx GMAC FIFO Read Pointer */
-/* TX_GMF_RSTP 32 bit Tx GMAC FIFO Restart Pointer */
-/* TX_GMF_RLEV 32 bit Tx GMAC FIFO Read Level */
-
-/* RX_GMF_CTRL_T 32 bit Rx GMAC FIFO Control/Test */
- /* Bits 31..15: reserved */
-#define GMF_WP_TST_ON BIT_14 /* Write Pointer Test On */
-#define GMF_WP_TST_OFF BIT_13 /* Write Pointer Test Off */
-#define GMF_WP_STEP BIT_12 /* Write Pointer Step/Increment */
- /* Bit 11: reserved */
-#define GMF_RP_TST_ON BIT_10 /* Read Pointer Test On */
-#define GMF_RP_TST_OFF BIT_9 /* Read Pointer Test Off */
-#define GMF_RP_STEP BIT_8 /* Read Pointer Step/Increment */
-#define GMF_RX_F_FL_ON BIT_7 /* Rx FIFO Flush Mode On */
-#define GMF_RX_F_FL_OFF BIT_6 /* Rx FIFO Flush Mode Off */
-#define GMF_CLI_RX_FO BIT_5 /* Clear IRQ Rx FIFO Overrun */
-#define GMF_CLI_RX_FC BIT_4 /* Clear IRQ Rx Frame Complete */
-#define GMF_OPER_ON BIT_3 /* Operational Mode On */
-#define GMF_OPER_OFF BIT_2 /* Operational Mode Off */
-#define GMF_RST_CLR BIT_1 /* Clear GMAC FIFO Reset */
-#define GMF_RST_SET BIT_0 /* Set GMAC FIFO Reset */
-
-/* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */
- /* Bits 31..19: reserved */
-#define GMF_WSP_TST_ON BIT_18 /* Write Shadow Pointer Test On */
-#define GMF_WSP_TST_OFF BIT_17 /* Write Shadow Pointer Test Off */
-#define GMF_WSP_STEP BIT_16 /* Write Shadow Pointer Step/Increment */
- /* Bits 15..7: same as for RX_GMF_CTRL_T */
-#define GMF_CLI_TX_FU BIT_6 /* Clear IRQ Tx FIFO Underrun */
-#define GMF_CLI_TX_FC BIT_5 /* Clear IRQ Tx Frame Complete */
-#define GMF_CLI_TX_PE BIT_4 /* Clear IRQ Tx Parity Error */
- /* Bits 3..0: same as for RX_GMF_CTRL_T */
-
-#define GMF_RX_CTRL_DEF (GMF_OPER_ON | GMF_RX_F_FL_ON)
-#define GMF_TX_CTRL_DEF GMF_OPER_ON
-
-#define RX_GMF_FL_THR_DEF 0x0a /* Rx GMAC FIFO Flush Threshold default */
-
-/* GMAC_TI_ST_CTRL 8 bit Time Stamp Timer Ctrl Reg (YUKON only) */
- /* Bit 7.. 3: reserved */
-#define GMT_ST_START BIT_2S /* Start Time Stamp Timer */
-#define GMT_ST_STOP BIT_1S /* Stop Time Stamp Timer */
-#define GMT_ST_CLR_IRQ BIT_0S /* Clear Time Stamp Timer IRQ */
-
-/* GMAC_CTRL 32 bit GMAC Control Reg (YUKON only) */
- /* Bits 31.. 8: reserved */
-#define GMC_H_BURST_ON BIT_7 /* Half Duplex Burst Mode On */
-#define GMC_H_BURST_OFF BIT_6 /* Half Duplex Burst Mode Off */
-#define GMC_F_LOOPB_ON BIT_5 /* FIFO Loopback On */
-#define GMC_F_LOOPB_OFF BIT_4 /* FIFO Loopback Off */
-#define GMC_PAUSE_ON BIT_3 /* Pause On */
-#define GMC_PAUSE_OFF BIT_2 /* Pause Off */
-#define GMC_RST_CLR BIT_1 /* Clear GMAC Reset */
-#define GMC_RST_SET BIT_0 /* Set GMAC Reset */
-
-/* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
- /* Bits 31..29: reserved */
-#define GPC_SEL_BDT BIT_28 /* Select Bi-Dir. Transfer for MDC/MDIO */
-#define GPC_INT_POL_HI BIT_27 /* IRQ Polarity is Active HIGH */
-#define GPC_75_OHM BIT_26 /* Use 75 Ohm Termination instead of 50 */
-#define GPC_DIS_FC BIT_25 /* Disable Automatic Fiber/Copper Detection */
-#define GPC_DIS_SLEEP BIT_24 /* Disable Energy Detect */
-#define GPC_HWCFG_M_3 BIT_23 /* HWCFG_MODE[3] */
-#define GPC_HWCFG_M_2 BIT_22 /* HWCFG_MODE[2] */
-#define GPC_HWCFG_M_1 BIT_21 /* HWCFG_MODE[1] */
-#define GPC_HWCFG_M_0 BIT_20 /* HWCFG_MODE[0] */
-#define GPC_ANEG_0 BIT_19 /* ANEG[0] */
-#define GPC_ENA_XC BIT_18 /* Enable MDI crossover */
-#define GPC_DIS_125 BIT_17 /* Disable 125 MHz clock */
-#define GPC_ANEG_3 BIT_16 /* ANEG[3] */
-#define GPC_ANEG_2 BIT_15 /* ANEG[2] */
-#define GPC_ANEG_1 BIT_14 /* ANEG[1] */
-#define GPC_ENA_PAUSE BIT_13 /* Enable Pause (SYM_OR_REM) */
-#define GPC_PHYADDR_4 BIT_12 /* Bit 4 of Phy Addr */
-#define GPC_PHYADDR_3 BIT_11 /* Bit 3 of Phy Addr */
-#define GPC_PHYADDR_2 BIT_10 /* Bit 2 of Phy Addr */
-#define GPC_PHYADDR_1 BIT_9 /* Bit 1 of Phy Addr */
-#define GPC_PHYADDR_0 BIT_8 /* Bit 0 of Phy Addr */
- /* Bits 7..2: reserved */
-#define GPC_RST_CLR BIT_1 /* Clear GPHY Reset */
-#define GPC_RST_SET BIT_0 /* Set GPHY Reset */
-
-#define GPC_HWCFG_GMII_COP (GPC_HWCFG_M_3 | GPC_HWCFG_M_2 | \
- GPC_HWCFG_M_1 | GPC_HWCFG_M_0)
-
-#define GPC_HWCFG_GMII_FIB ( GPC_HWCFG_M_2 | \
- GPC_HWCFG_M_1 | GPC_HWCFG_M_0)
-
-#define GPC_ANEG_ADV_ALL_M (GPC_ANEG_3 | GPC_ANEG_2 | \
- GPC_ANEG_1 | GPC_ANEG_0)
-
-/* forced speed and duplex mode (don't mix with other ANEG bits) */
-#define GPC_FRC10MBIT_HALF 0
-#define GPC_FRC10MBIT_FULL GPC_ANEG_0
-#define GPC_FRC100MBIT_HALF GPC_ANEG_1
-#define GPC_FRC100MBIT_FULL (GPC_ANEG_0 | GPC_ANEG_1)
-
-/* auto-negotiation with limited advertised speeds */
-/* mix only with master/slave settings (for copper) */
-#define GPC_ADV_1000_HALF GPC_ANEG_2
-#define GPC_ADV_1000_FULL GPC_ANEG_3
-#define GPC_ADV_ALL (GPC_ANEG_2 | GPC_ANEG_3)
-
-/* master/slave settings */
-/* only for copper with 1000 Mbps */
-#define GPC_FORCE_MASTER 0
-#define GPC_FORCE_SLAVE GPC_ANEG_0
-#define GPC_PREF_MASTER GPC_ANEG_1
-#define GPC_PREF_SLAVE (GPC_ANEG_1 | GPC_ANEG_0)
-
-/* GMAC_IRQ_SRC 8 bit GMAC Interrupt Source Reg (YUKON only) */
-/* GMAC_IRQ_MSK 8 bit GMAC Interrupt Mask Reg (YUKON only) */
-#define GM_IS_TX_CO_OV BIT_5 /* Transmit Counter Overflow IRQ */
-#define GM_IS_RX_CO_OV BIT_4 /* Receive Counter Overflow IRQ */
-#define GM_IS_TX_FF_UR BIT_3 /* Transmit FIFO Underrun */
-#define GM_IS_TX_COMPL BIT_2 /* Frame Transmission Complete */
-#define GM_IS_RX_FF_OR BIT_1 /* Receive FIFO Overrun */
-#define GM_IS_RX_COMPL BIT_0 /* Frame Reception Complete */
-
-#define GMAC_DEF_MSK (GM_IS_TX_CO_OV | GM_IS_RX_CO_OV | \
- GM_IS_TX_FF_UR)
-
-/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
- /* Bits 15.. 2: reserved */
-#define GMLC_RST_CLR BIT_1S /* Clear GMAC Link Reset */
-#define GMLC_RST_SET BIT_0S /* Set GMAC Link Reset */
-
-
-/* WOL_CTRL_STAT 16 bit WOL Control/Status Reg */
-#define WOL_CTL_LINK_CHG_OCC BIT_15S
-#define WOL_CTL_MAGIC_PKT_OCC BIT_14S
-#define WOL_CTL_PATTERN_OCC BIT_13S
-
-#define WOL_CTL_CLEAR_RESULT BIT_12S
-
-#define WOL_CTL_ENA_PME_ON_LINK_CHG BIT_11S
-#define WOL_CTL_DIS_PME_ON_LINK_CHG BIT_10S
-#define WOL_CTL_ENA_PME_ON_MAGIC_PKT BIT_9S
-#define WOL_CTL_DIS_PME_ON_MAGIC_PKT BIT_8S
-#define WOL_CTL_ENA_PME_ON_PATTERN BIT_7S
-#define WOL_CTL_DIS_PME_ON_PATTERN BIT_6S
-
-#define WOL_CTL_ENA_LINK_CHG_UNIT BIT_5S
-#define WOL_CTL_DIS_LINK_CHG_UNIT BIT_4S
-#define WOL_CTL_ENA_MAGIC_PKT_UNIT BIT_3S
-#define WOL_CTL_DIS_MAGIC_PKT_UNIT BIT_2S
-#define WOL_CTL_ENA_PATTERN_UNIT BIT_1S
-#define WOL_CTL_DIS_PATTERN_UNIT BIT_0S
-
-#define WOL_CTL_DEFAULT \
- (WOL_CTL_DIS_PME_ON_LINK_CHG | \
- WOL_CTL_DIS_PME_ON_PATTERN | \
- WOL_CTL_DIS_PME_ON_MAGIC_PKT | \
- WOL_CTL_DIS_LINK_CHG_UNIT | \
- WOL_CTL_DIS_PATTERN_UNIT | \
- WOL_CTL_DIS_MAGIC_PKT_UNIT)
-
-/* WOL_MATCH_CTL 8 bit WOL Match Control Reg */
-#define WOL_CTL_PATT_ENA(x) (BIT_0 << (x))
-
-#define SK_NUM_WOL_PATTERN 7
-#define SK_PATTERN_PER_WORD 4
-#define SK_BITMASK_PATTERN 7
-#define SK_POW_PATTERN_LENGTH 128
-
-#define WOL_LENGTH_MSK 0x7f
-#define WOL_LENGTH_SHIFT 8
-
-
-/* Receive and Transmit Descriptors ******************************************/
-
-/* Transmit Descriptor struct */
-typedef struct s_HwTxd {
- SK_U32 volatile TxCtrl; /* Transmit Buffer Control Field */
- SK_U32 TxNext; /* Physical Address Pointer to the next TxD */
- SK_U32 TxAdrLo; /* Physical Tx Buffer Address lower dword */
- SK_U32 TxAdrHi; /* Physical Tx Buffer Address upper dword */
- SK_U32 TxStat; /* Transmit Frame Status Word */
-#ifndef SK_USE_REV_DESC
- SK_U16 TxTcpOffs; /* TCP Checksum Calculation Start Value */
- SK_U16 TxRes1; /* 16 bit reserved field */
- SK_U16 TxTcpWp; /* TCP Checksum Write Position */
- SK_U16 TxTcpSp; /* TCP Checksum Calculation Start Position */
-#else /* SK_USE_REV_DESC */
- SK_U16 TxRes1; /* 16 bit reserved field */
- SK_U16 TxTcpOffs; /* TCP Checksum Calculation Start Value */
- SK_U16 TxTcpSp; /* TCP Checksum Calculation Start Position */
- SK_U16 TxTcpWp; /* TCP Checksum Write Position */
-#endif /* SK_USE_REV_DESC */
- SK_U32 TxRes2; /* 32 bit reserved field */
-} SK_HWTXD;
-
-/* Receive Descriptor struct */
-typedef struct s_HwRxd {
- SK_U32 volatile RxCtrl; /* Receive Buffer Control Field */
- SK_U32 RxNext; /* Physical Address Pointer to the next RxD */
- SK_U32 RxAdrLo; /* Physical Rx Buffer Address lower dword */
- SK_U32 RxAdrHi; /* Physical Rx Buffer Address upper dword */
- SK_U32 RxStat; /* Receive Frame Status Word */
- SK_U32 RxTiSt; /* Receive Time Stamp (from XMAC on GENESIS) */
-#ifndef SK_USE_REV_DESC
- SK_U16 RxTcpSum1; /* TCP Checksum 1 */
- SK_U16 RxTcpSum2; /* TCP Checksum 2 */
- SK_U16 RxTcpSp1; /* TCP Checksum Calculation Start Position 1 */
- SK_U16 RxTcpSp2; /* TCP Checksum Calculation Start Position 2 */
-#else /* SK_USE_REV_DESC */
- SK_U16 RxTcpSum2; /* TCP Checksum 2 */
- SK_U16 RxTcpSum1; /* TCP Checksum 1 */
- SK_U16 RxTcpSp2; /* TCP Checksum Calculation Start Position 2 */
- SK_U16 RxTcpSp1; /* TCP Checksum Calculation Start Position 1 */
-#endif /* SK_USE_REV_DESC */
-} SK_HWRXD;
-
-/*
- * Drivers which use the reverse descriptor feature (PCI_OUR_REG_2)
- * should set the define SK_USE_REV_DESC.
- * Structures are 'normaly' not endianess dependent. But in
- * this case the SK_U16 fields are bound to bit positions inside the
- * descriptor. RxTcpSum1 e.g. must start at bit 0 within the 6.th DWord.
- * The bit positions inside a DWord are of course endianess dependent and
- * swaps if the DWord is swapped by the hardware.
- */
-
-
-/* Descriptor Bit Definition */
-/* TxCtrl Transmit Buffer Control Field */
-/* RxCtrl Receive Buffer Control Field */
-#define BMU_OWN BIT_31 /* OWN bit: 0=host/1=BMU */
-#define BMU_STF BIT_30 /* Start of Frame */
-#define BMU_EOF BIT_29 /* End of Frame */
-#define BMU_IRQ_EOB BIT_28 /* Req "End of Buffer" IRQ */
-#define BMU_IRQ_EOF BIT_27 /* Req "End of Frame" IRQ */
-/* TxCtrl specific bits */
-#define BMU_STFWD BIT_26 /* (Tx) Store & Forward Frame */
-#define BMU_NO_FCS BIT_25 /* (Tx) Disable MAC FCS (CRC) generation */
-#define BMU_SW BIT_24 /* (Tx) 1 bit res. for SW use */
-/* RxCtrl specific bits */
-#define BMU_DEV_0 BIT_26 /* (Rx) Transfer data to Dev0 */
-#define BMU_STAT_VAL BIT_25 /* (Rx) Rx Status Valid */
-#define BMU_TIST_VAL BIT_24 /* (Rx) Rx TimeStamp Valid */
- /* Bit 23..16: BMU Check Opcodes */
-#define BMU_CHECK (0x55L<<16) /* Default BMU check */
-#define BMU_TCP_CHECK (0x56L<<16) /* Descr with TCP ext */
-#define BMU_UDP_CHECK (0x57L<<16) /* Descr with UDP ext (YUKON only) */
-#define BMU_BBC 0xFFFFL /* Bit 15.. 0: Buffer Byte Counter */
-
-/* TxStat Transmit Frame Status Word */
-/* RxStat Receive Frame Status Word */
-/*
- *Note: TxStat is reserved for ASIC loopback mode only
- *
- * The Bits of the Status words are defined in xmac_ii.h
- * (see XMR_FS bits)
- */
-
-/* other defines *************************************************************/
-
-/*
- * FlashProm specification
- */
-#define MAX_PAGES 0x20000L /* Every byte has a single page */
-#define MAX_FADDR 1 /* 1 byte per page */
-#define SKFDDI_PSZ 8 /* address PROM size */
-
-/* macros ********************************************************************/
-
-/*
- * Receive and Transmit Queues
- */
-#define Q_R1 0x0000 /* Receive Queue 1 */
-#define Q_R2 0x0080 /* Receive Queue 2 */
-#define Q_XS1 0x0200 /* Synchronous Transmit Queue 1 */
-#define Q_XA1 0x0280 /* Asynchronous Transmit Queue 1 */
-#define Q_XS2 0x0300 /* Synchronous Transmit Queue 2 */
-#define Q_XA2 0x0380 /* Asynchronous Transmit Queue 2 */
-
-/*
- * Macro Q_ADDR()
- *
- * Use this macro to access the Receive and Transmit Queue Registers.
- *
- * para:
- * Queue Queue to access.
- * Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, and Q_XA2
- * Offs Queue register offset.
- * Values: Q_D, Q_DA_L ... Q_T2, Q_T3
- *
- * usage SK_IN32(pAC, Q_ADDR(Q_R2, Q_BC), pVal)
- */
-#define Q_ADDR(Queue, Offs) (B8_Q_REGS + (Queue) + (Offs))
-
-/*
- * Macro RB_ADDR()
- *
- * Use this macro to access the RAM Buffer Registers.
- *
- * para:
- * Queue Queue to access.
- * Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, and Q_XA2
- * Offs Queue register offset.
- * Values: RB_START, RB_END ... RB_LEV, RB_CTRL
- *
- * usage SK_IN32(pAC, RB_ADDR(Q_R2, RB_RP), pVal)
- */
-#define RB_ADDR(Queue, Offs) (B16_RAM_REGS + (Queue) + (Offs))
-
-
-/*
- * MAC Related Registers
- */
-#define MAC_1 0 /* belongs to the port near the slot */
-#define MAC_2 1 /* belongs to the port far away from the slot */
-
-/*
- * Macro MR_ADDR()
- *
- * Use this macro to access a MAC Related Registers inside the ASIC.
- *
- * para:
- * Mac MAC to access.
- * Values: MAC_1, MAC_2
- * Offs MAC register offset.
- * Values: RX_MFF_EA, RX_MFF_WP ... LNK_LED_REG,
- * TX_MFF_EA, TX_MFF_WP ... TX_LED_TST
- *
- * usage SK_IN32(pAC, MR_ADDR(MAC_1, TX_MFF_EA), pVal)
- */
-#define MR_ADDR(Mac, Offs) (((Mac) << 7) + (Offs))
-
-#ifdef SK_LITTLE_ENDIAN
-#define XM_WORD_LO 0
-#define XM_WORD_HI 1
-#else /* !SK_LITTLE_ENDIAN */
-#define XM_WORD_LO 1
-#define XM_WORD_HI 0
-#endif /* !SK_LITTLE_ENDIAN */
-
-
-/*
- * macros to access the XMAC (GENESIS only)
- *
- * XM_IN16(), to read a 16 bit register (e.g. XM_MMU_CMD)
- * XM_OUT16(), to write a 16 bit register (e.g. XM_MMU_CMD)
- * XM_IN32(), to read a 32 bit register (e.g. XM_TX_EV_CNT)
- * XM_OUT32(), to write a 32 bit register (e.g. XM_TX_EV_CNT)
- * XM_INADDR(), to read a network address register (e.g. XM_SRC_CHK)
- * XM_OUTADDR(), to write a network address register (e.g. XM_SRC_CHK)
- * XM_INHASH(), to read the XM_HSM_CHK register
- * XM_OUTHASH() to write the XM_HSM_CHK register
- *
- * para:
- * Mac XMAC to access values: MAC_1 or MAC_2
- * IoC I/O context needed for SK I/O macros
- * Reg XMAC Register to read or write
- * (p)Val Value or pointer to the value which should be read or written
- *
- * usage: XM_OUT16(IoC, MAC_1, XM_MMU_CMD, Value);
- */
-
-#define XMA(Mac, Reg) \
- ((BASE_XMAC_1 + (Mac) * (BASE_XMAC_2 - BASE_XMAC_1)) | ((Reg) << 1))
-
-#define XM_IN16(IoC, Mac, Reg, pVal) \
- SK_IN16((IoC), XMA((Mac), (Reg)), (pVal))
-
-#define XM_OUT16(IoC, Mac, Reg, Val) \
- SK_OUT16((IoC), XMA((Mac), (Reg)), (Val))
-
-#define XM_IN32(IoC, Mac, Reg, pVal) { \
- SK_IN16((IoC), XMA((Mac), (Reg)), \
- (SK_U16 *)&((SK_U16 *)(pVal))[XM_WORD_LO]); \
- SK_IN16((IoC), XMA((Mac), (Reg+2)), \
- (SK_U16 *)&((SK_U16 *)(pVal))[XM_WORD_HI]); \
-}
-
-#define XM_OUT32(IoC, Mac, Reg, Val) { \
- SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL)); \
- SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)(((Val) >> 16) & 0xffffL));\
-}
-
-/* Remember: we are always writing to / reading from LITTLE ENDIAN memory */
-
-#define XM_INADDR(IoC, Mac, Reg, pVal) { \
- SK_U16 Word; \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_IN16((IoC), XMA((Mac), (Reg)), &Word); \
- pByte[0] = (SK_U8)(Word & 0x00ff); \
- pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), XMA((Mac), (Reg+2)), &Word); \
- pByte[2] = (SK_U8)(Word & 0x00ff); \
- pByte[3] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), XMA((Mac), (Reg+4)), &Word); \
- pByte[4] = (SK_U8)(Word & 0x00ff); \
- pByte[5] = (SK_U8)((Word >> 8) & 0x00ff); \
-}
-
-#define XM_OUTADDR(IoC, Mac, Reg, pVal) { \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16) \
- (((SK_U16)(pByte[0]) & 0x00ff) | \
- (((SK_U16)(pByte[1]) << 8) & 0xff00))); \
- SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16) \
- (((SK_U16)(pByte[2]) & 0x00ff) | \
- (((SK_U16)(pByte[3]) << 8) & 0xff00))); \
- SK_OUT16((IoC), XMA((Mac), (Reg+4)), (SK_U16) \
- (((SK_U16)(pByte[4]) & 0x00ff) | \
- (((SK_U16)(pByte[5]) << 8) & 0xff00))); \
-}
-
-#define XM_INHASH(IoC, Mac, Reg, pVal) { \
- SK_U16 Word; \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_IN16((IoC), XMA((Mac), (Reg)), &Word); \
- pByte[0] = (SK_U8)(Word & 0x00ff); \
- pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), XMA((Mac), (Reg+2)), &Word); \
- pByte[2] = (SK_U8)(Word & 0x00ff); \
- pByte[3] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), XMA((Mac), (Reg+4)), &Word); \
- pByte[4] = (SK_U8)(Word & 0x00ff); \
- pByte[5] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), XMA((Mac), (Reg+6)), &Word); \
- pByte[6] = (SK_U8)(Word & 0x00ff); \
- pByte[7] = (SK_U8)((Word >> 8) & 0x00ff); \
-}
-
-#define XM_OUTHASH(IoC, Mac, Reg, pVal) { \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16) \
- (((SK_U16)(pByte[0]) & 0x00ff)| \
- (((SK_U16)(pByte[1]) << 8) & 0xff00))); \
- SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16) \
- (((SK_U16)(pByte[2]) & 0x00ff)| \
- (((SK_U16)(pByte[3]) << 8) & 0xff00))); \
- SK_OUT16((IoC), XMA((Mac), (Reg+4)), (SK_U16) \
- (((SK_U16)(pByte[4]) & 0x00ff)| \
- (((SK_U16)(pByte[5]) << 8) & 0xff00))); \
- SK_OUT16((IoC), XMA((Mac), (Reg+6)), (SK_U16) \
- (((SK_U16)(pByte[6]) & 0x00ff)| \
- (((SK_U16)(pByte[7]) << 8) & 0xff00))); \
-}
-
-/*
- * macros to access the GMAC (YUKON only)
- *
- * GM_IN16(), to read a 16 bit register (e.g. GM_GP_STAT)
- * GM_OUT16(), to write a 16 bit register (e.g. GM_GP_CTRL)
- * GM_IN32(), to read a 32 bit register (e.g. GM_)
- * GM_OUT32(), to write a 32 bit register (e.g. GM_)
- * GM_INADDR(), to read a network address register (e.g. GM_SRC_ADDR_1L)
- * GM_OUTADDR(), to write a network address register (e.g. GM_SRC_ADDR_2L)
- * GM_INHASH(), to read the GM_MC_ADDR_H1 register
- * GM_OUTHASH() to write the GM_MC_ADDR_H1 register
- *
- * para:
- * Mac GMAC to access values: MAC_1 or MAC_2
- * IoC I/O context needed for SK I/O macros
- * Reg GMAC Register to read or write
- * (p)Val Value or pointer to the value which should be read or written
- *
- * usage: GM_OUT16(IoC, MAC_1, GM_GP_CTRL, Value);
- */
-
-#define GMA(Mac, Reg) \
- ((BASE_GMAC_1 + (Mac) * (BASE_GMAC_2 - BASE_GMAC_1)) | (Reg))
-
-#define GM_IN16(IoC, Mac, Reg, pVal) \
- SK_IN16((IoC), GMA((Mac), (Reg)), (pVal))
-
-#define GM_OUT16(IoC, Mac, Reg, Val) \
- SK_OUT16((IoC), GMA((Mac), (Reg)), (Val))
-
-#define GM_IN32(IoC, Mac, Reg, pVal) { \
- SK_IN16((IoC), GMA((Mac), (Reg)), \
- (SK_U16 *)&((SK_U16 *)(pVal))[XM_WORD_LO]); \
- SK_IN16((IoC), GMA((Mac), (Reg+4)), \
- (SK_U16 *)&((SK_U16 *)(pVal))[XM_WORD_HI]); \
-}
-
-#define GM_OUT32(IoC, Mac, Reg, Val) { \
- SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL)); \
- SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)(((Val) >> 16) & 0xffffL));\
-}
-
-#define GM_INADDR(IoC, Mac, Reg, pVal) { \
- SK_U16 Word; \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_IN16((IoC), GMA((Mac), (Reg)), &Word); \
- pByte[0] = (SK_U8)(Word & 0x00ff); \
- pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word); \
- pByte[2] = (SK_U8)(Word & 0x00ff); \
- pByte[3] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word); \
- pByte[4] = (SK_U8)(Word & 0x00ff); \
- pByte[5] = (SK_U8)((Word >> 8) & 0x00ff); \
-}
-
-#define GM_OUTADDR(IoC, Mac, Reg, pVal) { \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16) \
- (((SK_U16)(pByte[0]) & 0x00ff) | \
- (((SK_U16)(pByte[1]) << 8) & 0xff00))); \
- SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16) \
- (((SK_U16)(pByte[2]) & 0x00ff) | \
- (((SK_U16)(pByte[3]) << 8) & 0xff00))); \
- SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16) \
- (((SK_U16)(pByte[4]) & 0x00ff) | \
- (((SK_U16)(pByte[5]) << 8) & 0xff00))); \
-}
-
-#define GM_INHASH(IoC, Mac, Reg, pVal) { \
- SK_U16 Word; \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_IN16((IoC), GMA((Mac), (Reg)), &Word); \
- pByte[0] = (SK_U8)(Word & 0x00ff); \
- pByte[1] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word); \
- pByte[2] = (SK_U8)(Word & 0x00ff); \
- pByte[3] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word); \
- pByte[4] = (SK_U8)(Word & 0x00ff); \
- pByte[5] = (SK_U8)((Word >> 8) & 0x00ff); \
- SK_IN16((IoC), GMA((Mac), (Reg+12)), &Word); \
- pByte[6] = (SK_U8)(Word & 0x00ff); \
- pByte[7] = (SK_U8)((Word >> 8) & 0x00ff); \
-}
-
-#define GM_OUTHASH(IoC, Mac, Reg, pVal) { \
- SK_U8 *pByte; \
- pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0]; \
- SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16) \
- (((SK_U16)(pByte[0]) & 0x00ff)| \
- (((SK_U16)(pByte[1]) << 8) & 0xff00))); \
- SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16) \
- (((SK_U16)(pByte[2]) & 0x00ff)| \
- (((SK_U16)(pByte[3]) << 8) & 0xff00))); \
- SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16) \
- (((SK_U16)(pByte[4]) & 0x00ff)| \
- (((SK_U16)(pByte[5]) << 8) & 0xff00))); \
- SK_OUT16((IoC), GMA((Mac), (Reg+12)), (SK_U16) \
- (((SK_U16)(pByte[6]) & 0x00ff)| \
- (((SK_U16)(pByte[7]) << 8) & 0xff00))); \
-}
-
-/*
- * Different MAC Types
- */
-#define SK_MAC_XMAC 0 /* Xaqti XMAC II */
-#define SK_MAC_GMAC 1 /* Marvell GMAC */
-
-/*
- * Different PHY Types
- */
-#define SK_PHY_XMAC 0 /* integrated in XMAC II */
-#define SK_PHY_BCOM 1 /* Broadcom BCM5400 */
-#define SK_PHY_LONE 2 /* Level One LXT1000 */
-#define SK_PHY_NAT 3 /* National DP83891 */
-#define SK_PHY_MARV_COPPER 4 /* Marvell 88E1011S */
-#define SK_PHY_MARV_FIBER 5 /* Marvell 88E1011S working on fiber */
-
-/*
- * PHY addresses (bits 12..8 of PHY address reg)
- */
-#define PHY_ADDR_XMAC (0<<8)
-#define PHY_ADDR_BCOM (1<<8)
-#define PHY_ADDR_LONE (3<<8)
-#define PHY_ADDR_NAT (0<<8)
-
-/* GPHY address (bits 15..11 of SMI control reg) */
-#define PHY_ADDR_MARV 0
-
-/*
- * macros to access the PHY
- *
- * PHY_READ() read a 16 bit value from the PHY
- * PHY_WRITE() write a 16 bit value to the PHY
- *
- * para:
- * IoC I/O context needed for SK I/O macros
- * pPort Pointer to port struct for PhyAddr
- * Mac XMAC to access values: MAC_1 or MAC_2
- * PhyReg PHY Register to read or write
- * (p)Val Value or pointer to the value which should be read or
- * written.
- *
- * usage: PHY_READ(IoC, pPort, MAC_1, PHY_CTRL, Value);
- * Warning: a PHY_READ on an uninitialized PHY (PHY still in reset) never
- * comes back. This is checked in DEBUG mode.
- */
-#ifndef DEBUG
-#define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) { \
- SK_U16 Mmu; \
- \
- XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr); \
- XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal)); \
- if ((pPort)->PhyType != SK_PHY_XMAC) { \
- do { \
- XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu); \
- } while ((Mmu & XM_MMU_PHY_RDY) == 0); \
- XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal)); \
- } \
-}
-#else
-#define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) { \
- SK_U16 Mmu; \
- int __i = 0; \
- \
- XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr); \
- XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal)); \
- if ((pPort)->PhyType != SK_PHY_XMAC) { \
- do { \
- XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu); \
- __i++; \
- if (__i > 100000) { \
- SK_DBG_PRINTF("*****************************\n"); \
- SK_DBG_PRINTF("PHY_READ on uninitialized PHY\n"); \
- SK_DBG_PRINTF("*****************************\n"); \
- break; \
- } \
- } while ((Mmu & XM_MMU_PHY_RDY) == 0); \
- XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal)); \
- } \
-}
-#endif /* DEBUG */
-
-#define PHY_WRITE(IoC, pPort, Mac, PhyReg, Val) { \
- SK_U16 Mmu; \
- \
- if ((pPort)->PhyType != SK_PHY_XMAC) { \
- do { \
- XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu); \
- } while ((Mmu & XM_MMU_PHY_BUSY) != 0); \
- } \
- XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr); \
- XM_OUT16((IoC), (Mac), XM_PHY_DATA, (Val)); \
- if ((pPort)->PhyType != SK_PHY_XMAC) { \
- do { \
- XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu); \
- } while ((Mmu & XM_MMU_PHY_BUSY) != 0); \
- } \
-}
-
-/*
- * Macro PCI_C()
- *
- * Use this macro to access PCI config register from the I/O space.
- *
- * para:
- * Addr PCI configuration register to access.
- * Values: PCI_VENDOR_ID ... PCI_VPD_ADR_REG,
- *
- * usage SK_IN16(pAC, PCI_C(PCI_VENDOR_ID), pVal);
- */
-#define PCI_C(Addr) (B7_CFG_SPC + (Addr)) /* PCI Config Space */
-
-/*
- * Macro SK_HW_ADDR(Base, Addr)
- *
- * Calculates the effective HW address
- *
- * para:
- * Base I/O or memory base address
- * Addr Address offset
- *
- * usage: May be used in SK_INxx and SK_OUTxx macros
- * #define SK_IN8(pAC, Addr, pVal) ...\
- * *pVal = (SK_U8)inp(SK_HW_ADDR(pAC->Hw.Iop, Addr)))
- */
-#ifdef SK_MEM_MAPPED_IO
-#define SK_HW_ADDR(Base, Addr) ((Base) + (Addr))
-#else /* SK_MEM_MAPPED_IO */
-#define SK_HW_ADDR(Base, Addr) \
- ((Base) + (((Addr) & 0x7f) | (((Addr) >> 7 > 0) ? 0x80 : 0)))
-#endif /* SK_MEM_MAPPED_IO */
-
-#define SZ_LONG (sizeof(SK_U32))
-
-/*
- * Macro SK_HWAC_LINK_LED()
- *
- * Use this macro to set the link LED mode.
- * para:
- * pAC Pointer to adapter context struct
- * IoC I/O context needed for SK I/O macros
- * Port Port number
- * Mode Mode to set for this LED
- */
-#define SK_HWAC_LINK_LED(pAC, IoC, Port, Mode) \
- SK_OUT8(IoC, MR_ADDR(Port, LNK_LED_REG), Mode);
-
-
-/* typedefs *******************************************************************/
-
-
-/* function prototypes ********************************************************/
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __INC_SKGEHW_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skhwt.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.5 $
- * Date: $Date: 1999/11/22 13:54:24 $
- * Purpose: Defines for the hardware timer functions
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgehwt.h,v $
- * Revision 1.5 1999/11/22 13:54:24 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.4 1998/08/19 09:50:58 gklug
- * fix: remove struct keyword from c-code (see CCC) add typedefs
- *
- * Revision 1.3 1998/08/14 07:09:29 gklug
- * fix: chg pAc -> pAC
- *
- * Revision 1.2 1998/08/07 12:54:21 gklug
- * fix: first compiled version
- *
- * Revision 1.1 1998/08/07 09:32:58 gklug
- * first version
- *
- *
- *
- *
- *
- ******************************************************************************/
-
-/*
- * SKGEHWT.H contains all defines and types for the timer functions
- */
-
-#ifndef _SKGEHWT_H_
-#define _SKGEHWT_H_
-
-/*
- * SK Hardware Timer
- * - needed wherever the HWT module is used
- * - use in Adapters context name pAC->Hwt
- */
-typedef struct s_Hwt {
- SK_U32 TStart ; /* HWT start */
- SK_U32 TStop ; /* HWT stop */
- int TActive ; /* HWT: flag : active/inactive */
-} SK_HWT;
-
-extern void SkHwtInit(SK_AC *pAC, SK_IOC Ioc);
-extern void SkHwtStart(SK_AC *pAC, SK_IOC Ioc, SK_U32 Time);
-extern void SkHwtStop(SK_AC *pAC, SK_IOC Ioc);
-extern SK_U32 SkHwtRead(SK_AC *pAC,SK_IOC Ioc);
-extern void SkHwtIsr(SK_AC *pAC, SK_IOC Ioc);
-#endif /* _SKGEHWT_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgei2c.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.23 $
- * Date: $Date: 2002/12/19 14:34:27 $
- * Purpose: Special GEnesis defines for TWSI
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgei2c.h,v $
- * Revision 1.23 2002/12/19 14:34:27 rschmidt
- * Added cast in macros SK_I2C_SET_BIT() and SK_I2C_CLR_BIT()
- * Editorial changes (TWSI)
- *
- * Revision 1.22 2002/10/14 16:45:56 rschmidt
- * Editorial changes (TWSI)
- *
- * Revision 1.21 2002/08/13 08:42:24 rschmidt
- * Changed define for SK_MIN_SENSORS back to 5
- * Merged defines for PHY PLL 3V3 voltage (A and B)
- * Editorial changes
- *
- * Revision 1.20 2002/08/06 09:43:56 jschmalz
- * Extensions and changes for Yukon
- *
- * Revision 1.19 2002/08/02 12:00:08 rschmidt
- * Added defines for YUKON sensors
- * Editorial changes
- *
- * Revision 1.18 2001/08/16 12:44:33 afischer
- * LM80 sensor init values corrected
- *
- * Revision 1.17 1999/11/22 13:55:25 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.16 1999/11/12 08:24:10 malthoff
- * Change voltage warning and error limits
- * (warning +-5%, error +-10%).
- *
- * Revision 1.15 1999/09/14 14:14:43 malthoff
- * The 1000BT Dual Link adapter has got only one Fan.
- * The second Fan has been removed.
- *
- * Revision 1.14 1999/05/27 13:40:50 malthoff
- * Fan Divisor = 1. Assuming fan with 6500 rpm.
- *
- * Revision 1.13 1999/05/20 14:56:55 malthoff
- * Bug Fix: Missing brace in SK_LM80_FAN_FAKTOR.
- *
- * Revision 1.12 1999/05/20 09:22:00 cgoos
- * Changes for 1000Base-T (Fan sensors).
- *
- * Revision 1.11 1998/10/14 05:57:22 cgoos
- * Fixed compilation warnings.
- *
- * Revision 1.10 1998/09/04 08:37:00 malthoff
- * bugfix: correct the SK_I2C_GET_CTL() macro.
- *
- * Revision 1.9 1998/08/25 06:10:03 gklug
- * add: thresholds for all sensors
- *
- * Revision 1.8 1998/08/20 11:37:42 gklug
- * chg: change Ioc to IoC
- *
- * Revision 1.7 1998/08/20 08:53:11 gklug
- * fix: compiler errors
- * add: Threshold values
- *
- * Revision 1.6 1998/08/17 11:37:09 malthoff
- * Bugfix in SK_I2C_CTL macro. The parameter 'dev'
- * has to be shifted 9 bits.
- *
- * Revision 1.5 1998/08/17 06:52:21 malthoff
- * Remove unrequired macros.
- * Add macros for accessing TWSI SW register.
- *
- * Revision 1.4 1998/08/13 08:30:18 gklug
- * add: conversion factors for read values
- * add: new state SEN_VALEXT to read extension value of temperature sensor
- *
- * Revision 1.3 1998/08/12 13:37:56 gklug
- * rmv: error numbers and messages
- *
- * Revision 1.2 1998/08/11 07:54:38 gklug
- * add: sensor states for GE sensors
- * add: Macro to access TWSI hardware register
- * chg: Error messages for TWSI errors
- *
- * Revision 1.1 1998/07/17 11:27:56 gklug
- * Created.
- *
- *
- *
- ******************************************************************************/
-
-/*
- * SKGEI2C.H contains all SK-98xx specific defines for the TWSI handling
- */
-
-#ifndef _INC_SKGEI2C_H_
-#define _INC_SKGEI2C_H_
-
-/*
- * Macros to access the B2_I2C_CTRL
- */
-#define SK_I2C_CTL(IoC, flag, dev, reg, burst) \
- SK_OUT32(IoC, B2_I2C_CTRL,\
- (flag ? 0x80000000UL : 0x0L) | \
- (((SK_U32) reg << 16) & I2C_ADDR) | \
- (((SK_U32) dev << 9) & I2C_DEV_SEL) | \
- (( burst << 4) & I2C_BURST_LEN))
-
-#define SK_I2C_STOP(IoC) { \
- SK_U32 I2cCtrl; \
- SK_IN32(IoC, B2_I2C_CTRL, &I2cCtrl); \
- SK_OUT32(IoC, B2_I2C_CTRL, I2cCtrl | I2C_STOP); \
-}
-
-#define SK_I2C_GET_CTL(IoC, pI2cCtrl) SK_IN32(IoC, B2_I2C_CTRL, pI2cCtrl)
-
-/*
- * Macros to access the TWSI SW Registers
- */
-#define SK_I2C_SET_BIT(IoC, SetBits) { \
- SK_U8 OrgBits; \
- SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
- SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SK_U8)(SetBits)); \
-}
-
-#define SK_I2C_CLR_BIT(IoC, ClrBits) { \
- SK_U8 OrgBits; \
- SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
- SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~((SK_U8)(ClrBits))); \
-}
-
-#define SK_I2C_GET_SW(IoC, pI2cSw) SK_IN8(IoC, B2_I2C_SW, pI2cSw)
-
-/*
- * define the possible sensor states
- */
-#define SK_SEN_IDLE 0 /* Idle: sensor not read */
-#define SK_SEN_VALUE 1 /* Value Read cycle */
-#define SK_SEN_VALEXT 2 /* Extended Value Read cycle */
-
-/*
- * Conversion factor to convert read Voltage sensor to milli Volt
- * Conversion factor to convert read Temperature sensor to 10th degree Celsius
- */
-#define SK_LM80_VT_LSB 22 /* 22mV LSB resolution */
-#define SK_LM80_TEMP_LSB 10 /* 1 degree LSB resolution */
-#define SK_LM80_TEMPEXT_LSB 5 /* 0.5 degree LSB resolution for the
- * extension value
- */
-#define SK_LM80_FAN_FAKTOR ((22500L*60)/(1*2))
-/* formula: counter = (22500*60)/(rpm * divisor * pulses/2)
- * assuming: 6500rpm, 4 pulses, divisor 1
- */
-
-/*
- * Define sensor management data
- * Maximum is reached on copperfield with dual Broadcom.
- * Board specific maximum is in pAC->I2c.MaxSens
- */
-#define SK_MAX_SENSORS 8 /* maximal no. of installed sensors */
-#define SK_MIN_SENSORS 5 /* minimal no. of installed sensors */
-
-/*
- * To watch the statemachine (JS) use the timer in two ways instead of one as hitherto
- */
-#define SK_TIMER_WATCH_STATEMACHINE 0 /* Watch the statemachine to finish in a specific time */
-#define SK_TIMER_NEW_GAUGING 1 /* Start a new gauging when timer expires */
-
-
-/*
- * Defines for the individual Thresholds
- */
-
-/* Temperature sensor */
-#define SK_SEN_TEMP_HIGH_ERR 800 /* Temperature High Err Threshold */
-#define SK_SEN_TEMP_HIGH_WARN 700 /* Temperature High Warn Threshold */
-#define SK_SEN_TEMP_LOW_WARN 100 /* Temperature Low Warn Threshold */
-#define SK_SEN_TEMP_LOW_ERR 0 /* Temperature Low Err Threshold */
-
-/* VCC which should be 5 V */
-#define SK_SEN_PCI_5V_HIGH_ERR 5588 /* Voltage PCI High Err Threshold */
-#define SK_SEN_PCI_5V_HIGH_WARN 5346 /* Voltage PCI High Warn Threshold */
-#define SK_SEN_PCI_5V_LOW_WARN 4664 /* Voltage PCI Low Warn Threshold */
-#define SK_SEN_PCI_5V_LOW_ERR 4422 /* Voltage PCI Low Err Threshold */
-
-/*
- * VIO may be 5 V or 3.3 V. Initialization takes two parts:
- * 1. Initialize lowest lower limit and highest higher limit.
- * 2. After the first value is read correct the upper or the lower limit to
- * the appropriate C constant.
- *
- * Warning limits are +-5% of the exepected voltage.
- * Error limits are +-10% of the expected voltage.
- */
-
-/* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
-
-#define SK_SEN_PCI_IO_5V_HIGH_ERR 5566 /* + 10% V PCI-IO High Err Threshold */
-#define SK_SEN_PCI_IO_5V_HIGH_WARN 5324 /* + 5% V PCI-IO High Warn Threshold */
- /* 5000 mVolt */
-#define SK_SEN_PCI_IO_5V_LOW_WARN 4686 /* - 5% V PCI-IO Low Warn Threshold */
-#define SK_SEN_PCI_IO_5V_LOW_ERR 4444 /* - 10% V PCI-IO Low Err Threshold */
-
-#define SK_SEN_PCI_IO_RANGE_LIMITER 4000 /* 4000 mV range delimiter */
-
-/* correction values for the second pass */
-#define SK_SEN_PCI_IO_3V3_HIGH_ERR 3850 /* + 15% V PCI-IO High Err Threshold */
-#define SK_SEN_PCI_IO_3V3_HIGH_WARN 3674 /* + 10% V PCI-IO High Warn Threshold */
- /* 3300 mVolt */
-#define SK_SEN_PCI_IO_3V3_LOW_WARN 2926 /* - 10% V PCI-IO Low Warn Threshold */
-#define SK_SEN_PCI_IO_3V3_LOW_ERR 2772 /* - 15% V PCI-IO Low Err Threshold */
-
-
-/*
- * VDD voltage
- */
-#define SK_SEN_VDD_HIGH_ERR 3630 /* Voltage ASIC High Err Threshold */
-#define SK_SEN_VDD_HIGH_WARN 3476 /* Voltage ASIC High Warn Threshold */
-#define SK_SEN_VDD_LOW_WARN 3146 /* Voltage ASIC Low Warn Threshold */
-#define SK_SEN_VDD_LOW_ERR 2970 /* Voltage ASIC Low Err Threshold */
-
-/*
- * PHY PLL 3V3 voltage
- */
-#define SK_SEN_PLL_3V3_HIGH_ERR 3630 /* Voltage PMA High Err Threshold */
-#define SK_SEN_PLL_3V3_HIGH_WARN 3476 /* Voltage PMA High Warn Threshold */
-#define SK_SEN_PLL_3V3_LOW_WARN 3146 /* Voltage PMA Low Warn Threshold */
-#define SK_SEN_PLL_3V3_LOW_ERR 2970 /* Voltage PMA Low Err Threshold */
-
-/*
- * VAUX (YUKON only)
- */
-#define SK_SEN_VAUX_3V3_HIGH_ERR 3630 /* Voltage VAUX High Err Threshold */
-#define SK_SEN_VAUX_3V3_HIGH_WARN 3476 /* Voltage VAUX High Warn Threshold */
-#define SK_SEN_VAUX_3V3_LOW_WARN 3146 /* Voltage VAUX Low Warn Threshold */
-#define SK_SEN_VAUX_3V3_LOW_ERR 2970 /* Voltage VAUX Low Err Threshold */
-#define SK_SEN_VAUX_0V_WARN_ERR 0 /* if VAUX not present */
-#define SK_SEN_VAUX_RANGE_LIMITER 1000 /* 1000 mV range delimiter */
-
-/*
- * PHY 2V5 voltage
- */
-#define SK_SEN_PHY_2V5_HIGH_ERR 2750 /* Voltage PHY High Err Threshold */
-#define SK_SEN_PHY_2V5_HIGH_WARN 2640 /* Voltage PHY High Warn Threshold */
-#define SK_SEN_PHY_2V5_LOW_WARN 2376 /* Voltage PHY Low Warn Threshold */
-#define SK_SEN_PHY_2V5_LOW_ERR 2222 /* Voltage PHY Low Err Threshold */
-
-/*
- * ASIC Core 1V5 voltage (YUKON only)
- */
-#define SK_SEN_CORE_1V5_HIGH_ERR 1650 /* Voltage ASIC Core High Err Threshold */
-#define SK_SEN_CORE_1V5_HIGH_WARN 1575 /* Voltage ASIC Core High Warn Threshold */
-#define SK_SEN_CORE_1V5_LOW_WARN 1425 /* Voltage ASIC Core Low Warn Threshold */
-#define SK_SEN_CORE_1V5_LOW_ERR 1350 /* Voltage ASIC Core Low Err Threshold */
-
-/*
- * FAN 1 speed
- */
-/* assuming: 6500rpm +-15%, 4 pulses,
- * warning at: 80 %
- * error at: 70 %
- * no upper limit
- */
-#define SK_SEN_FAN_HIGH_ERR 20000 /* FAN Speed High Err Threshold */
-#define SK_SEN_FAN_HIGH_WARN 20000 /* FAN Speed High Warn Threshold */
-#define SK_SEN_FAN_LOW_WARN 5200 /* FAN Speed Low Warn Threshold */
-#define SK_SEN_FAN_LOW_ERR 4550 /* FAN Speed Low Err Threshold */
-
-/*
- * Some Voltages need dynamic thresholds
- */
-#define SK_SEN_DYN_INIT_NONE 0 /* No dynamic init of thresholds */
-#define SK_SEN_DYN_INIT_PCI_IO 10 /* Init PCI-IO with new thresholds */
-#define SK_SEN_DYN_INIT_VAUX 11 /* Init VAUX with new thresholds */
-
-extern int SkLm80ReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
-#endif /* n_INC_SKGEI2C_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgeinit.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.75 $
- * Date: $Date: 2003/02/05 13:36:39 $
- * Purpose: Structures and prototypes for the GE Init Module
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgeinit.h,v $
- * Revision 1.75 2003/02/05 13:36:39 rschmidt
- * Added define SK_FACT_78 for YUKON's Host Clock of 78.12 MHz
- * Editorial changes
- *
- * Revision 1.74 2003/01/28 09:39:16 rschmidt
- * Added entry GIYukonLite in s_GeInit structure
- * Editorial changes
- *
- * Revision 1.73 2002/11/15 12:47:25 rschmidt
- * Replaced error message SKERR_HWI_E024 for Cable Diagnostic with
- * Rx queue error in SkGeStopPort().
- *
- * Revision 1.72 2002/11/12 17:08:35 rschmidt
- * Added entries for Cable Diagnostic to Port structure
- * Added entries GIPciSlot64 and GIPciClock66 in s_GeInit structure
- * Added error message for Cable Diagnostic
- * Added prototypes for SkGmCableDiagStatus()
- * Editorial changes
- *
- * Revision 1.71 2002/10/21 11:26:10 mkarl
- * Changed interface of SkGeInitAssignRamToQueues().
- *
- * Revision 1.70 2002/10/14 08:21:32 rschmidt
- * Changed type of GICopperType, GIVauxAvail to SK_BOOL
- * Added entry PRxOverCnt to Port structure
- * Added entry GIYukon32Bit in s_GeInit structure
- * Editorial changes
- *
- * Revision 1.69 2002/10/09 16:57:15 mkarl
- * Added some constants and macros for SkGeInitAssignRamToQueues().
- *
- * Revision 1.68 2002/09/12 08:58:51 rwahl
- * Retrieve counters needed for XMAC errata workarounds directly because
- * PNMI returns corrected counter values (e.g. #10620).
- *
- * Revision 1.67 2002/08/16 14:40:30 rschmidt
- * Added entries GIGenesis and GICopperType in s_GeInit structure
- * Added prototypes for SkMacHashing()
- * Editorial changes
- *
- * Revision 1.66 2002/08/12 13:27:21 rschmidt
- * Added defines for Link speed capabilities
- * Added entry PLinkSpeedCap to Port structure
- * Added entry GIVauxAvail in s_GeInit structure
- * Added prototypes for SkMacPromiscMode()
- * Editorial changes
- *
- * Revision 1.65 2002/08/08 15:46:18 rschmidt
- * Added define SK_PHY_ACC_TO for PHY access timeout
- * Added define SK_XM_RX_HI_WM for XMAC Rx High Watermark
- * Added define SK_MIN_TXQ_SIZE for Min RAM Buffer Tx Queue Size
- * Added entry PhyId1 to Port structure
- *
- * Revision 1.64 2002/07/23 16:02:56 rschmidt
- * Added entry GIWolOffs in s_GeInit struct (HW-Bug in YUKON 1st rev.)
- * Added prototypes for: SkGePhyRead(), SkGePhyWrite()
- *
- * Revision 1.63 2002/07/18 08:17:38 rwahl
- * Corrected definitions for SK_LSPEED_xxx & SK_LSPEED_STAT_xxx.
- *
- * Revision 1.62 2002/07/17 18:21:55 rwahl
- * Added SK_LSPEED_INDETERMINATED define.
- *
- * Revision 1.61 2002/07/17 17:16:03 rwahl
- * - MacType now member of GIni struct.
- * - Struct alignment to 32bit.
- * - Editorial change.
- *
- * Revision 1.60 2002/07/15 18:23:39 rwahl
- * Added GeMacFunc to GE Init structure.
- * Added prototypes for SkXmUpdateStats(), SkGmUpdateStats(),
- * SkXmMacStatistic(), SkGmMacStatistic(), SkXmResetCounter(),
- * SkGmResetCounter(), SkXmOverflowStatus(), SkGmOverflowStatus().
- * Added defines for current link speed state.
- * Added ERRMSG defintions for MacUpdateStat() & MacStatistics().
- *
- * Revision 1.59 2002/07/15 15:40:22 rschmidt
- * Added entry PLinkSpeedUsed to Port structure
- * Editorial changes
- *
- * Revision 1.58 2002/06/10 09:36:30 rschmidt
- * Editorial changes.
- *
- * Revision 1.57 2002/06/05 08:18:00 rschmidt
- * Corrected alignment in Port Structure
- * Added new prototypes for GMAC
- * Editorial changes
- *
- * Revision 1.56 2002/04/25 11:38:12 rschmidt
- * Added defines for Link speed values
- * Added defines for Loopback parameters for MAC and PHY
- * Removed entry PRxCmd from Port structure
- * Added entry PLinkSpeed to Port structure
- * Added entries GIChipId and GIChipRev to GE Init structure
- * Removed entry GIAnyPortAct from GE Init structure
- * Added prototypes for: SkMacInit(), SkMacInitPhy(),
- * SkMacRxTxDisable(), SkMacSoftRst(), SkMacHardRst(), SkMacIrq(),
- * SkMacIrqDisable(), SkMacFlushTxFifo(), SkMacFlushRxFifo(),
- * SkMacAutoNegDone(), SkMacAutoNegLipaPhy(), SkMacSetRxTxEn(),
- * SkXmPhyRead(), SkXmPhyRead(), SkGmPhyWrite(), SkGmPhyWrite();
- * Removed prototypes for static functions in SkXmac2.c
- * Editorial changes
- *
- * Revision 1.55 2002/02/26 15:24:53 rwahl
- * Fix: no link with manual configuration (#10673). The previous fix for
- * #10639 was removed. So for RLMT mode = CLS the RLMT may switch to
- * misconfigured port. It should not occur for the other RLMT modes.
- *
- * Revision 1.54 2002/01/18 16:52:52 rwahl
- * Editorial corrections.
- *
- * Revision 1.53 2001/11/20 09:19:58 rwahl
- * Reworked bugfix #10639 (no dependency to RLMT mode).
- *
- * Revision 1.52 2001/10/26 07:52:23 afischer
- * Port switching bug in `check local link` mode
- *
- * Revision 1.51 2001/02/09 12:26:38 cgoos
- * Inserted #ifdef DIAG for half duplex workaround timer.
- *
- * Revision 1.50 2001/02/07 07:56:40 rassmann
- * Corrected copyright.
- *
- * Revision 1.49 2001/01/31 15:32:18 gklug
- * fix: problem with autosensing an SR8800 switch
- * add: counter for autoneg timeouts
- *
- * Revision 1.48 2000/11/09 11:30:10 rassmann
- * WA: Waiting after releasing reset until BCom chip is accessible.
- *
- * Revision 1.47 2000/10/18 12:22:40 cgoos
- * Added workaround for half duplex hangup.
- *
- * Revision 1.46 2000/08/10 11:28:00 rassmann
- * Editorial changes.
- * Preserving 32-bit alignment in structs for the adapter context.
- *
- * Revision 1.45 1999/11/22 13:56:19 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.44 1999/10/26 07:34:15 malthoff
- * The define SK_LNK_ON has been lost in v1.41.
- *
- * Revision 1.43 1999/10/06 09:30:16 cgoos
- * Changed SK_XM_THR_JUMBO.
- *
- * Revision 1.42 1999/09/16 12:58:26 cgoos
- * Changed SK_LED_STANDY macro to be independent of HW link sync.
- *
- * Revision 1.41 1999/07/30 06:56:14 malthoff
- * Correct comment for SK_MS_STAT_UNSET.
- *
- * Revision 1.40 1999/05/27 13:38:46 cgoos
- * Added SK_BMU_TX_WM.
- * Made SK_BMU_TX_WM and SK_BMU_RX_WM user-definable.
- * Changed XMAC Tx treshold to max. values.
- *
- * Revision 1.39 1999/05/20 14:35:26 malthoff
- * Remove prototypes for SkGeLinkLED().
- *
- * Revision 1.38 1999/05/19 11:59:12 cgoos
- * Added SK_MS_CAP_INDETERMINATED define.
- *
- * Revision 1.37 1999/05/19 07:32:33 cgoos
- * Changes for 1000Base-T.
- * LED-defines for HWAC_LINK_LED macro.
- *
- * Revision 1.36 1999/04/08 14:00:24 gklug
- * add:Port struct field PLinkResCt
- *
- * Revision 1.35 1999/03/25 07:43:07 malthoff
- * Add error string for SKERR_HWI_E018MSG.
- *
- * Revision 1.34 1999/03/12 16:25:57 malthoff
- * Remove PPollRxD and PPollTxD.
- * Add SKERR_HWI_E017MSG. and SK_DPOLL_MAX.
- *
- * Revision 1.33 1999/03/12 13:34:41 malthoff
- * Add Autonegotiation error codes.
- * Change defines for parameter Mode in SkXmSetRxCmd().
- * Replace __STDC__ by SK_KR_PROTO.
- *
- * Revision 1.32 1999/01/25 14:40:20 mhaveman
- * Added new return states for the virtual management port if multiple
- * ports are active but differently configured.
- *
- * Revision 1.31 1998/12/11 15:17:02 gklug
- * add: Link partnet autoneg states : Unknown Manual and Auto-negotiation
- *
- * Revision 1.30 1998/12/07 12:17:04 gklug
- * add: Link Partner auto-negotiation flag
- *
- * Revision 1.29 1998/12/01 10:54:42 gklug
- * add: variables for XMAC Errata
- *
- * Revision 1.28 1998/12/01 10:14:15 gklug
- * add: PIsave saves the Interrupt status word
- *
- * Revision 1.27 1998/11/26 15:24:52 mhaveman
- * Added link status states SK_LMODE_STAT_AUTOHALF and
- * SK_LMODE_STAT_AUTOFULL which are used by PNMI.
- *
- * Revision 1.26 1998/11/26 14:53:01 gklug
- * add:autoNeg Timeout variable
- *
- * Revision 1.25 1998/11/26 08:58:50 gklug
- * add: Link Mode configuration (AUTO Sense mode)
- *
- * Revision 1.24 1998/11/24 13:30:27 gklug
- * add: PCheckPar to port struct
- *
- * Revision 1.23 1998/11/18 13:23:26 malthoff
- * Add SK_PKT_TO_MAX.
- *
- * Revision 1.22 1998/11/18 13:19:54 gklug
- * add: PPrevShorts and PLinkBroken to port struct for WA XMAC Errata #C1
- *
- * Revision 1.21 1998/10/26 08:02:57 malthoff
- * Add GIRamOffs.
- *
- * Revision 1.20 1998/10/19 07:28:37 malthoff
- * Add prototype for SkGeInitRamIface().
- *
- * Revision 1.19 1998/10/14 14:47:48 malthoff
- * SK_TIMER should not be defined for Diagnostics.
- * Add SKERR_HWI_E015MSG and SKERR_HWI_E016MSG.
- *
- * Revision 1.18 1998/10/14 14:00:03 gklug
- * add: timer to port struct for workaround of Errata #2
- *
- * Revision 1.17 1998/10/14 11:23:09 malthoff
- * Add prototype for SkXmAutoNegDone().
- * Fix SkXmSetRxCmd() prototype statement.
- *
- * Revision 1.16 1998/10/14 05:42:29 gklug
- * add: HWLinkUp flag to Port struct
- *
- * Revision 1.15 1998/10/09 08:26:33 malthoff
- * Rename SK_RB_ULPP_B to SK_RB_LLPP_B.
- *
- * Revision 1.14 1998/10/09 07:11:13 malthoff
- * bug fix: SK_FACT_53 is 85 not 117.
- * Rework time out init values.
- * Add GIPortUsage and corresponding defines.
- * Add some error log messages.
- *
- * Revision 1.13 1998/10/06 14:13:14 malthoff
- * Add prototype for SkGeLoadLnkSyncCnt().
- *
- * Revision 1.12 1998/10/05 11:29:53 malthoff
- * bug fix: A comment was not closed.
- *
- * Revision 1.11 1998/10/05 08:01:59 malthoff
- * Add default Timeout- Threshold- and
- * Watermark constants. Add QRam start and end
- * variables. Also add vars to store the polling
- * mode and receive command. Add new Error Log
- * Messages and function prototypes.
- *
- * Revision 1.10 1998/09/28 13:34:48 malthoff
- * Add mode bits for LED functions.
- * Move Autoneg and Flow Ctrl bits from shgesirq.h
- * Add the required Error Log Entries
- * and Function Prototypes.
- *
- * Revision 1.9 1998/09/16 14:38:41 malthoff
- * Rework the SK_LNK_xxx defines.
- * Add error log message defines.
- * Add prototypes for skxmac2.c
- *
- * Revision 1.8 1998/09/11 05:29:18 gklug
- * add: init state of a port
- *
- * Revision 1.7 1998/09/08 08:35:52 gklug
- * add: defines of the Init Levels
- *
- * Revision 1.6 1998/09/03 13:48:42 gklug
- * add: Link strati, capabilities to Port struct
- *
- * Revision 1.5 1998/09/03 13:30:59 malthoff
- * Add SK_LNK_BLINK and SK_LNK_PERM.
- *
- * Revision 1.4 1998/09/03 09:55:31 malthoff
- * Add constants for parameters Dir and RstMode
- * when calling SkGeStopPort().
- * Rework the prototype section.
- * Add Queue Address offsets PRxQOff, PXsQOff, and PXaQOff.
- * Remove Ioc with IoC.
- *
- * Revision 1.3 1998/08/19 09:11:54 gklug
- * fix: struct are removed from c-source (see CCC)
- * add: typedefs for all structs
- *
- * Revision 1.2 1998/07/28 12:38:26 malthoff
- * The prototypes got the parameter 'IoC'.
- *
- * Revision 1.1 1998/07/23 09:50:24 malthoff
- * Created.
- *
- ******************************************************************************/
-
-#ifndef __INC_SKGEINIT_H_
-#define __INC_SKGEINIT_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/* defines ********************************************************************/
-
-/* modifying Link LED behaviour (used with SkGeLinkLED()) */
-#define SK_LNK_OFF LED_OFF
-#define SK_LNK_ON (LED_ON | LED_BLK_OFF | LED_SYNC_OFF)
-#define SK_LNK_BLINK (LED_ON | LED_BLK_ON | LED_SYNC_ON)
-#define SK_LNK_PERM (LED_ON | LED_BLK_OFF | LED_SYNC_ON)
-#define SK_LNK_TST (LED_ON | LED_BLK_ON | LED_SYNC_OFF)
-
-/* parameter 'Mode' when calling SK_HWAC_LINK_LED() */
-#define SK_LED_OFF LED_OFF
-#define SK_LED_ACTIVE (LED_ON | LED_BLK_OFF | LED_SYNC_OFF)
-#define SK_LED_STANDBY (LED_ON | LED_BLK_ON | LED_SYNC_OFF)
-
-/* addressing LED Registers in SkGeXmitLED() */
-#define XMIT_LED_INI 0
-#define XMIT_LED_CNT (RX_LED_VAL - RX_LED_INI)
-#define XMIT_LED_CTRL (RX_LED_CTRL- RX_LED_INI)
-#define XMIT_LED_TST (RX_LED_TST - RX_LED_INI)
-
-/* parameter 'Mode' when calling SkGeXmitLED() */
-#define SK_LED_DIS 0
-#define SK_LED_ENA 1
-#define SK_LED_TST 2
-
-/* Counter and Timer constants, for a host clock of 62.5 MHz */
-#define SK_XMIT_DUR 0x002faf08L /* 50 ms */
-#define SK_BLK_DUR 0x01dcd650L /* 500 ms */
-
-#define SK_DPOLL_DEF 0x00ee6b28L /* 250 ms at 62.5 MHz */
-
-#define SK_DPOLL_MAX 0x00ffffffL /* 268 ms at 62.5 MHz */
- /* 215 ms at 78.12 MHz */
-
-#define SK_FACT_62 100 /* is given in percent */
-#define SK_FACT_53 85 /* on GENESIS: 53.12 MHz */
-#define SK_FACT_78 125 /* on YUKON: 78.12 MHz */
-
-/* Timeout values */
-#define SK_MAC_TO_53 72 /* MAC arbiter timeout */
-#define SK_PKT_TO_53 0x2000 /* Packet arbiter timeout */
-#define SK_PKT_TO_MAX 0xffff /* Maximum value */
-#define SK_RI_TO_53 36 /* RAM interface timeout */
-
-#define SK_PHY_ACC_TO 600000 /* PHY access timeout */
-
-/* RAM Buffer High Pause Threshold values */
-#define SK_RB_ULPP ( 8 * 1024) /* Upper Level in kB/8 */
-#define SK_RB_LLPP_S (10 * 1024) /* Lower Level for small Queues */
-#define SK_RB_LLPP_B (16 * 1024) /* Lower Level for big Queues */
-
-#ifndef SK_BMU_RX_WM
-#define SK_BMU_RX_WM 0x600 /* BMU Rx Watermark */
-#endif
-#ifndef SK_BMU_TX_WM
-#define SK_BMU_TX_WM 0x600 /* BMU Tx Watermark */
-#endif
-
-/* XMAC II Rx High Watermark */
-#define SK_XM_RX_HI_WM 0x05aa /* 1450 */
-
-/* XMAC II Tx Threshold */
-#define SK_XM_THR_REDL 0x01fb /* .. for redundant link usage */
-#define SK_XM_THR_SL 0x01fb /* .. for single link adapters */
-#define SK_XM_THR_MULL 0x01fb /* .. for multiple link usage */
-#define SK_XM_THR_JUMBO 0x03fc /* .. for jumbo frame usage */
-
-/* values for GIPortUsage */
-#define SK_RED_LINK 1 /* redundant link usage */
-#define SK_MUL_LINK 2 /* multiple link usage */
-#define SK_JUMBO_LINK 3 /* driver uses jumbo frames */
-
-/* Minimum RAM Buffer Rx Queue Size */
-#define SK_MIN_RXQ_SIZE 16 /* 16 kB */
-
-/* Minimum RAM Buffer Tx Queue Size */
-#define SK_MIN_TXQ_SIZE 16 /* 16 kB */
-
-/* Queue Size units */
-#define QZ_UNITS 0x7
-#define QZ_STEP 8
-
-/* Percentage of queue size from whole memory */
-/* 80 % for receive */
-#define RAM_QUOTA_RX 80L
-/* 0% for sync transfer */
-#define RAM_QUOTA_SYNC 0L
-/* the rest (20%) is taken for async transfer */
-
-/* Get the rounded queue size in Bytes in 8k steps */
-#define ROUND_QUEUE_SIZE(SizeInBytes) \
- ((((unsigned long) (SizeInBytes) + (QZ_STEP*1024L)-1) / 1024) & \
- ~(QZ_STEP-1))
-
-/* Get the rounded queue size in KBytes in 8k steps */
-#define ROUND_QUEUE_SIZE_KB(Kilobytes) \
- ROUND_QUEUE_SIZE((Kilobytes) * 1024L)
-
-/* Types of RAM Buffer Queues */
-#define SK_RX_SRAM_Q 1 /* small receive queue */
-#define SK_RX_BRAM_Q 2 /* big receive queue */
-#define SK_TX_RAM_Q 3 /* small or big transmit queue */
-
-/* parameter 'Dir' when calling SkGeStopPort() */
-#define SK_STOP_TX 1 /* Stops the transmit path, resets the XMAC */
-#define SK_STOP_RX 2 /* Stops the receive path */
-#define SK_STOP_ALL 3 /* Stops Rx and Tx path, resets the XMAC */
-
-/* parameter 'RstMode' when calling SkGeStopPort() */
-#define SK_SOFT_RST 1 /* perform a software reset */
-#define SK_HARD_RST 2 /* perform a hardware reset */
-
-/* Init Levels */
-#define SK_INIT_DATA 0 /* Init level 0: init data structures */
-#define SK_INIT_IO 1 /* Init level 1: init with IOs */
-#define SK_INIT_RUN 2 /* Init level 2: init for run time */
-
-/* Link Mode Parameter */
-#define SK_LMODE_HALF 1 /* Half Duplex Mode */
-#define SK_LMODE_FULL 2 /* Full Duplex Mode */
-#define SK_LMODE_AUTOHALF 3 /* AutoHalf Duplex Mode */
-#define SK_LMODE_AUTOFULL 4 /* AutoFull Duplex Mode */
-#define SK_LMODE_AUTOBOTH 5 /* AutoBoth Duplex Mode */
-#define SK_LMODE_AUTOSENSE 6 /* configured mode auto sensing */
-#define SK_LMODE_INDETERMINATED 7 /* indeterminated */
-
-/* Auto-negotiation timeout in 100ms granularity */
-#define SK_AND_MAX_TO 6 /* Wait 600 msec before link comes up */
-
-/* Auto-negotiation error codes */
-#define SK_AND_OK 0 /* no error */
-#define SK_AND_OTHER 1 /* other error than below */
-#define SK_AND_DUP_CAP 2 /* Duplex capabilities error */
-
-
-/* Link Speed Capabilities */
-#define SK_LSPEED_CAP_AUTO (1<<0) /* Automatic resolution */
-#define SK_LSPEED_CAP_10MBPS (1<<1) /* 10 Mbps */
-#define SK_LSPEED_CAP_100MBPS (1<<2) /* 100 Mbps */
-#define SK_LSPEED_CAP_1000MBPS (1<<3) /* 1000 Mbps */
-#define SK_LSPEED_CAP_INDETERMINATED (1<<4) /* indeterminated */
-
-/* Link Speed Parameter */
-#define SK_LSPEED_AUTO 1 /* Automatic resolution */
-#define SK_LSPEED_10MBPS 2 /* 10 Mbps */
-#define SK_LSPEED_100MBPS 3 /* 100 Mbps */
-#define SK_LSPEED_1000MBPS 4 /* 1000 Mbps */
-#define SK_LSPEED_INDETERMINATED 5 /* indeterminated */
-
-/* Link Speed Current State */
-#define SK_LSPEED_STAT_UNKNOWN 1
-#define SK_LSPEED_STAT_10MBPS 2
-#define SK_LSPEED_STAT_100MBPS 3
-#define SK_LSPEED_STAT_1000MBPS 4
-#define SK_LSPEED_STAT_INDETERMINATED 5
-
-
-/* Link Capability Parameter */
-#define SK_LMODE_CAP_HALF (1<<0) /* Half Duplex Mode */
-#define SK_LMODE_CAP_FULL (1<<1) /* Full Duplex Mode */
-#define SK_LMODE_CAP_AUTOHALF (1<<2) /* AutoHalf Duplex Mode */
-#define SK_LMODE_CAP_AUTOFULL (1<<3) /* AutoFull Duplex Mode */
-#define SK_LMODE_CAP_INDETERMINATED (1<<4) /* indeterminated */
-
-/* Link Mode Current State */
-#define SK_LMODE_STAT_UNKNOWN 1 /* Unknown Duplex Mode */
-#define SK_LMODE_STAT_HALF 2 /* Half Duplex Mode */
-#define SK_LMODE_STAT_FULL 3 /* Full Duplex Mode */
-#define SK_LMODE_STAT_AUTOHALF 4 /* Half Duplex Mode obtained by Auto-Neg */
-#define SK_LMODE_STAT_AUTOFULL 5 /* Full Duplex Mode obtained by Auto-Neg */
-#define SK_LMODE_STAT_INDETERMINATED 6 /* indeterminated */
-
-/* Flow Control Mode Parameter (and capabilities) */
-#define SK_FLOW_MODE_NONE 1 /* No Flow-Control */
-#define SK_FLOW_MODE_LOC_SEND 2 /* Local station sends PAUSE */
-#define SK_FLOW_MODE_SYMMETRIC 3 /* Both stations may send PAUSE */
-#define SK_FLOW_MODE_SYM_OR_REM 4 /* Both stations may send PAUSE or
- * just the remote station may send PAUSE
- */
-#define SK_FLOW_MODE_INDETERMINATED 5 /* indeterminated */
-
-/* Flow Control Status Parameter */
-#define SK_FLOW_STAT_NONE 1 /* No Flow Control */
-#define SK_FLOW_STAT_REM_SEND 2 /* Remote Station sends PAUSE */
-#define SK_FLOW_STAT_LOC_SEND 3 /* Local station sends PAUSE */
-#define SK_FLOW_STAT_SYMMETRIC 4 /* Both station may send PAUSE */
-#define SK_FLOW_STAT_INDETERMINATED 5 /* indeterminated */
-
-/* Master/Slave Mode Capabilities */
-#define SK_MS_CAP_AUTO (1<<0) /* Automatic resolution */
-#define SK_MS_CAP_MASTER (1<<1) /* This station is master */
-#define SK_MS_CAP_SLAVE (1<<2) /* This station is slave */
-#define SK_MS_CAP_INDETERMINATED (1<<3) /* indeterminated */
-
-/* Set Master/Slave Mode Parameter (and capabilities) */
-#define SK_MS_MODE_AUTO 1 /* Automatic resolution */
-#define SK_MS_MODE_MASTER 2 /* This station is master */
-#define SK_MS_MODE_SLAVE 3 /* This station is slave */
-#define SK_MS_MODE_INDETERMINATED 4 /* indeterminated */
-
-/* Master/Slave Status Parameter */
-#define SK_MS_STAT_UNSET 1 /* The M/S status is not set */
-#define SK_MS_STAT_MASTER 2 /* This station is Master */
-#define SK_MS_STAT_SLAVE 3 /* This station is Dlave */
-#define SK_MS_STAT_FAULT 4 /* M/S resolution failed */
-#define SK_MS_STAT_INDETERMINATED 5 /* indeterminated */
-
-/* parameter 'Mode' when calling SkXmSetRxCmd() */
-#define SK_STRIP_FCS_ON (1<<0) /* Enable FCS stripping of Rx frames */
-#define SK_STRIP_FCS_OFF (1<<1) /* Disable FCS stripping of Rx frames */
-#define SK_STRIP_PAD_ON (1<<2) /* Enable pad byte stripping of Rx fr */
-#define SK_STRIP_PAD_OFF (1<<3) /* Disable pad byte stripping of Rx fr */
-#define SK_LENERR_OK_ON (1<<4) /* Don't chk fr for in range len error */
-#define SK_LENERR_OK_OFF (1<<5) /* Check frames for in range len error */
-#define SK_BIG_PK_OK_ON (1<<6) /* Don't set Rx Error bit for big frames */
-#define SK_BIG_PK_OK_OFF (1<<7) /* Set Rx Error bit for big frames */
-#define SK_SELF_RX_ON (1<<8) /* Enable Rx of own packets */
-#define SK_SELF_RX_OFF (1<<9) /* Disable Rx of own packets */
-
-/* parameter 'Para' when calling SkMacSetRxTxEn() */
-#define SK_MAC_LOOPB_ON (1<<0) /* Enable MAC Loopback Mode */
-#define SK_MAC_LOOPB_OFF (1<<1) /* Disable MAC Loopback Mode */
-#define SK_PHY_LOOPB_ON (1<<2) /* Enable PHY Loopback Mode */
-#define SK_PHY_LOOPB_OFF (1<<3) /* Disable PHY Loopback Mode */
-#define SK_PHY_FULLD_ON (1<<4) /* Enable GMII Full Duplex */
-#define SK_PHY_FULLD_OFF (1<<5) /* Disable GMII Full Duplex */
-
-/* States of PState */
-#define SK_PRT_RESET 0 /* the port is reset */
-#define SK_PRT_STOP 1 /* the port is stopped (similar to SW reset) */
-#define SK_PRT_INIT 2 /* the port is initialized */
-#define SK_PRT_RUN 3 /* the port has an active link */
-
-/* Default receive frame limit for Workaround of XMAC Errata */
-#define SK_DEF_RX_WA_LIM SK_CONSTU64(100)
-
-/* Link Partner Status */
-#define SK_LIPA_UNKNOWN 0 /* Link partner is in unknown state */
-#define SK_LIPA_MANUAL 1 /* Link partner is in detected manual state */
-#define SK_LIPA_AUTO 2 /* Link partner is in auto-negotiation state */
-
-/* Maximum Restarts before restart is ignored (3Com WA) */
-#define SK_MAX_LRESTART 3 /* Max. 3 times the link is restarted */
-
-/* Max. Auto-neg. timeouts before link detection in sense mode is reset */
-#define SK_MAX_ANEG_TO 10 /* Max. 10 times the sense mode is reset */
-
-/* structures *****************************************************************/
-
-/*
- * MAC specific functions
- */
-typedef struct s_GeMacFunc {
- int (*pFnMacUpdateStats)(SK_AC *pAC, SK_IOC IoC, unsigned int Port);
- int (*pFnMacStatistic)(SK_AC *pAC, SK_IOC IoC, unsigned int Port,
- SK_U16 StatAddr, SK_U32 *pVal);
- int (*pFnMacResetCounter)(SK_AC *pAC, SK_IOC IoC, unsigned int Port);
- int (*pFnMacOverflow)(SK_AC *pAC, SK_IOC IoC, unsigned int Port,
- SK_U16 IStatus, SK_U64 *pVal);
-} SK_GEMACFUNC;
-
-/*
- * Port Structure
- */
-typedef struct s_GePort {
-#ifndef SK_DIAG
- SK_TIMER PWaTimer; /* Workaround Timer */
- SK_TIMER HalfDupChkTimer;
-#endif /* SK_DIAG */
- SK_U32 PPrevShorts; /* Previous short Counter checking */
- SK_U32 PPrevFcs; /* Previous FCS Error Counter checking */
- SK_U64 PPrevRx; /* Previous RxOk Counter checking */
- SK_U64 PRxLim; /* Previous RxOk Counter checking */
- SK_U64 LastOctets; /* For half duplex hang check */
- int PLinkResCt; /* Link Restart Counter */
- int PAutoNegTimeOut;/* Auto-negotiation timeout current value */
- int PAutoNegTOCt; /* Auto-negotiation Timeout Counter */
- int PRxQSize; /* Port Rx Queue Size in kB */
- int PXSQSize; /* Port Synchronous Transmit Queue Size in kB */
- int PXAQSize; /* Port Asynchronous Transmit Queue Size in kB */
- SK_U32 PRxQRamStart; /* Receive Queue RAM Buffer Start Address */
- SK_U32 PRxQRamEnd; /* Receive Queue RAM Buffer End Address */
- SK_U32 PXsQRamStart; /* Sync Tx Queue RAM Buffer Start Address */
- SK_U32 PXsQRamEnd; /* Sync Tx Queue RAM Buffer End Address */
- SK_U32 PXaQRamStart; /* Async Tx Queue RAM Buffer Start Address */
- SK_U32 PXaQRamEnd; /* Async Tx Queue RAM Buffer End Address */
- SK_U32 PRxOverCnt; /* Receive Overflow Counter */
- int PRxQOff; /* Rx Queue Address Offset */
- int PXsQOff; /* Synchronous Tx Queue Address Offset */
- int PXaQOff; /* Asynchronous Tx Queue Address Offset */
- int PhyType; /* PHY used on this port */
- SK_U16 PhyId1; /* PHY Id1 on this port */
- SK_U16 PhyAddr; /* MDIO/MDC PHY address */
- SK_U16 PIsave; /* Saved Interrupt status word */
- SK_U16 PSsave; /* Saved PHY status word */
- SK_BOOL PHWLinkUp; /* The hardware Link is up (wiring) */
- SK_BOOL PState; /* Is port initialized ? */
- SK_BOOL PLinkBroken; /* Is Link broken ? */
- SK_BOOL PCheckPar; /* Do we check for parity errors ? */
- SK_BOOL HalfDupTimerActive;
- SK_U8 PLinkCap; /* Link Capabilities */
- SK_U8 PLinkModeConf; /* Link Mode configured */
- SK_U8 PLinkMode; /* Link Mode currently used */
- SK_U8 PLinkModeStatus;/* Link Mode Status */
- SK_U8 PLinkSpeedCap; /* Link Speed Capabilities(10/100/1000 Mbps) */
- SK_U8 PLinkSpeed; /* configured Link Speed (10/100/1000 Mbps) */
- SK_U8 PLinkSpeedUsed; /* current Link Speed (10/100/1000 Mbps) */
- SK_U8 PFlowCtrlCap; /* Flow Control Capabilities */
- SK_U8 PFlowCtrlMode; /* Flow Control Mode */
- SK_U8 PFlowCtrlStatus;/* Flow Control Status */
- SK_U8 PMSCap; /* Master/Slave Capabilities */
- SK_U8 PMSMode; /* Master/Slave Mode */
- SK_U8 PMSStatus; /* Master/Slave Status */
- SK_U8 PAutoNegFail; /* Auto-negotiation fail flag */
- SK_U8 PLipaAutoNeg; /* Auto-negotiation possible with Link Partner */
- SK_U8 PCableLen; /* Cable Length */
- SK_U8 PMdiPairLen[4]; /* MDI[0..3] Pair Length */
- SK_U8 PMdiPairSts[4]; /* MDI[0..3] Pair Diagnostic Status */
-} SK_GEPORT;
-
-/*
- * Gigabit Ethernet Initialization Struct
- * (has to be included in the adapter context)
- */
-typedef struct s_GeInit {
- SK_U8 GIPciHwRev; /* PCI HW Revision Number */
- SK_U8 GIChipId; /* Chip Identification Number */
- SK_U8 GIChipRev; /* Chip Revision Number */
- SK_BOOL GIGenesis; /* Genesis adapter ? */
- SK_BOOL GICopperType; /* Copper Type adapter ? */
- SK_BOOL GIPciSlot64; /* 64-bit PCI Slot */
- SK_BOOL GIPciClock66; /* 66 MHz PCI Clock */
- SK_BOOL GIVauxAvail; /* VAUX available (YUKON) */
- SK_BOOL GIYukon32Bit; /* 32-Bit YUKON adapter */
- SK_BOOL GIYukonLite; /* YUKON-Lite chip */
- int GIMacsFound; /* Number of MACs found on this adapter */
- int GIMacType; /* MAC Type used on this adapter */
- int GIHstClkFact; /* Host Clock Factor (62.5 / HstClk * 100) */
- int GIPortUsage; /* Driver Port Usage */
- int GILevel; /* Initialization Level completed */
- int GIRamSize; /* The RAM size of the adapter in kB */
- int GIWolOffs; /* WOL Register Offset (HW-Bug in Rev. A) */
- SK_U32 GIRamOffs; /* RAM Address Offset for addr calculation */
- SK_U32 GIPollTimerVal; /* Descr. Poll Timer Init Val (HstClk ticks) */
- SK_GEPORT GP[SK_MAX_MACS];/* Port Dependent Information */
- SK_GEMACFUNC GIFunc; /* MAC depedent functions */
-} SK_GEINIT;
-
-/*
- * Error numbers and messages for skxmac2.c and skgeinit.c
- */
-#define SKERR_HWI_E001 (SK_ERRBASE_HWINIT)
-#define SKERR_HWI_E001MSG "SkXmClrExactAddr() has got illegal parameters"
-#define SKERR_HWI_E002 (SKERR_HWI_E001+1)
-#define SKERR_HWI_E002MSG "SkGeInit(): Level 1 call missing"
-#define SKERR_HWI_E003 (SKERR_HWI_E002+1)
-#define SKERR_HWI_E003MSG "SkGeInit() called with illegal init Level"
-#define SKERR_HWI_E004 (SKERR_HWI_E003+1)
-#define SKERR_HWI_E004MSG "SkGeInitPort(): Queue Size illegal configured"
-#define SKERR_HWI_E005 (SKERR_HWI_E004+1)
-#define SKERR_HWI_E005MSG "SkGeInitPort(): cannot init running ports"
-#define SKERR_HWI_E006 (SKERR_HWI_E005+1)
-#define SKERR_HWI_E006MSG "SkGeMacInit(): PState does not match HW state"
-#define SKERR_HWI_E007 (SKERR_HWI_E006+1)
-#define SKERR_HWI_E007MSG "SkXmInitDupMd() called with invalid Dup Mode"
-#define SKERR_HWI_E008 (SKERR_HWI_E007+1)
-#define SKERR_HWI_E008MSG "SkXmSetRxCmd() called with invalid Mode"
-#define SKERR_HWI_E009 (SKERR_HWI_E008+1)
-#define SKERR_HWI_E009MSG "SkGeCfgSync() called although PXSQSize zero"
-#define SKERR_HWI_E010 (SKERR_HWI_E009+1)
-#define SKERR_HWI_E010MSG "SkGeCfgSync() called with invalid parameters"
-#define SKERR_HWI_E011 (SKERR_HWI_E010+1)
-#define SKERR_HWI_E011MSG "SkGeInitPort(): Receive Queue Size too small"
-#define SKERR_HWI_E012 (SKERR_HWI_E011+1)
-#define SKERR_HWI_E012MSG "SkGeInitPort(): invalid Queue Size specified"
-#define SKERR_HWI_E013 (SKERR_HWI_E012+1)
-#define SKERR_HWI_E013MSG "SkGeInitPort(): cfg changed for running queue"
-#define SKERR_HWI_E014 (SKERR_HWI_E013+1)
-#define SKERR_HWI_E014MSG "SkGeInitPort(): unknown GIPortUsage specified"
-#define SKERR_HWI_E015 (SKERR_HWI_E014+1)
-#define SKERR_HWI_E015MSG "Illegal Link mode parameter"
-#define SKERR_HWI_E016 (SKERR_HWI_E015+1)
-#define SKERR_HWI_E016MSG "Illegal Flow control mode parameter"
-#define SKERR_HWI_E017 (SKERR_HWI_E016+1)
-#define SKERR_HWI_E017MSG "Illegal value specified for GIPollTimerVal"
-#define SKERR_HWI_E018 (SKERR_HWI_E017+1)
-#define SKERR_HWI_E018MSG "FATAL: SkGeStopPort() does not terminate (Tx)"
-#define SKERR_HWI_E019 (SKERR_HWI_E018+1)
-#define SKERR_HWI_E019MSG "Illegal Speed parameter"
-#define SKERR_HWI_E020 (SKERR_HWI_E019+1)
-#define SKERR_HWI_E020MSG "Illegal Master/Slave parameter"
-#define SKERR_HWI_E021 (SKERR_HWI_E020+1)
-#define SKERR_HWI_E021MSG "MacUpdateStats(): cannot update statistic counter"
-#define SKERR_HWI_E022 (SKERR_HWI_E021+1)
-#define SKERR_HWI_E022MSG "MacStatistic(): illegal statistic base address"
-#define SKERR_HWI_E023 (SKERR_HWI_E022+1)
-#define SKERR_HWI_E023MSG "SkGeInitPort(): Transmit Queue Size too small"
-#define SKERR_HWI_E024 (SKERR_HWI_E023+1)
-#define SKERR_HWI_E024MSG "FATAL: SkGeStopPort() does not terminate (Rx)"
-#define SKERR_HWI_E025 (SKERR_HWI_E024+1)
-#define SKERR_HWI_E025MSG ""
-
-/* function prototypes ********************************************************/
-
-#ifndef SK_KR_PROTO
-
-/*
- * public functions in skgeinit.c
- */
-extern void SkGePollRxD(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL PollRxD);
-
-extern void SkGePollTxD(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL PollTxD);
-
-extern void SkGeYellowLED(
- SK_AC *pAC,
- SK_IOC IoC,
- int State);
-
-extern int SkGeCfgSync(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_U32 IntTime,
- SK_U32 LimCount,
- int SyncMode);
-
-extern void SkGeLoadLnkSyncCnt(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_U32 CntVal);
-
-extern void SkGeStopPort(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Dir,
- int RstMode);
-
-extern int SkGeInit(
- SK_AC *pAC,
- SK_IOC IoC,
- int Level);
-
-extern void SkGeDeInit(
- SK_AC *pAC,
- SK_IOC IoC);
-
-extern int SkGeInitPort(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkGeXmitLED(
- SK_AC *pAC,
- SK_IOC IoC,
- int Led,
- int Mode);
-
-extern void SkGeInitRamIface(
- SK_AC *pAC,
- SK_IOC IoC);
-
-extern int SkGeInitAssignRamToQueues(
- SK_AC *pAC,
- int ActivePort,
- SK_BOOL DualNet);
-
-/*
- * public functions in skxmac2.c
- */
-extern void SkMacRxTxDisable(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacSoftRst(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacHardRst(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkXmInitMac(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkGmInitMac(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacInitPhy(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL DoLoop);
-
-extern void SkMacIrqDisable(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacFlushTxFifo(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacFlushRxFifo(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacIrq(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern int SkMacAutoNegDone(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacAutoNegLipaPhy(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_U16 IStatus);
-
-extern void SkMacSetRxTxEn(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Para);
-
-extern int SkMacRxTxEnable(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkMacPromiscMode(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL Enable);
-
-extern void SkMacHashing(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL Enable);
-
-extern void SkXmPhyRead(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Addr,
- SK_U16 *pVal);
-
-extern void SkXmPhyWrite(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Addr,
- SK_U16 Val);
-
-extern void SkGmPhyRead(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Addr,
- SK_U16 *pVal);
-
-extern void SkGmPhyWrite(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Addr,
- SK_U16 Val);
-
-extern void SkGePhyRead(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Addr,
- SK_U16 *pVal);
-
-extern void SkGePhyWrite(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Addr,
- SK_U16 Val);
-
-extern void SkXmClrExactAddr(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int StartNum,
- int StopNum);
-
-extern void SkXmInitDupMd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkXmInitPauseMd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkXmAutoNegLipaXmac(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_U16 IStatus);
-
-extern int SkXmUpdateStats(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port);
-
-extern int SkGmUpdateStats(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port);
-
-extern int SkXmMacStatistic(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port,
- SK_U16 StatAddr,
- SK_U32 *pVal);
-
-extern int SkGmMacStatistic(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port,
- SK_U16 StatAddr,
- SK_U32 *pVal);
-
-extern int SkXmResetCounter(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port);
-
-extern int SkGmResetCounter(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port);
-
-extern int SkXmOverflowStatus(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port,
- SK_U16 IStatus,
- SK_U64 *pStatus);
-
-extern int SkGmOverflowStatus(
- SK_AC *pAC,
- SK_IOC IoC,
- unsigned int Port,
- SK_U16 MacStatus,
- SK_U64 *pStatus);
-
-extern int SkGmCableDiagStatus(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL StartTest);
-
-#ifdef SK_DIAG
-extern void SkMacSetRxCmd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Mode);
-extern void SkMacCrcGener(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL Enable);
-extern void SkMacTimeStamp(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL Enable);
-extern void SkXmSendCont(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL Enable);
-#endif /* SK_DIAG */
-
-#else /* SK_KR_PROTO */
-
-/*
- * public functions in skgeinit.c
- */
-extern void SkGePollRxD();
-extern void SkGePollTxD();
-extern void SkGeYellowLED();
-extern int SkGeCfgSync();
-extern void SkGeLoadLnkSyncCnt();
-extern void SkGeStopPort();
-extern int SkGeInit();
-extern void SkGeDeInit();
-extern int SkGeInitPort();
-extern void SkGeXmitLED();
-extern void SkGeInitRamIface();
-extern int SkGeInitAssignRamToQueues();
-
-/*
- * public functions in skxmac2.c
- */
-extern void SkMacRxTxDisable();
-extern void SkMacSoftRst();
-extern void SkMacHardRst();
-extern void SkMacInitPhy();
-extern int SkMacRxTxEnable();
-extern void SkMacPromiscMode();
-extern void SkMacHashing();
-extern void SkMacIrqDisable();
-extern void SkMacFlushTxFifo();
-extern void SkMacFlushRxFifo();
-extern void SkMacIrq();
-extern int SkMacAutoNegDone();
-extern void SkMacAutoNegLipaPhy();
-extern void SkMacSetRxTxEn();
-extern void SkGePhyRead();
-extern void SkGePhyWrite();
-extern void SkXmInitMac();
-extern void SkXmPhyRead();
-extern void SkXmPhyWrite();
-extern void SkGmInitMac();
-extern void SkGmPhyRead();
-extern void SkGmPhyWrite();
-extern void SkXmClrExactAddr();
-extern void SkXmInitDupMd();
-extern void SkXmInitPauseMd();
-extern void SkXmAutoNegLipaXmac();
-extern int SkXmUpdateStats();
-extern int SkGmUpdateStats();
-extern int SkXmMacStatistic();
-extern int SkGmMacStatistic();
-extern int SkXmResetCounter();
-extern int SkGmResetCounter();
-extern int SkXmOverflowStatus();
-extern int SkGmOverflowStatus();
-extern int SkGmCableDiagStatus();
-
-#ifdef SK_DIAG
-extern void SkMacSetRxCmd();
-extern void SkMacCrcGener();
-extern void SkMacTimeStamp();
-extern void SkXmSendCont();
-#endif /* SK_DIAG */
-
-#endif /* SK_KR_PROTO */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __INC_SKGEINIT_H_ */
+++ /dev/null
-/*****************************************************************************
- *
- * Name: skgepnm2.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.34 $
- * Date: $Date: 2002/12/16 09:05:18 $
- * Purpose: Defines for Private Network Management Interface
- *
- ****************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/*****************************************************************************
- *
- * History:
- *
- * $Log: skgepnm2.h,v $
- * Revision 1.34 2002/12/16 09:05:18 tschilli
- * Code for VCT handling added.
- *
- * Revision 1.33 2002/09/10 09:00:03 rwahl
- * Adapted boolean definitions according sktypes.
- *
- * Revision 1.32 2002/08/09 09:47:01 rwahl
- * Added write-only flag to oid access defines.
- * Editorial changes.
- *
- * Revision 1.31 2002/07/17 19:23:18 rwahl
- * - Replaced MAC counter definitions by enumeration.
- * - Added definition SK_PNMI_MAC_TYPES.
- * - Added chipset defnition for Yukon.
- *
- * Revision 1.30 2001/02/06 10:03:41 mkunz
- * - Pnmi V4 dual net support added. Interface functions and macros extended
- * - Vpd bug fixed
- * - OID_SKGE_MTU added
- *
- * Revision 1.29 2001/01/22 13:41:37 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.28 2000/08/03 15:12:48 rwahl
- * - Additional comment for MAC statistic data structure.
- *
- * Revision 1.27 2000/08/01 16:10:18 rwahl
- * - Added mac statistic data structure for StatRxLongFrame counter.
- *
- * Revision 1.26 2000/03/31 13:51:34 rwahl
- * Added SK_UPTR cast to offset calculation for PNMI struct fields;
- * missing cast caused compiler warnings by Win64 compiler.
- *
- * Revision 1.25 1999/11/22 13:57:41 cgoos
- * Changed license header to GPL.
- * Allowing overwrite for SK_PNMI_STORE/_READ defines.
- *
- * Revision 1.24 1999/04/13 15:11:11 mhaveman
- * Changed copyright.
- *
- * Revision 1.23 1999/01/28 15:07:12 mhaveman
- * Changed default threshold for port switches per hour from 10
- * to 240 which means 4 switches per minute. This fits better
- * the granularity of 32 for the port switch estimate
- * counter.
- *
- * Revision 1.22 1999/01/05 12:52:30 mhaveman
- * Removed macro SK_PNMI_MICRO_SEC.
- *
- * Revision 1.21 1999/01/05 12:50:34 mhaveman
- * Enlarged macro definition SK_PNMI_HUNDREDS_SEC() so that no 64-bit
- * arithmetic is necessary if SK_TICKS_PER_SEC is 100.
- *
- * Revision 1.20 1998/12/09 14:02:53 mhaveman
- * Defined macro SK_PNMI_DEF_RLMT_CHG_THRES for default port switch
- * threshold.
- *
- * Revision 1.19 1998/12/03 11:28:41 mhaveman
- * Removed SK_PNMI_CHECKPTR macro.
- *
- * Revision 1.18 1998/12/03 11:21:00 mhaveman
- * -Added pointer check macro SK_PNMI_CHECKPTR
- * -Added macros SK_PNMI_VPD_ARR_SIZE and SK_PNMI_VPD_STR_SIZE for
- * VPD key evaluation.
- *
- * Revision 1.17 1998/11/20 13:20:33 mhaveman
- * Fixed bug in SK_PNMI_SET_STAT macro. ErrorStatus was not correctly set.
- *
- * Revision 1.16 1998/11/20 08:08:49 mhaveman
- * Macro SK_PNMI_CHECKFLAGS has got a if clause.
- *
- * Revision 1.15 1998/11/03 13:53:40 mhaveman
- * Fixed alignment problem in macor SK_PNMI_SET_STAT macro.
- *
- * Revision 1.14 1998/10/30 15:50:13 mhaveman
- * Added macro SK_PNMI_MICRO_SEC()
- *
- * Revision 1.13 1998/10/30 12:32:20 mhaveman
- * Added forgotten cast in SK_PNMI_READ_U32 macro.
- *
- * Revision 1.12 1998/10/29 15:40:26 mhaveman
- * -Changed SK_PNMI_TRAP_SENSOR_LEN because SensorDescr has now
- * variable string length.
- * -Defined SK_PNMI_CHECKFLAGS macro
- *
- * Revision 1.11 1998/10/29 08:53:34 mhaveman
- * Removed SK_PNMI_RLM_XXX table indexed because these counters need
- * not been saved over XMAC resets.
- *
- * Revision 1.10 1998/10/28 08:48:20 mhaveman
- * -Added macros for storage according to alignment
- * -Changed type of Instance to SK_U32 because of VPD
- * -Removed trap structures. Not needed because of alignment problem
- * -Changed type of Action form SK_U8 to int
- *
- * Revision 1.9 1998/10/21 13:34:45 mhaveman
- * Shit, mismatched calculation of SK_PNMI_HUNDREDS_SEC. Corrected.
- *
- * Revision 1.8 1998/10/21 13:24:58 mhaveman
- * Changed calculation of hundreds of seconds.
- *
- * Revision 1.7 1998/10/20 07:31:41 mhaveman
- * Made type changes to unsigned int where possible.
- *
- * Revision 1.6 1998/09/04 17:04:05 mhaveman
- * Added Sync counters to offset storage to provided settled values on
- * port switch.
- *
- * Revision 1.5 1998/09/04 12:45:35 mhaveman
- * Removed dummies for SK_DRIVER_ macros. They should be added by driver
- * writer in skdrv2nd.h.
- *
- * Revision 1.4 1998/09/04 11:59:50 mhaveman
- * Everything compiles now. Driver Macros for counting still missing.
- *
- * Revision 1.3 1998/08/24 12:01:35 mhaveman
- * Intermediate state.
- *
- * Revision 1.2 1998/08/17 07:51:40 mhaveman
- * Intermediate state.
- *
- * Revision 1.1 1998/08/11 09:08:40 mhaveman
- * Intermediate state.
- *
- ****************************************************************************/
-
-#ifndef _SKGEPNM2_H_
-#define _SKGEPNM2_H_
-
-/*
- * General definitions
- */
-#define SK_PNMI_CHIPSET_XMAC 1 /* XMAC11800FP */
-#define SK_PNMI_CHIPSET_YUKON 2 /* YUKON */
-
-#define SK_PNMI_BUS_PCI 1 /* PCI bus*/
-
-/*
- * Actions
- */
-#define SK_PNMI_ACT_IDLE 1
-#define SK_PNMI_ACT_RESET 2
-#define SK_PNMI_ACT_SELFTEST 3
-#define SK_PNMI_ACT_RESETCNT 4
-
-/*
- * VPD releated defines
- */
-
-#define SK_PNMI_VPD_RW 1
-#define SK_PNMI_VPD_RO 2
-
-#define SK_PNMI_VPD_OK 0
-#define SK_PNMI_VPD_NOTFOUND 1
-#define SK_PNMI_VPD_CUT 2
-#define SK_PNMI_VPD_TIMEOUT 3
-#define SK_PNMI_VPD_FULL 4
-#define SK_PNMI_VPD_NOWRITE 5
-#define SK_PNMI_VPD_FATAL 6
-
-#define SK_PNMI_VPD_IGNORE 0
-#define SK_PNMI_VPD_CREATE 1
-#define SK_PNMI_VPD_DELETE 2
-
-
-/*
- * RLMT related defines
- */
-#define SK_PNMI_DEF_RLMT_CHG_THRES 240 /* 4 changes per minute */
-
-
-/*
- * VCT internal status values
- */
-#define SK_PNMI_VCT_PENDING 32
-#define SK_PNMI_VCT_TEST_DONE 64
-#define SK_PNMI_VCT_LINK 128
-
-/*
- * Internal table definitions
- */
-#define SK_PNMI_GET 0
-#define SK_PNMI_PRESET 1
-#define SK_PNMI_SET 2
-
-#define SK_PNMI_RO 0
-#define SK_PNMI_RW 1
-#define SK_PNMI_WO 2
-
-typedef struct s_OidTabEntry {
- SK_U32 Id;
- SK_U32 InstanceNo;
- unsigned int StructSize;
- unsigned int Offset;
- int Access;
- int (* Func)(SK_AC *pAc, SK_IOC pIo, int action,
- SK_U32 Id, char* pBuf, unsigned int* pLen,
- SK_U32 Instance, unsigned int TableIndex,
- SK_U32 NetNumber);
- SK_U16 Param;
-} SK_PNMI_TAB_ENTRY;
-
-
-/*
- * Trap lengths
- */
-#define SK_PNMI_TRAP_SIMPLE_LEN 17
-#define SK_PNMI_TRAP_SENSOR_LEN_BASE 46
-#define SK_PNMI_TRAP_RLMT_CHANGE_LEN 23
-#define SK_PNMI_TRAP_RLMT_PORT_LEN 23
-
-/*
- * Number of MAC types supported
- */
-#define SK_PNMI_MAC_TYPES (SK_MAC_GMAC + 1)
-
-/*
- * MAC statistic data list (overall set for MAC types used)
- */
-enum SK_MACSTATS {
- SK_PNMI_HTX = 0,
- SK_PNMI_HTX_OCTET,
- SK_PNMI_HTX_OCTETHIGH = SK_PNMI_HTX_OCTET,
- SK_PNMI_HTX_OCTETLOW,
- SK_PNMI_HTX_BROADCAST,
- SK_PNMI_HTX_MULTICAST,
- SK_PNMI_HTX_UNICAST,
- SK_PNMI_HTX_BURST,
- SK_PNMI_HTX_PMACC,
- SK_PNMI_HTX_MACC,
- SK_PNMI_HTX_COL,
- SK_PNMI_HTX_SINGLE_COL,
- SK_PNMI_HTX_MULTI_COL,
- SK_PNMI_HTX_EXCESS_COL,
- SK_PNMI_HTX_LATE_COL,
- SK_PNMI_HTX_DEFFERAL,
- SK_PNMI_HTX_EXCESS_DEF,
- SK_PNMI_HTX_UNDERRUN,
- SK_PNMI_HTX_CARRIER,
- SK_PNMI_HTX_UTILUNDER,
- SK_PNMI_HTX_UTILOVER,
- SK_PNMI_HTX_64,
- SK_PNMI_HTX_127,
- SK_PNMI_HTX_255,
- SK_PNMI_HTX_511,
- SK_PNMI_HTX_1023,
- SK_PNMI_HTX_MAX,
- SK_PNMI_HTX_LONGFRAMES,
- SK_PNMI_HTX_SYNC,
- SK_PNMI_HTX_SYNC_OCTET,
- SK_PNMI_HTX_RESERVED,
-
- SK_PNMI_HRX,
- SK_PNMI_HRX_OCTET,
- SK_PNMI_HRX_OCTETHIGH = SK_PNMI_HRX_OCTET,
- SK_PNMI_HRX_OCTETLOW,
- SK_PNMI_HRX_BADOCTET,
- SK_PNMI_HRX_BADOCTETHIGH = SK_PNMI_HRX_BADOCTET,
- SK_PNMI_HRX_BADOCTETLOW,
- SK_PNMI_HRX_BROADCAST,
- SK_PNMI_HRX_MULTICAST,
- SK_PNMI_HRX_UNICAST,
- SK_PNMI_HRX_PMACC,
- SK_PNMI_HRX_MACC,
- SK_PNMI_HRX_PMACC_ERR,
- SK_PNMI_HRX_MACC_UNKWN,
- SK_PNMI_HRX_BURST,
- SK_PNMI_HRX_MISSED,
- SK_PNMI_HRX_FRAMING,
- SK_PNMI_HRX_UNDERSIZE,
- SK_PNMI_HRX_OVERFLOW,
- SK_PNMI_HRX_JABBER,
- SK_PNMI_HRX_CARRIER,
- SK_PNMI_HRX_IRLENGTH,
- SK_PNMI_HRX_SYMBOL,
- SK_PNMI_HRX_SHORTS,
- SK_PNMI_HRX_RUNT,
- SK_PNMI_HRX_TOO_LONG,
- SK_PNMI_HRX_FCS,
- SK_PNMI_HRX_CEXT,
- SK_PNMI_HRX_UTILUNDER,
- SK_PNMI_HRX_UTILOVER,
- SK_PNMI_HRX_64,
- SK_PNMI_HRX_127,
- SK_PNMI_HRX_255,
- SK_PNMI_HRX_511,
- SK_PNMI_HRX_1023,
- SK_PNMI_HRX_MAX,
- SK_PNMI_HRX_LONGFRAMES,
-
- SK_PNMI_HRX_RESERVED,
-
- SK_PNMI_MAX_IDX /* NOTE: Ensure SK_PNMI_CNT_NO is set to this value */
-};
-
-/*
- * MAC specific data
- */
-typedef struct s_PnmiStatAddr {
- SK_U16 Reg; /* MAC register containing the value */
- SK_BOOL GetOffset; /* TRUE: Offset managed by PNMI (call GetStatVal())*/
-} SK_PNMI_STATADDR;
-
-
-/*
- * SK_PNMI_STRUCT_DATA copy offset evaluation macros
- */
-#define SK_PNMI_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_STRUCT_DATA *)0)->e))
-#define SK_PNMI_MAI_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_STRUCT_DATA *)0)->e))
-#define SK_PNMI_VPD_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_VPD *)0)->e))
-#define SK_PNMI_SEN_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_SENSOR *)0)->e))
-#define SK_PNMI_CHK_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_CHECKSUM *)0)->e))
-#define SK_PNMI_STA_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_STAT *)0)->e))
-#define SK_PNMI_CNF_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_CONF *)0)->e))
-#define SK_PNMI_RLM_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_RLMT *)0)->e))
-#define SK_PNMI_MON_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_RLMT_MONITOR *)0)->e))
-#define SK_PNMI_TRP_OFF(e) ((SK_U32)(SK_UPTR)&(((SK_PNMI_TRAP *)0)->e))
-
-#define SK_PNMI_SET_STAT(b,s,o) {SK_U32 Val32; char *pVal; \
- Val32 = (s); \
- pVal = (char *)(b) + ((SK_U32)(SK_UPTR) \
- &(((SK_PNMI_STRUCT_DATA *)0)-> \
- ReturnStatus.ErrorStatus)); \
- SK_PNMI_STORE_U32(pVal, Val32); \
- Val32 = (o); \
- pVal = (char *)(b) + ((SK_U32)(SK_UPTR) \
- &(((SK_PNMI_STRUCT_DATA *)0)-> \
- ReturnStatus.ErrorOffset)); \
- SK_PNMI_STORE_U32(pVal, Val32);}
-
-/*
- * Time macros
- */
-#if SK_TICKS_PER_SEC == 100
-#define SK_PNMI_HUNDREDS_SEC(t) (t)
-#else
-#define SK_PNMI_HUNDREDS_SEC(t) (((t) * 100) / (SK_TICKS_PER_SEC))
-#endif
-
-/*
- * Macros to work around alignment problems
- */
-#ifndef SK_PNMI_STORE_U16
-#define SK_PNMI_STORE_U16(p,v) {*(char *)(p) = *((char *)&(v)); \
- *((char *)(p) + 1) = \
- *(((char *)&(v)) + 1);}
-#endif
-
-#ifndef SK_PNMI_STORE_U32
-#define SK_PNMI_STORE_U32(p,v) {*(char *)(p) = *((char *)&(v)); \
- *((char *)(p) + 1) = \
- *(((char *)&(v)) + 1); \
- *((char *)(p) + 2) = \
- *(((char *)&(v)) + 2); \
- *((char *)(p) + 3) = \
- *(((char *)&(v)) + 3);}
-#endif
-
-#ifndef SK_PNMI_STORE_U64
-#define SK_PNMI_STORE_U64(p,v) {*(char *)(p) = *((char *)&(v)); \
- *((char *)(p) + 1) = \
- *(((char *)&(v)) + 1); \
- *((char *)(p) + 2) = \
- *(((char *)&(v)) + 2); \
- *((char *)(p) + 3) = \
- *(((char *)&(v)) + 3); \
- *((char *)(p) + 4) = \
- *(((char *)&(v)) + 4); \
- *((char *)(p) + 5) = \
- *(((char *)&(v)) + 5); \
- *((char *)(p) + 6) = \
- *(((char *)&(v)) + 6); \
- *((char *)(p) + 7) = \
- *(((char *)&(v)) + 7);}
-#endif
-
-#ifndef SK_PNMI_READ_U16
-#define SK_PNMI_READ_U16(p,v) {*((char *)&(v)) = *(char *)(p); \
- *(((char *)&(v)) + 1) = \
- *((char *)(p) + 1);}
-#endif
-
-#ifndef SK_PNMI_READ_U32
-#define SK_PNMI_READ_U32(p,v) {*((char *)&(v)) = *(char *)(p); \
- *(((char *)&(v)) + 1) = \
- *((char *)(p) + 1); \
- *(((char *)&(v)) + 2) = \
- *((char *)(p) + 2); \
- *(((char *)&(v)) + 3) = \
- *((char *)(p) + 3);}
-#endif
-
-#ifndef SK_PNMI_READ_U64
-#define SK_PNMI_READ_U64(p,v) {*((char *)&(v)) = *(char *)(p); \
- *(((char *)&(v)) + 1) = \
- *((char *)(p) + 1); \
- *(((char *)&(v)) + 2) = \
- *((char *)(p) + 2); \
- *(((char *)&(v)) + 3) = \
- *((char *)(p) + 3); \
- *(((char *)&(v)) + 4) = \
- *((char *)(p) + 4); \
- *(((char *)&(v)) + 5) = \
- *((char *)(p) + 5); \
- *(((char *)&(v)) + 6) = \
- *((char *)(p) + 6); \
- *(((char *)&(v)) + 7) = \
- *((char *)(p) + 7);}
-#endif
-
-/*
- * Macros for Debug
- */
-#ifdef DEBUG
-
-#define SK_PNMI_CHECKFLAGS(vSt) {if (pAC->Pnmi.MacUpdatedFlag > 0 || \
- pAC->Pnmi.RlmtUpdatedFlag > 0 || \
- pAC->Pnmi.SirqUpdatedFlag > 0) { \
- SK_DBG_MSG(pAC, \
- SK_DBGMOD_PNMI, \
- SK_DBGCAT_CTRL, \
- ("PNMI: ERR: %s MacUFlag=%d, RlmtUFlag=%d, SirqUFlag=%d\n", \
- vSt, \
- pAC->Pnmi.MacUpdatedFlag, \
- pAC->Pnmi.RlmtUpdatedFlag, \
- pAC->Pnmi.SirqUpdatedFlag))}}
-
-#else /* !DEBUG */
-
-#define SK_PNMI_CHECKFLAGS(vSt) /* Nothing */
-
-#endif /* !DEBUG */
-
-#endif /* _SKGEPNM2_H_ */
+++ /dev/null
-/*****************************************************************************
- *
- * Name: skgepnmi.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.59 $
- * Date: $Date: 2002/12/16 14:03:50 $
- * Purpose: Defines for Private Network Management Interface
- *
- ****************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/*****************************************************************************
- *
- * History:
- *
- * $Log: skgepnmi.h,v $
- * Revision 1.59 2002/12/16 14:03:50 tschilli
- * New defines for VCT added.
- *
- * Revision 1.58 2002/12/16 09:04:59 tschilli
- * Code for VCT handling added.
- *
- * Revision 1.57 2002/09/26 12:41:05 tschilli
- * SK_PNMI_PORT BufPort entry in struct SK_PNMI added.
- *
- * Revision 1.56 2002/08/16 11:10:41 rwahl
- * - Replaced c++ comment.
- *
- * Revision 1.55 2002/08/09 15:40:21 rwahl
- * Editorial change (renamed ConfSpeedCap).
- *
- * Revision 1.54 2002/08/09 11:06:07 rwahl
- * Added OID_SKGE_SPEED_CAP.
- *
- * Revision 1.53 2002/08/09 09:45:28 rwahl
- * Added support for NDIS OID_PNP_xxx.
- * Editorial changes.
- *
- * Revision 1.52 2002/08/06 17:54:07 rwahl
- * - Added speed cap to PNMI config struct.
- *
- * Revision 1.51 2002/07/17 19:19:26 rwahl
- * - Added OID_SKGE_SPEED_MODE and OID_SKGE_SPEED_STATUS.
- * - Added SK_PNMI_CNT_RX_PMACC_ERR() & SK_PNMI_CNT_RX_LONGFRAMES().
- * - Added speed mode & status to PNMI config struct.
- * - Editorial changes.
- *
- * Revision 1.50 2002/05/22 08:59:37 rwahl
- * Added string definitions for error msgs.
- *
- * Revision 1.49 2001/11/20 09:23:50 rwahl
- * - pnmi struct: reordered and aligned to 32bit.
- *
- * Revision 1.48 2001/02/23 14:34:24 mkunz
- * Changed macro PHYS2INST. Added pAC to Interface
- *
- * Revision 1.47 2001/02/07 08:28:23 mkunz
- * - Added Oids: OID_SKGE_DIAG_ACTION
- * OID_SKGE_DIAG_RESULT
- * OID_SKGE_MULTICAST_LIST
- * OID_SKGE_CURRENT_PACKET_FILTER
- * OID_SKGE_INTERMEDIATE_SUPPORT
- * - Changed value of OID_SKGE_MTU
- *
- * Revision 1.46 2001/02/06 10:01:41 mkunz
- * - Pnmi V4 dual net support added. Interface functions and macros extended
- * - Vpd bug fixed
- * - OID_SKGE_MTU added
- *
- * Revision 1.45 2001/01/22 13:41:37 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.44 2000/09/07 07:35:27 rwahl
- * - removed NDIS counter specific data type.
- * - fixed spelling for OID_SKGE_RLMT_PORT_PREFERRED.
- *
- * Revision 1.43 2000/08/04 11:41:08 rwahl
- * - Fixed compiler warning (port is always >= 0) for macros
- * SK_PNMI_CNT_RX_LONGFRAMES & SK_PNMI_CNT_SYNC_OCTETS
- *
- * Revision 1.42 2000/08/03 15:14:07 rwahl
- * - Corrected error in driver macros addressing a physical port.
- *
- * Revision 1.41 2000/08/01 16:22:29 rwahl
- * - Changed MDB version to 3.1.
- * - Added definitions for StatRxLongFrames counter.
- * - Added macro to be used by driver to count long frames received.
- * - Added directive to control width (default = 32bit) of NDIS statistic
- * counters (SK_NDIS_64BIT_CTR).
- *
- * Revision 1.40 2000/03/31 13:51:34 rwahl
- * Added SK_UPTR cast to offset calculation for PNMI struct fields;
- * missing cast caused compiler warnings by Win64 compiler.
- *
- * Revision 1.39 1999/12/06 10:09:47 rwahl
- * Added new error log message.
- *
- * Revision 1.38 1999/11/22 13:57:55 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.37 1999/09/14 14:25:32 rwahl
- * Set MDB version for 1000Base-T (sensors, Master/Slave) changes.
- *
- * Revision 1.36 1999/05/20 09:24:56 cgoos
- * Changes for 1000Base-T (sensors, Master/Slave).
- *
- * Revision 1.35 1999/04/13 15:10:51 mhaveman
- * Replaced RLMT macros SK_RLMT_CHECK_xxx again by those of PNMI to
- * grant unified interface. But PNMI macros will store the same
- * value as RLMT macros.
- *
- * Revision 1.34 1999/04/13 15:03:49 mhaveman
- * -Changed copyright
- * -Removed SK_PNMI_RLMT_MODE_CHK_xxx macros. Those of RLMT should be
- * used.
- *
- * Revision 1.33 1999/03/23 10:41:02 mhaveman
- * Changed comments.
- *
- * Revision 1.32 1999/01/25 15:01:33 mhaveman
- * Added support for multiple simultaniously active ports.
- *
- * Revision 1.31 1999/01/19 10:06:26 mhaveman
- * Added new error log message.
- *
- * Revision 1.30 1999/01/05 10:34:49 mhaveman
- * Fixed little error in RlmtChangeEstimate calculation.
- *
- * Revision 1.29 1999/01/05 09:59:41 mhaveman
- * Redesigned port switch average calculation to avoid 64bit
- * arithmetic.
- *
- * Revision 1.28 1998/12/08 10:05:48 mhaveman
- * Defined macro SK_PNMI_MIN_STRUCT_SIZE.
- *
- * Revision 1.27 1998/12/03 14:39:35 mhaveman
- * Fixed problem that LSTAT was enumerated wrong.
- *
- * Revision 1.26 1998/12/03 11:19:51 mhaveman
- * Changed contents of errlog message SK_PNMI_ERR016MSG
- *
- * Revision 1.25 1998/12/01 10:40:04 mhaveman
- * Changed size of SensorNumber, ChecksumNumber and RlmtPortNumber in
- * SK_PNMI_STRUCT_DATA to be conform with OID definition.
- *
- * Revision 1.24 1998/11/20 08:09:27 mhaveman
- * Added macros to convert between logical, physical port indexes and
- * instances.
- *
- * Revision 1.23 1998/11/10 13:41:13 mhaveman
- * Needed to change interface, because NT driver needs a return value
- * of needed buffer space on TOO_SHORT errors. Therefore all
- * SkPnmiGet/Preset/Set functions now have a pointer to the length
- * parameter, where the needed space on error is returned.
- *
- * Revision 1.22 1998/11/03 12:05:51 mhaveman
- * Added pAC parameter to counter macors.
- *
- * Revision 1.21 1998/11/02 10:47:36 mhaveman
- * Added syslog messages for internal errors.
- *
- * Revision 1.20 1998/10/30 15:49:36 mhaveman
- * -Removed unused SK_PNMI_UTILIZATION_BASE and EstOldCnt.
- * -Redefined SK_PNMI_CHG_EST_BASE to hundreds of seconds.
- *
- * Revision 1.19 1998/10/29 15:38:44 mhaveman
- * Changed string lengths of PNMI_STRUCT_DATA structure because
- * string OIDs are now encoded with leading length ocetet.
- *
- * Revision 1.18 1998/10/29 08:52:27 mhaveman
- * -Added byte to strings in PNMI_STRUCT_DATA structure.
- * -Shortened SK_PNMI_RLMT structure to SK_MAX_MACS elements.
- *
- * Revision 1.17 1998/10/28 08:49:50 mhaveman
- * -Changed type of Instance back to SK_U32 because of VPD
- * -Changed type from SK_U8 to char of PciBusSpeed, PciBusWidth, PMD,
- * and Connector.
- *
- * Revision 1.16 1998/10/22 10:42:31 mhaveman
- * -Removed (SK_U32) casts for OIDs
- * -excluded NDIS OIDs when they are already defined with ifndef _NDIS_
- *
- * Revision 1.15 1998/10/20 13:56:28 mhaveman
- * Headerfile includes now directly other header files to comile correctly.
- *
- * Revision 1.14 1998/10/20 07:31:09 mhaveman
- * Made type changes to unsigned int where possible.
- *
- * Revision 1.13 1998/10/19 10:53:13 mhaveman
- * -Casted OID definitions to SK_U32
- * -Renamed RlmtMAC... to RlmtPort...
- * -Changed wrong type of VpdEntriesList from SK_U32 to char *
- *
- * Revision 1.12 1998/10/13 07:42:27 mhaveman
- * -Added OIDs OID_SKGE_TRAP_NUMBER and OID_SKGE_ALL_DATA
- * -Removed old cvs history entries
- * -Renamed MacNumber to PortNumber
- *
- * Revision 1.11 1998/10/07 10:55:24 mhaveman
- * -Added OID_MDB_VERSION. Therefore was a renumbering of the VPD OIDs
- * necessary.
- * -Added OID_GEN_ Ids to support the windows driver.
- *
- * Revision 1.10 1998/09/30 13:41:10 mhaveman
- * Renamed some OIDs to reduce usage of 'MAC' which is replaced by 'PORT'.
- *
- * Revision 1.9 1998/09/04 17:06:17 mhaveman
- * -Added SyncCounter as macro.
- * -Renamed OID_SKGE_.._NO_DESCR_CTS to OID_SKGE_.._NO_BUF_CTS.
- * -Added macros for driver description and version strings.
- *
- * Revision 1.8 1998/09/04 14:36:52 mhaveman
- * Added OIDs and Structure to access value of macro counters which are
- * counted by the driver.
- *
- * Revision 1.7 1998/09/04 11:59:36 mhaveman
- * Everything compiles now. Driver Macros for counting still missing.
- *
- ****************************************************************************/
-
-#ifndef _SKGEPNMI_H_
-#define _SKGEPNMI_H_
-
-/*
- * Include dependencies
- */
-#include "h/sktypes.h"
-#include "h/skerror.h"
-#include "h/sktimer.h"
-#include "h/ski2c.h"
-#include "h/skaddr.h"
-#include "h/skrlmt.h"
-#include "h/skvpd.h"
-
-/*
- * Management Database Version
- */
-#define SK_PNMI_MDB_VERSION 0x00030001 /* 3.1 */
-
-
-/*
- * Event definitions
- */
-#define SK_PNMI_EVT_SIRQ_OVERFLOW 1 /* Counter overflow */
-#define SK_PNMI_EVT_SEN_WAR_LOW 2 /* Lower war thres exceeded */
-#define SK_PNMI_EVT_SEN_WAR_UPP 3 /* Upper war thres exceeded */
-#define SK_PNMI_EVT_SEN_ERR_LOW 4 /* Lower err thres exceeded */
-#define SK_PNMI_EVT_SEN_ERR_UPP 5 /* Upper err thres exceeded */
-#define SK_PNMI_EVT_CHG_EST_TIMER 6 /* Timer event for RLMT Chg */
-#define SK_PNMI_EVT_UTILIZATION_TIMER 7 /* Timer event for Utiliza. */
-#define SK_PNMI_EVT_CLEAR_COUNTER 8 /* Clear statistic counters */
-#define SK_PNMI_EVT_XMAC_RESET 9 /* XMAC will be reset */
-
-#define SK_PNMI_EVT_RLMT_PORT_UP 10 /* Port came logically up */
-#define SK_PNMI_EVT_RLMT_PORT_DOWN 11 /* Port went logically down */
-#define SK_PNMI_EVT_RLMT_SEGMENTATION 13 /* Two SP root bridges found */
-#define SK_PNMI_EVT_RLMT_ACTIVE_DOWN 14 /* Port went logically down */
-#define SK_PNMI_EVT_RLMT_ACTIVE_UP 15 /* Port came logically up */
-#define SK_PNMI_EVT_RLMT_SET_NETS 16 /* 1. Parameter is number of nets
- 1 = single net; 2 = dual net */
-#define SK_PNMI_EVT_VCT_RESET 17 /* VCT port reset timer event started with SET. */
-
-
-/*
- * Return values
- */
-#define SK_PNMI_ERR_OK 0
-#define SK_PNMI_ERR_GENERAL 1
-#define SK_PNMI_ERR_TOO_SHORT 2
-#define SK_PNMI_ERR_BAD_VALUE 3
-#define SK_PNMI_ERR_READ_ONLY 4
-#define SK_PNMI_ERR_UNKNOWN_OID 5
-#define SK_PNMI_ERR_UNKNOWN_INST 6
-#define SK_PNMI_ERR_UNKNOWN_NET 7
-
-
-/*
- * Return values of driver reset function SK_DRIVER_RESET() and
- * driver event function SK_DRIVER_EVENT()
- */
-#define SK_PNMI_ERR_OK 0
-#define SK_PNMI_ERR_FAIL 1
-
-
-/*
- * Return values of driver test function SK_DRIVER_SELFTEST()
- */
-#define SK_PNMI_TST_UNKNOWN (1 << 0)
-#define SK_PNMI_TST_TRANCEIVER (1 << 1)
-#define SK_PNMI_TST_ASIC (1 << 2)
-#define SK_PNMI_TST_SENSOR (1 << 3)
-#define SK_PNMI_TST_POWERMGMT (1 << 4)
-#define SK_PNMI_TST_PCI (1 << 5)
-#define SK_PNMI_TST_MAC (1 << 6)
-
-
-/*
- * RLMT specific definitions
- */
-#define SK_PNMI_RLMT_STATUS_STANDBY 1
-#define SK_PNMI_RLMT_STATUS_ACTIVE 2
-#define SK_PNMI_RLMT_STATUS_ERROR 3
-
-#define SK_PNMI_RLMT_LSTAT_PHY_DOWN 1
-#define SK_PNMI_RLMT_LSTAT_AUTONEG 2
-#define SK_PNMI_RLMT_LSTAT_LOG_DOWN 3
-#define SK_PNMI_RLMT_LSTAT_LOG_UP 4
-#define SK_PNMI_RLMT_LSTAT_INDETERMINATED 5
-
-#define SK_PNMI_RLMT_MODE_CHK_LINK (SK_RLMT_CHECK_LINK)
-#define SK_PNMI_RLMT_MODE_CHK_RX (SK_RLMT_CHECK_LOC_LINK)
-#define SK_PNMI_RLMT_MODE_CHK_SPT (SK_RLMT_CHECK_SEG)
-/* #define SK_PNMI_RLMT_MODE_CHK_EX */
-
-/*
- * OID definition
- */
-#ifndef _NDIS_ /* Check, whether NDIS already included OIDs */
-
-#define OID_GEN_XMIT_OK 0x00020101
-#define OID_GEN_RCV_OK 0x00020102
-#define OID_GEN_XMIT_ERROR 0x00020103
-#define OID_GEN_RCV_ERROR 0x00020104
-#define OID_GEN_RCV_NO_BUFFER 0x00020105
-
-/* #define OID_GEN_DIRECTED_BYTES_XMIT 0x00020201 */
-#define OID_GEN_DIRECTED_FRAMES_XMIT 0x00020202
-/* #define OID_GEN_MULTICAST_BYTES_XMIT 0x00020203 */
-#define OID_GEN_MULTICAST_FRAMES_XMIT 0x00020204
-/* #define OID_GEN_BROADCAST_BYTES_XMIT 0x00020205 */
-#define OID_GEN_BROADCAST_FRAMES_XMIT 0x00020206
-/* #define OID_GEN_DIRECTED_BYTES_RCV 0x00020207 */
-#define OID_GEN_DIRECTED_FRAMES_RCV 0x00020208
-/* #define OID_GEN_MULTICAST_BYTES_RCV 0x00020209 */
-#define OID_GEN_MULTICAST_FRAMES_RCV 0x0002020A
-/* #define OID_GEN_BROADCAST_BYTES_RCV 0x0002020B */
-#define OID_GEN_BROADCAST_FRAMES_RCV 0x0002020C
-#define OID_GEN_RCV_CRC_ERROR 0x0002020D
-#define OID_GEN_TRANSMIT_QUEUE_LENGTH 0x0002020E
-
-#define OID_802_3_PERMANENT_ADDRESS 0x01010101
-#define OID_802_3_CURRENT_ADDRESS 0x01010102
-/* #define OID_802_3_MULTICAST_LIST 0x01010103 */
-/* #define OID_802_3_MAXIMUM_LIST_SIZE 0x01010104 */
-/* #define OID_802_3_MAC_OPTIONS 0x01010105 */
-
-#define OID_802_3_RCV_ERROR_ALIGNMENT 0x01020101
-#define OID_802_3_XMIT_ONE_COLLISION 0x01020102
-#define OID_802_3_XMIT_MORE_COLLISIONS 0x01020103
-#define OID_802_3_XMIT_DEFERRED 0x01020201
-#define OID_802_3_XMIT_MAX_COLLISIONS 0x01020202
-#define OID_802_3_RCV_OVERRUN 0x01020203
-#define OID_802_3_XMIT_UNDERRUN 0x01020204
-#define OID_802_3_XMIT_TIMES_CRS_LOST 0x01020206
-#define OID_802_3_XMIT_LATE_COLLISIONS 0x01020207
-
-/*
- * PnP and PM OIDs
- */
-#ifdef SK_POWER_MGMT
-#define OID_PNP_CAPABILITIES 0xFD010100
-#define OID_PNP_SET_POWER 0xFD010101
-#define OID_PNP_QUERY_POWER 0xFD010102
-#define OID_PNP_ADD_WAKE_UP_PATTERN 0xFD010103
-#define OID_PNP_REMOVE_WAKE_UP_PATTERN 0xFD010104
-#define OID_PNP_ENABLE_WAKE_UP 0xFD010106
-#endif /* SK_POWER_MGMT */
-
-#endif /* _NDIS_ */
-
-#define OID_SKGE_MDB_VERSION 0xFF010100
-#define OID_SKGE_SUPPORTED_LIST 0xFF010101
-#define OID_SKGE_VPD_FREE_BYTES 0xFF010102
-#define OID_SKGE_VPD_ENTRIES_LIST 0xFF010103
-#define OID_SKGE_VPD_ENTRIES_NUMBER 0xFF010104
-#define OID_SKGE_VPD_KEY 0xFF010105
-#define OID_SKGE_VPD_VALUE 0xFF010106
-#define OID_SKGE_VPD_ACCESS 0xFF010107
-#define OID_SKGE_VPD_ACTION 0xFF010108
-
-#define OID_SKGE_PORT_NUMBER 0xFF010110
-#define OID_SKGE_DEVICE_TYPE 0xFF010111
-#define OID_SKGE_DRIVER_DESCR 0xFF010112
-#define OID_SKGE_DRIVER_VERSION 0xFF010113
-#define OID_SKGE_HW_DESCR 0xFF010114
-#define OID_SKGE_HW_VERSION 0xFF010115
-#define OID_SKGE_CHIPSET 0xFF010116
-#define OID_SKGE_ACTION 0xFF010117
-#define OID_SKGE_RESULT 0xFF010118
-#define OID_SKGE_BUS_TYPE 0xFF010119
-#define OID_SKGE_BUS_SPEED 0xFF01011A
-#define OID_SKGE_BUS_WIDTH 0xFF01011B
-/* 0xFF01011C unused */
-#define OID_SKGE_DIAG_ACTION 0xFF01011D
-#define OID_SKGE_DIAG_RESULT 0xFF01011E
-#define OID_SKGE_MTU 0xFF01011F
-#define OID_SKGE_PHYS_CUR_ADDR 0xFF010120
-#define OID_SKGE_PHYS_FAC_ADDR 0xFF010121
-#define OID_SKGE_PMD 0xFF010122
-#define OID_SKGE_CONNECTOR 0xFF010123
-#define OID_SKGE_LINK_CAP 0xFF010124
-#define OID_SKGE_LINK_MODE 0xFF010125
-#define OID_SKGE_LINK_MODE_STATUS 0xFF010126
-#define OID_SKGE_LINK_STATUS 0xFF010127
-#define OID_SKGE_FLOWCTRL_CAP 0xFF010128
-#define OID_SKGE_FLOWCTRL_MODE 0xFF010129
-#define OID_SKGE_FLOWCTRL_STATUS 0xFF01012A
-#define OID_SKGE_PHY_OPERATION_CAP 0xFF01012B
-#define OID_SKGE_PHY_OPERATION_MODE 0xFF01012C
-#define OID_SKGE_PHY_OPERATION_STATUS 0xFF01012D
-#define OID_SKGE_MULTICAST_LIST 0xFF01012E
-#define OID_SKGE_CURRENT_PACKET_FILTER 0xFF01012F
-
-#define OID_SKGE_TRAP 0xFF010130
-#define OID_SKGE_TRAP_NUMBER 0xFF010131
-
-#define OID_SKGE_RLMT_MODE 0xFF010140
-#define OID_SKGE_RLMT_PORT_NUMBER 0xFF010141
-#define OID_SKGE_RLMT_PORT_ACTIVE 0xFF010142
-#define OID_SKGE_RLMT_PORT_PREFERRED 0xFF010143
-#define OID_SKGE_INTERMEDIATE_SUPPORT 0xFF010160
-
-#define OID_SKGE_SPEED_CAP 0xFF010170
-#define OID_SKGE_SPEED_MODE 0xFF010171
-#define OID_SKGE_SPEED_STATUS 0xFF010172
-
-#define OID_SKGE_SENSOR_NUMBER 0xFF020100
-#define OID_SKGE_SENSOR_INDEX 0xFF020101
-#define OID_SKGE_SENSOR_DESCR 0xFF020102
-#define OID_SKGE_SENSOR_TYPE 0xFF020103
-#define OID_SKGE_SENSOR_VALUE 0xFF020104
-#define OID_SKGE_SENSOR_WAR_THRES_LOW 0xFF020105
-#define OID_SKGE_SENSOR_WAR_THRES_UPP 0xFF020106
-#define OID_SKGE_SENSOR_ERR_THRES_LOW 0xFF020107
-#define OID_SKGE_SENSOR_ERR_THRES_UPP 0xFF020108
-#define OID_SKGE_SENSOR_STATUS 0xFF020109
-#define OID_SKGE_SENSOR_WAR_CTS 0xFF02010A
-#define OID_SKGE_SENSOR_ERR_CTS 0xFF02010B
-#define OID_SKGE_SENSOR_WAR_TIME 0xFF02010C
-#define OID_SKGE_SENSOR_ERR_TIME 0xFF02010D
-
-#define OID_SKGE_CHKSM_NUMBER 0xFF020110
-#define OID_SKGE_CHKSM_RX_OK_CTS 0xFF020111
-#define OID_SKGE_CHKSM_RX_UNABLE_CTS 0xFF020112
-#define OID_SKGE_CHKSM_RX_ERR_CTS 0xFF020113
-#define OID_SKGE_CHKSM_TX_OK_CTS 0xFF020114
-#define OID_SKGE_CHKSM_TX_UNABLE_CTS 0xFF020115
-
-#define OID_SKGE_STAT_TX 0xFF020120
-#define OID_SKGE_STAT_TX_OCTETS 0xFF020121
-#define OID_SKGE_STAT_TX_BROADCAST 0xFF020122
-#define OID_SKGE_STAT_TX_MULTICAST 0xFF020123
-#define OID_SKGE_STAT_TX_UNICAST 0xFF020124
-#define OID_SKGE_STAT_TX_LONGFRAMES 0xFF020125
-#define OID_SKGE_STAT_TX_BURST 0xFF020126
-#define OID_SKGE_STAT_TX_PFLOWC 0xFF020127
-#define OID_SKGE_STAT_TX_FLOWC 0xFF020128
-#define OID_SKGE_STAT_TX_SINGLE_COL 0xFF020129
-#define OID_SKGE_STAT_TX_MULTI_COL 0xFF02012A
-#define OID_SKGE_STAT_TX_EXCESS_COL 0xFF02012B
-#define OID_SKGE_STAT_TX_LATE_COL 0xFF02012C
-#define OID_SKGE_STAT_TX_DEFFERAL 0xFF02012D
-#define OID_SKGE_STAT_TX_EXCESS_DEF 0xFF02012E
-#define OID_SKGE_STAT_TX_UNDERRUN 0xFF02012F
-#define OID_SKGE_STAT_TX_CARRIER 0xFF020130
-/* #define OID_SKGE_STAT_TX_UTIL 0xFF020131 */
-#define OID_SKGE_STAT_TX_64 0xFF020132
-#define OID_SKGE_STAT_TX_127 0xFF020133
-#define OID_SKGE_STAT_TX_255 0xFF020134
-#define OID_SKGE_STAT_TX_511 0xFF020135
-#define OID_SKGE_STAT_TX_1023 0xFF020136
-#define OID_SKGE_STAT_TX_MAX 0xFF020137
-#define OID_SKGE_STAT_TX_SYNC 0xFF020138
-#define OID_SKGE_STAT_TX_SYNC_OCTETS 0xFF020139
-#define OID_SKGE_STAT_RX 0xFF02013A
-#define OID_SKGE_STAT_RX_OCTETS 0xFF02013B
-#define OID_SKGE_STAT_RX_BROADCAST 0xFF02013C
-#define OID_SKGE_STAT_RX_MULTICAST 0xFF02013D
-#define OID_SKGE_STAT_RX_UNICAST 0xFF02013E
-#define OID_SKGE_STAT_RX_PFLOWC 0xFF02013F
-#define OID_SKGE_STAT_RX_FLOWC 0xFF020140
-#define OID_SKGE_STAT_RX_PFLOWC_ERR 0xFF020141
-#define OID_SKGE_STAT_RX_FLOWC_UNKWN 0xFF020142
-#define OID_SKGE_STAT_RX_BURST 0xFF020143
-#define OID_SKGE_STAT_RX_MISSED 0xFF020144
-#define OID_SKGE_STAT_RX_FRAMING 0xFF020145
-#define OID_SKGE_STAT_RX_OVERFLOW 0xFF020146
-#define OID_SKGE_STAT_RX_JABBER 0xFF020147
-#define OID_SKGE_STAT_RX_CARRIER 0xFF020148
-#define OID_SKGE_STAT_RX_IR_LENGTH 0xFF020149
-#define OID_SKGE_STAT_RX_SYMBOL 0xFF02014A
-#define OID_SKGE_STAT_RX_SHORTS 0xFF02014B
-#define OID_SKGE_STAT_RX_RUNT 0xFF02014C
-#define OID_SKGE_STAT_RX_CEXT 0xFF02014D
-#define OID_SKGE_STAT_RX_TOO_LONG 0xFF02014E
-#define OID_SKGE_STAT_RX_FCS 0xFF02014F
-/* #define OID_SKGE_STAT_RX_UTIL 0xFF020150 */
-#define OID_SKGE_STAT_RX_64 0xFF020151
-#define OID_SKGE_STAT_RX_127 0xFF020152
-#define OID_SKGE_STAT_RX_255 0xFF020153
-#define OID_SKGE_STAT_RX_511 0xFF020154
-#define OID_SKGE_STAT_RX_1023 0xFF020155
-#define OID_SKGE_STAT_RX_MAX 0xFF020156
-#define OID_SKGE_STAT_RX_LONGFRAMES 0xFF020157
-
-#define OID_SKGE_RLMT_CHANGE_CTS 0xFF020160
-#define OID_SKGE_RLMT_CHANGE_TIME 0xFF020161
-#define OID_SKGE_RLMT_CHANGE_ESTIM 0xFF020162
-#define OID_SKGE_RLMT_CHANGE_THRES 0xFF020163
-
-#define OID_SKGE_RLMT_PORT_INDEX 0xFF020164
-#define OID_SKGE_RLMT_STATUS 0xFF020165
-#define OID_SKGE_RLMT_TX_HELLO_CTS 0xFF020166
-#define OID_SKGE_RLMT_RX_HELLO_CTS 0xFF020167
-#define OID_SKGE_RLMT_TX_SP_REQ_CTS 0xFF020168
-#define OID_SKGE_RLMT_RX_SP_CTS 0xFF020169
-
-#define OID_SKGE_RLMT_MONITOR_NUMBER 0xFF010150
-#define OID_SKGE_RLMT_MONITOR_INDEX 0xFF010151
-#define OID_SKGE_RLMT_MONITOR_ADDR 0xFF010152
-#define OID_SKGE_RLMT_MONITOR_ERRS 0xFF010153
-#define OID_SKGE_RLMT_MONITOR_TIMESTAMP 0xFF010154
-#define OID_SKGE_RLMT_MONITOR_ADMIN 0xFF010155
-
-#define OID_SKGE_TX_SW_QUEUE_LEN 0xFF020170
-#define OID_SKGE_TX_SW_QUEUE_MAX 0xFF020171
-#define OID_SKGE_TX_RETRY 0xFF020172
-#define OID_SKGE_RX_INTR_CTS 0xFF020173
-#define OID_SKGE_TX_INTR_CTS 0xFF020174
-#define OID_SKGE_RX_NO_BUF_CTS 0xFF020175
-#define OID_SKGE_TX_NO_BUF_CTS 0xFF020176
-#define OID_SKGE_TX_USED_DESCR_NO 0xFF020177
-#define OID_SKGE_RX_DELIVERED_CTS 0xFF020178
-#define OID_SKGE_RX_OCTETS_DELIV_CTS 0xFF020179
-#define OID_SKGE_RX_HW_ERROR_CTS 0xFF02017A
-#define OID_SKGE_TX_HW_ERROR_CTS 0xFF02017B
-#define OID_SKGE_IN_ERRORS_CTS 0xFF02017C
-#define OID_SKGE_OUT_ERROR_CTS 0xFF02017D
-#define OID_SKGE_ERR_RECOVERY_CTS 0xFF02017E
-#define OID_SKGE_SYSUPTIME 0xFF02017F
-
-#define OID_SKGE_ALL_DATA 0xFF020190
-
-/* Defines for VCT. */
-#define OID_SKGE_VCT_GET 0xFF020200
-#define OID_SKGE_VCT_SET 0xFF020201
-#define OID_SKGE_VCT_STATUS 0xFF020202
-
-
-/* VCT struct to store a backup copy of VCT data after a port reset. */
-typedef struct s_PnmiVct {
- SK_U8 VctStatus;
- SK_U8 PCableLen;
- SK_U32 PMdiPairLen[4];
- SK_U8 PMdiPairSts[4];
-} SK_PNMI_VCT;
-
-
-/* VCT status values (to be given to CPA via OID_SKGE_VCT_STATUS). */
-#define SK_PNMI_VCT_NONE 0
-#define SK_PNMI_VCT_OLD_VCT_DATA 1
-#define SK_PNMI_VCT_NEW_VCT_DATA 2
-#define SK_PNMI_VCT_OLD_DSP_DATA 4
-#define SK_PNMI_VCT_NEW_DSP_DATA 8
-#define SK_PNMI_VCT_RUNNING 16
-
-
-/* VCT cable test status. */
-#define SK_PNMI_VCT_NORMAL_CABLE 0
-#define SK_PNMI_VCT_SHORT_CABLE 1
-#define SK_PNMI_VCT_OPEN_CABLE 2
-#define SK_PNMI_VCT_TEST_FAIL 3
-#define SK_PNMI_VCT_IMPEDANCE_MISMATCH 4
-
-#define OID_SKGE_TRAP_SEN_WAR_LOW 500
-#define OID_SKGE_TRAP_SEN_WAR_UPP 501
-#define OID_SKGE_TRAP_SEN_ERR_LOW 502
-#define OID_SKGE_TRAP_SEN_ERR_UPP 503
-#define OID_SKGE_TRAP_RLMT_CHANGE_THRES 520
-#define OID_SKGE_TRAP_RLMT_CHANGE_PORT 521
-#define OID_SKGE_TRAP_RLMT_PORT_DOWN 522
-#define OID_SKGE_TRAP_RLMT_PORT_UP 523
-#define OID_SKGE_TRAP_RLMT_SEGMENTATION 524
-
-
-/*
- * Define error numbers and messages for syslog
- */
-#define SK_PNMI_ERR001 (SK_ERRBASE_PNMI + 1)
-#define SK_PNMI_ERR001MSG "SkPnmiGetStruct: Unknown OID"
-#define SK_PNMI_ERR002 (SK_ERRBASE_PNMI + 2)
-#define SK_PNMI_ERR002MSG "SkPnmiGetStruct: Cannot read VPD keys"
-#define SK_PNMI_ERR003 (SK_ERRBASE_PNMI + 3)
-#define SK_PNMI_ERR003MSG "OidStruct: Called with wrong OID"
-#define SK_PNMI_ERR004 (SK_ERRBASE_PNMI + 4)
-#define SK_PNMI_ERR004MSG "OidStruct: Called with wrong action"
-#define SK_PNMI_ERR005 (SK_ERRBASE_PNMI + 5)
-#define SK_PNMI_ERR005MSG "Perform: Cannot reset driver"
-#define SK_PNMI_ERR006 (SK_ERRBASE_PNMI + 6)
-#define SK_PNMI_ERR006MSG "Perform: Unknown OID action command"
-#define SK_PNMI_ERR007 (SK_ERRBASE_PNMI + 7)
-#define SK_PNMI_ERR007MSG "General: Driver description not initialized"
-#define SK_PNMI_ERR008 (SK_ERRBASE_PNMI + 8)
-#define SK_PNMI_ERR008MSG "Addr: Tried to get unknown OID"
-#define SK_PNMI_ERR009 (SK_ERRBASE_PNMI + 9)
-#define SK_PNMI_ERR009MSG "Addr: Unknown OID"
-#define SK_PNMI_ERR010 (SK_ERRBASE_PNMI + 10)
-#define SK_PNMI_ERR010MSG "CsumStat: Unknown OID"
-#define SK_PNMI_ERR011 (SK_ERRBASE_PNMI + 11)
-#define SK_PNMI_ERR011MSG "SensorStat: Sensor descr string too long"
-#define SK_PNMI_ERR012 (SK_ERRBASE_PNMI + 12)
-#define SK_PNMI_ERR012MSG "SensorStat: Unknown OID"
-#define SK_PNMI_ERR013 (SK_ERRBASE_PNMI + 13)
-#define SK_PNMI_ERR013MSG ""
-#define SK_PNMI_ERR014 (SK_ERRBASE_PNMI + 14)
-#define SK_PNMI_ERR014MSG "Vpd: Cannot read VPD keys"
-#define SK_PNMI_ERR015 (SK_ERRBASE_PNMI + 15)
-#define SK_PNMI_ERR015MSG "Vpd: Internal array for VPD keys to small"
-#define SK_PNMI_ERR016 (SK_ERRBASE_PNMI + 16)
-#define SK_PNMI_ERR016MSG "Vpd: Key string too long"
-#define SK_PNMI_ERR017 (SK_ERRBASE_PNMI + 17)
-#define SK_PNMI_ERR017MSG "Vpd: Invalid VPD status pointer"
-#define SK_PNMI_ERR018 (SK_ERRBASE_PNMI + 18)
-#define SK_PNMI_ERR018MSG "Vpd: VPD data not valid"
-#define SK_PNMI_ERR019 (SK_ERRBASE_PNMI + 19)
-#define SK_PNMI_ERR019MSG "Vpd: VPD entries list string too long"
-#define SK_PNMI_ERR021 (SK_ERRBASE_PNMI + 21)
-#define SK_PNMI_ERR021MSG "Vpd: VPD data string too long"
-#define SK_PNMI_ERR022 (SK_ERRBASE_PNMI + 22)
-#define SK_PNMI_ERR022MSG "Vpd: VPD data string too long should be errored before"
-#define SK_PNMI_ERR023 (SK_ERRBASE_PNMI + 23)
-#define SK_PNMI_ERR023MSG "Vpd: Unknown OID in get action"
-#define SK_PNMI_ERR024 (SK_ERRBASE_PNMI + 24)
-#define SK_PNMI_ERR024MSG "Vpd: Unknown OID in preset/set action"
-#define SK_PNMI_ERR025 (SK_ERRBASE_PNMI + 25)
-#define SK_PNMI_ERR025MSG "Vpd: Cannot write VPD after modify entry"
-#define SK_PNMI_ERR026 (SK_ERRBASE_PNMI + 26)
-#define SK_PNMI_ERR026MSG "Vpd: Cannot update VPD"
-#define SK_PNMI_ERR027 (SK_ERRBASE_PNMI + 27)
-#define SK_PNMI_ERR027MSG "Vpd: Cannot delete VPD entry"
-#define SK_PNMI_ERR028 (SK_ERRBASE_PNMI + 28)
-#define SK_PNMI_ERR028MSG "Vpd: Cannot update VPD after delete entry"
-#define SK_PNMI_ERR029 (SK_ERRBASE_PNMI + 29)
-#define SK_PNMI_ERR029MSG "General: Driver description string too long"
-#define SK_PNMI_ERR030 (SK_ERRBASE_PNMI + 30)
-#define SK_PNMI_ERR030MSG "General: Driver version not initialized"
-#define SK_PNMI_ERR031 (SK_ERRBASE_PNMI + 31)
-#define SK_PNMI_ERR031MSG "General: Driver version string too long"
-#define SK_PNMI_ERR032 (SK_ERRBASE_PNMI + 32)
-#define SK_PNMI_ERR032MSG "General: Cannot read VPD Name for HW descr"
-#define SK_PNMI_ERR033 (SK_ERRBASE_PNMI + 33)
-#define SK_PNMI_ERR033MSG "General: HW description string too long"
-#define SK_PNMI_ERR034 (SK_ERRBASE_PNMI + 34)
-#define SK_PNMI_ERR034MSG "General: Unknown OID"
-#define SK_PNMI_ERR035 (SK_ERRBASE_PNMI + 35)
-#define SK_PNMI_ERR035MSG "Rlmt: Unknown OID"
-#define SK_PNMI_ERR036 (SK_ERRBASE_PNMI + 36)
-#define SK_PNMI_ERR036MSG ""
-#define SK_PNMI_ERR037 (SK_ERRBASE_PNMI + 37)
-#define SK_PNMI_ERR037MSG "Rlmt: SK_RLMT_MODE_CHANGE event return not 0"
-#define SK_PNMI_ERR038 (SK_ERRBASE_PNMI + 38)
-#define SK_PNMI_ERR038MSG "Rlmt: SK_RLMT_PREFPORT_CHANGE event return not 0"
-#define SK_PNMI_ERR039 (SK_ERRBASE_PNMI + 39)
-#define SK_PNMI_ERR039MSG "RlmtStat: Unknown OID"
-#define SK_PNMI_ERR040 (SK_ERRBASE_PNMI + 40)
-#define SK_PNMI_ERR040MSG "PowerManagement: Unknown OID"
-#define SK_PNMI_ERR041 (SK_ERRBASE_PNMI + 41)
-#define SK_PNMI_ERR041MSG "MacPrivateConf: Unknown OID"
-#define SK_PNMI_ERR042 (SK_ERRBASE_PNMI + 42)
-#define SK_PNMI_ERR042MSG "MacPrivateConf: SK_HWEV_SET_ROLE returned not 0"
-#define SK_PNMI_ERR043 (SK_ERRBASE_PNMI + 43)
-#define SK_PNMI_ERR043MSG "MacPrivateConf: SK_HWEV_SET_LMODE returned not 0"
-#define SK_PNMI_ERR044 (SK_ERRBASE_PNMI + 44)
-#define SK_PNMI_ERR044MSG "MacPrivateConf: SK_HWEV_SET_FLOWMODE returned not 0"
-#define SK_PNMI_ERR045 (SK_ERRBASE_PNMI + 45)
-#define SK_PNMI_ERR045MSG "MacPrivateConf: SK_HWEV_SET_SPEED returned not 0"
-#define SK_PNMI_ERR046 (SK_ERRBASE_PNMI + 46)
-#define SK_PNMI_ERR046MSG "Monitor: Unknown OID"
-#define SK_PNMI_ERR047 (SK_ERRBASE_PNMI + 47)
-#define SK_PNMI_ERR047MSG "SirqUpdate: Event function returns not 0"
-#define SK_PNMI_ERR048 (SK_ERRBASE_PNMI + 48)
-#define SK_PNMI_ERR048MSG "RlmtUpdate: Event function returns not 0"
-#define SK_PNMI_ERR049 (SK_ERRBASE_PNMI + 49)
-#define SK_PNMI_ERR049MSG "SkPnmiInit: Invalid size of 'CounterOffset' struct!!"
-#define SK_PNMI_ERR050 (SK_ERRBASE_PNMI + 50)
-#define SK_PNMI_ERR050MSG "SkPnmiInit: Invalid size of 'StatAddr' table!!"
-#define SK_PNMI_ERR051 (SK_ERRBASE_PNMI + 51)
-#define SK_PNMI_ERR051MSG "SkPnmiEvent: Port switch suspicious"
-#define SK_PNMI_ERR052 (SK_ERRBASE_PNMI + 52)
-#define SK_PNMI_ERR052MSG ""
-
-/*
- * Management counter macros called by the driver
- */
-#define SK_PNMI_SET_DRIVER_DESCR(pAC,v) ((pAC)->Pnmi.pDriverDescription = \
- (char *)(v))
-
-#define SK_PNMI_SET_DRIVER_VER(pAC,v) ((pAC)->Pnmi.pDriverVersion = \
- (char *)(v))
-
-
-#define SK_PNMI_CNT_TX_QUEUE_LEN(pAC,v,p) \
- { \
- (pAC)->Pnmi.Port[p].TxSwQueueLen = (SK_U64)(v); \
- if ((pAC)->Pnmi.Port[p].TxSwQueueLen > (pAC)->Pnmi.Port[p].TxSwQueueMax) { \
- (pAC)->Pnmi.Port[p].TxSwQueueMax = (pAC)->Pnmi.Port[p].TxSwQueueLen; \
- } \
- }
-#define SK_PNMI_CNT_TX_RETRY(pAC,p) (((pAC)->Pnmi.Port[p].TxRetryCts)++)
-#define SK_PNMI_CNT_RX_INTR(pAC,p) (((pAC)->Pnmi.Port[p].RxIntrCts)++)
-#define SK_PNMI_CNT_TX_INTR(pAC,p) (((pAC)->Pnmi.Port[p].TxIntrCts)++)
-#define SK_PNMI_CNT_NO_RX_BUF(pAC,p) (((pAC)->Pnmi.Port[p].RxNoBufCts)++)
-#define SK_PNMI_CNT_NO_TX_BUF(pAC,p) (((pAC)->Pnmi.Port[p].TxNoBufCts)++)
-#define SK_PNMI_CNT_USED_TX_DESCR(pAC,v,p) \
- ((pAC)->Pnmi.Port[p].TxUsedDescrNo=(SK_U64)(v));
-#define SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,v,p) \
- { \
- ((pAC)->Pnmi.Port[p].RxDeliveredCts)++; \
- (pAC)->Pnmi.Port[p].RxOctetsDeliveredCts += (SK_U64)(v); \
- }
-#define SK_PNMI_CNT_ERR_RECOVERY(pAC,p) (((pAC)->Pnmi.Port[p].ErrRecoveryCts)++);
-
-#define SK_PNMI_CNT_SYNC_OCTETS(pAC,p,v) \
- { \
- if ((p) < SK_MAX_MACS) { \
- ((pAC)->Pnmi.Port[p].StatSyncCts)++; \
- (pAC)->Pnmi.Port[p].StatSyncOctetsCts += (SK_U64)(v); \
- } \
- }
-
-#define SK_PNMI_CNT_RX_LONGFRAMES(pAC,p) \
- { \
- if ((p) < SK_MAX_MACS) { \
- ((pAC)->Pnmi.Port[p].StatRxLongFrameCts++); \
- } \
- }
-
-#define SK_PNMI_CNT_RX_FRAMETOOLONG(pAC,p) \
- { \
- if ((p) < SK_MAX_MACS) { \
- ((pAC)->Pnmi.Port[p].StatRxFrameTooLongCts++); \
- } \
- }
-
-#define SK_PNMI_CNT_RX_PMACC_ERR(pAC,p) \
- { \
- if ((p) < SK_MAX_MACS) { \
- ((pAC)->Pnmi.Port[p].StatRxPMaccErr++); \
- } \
- }
-
-/*
- * Conversion Macros
- */
-#define SK_PNMI_PORT_INST2LOG(i) ((unsigned int)(i) - 1)
-#define SK_PNMI_PORT_LOG2INST(l) ((unsigned int)(l) + 1)
-#define SK_PNMI_PORT_PHYS2LOG(p) ((unsigned int)(p) + 1)
-#define SK_PNMI_PORT_LOG2PHYS(pAC,l) ((unsigned int)(l) - 1)
-#define SK_PNMI_PORT_PHYS2INST(pAC,p) \
- (pAC->Pnmi.DualNetActiveFlag ? 2 : ((unsigned int)(p) + 2))
-#define SK_PNMI_PORT_INST2PHYS(pAC,i) ((unsigned int)(i) - 2)
-
-/*
- * Structure definition for SkPnmiGetStruct and SkPnmiSetStruct
- */
-#define SK_PNMI_VPD_KEY_SIZE 5
-#define SK_PNMI_VPD_BUFSIZE (VPD_SIZE)
-#define SK_PNMI_VPD_ENTRIES (VPD_SIZE / 4)
-#define SK_PNMI_VPD_DATALEN 128 /* Number of data bytes */
-
-#define SK_PNMI_MULTICAST_LISTLEN 64
-#define SK_PNMI_SENSOR_ENTRIES (SK_MAX_SENSORS)
-#define SK_PNMI_CHECKSUM_ENTRIES 3
-#define SK_PNMI_MAC_ENTRIES (SK_MAX_MACS + 1)
-#define SK_PNMI_MONITOR_ENTRIES 20
-#define SK_PNMI_TRAP_ENTRIES 10
-#define SK_PNMI_TRAPLEN 128
-#define SK_PNMI_STRINGLEN1 80
-#define SK_PNMI_STRINGLEN2 25
-#define SK_PNMI_TRAP_QUEUE_LEN 512
-
-typedef struct s_PnmiVpd {
- char VpdKey[SK_PNMI_VPD_KEY_SIZE];
- char VpdValue[SK_PNMI_VPD_DATALEN];
- SK_U8 VpdAccess;
- SK_U8 VpdAction;
-} SK_PNMI_VPD;
-
-typedef struct s_PnmiSensor {
- SK_U8 SensorIndex;
- char SensorDescr[SK_PNMI_STRINGLEN2];
- SK_U8 SensorType;
- SK_U32 SensorValue;
- SK_U32 SensorWarningThresholdLow;
- SK_U32 SensorWarningThresholdHigh;
- SK_U32 SensorErrorThresholdLow;
- SK_U32 SensorErrorThresholdHigh;
- SK_U8 SensorStatus;
- SK_U64 SensorWarningCts;
- SK_U64 SensorErrorCts;
- SK_U64 SensorWarningTimestamp;
- SK_U64 SensorErrorTimestamp;
-} SK_PNMI_SENSOR;
-
-typedef struct s_PnmiChecksum {
- SK_U64 ChecksumRxOkCts;
- SK_U64 ChecksumRxUnableCts;
- SK_U64 ChecksumRxErrCts;
- SK_U64 ChecksumTxOkCts;
- SK_U64 ChecksumTxUnableCts;
-} SK_PNMI_CHECKSUM;
-
-typedef struct s_PnmiStat {
- SK_U64 StatTxOkCts;
- SK_U64 StatTxOctetsOkCts;
- SK_U64 StatTxBroadcastOkCts;
- SK_U64 StatTxMulticastOkCts;
- SK_U64 StatTxUnicastOkCts;
- SK_U64 StatTxLongFramesCts;
- SK_U64 StatTxBurstCts;
- SK_U64 StatTxPauseMacCtrlCts;
- SK_U64 StatTxMacCtrlCts;
- SK_U64 StatTxSingleCollisionCts;
- SK_U64 StatTxMultipleCollisionCts;
- SK_U64 StatTxExcessiveCollisionCts;
- SK_U64 StatTxLateCollisionCts;
- SK_U64 StatTxDeferralCts;
- SK_U64 StatTxExcessiveDeferralCts;
- SK_U64 StatTxFifoUnderrunCts;
- SK_U64 StatTxCarrierCts;
- SK_U64 Dummy1; /* StatTxUtilization */
- SK_U64 StatTx64Cts;
- SK_U64 StatTx127Cts;
- SK_U64 StatTx255Cts;
- SK_U64 StatTx511Cts;
- SK_U64 StatTx1023Cts;
- SK_U64 StatTxMaxCts;
- SK_U64 StatTxSyncCts;
- SK_U64 StatTxSyncOctetsCts;
- SK_U64 StatRxOkCts;
- SK_U64 StatRxOctetsOkCts;
- SK_U64 StatRxBroadcastOkCts;
- SK_U64 StatRxMulticastOkCts;
- SK_U64 StatRxUnicastOkCts;
- SK_U64 StatRxLongFramesCts;
- SK_U64 StatRxPauseMacCtrlCts;
- SK_U64 StatRxMacCtrlCts;
- SK_U64 StatRxPauseMacCtrlErrorCts;
- SK_U64 StatRxMacCtrlUnknownCts;
- SK_U64 StatRxBurstCts;
- SK_U64 StatRxMissedCts;
- SK_U64 StatRxFramingCts;
- SK_U64 StatRxFifoOverflowCts;
- SK_U64 StatRxJabberCts;
- SK_U64 StatRxCarrierCts;
- SK_U64 StatRxIRLengthCts;
- SK_U64 StatRxSymbolCts;
- SK_U64 StatRxShortsCts;
- SK_U64 StatRxRuntCts;
- SK_U64 StatRxCextCts;
- SK_U64 StatRxTooLongCts;
- SK_U64 StatRxFcsCts;
- SK_U64 Dummy2; /* StatRxUtilization */
- SK_U64 StatRx64Cts;
- SK_U64 StatRx127Cts;
- SK_U64 StatRx255Cts;
- SK_U64 StatRx511Cts;
- SK_U64 StatRx1023Cts;
- SK_U64 StatRxMaxCts;
-} SK_PNMI_STAT;
-
-typedef struct s_PnmiConf {
- char ConfMacCurrentAddr[6];
- char ConfMacFactoryAddr[6];
- SK_U8 ConfPMD;
- SK_U8 ConfConnector;
- SK_U8 ConfLinkCapability;
- SK_U8 ConfLinkMode;
- SK_U8 ConfLinkModeStatus;
- SK_U8 ConfLinkStatus;
- SK_U8 ConfFlowCtrlCapability;
- SK_U8 ConfFlowCtrlMode;
- SK_U8 ConfFlowCtrlStatus;
- SK_U8 ConfPhyOperationCapability;
- SK_U8 ConfPhyOperationMode;
- SK_U8 ConfPhyOperationStatus;
- SK_U8 ConfSpeedCapability;
- SK_U8 ConfSpeedMode;
- SK_U8 ConfSpeedStatus;
-} SK_PNMI_CONF;
-
-typedef struct s_PnmiRlmt {
- SK_U32 RlmtIndex;
- SK_U32 RlmtStatus;
- SK_U64 RlmtTxHelloCts;
- SK_U64 RlmtRxHelloCts;
- SK_U64 RlmtTxSpHelloReqCts;
- SK_U64 RlmtRxSpHelloCts;
-} SK_PNMI_RLMT;
-
-typedef struct s_PnmiRlmtMonitor {
- SK_U32 RlmtMonitorIndex;
- char RlmtMonitorAddr[6];
- SK_U64 RlmtMonitorErrorCts;
- SK_U64 RlmtMonitorTimestamp;
- SK_U8 RlmtMonitorAdmin;
-} SK_PNMI_RLMT_MONITOR;
-
-typedef struct s_PnmiRequestStatus {
- SK_U32 ErrorStatus;
- SK_U32 ErrorOffset;
-} SK_PNMI_REQUEST_STATUS;
-
-typedef struct s_PnmiStrucData {
- SK_U32 MgmtDBVersion;
- SK_PNMI_REQUEST_STATUS ReturnStatus;
- SK_U32 VpdFreeBytes;
- char VpdEntriesList[SK_PNMI_VPD_ENTRIES * SK_PNMI_VPD_KEY_SIZE];
- SK_U32 VpdEntriesNumber;
- SK_PNMI_VPD Vpd[SK_PNMI_VPD_ENTRIES];
- SK_U32 PortNumber;
- SK_U32 DeviceType;
- char DriverDescr[SK_PNMI_STRINGLEN1];
- char DriverVersion[SK_PNMI_STRINGLEN2];
- char HwDescr[SK_PNMI_STRINGLEN1];
- char HwVersion[SK_PNMI_STRINGLEN2];
- SK_U16 Chipset;
- SK_U32 MtuSize;
- SK_U32 Action;
- SK_U32 TestResult;
- SK_U8 BusType;
- SK_U8 BusSpeed;
- SK_U8 BusWidth;
- SK_U8 SensorNumber;
- SK_PNMI_SENSOR Sensor[SK_PNMI_SENSOR_ENTRIES];
- SK_U8 ChecksumNumber;
- SK_PNMI_CHECKSUM Checksum[SK_PNMI_CHECKSUM_ENTRIES];
- SK_PNMI_STAT Stat[SK_PNMI_MAC_ENTRIES];
- SK_PNMI_CONF Conf[SK_PNMI_MAC_ENTRIES];
- SK_U8 RlmtMode;
- SK_U32 RlmtPortNumber;
- SK_U8 RlmtPortActive;
- SK_U8 RlmtPortPreferred;
- SK_U64 RlmtChangeCts;
- SK_U64 RlmtChangeTime;
- SK_U64 RlmtChangeEstimate;
- SK_U64 RlmtChangeThreshold;
- SK_PNMI_RLMT Rlmt[SK_MAX_MACS];
- SK_U32 RlmtMonitorNumber;
- SK_PNMI_RLMT_MONITOR RlmtMonitor[SK_PNMI_MONITOR_ENTRIES];
- SK_U32 TrapNumber;
- SK_U8 Trap[SK_PNMI_TRAP_QUEUE_LEN];
- SK_U64 TxSwQueueLen;
- SK_U64 TxSwQueueMax;
- SK_U64 TxRetryCts;
- SK_U64 RxIntrCts;
- SK_U64 TxIntrCts;
- SK_U64 RxNoBufCts;
- SK_U64 TxNoBufCts;
- SK_U64 TxUsedDescrNo;
- SK_U64 RxDeliveredCts;
- SK_U64 RxOctetsDeliveredCts;
- SK_U64 RxHwErrorsCts;
- SK_U64 TxHwErrorsCts;
- SK_U64 InErrorsCts;
- SK_U64 OutErrorsCts;
- SK_U64 ErrRecoveryCts;
- SK_U64 SysUpTime;
-} SK_PNMI_STRUCT_DATA;
-
-#define SK_PNMI_STRUCT_SIZE (sizeof(SK_PNMI_STRUCT_DATA))
-#define SK_PNMI_MIN_STRUCT_SIZE ((unsigned int)(SK_UPTR)\
- &(((SK_PNMI_STRUCT_DATA *)0)->VpdFreeBytes))
- /*
- * ReturnStatus field
- * must be located
- * before VpdFreeBytes
- */
-
-/*
- * Various definitions
- */
-#define SK_PNMI_MAX_PROTOS 3
-
-#define SK_PNMI_CNT_NO 66 /* Must have the value of the enum
- * SK_PNMI_MAX_IDX. Define SK_PNMI_CHECK
- * for check while init phase 1
- */
-
-/*
- * Estimate data structure
- */
-typedef struct s_PnmiEstimate {
- unsigned int EstValueIndex;
- SK_U64 EstValue[7];
- SK_U64 Estimate;
- SK_TIMER EstTimer;
-} SK_PNMI_ESTIMATE;
-
-
-/*
- * VCT timer data structure
- */
-typedef struct s_VctTimer {
- SK_TIMER VctTimer;
-} SK_PNMI_VCT_TIMER;
-
-
-/*
- * PNMI specific adapter context structure
- */
-typedef struct s_PnmiPort {
- SK_U64 StatSyncCts;
- SK_U64 StatSyncOctetsCts;
- SK_U64 StatRxLongFrameCts;
- SK_U64 StatRxFrameTooLongCts;
- SK_U64 StatRxPMaccErr;
- SK_U64 TxSwQueueLen;
- SK_U64 TxSwQueueMax;
- SK_U64 TxRetryCts;
- SK_U64 RxIntrCts;
- SK_U64 TxIntrCts;
- SK_U64 RxNoBufCts;
- SK_U64 TxNoBufCts;
- SK_U64 TxUsedDescrNo;
- SK_U64 RxDeliveredCts;
- SK_U64 RxOctetsDeliveredCts;
- SK_U64 RxHwErrorsCts;
- SK_U64 TxHwErrorsCts;
- SK_U64 InErrorsCts;
- SK_U64 OutErrorsCts;
- SK_U64 ErrRecoveryCts;
- SK_U64 RxShortZeroMark;
- SK_U64 CounterOffset[SK_PNMI_CNT_NO];
- SK_U32 CounterHigh[SK_PNMI_CNT_NO];
- SK_BOOL ActiveFlag;
- SK_U8 Align[3];
-} SK_PNMI_PORT;
-
-
-typedef struct s_PnmiData {
- SK_PNMI_PORT Port [SK_MAX_MACS];
- SK_PNMI_PORT BufPort [SK_MAX_MACS]; /* 2002-09-13 pweber */
- SK_U64 VirtualCounterOffset[SK_PNMI_CNT_NO];
- SK_U32 TestResult;
- char HwVersion[10];
- SK_U16 Align01;
-
- char *pDriverDescription;
- char *pDriverVersion;
-
- int MacUpdatedFlag;
- int RlmtUpdatedFlag;
- int SirqUpdatedFlag;
-
- SK_U64 RlmtChangeCts;
- SK_U64 RlmtChangeTime;
- SK_PNMI_ESTIMATE RlmtChangeEstimate;
- SK_U64 RlmtChangeThreshold;
-
- SK_U64 StartUpTime;
- SK_U32 DeviceType;
- char PciBusSpeed;
- char PciBusWidth;
- char Chipset;
- char PMD;
- char Connector;
- SK_BOOL DualNetActiveFlag;
- SK_U16 Align02;
-
- char TrapBuf[SK_PNMI_TRAP_QUEUE_LEN];
- unsigned int TrapBufFree;
- unsigned int TrapQueueBeg;
- unsigned int TrapQueueEnd;
- unsigned int TrapBufPad;
- unsigned int TrapUnique;
- SK_U8 VctStatus[SK_MAX_MACS];
- SK_PNMI_VCT VctBackup[SK_MAX_MACS];
- SK_PNMI_VCT_TIMER VctTimeout[SK_MAX_MACS];
-} SK_PNMI;
-
-/*
- * Function prototypes
- */
-extern int SkPnmiInit(SK_AC *pAc, SK_IOC IoC, int level);
-extern int SkPnmiGetVar(SK_AC *pAc, SK_IOC IoC, SK_U32 Id, void* pBuf,
- unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiPreSetVar(SK_AC *pAc, SK_IOC IoC, SK_U32 Id,
- void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiSetVar(SK_AC *pAc, SK_IOC IoC, SK_U32 Id, void* pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiGetStruct(SK_AC *pAc, SK_IOC IoC, void* pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-extern int SkPnmiPreSetStruct(SK_AC *pAc, SK_IOC IoC, void* pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-extern int SkPnmiSetStruct(SK_AC *pAc, SK_IOC IoC, void* pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-extern int SkPnmiEvent(SK_AC *pAc, SK_IOC IoC, SK_U32 Event,
- SK_EVPARA Param);
-
-#endif
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgesirq.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.26 $
- * Date: $Date: 2002/10/14 09:52:36 $
- * Purpose: SK specific Gigabit Ethernet special IRQ functions
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- * $Log: skgesirq.h,v $
- * Revision 1.26 2002/10/14 09:52:36 rschmidt
- * Added SKERR_SIRQ_E023 and SKERR_SIRQ_E023 for GPHY (Yukon)
- * Editorial changes
- *
- * Revision 1.25 2002/07/15 18:15:52 rwahl
- * Editorial changes.
- *
- * Revision 1.24 2002/07/15 15:39:21 rschmidt
- * Corrected define for SKERR_SIRQ_E022
- * Editorial changes
- *
- * Revision 1.23 2002/04/25 11:09:45 rschmidt
- * Removed declarations for SkXmInitPhy(), SkXmRxTxEnable()
- * Editorial changes
- *
- * Revision 1.22 2000/11/09 11:30:10 rassmann
- * WA: Waiting after releasing reset until BCom chip is accessible.
- *
- * Revision 1.21 2000/10/18 12:22:40 cgoos
- * Added workaround for half duplex hangup.
- *
- * Revision 1.20 1999/12/06 10:00:44 cgoos
- * Added SET event for role.
- *
- * Revision 1.19 1999/11/22 13:58:26 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.18 1999/05/19 07:32:59 cgoos
- * Changes for 1000Base-T.
- *
- * Revision 1.17 1999/03/12 13:29:31 malthoff
- * Move Autonegotiation Error Codes to skgeinit.h.
- *
- * Revision 1.16 1999/03/08 10:11:28 gklug
- * add: AutoNegDone return codes
- *
- * Revision 1.15 1998/11/18 13:20:53 gklug
- * add: different timeouts for active and non-active links
- *
- * Revision 1.14 1998/11/04 07:18:14 cgoos
- * Added prototype for SkXmRxTxEnable.
- *
- * Revision 1.13 1998/10/21 05:52:23 gklug
- * add: parameter DoLoop to InitPhy function
- *
- * Revision 1.12 1998/10/19 06:45:03 cgoos
- * Added prototype for SkXmInitPhy.
- *
- * Revision 1.11 1998/10/15 14:34:10 gklug
- * add: WA_TIME is 500 msec
- *
- * Revision 1.10 1998/10/14 14:49:41 malthoff
- * Remove err log defines E021 and E022. They are
- * defined in skgeinit.h now.
- *
- * Revision 1.9 1998/10/14 14:00:39 gklug
- * add: error logs for init phys
- *
- * Revision 1.8 1998/10/14 05:44:05 gklug
- * add: E020
- *
- * Revision 1.7 1998/10/02 06:24:58 gklug
- * add: error messages
- *
- * Revision 1.6 1998/10/01 07:54:45 gklug
- * add: PNMI debug module
- *
- * Revision 1.5 1998/09/28 13:36:31 malthoff
- * Move the bit definitions for Autonegotiation
- * and Flow Control to skgeinit.h.
- *
- * Revision 1.4 1998/09/15 12:29:34 gklug
- * add: error logs
- *
- * Revision 1.3 1998/09/03 13:54:02 gklug
- * add: function prototypes
- *
- * Revision 1.2 1998/09/03 10:24:36 gklug
- * add: Events send by PNMI
- * add: parameter definition for Flow Control etc.
- *
- * Revision 1.1 1998/08/27 11:50:27 gklug
- * initial revision
- *
- *
- ******************************************************************************/
-
-#ifndef _INC_SKGESIRQ_H_
-#define _INC_SKGESIRQ_H_
-
-/*
- * Define the Event the special IRQ/INI module can handle
- */
-#define SK_HWEV_WATIM 1 /* Timeout for WA errata #2 XMAC */
-#define SK_HWEV_PORT_START 2 /* Port Start Event by RLMT */
-#define SK_HWEV_PORT_STOP 3 /* Port Stop Event by RLMT */
-#define SK_HWEV_CLEAR_STAT 4 /* Clear Statistics by PNMI */
-#define SK_HWEV_UPDATE_STAT 5 /* Update Statistics by PNMI */
-#define SK_HWEV_SET_LMODE 6 /* Set Link Mode by PNMI */
-#define SK_HWEV_SET_FLOWMODE 7 /* Set Flow Control Mode by PNMI */
-#define SK_HWEV_SET_ROLE 8 /* Set Master/Slave (Role) by PNMI */
-#define SK_HWEV_SET_SPEED 9 /* Set Link Speed by PNMI */
-#define SK_HWEV_HALFDUP_CHK 10 /* Half Duplex Hangup Workaround */
-
-#define SK_WA_ACT_TIME (5000000L) /* 5 sec */
-#define SK_WA_INA_TIME (100000L) /* 100 msec */
-
-#define SK_HALFDUP_CHK_TIME (10000L) /* 10 msec */
-
-/*
- * Define the error numbers and messages
- */
-#define SKERR_SIRQ_E001 (SK_ERRBASE_SIRQ+0)
-#define SKERR_SIRQ_E001MSG "Unknown event"
-#define SKERR_SIRQ_E002 (SKERR_SIRQ_E001+1)
-#define SKERR_SIRQ_E002MSG "Packet timeout RX1"
-#define SKERR_SIRQ_E003 (SKERR_SIRQ_E002+1)
-#define SKERR_SIRQ_E003MSG "Packet timeout RX2"
-#define SKERR_SIRQ_E004 (SKERR_SIRQ_E003+1)
-#define SKERR_SIRQ_E004MSG "MAC 1 not correctly initialized"
-#define SKERR_SIRQ_E005 (SKERR_SIRQ_E004+1)
-#define SKERR_SIRQ_E005MSG "MAC 2 not correctly initialized"
-#define SKERR_SIRQ_E006 (SKERR_SIRQ_E005+1)
-#define SKERR_SIRQ_E006MSG "CHECK failure R1"
-#define SKERR_SIRQ_E007 (SKERR_SIRQ_E006+1)
-#define SKERR_SIRQ_E007MSG "CHECK failure R2"
-#define SKERR_SIRQ_E008 (SKERR_SIRQ_E007+1)
-#define SKERR_SIRQ_E008MSG "CHECK failure XS1"
-#define SKERR_SIRQ_E009 (SKERR_SIRQ_E008+1)
-#define SKERR_SIRQ_E009MSG "CHECK failure XA1"
-#define SKERR_SIRQ_E010 (SKERR_SIRQ_E009+1)
-#define SKERR_SIRQ_E010MSG "CHECK failure XS2"
-#define SKERR_SIRQ_E011 (SKERR_SIRQ_E010+1)
-#define SKERR_SIRQ_E011MSG "CHECK failure XA2"
-#define SKERR_SIRQ_E012 (SKERR_SIRQ_E011+1)
-#define SKERR_SIRQ_E012MSG "unexpected IRQ Master error"
-#define SKERR_SIRQ_E013 (SKERR_SIRQ_E012+1)
-#define SKERR_SIRQ_E013MSG "unexpected IRQ Status error"
-#define SKERR_SIRQ_E014 (SKERR_SIRQ_E013+1)
-#define SKERR_SIRQ_E014MSG "Parity error on RAM (read)"
-#define SKERR_SIRQ_E015 (SKERR_SIRQ_E014+1)
-#define SKERR_SIRQ_E015MSG "Parity error on RAM (write)"
-#define SKERR_SIRQ_E016 (SKERR_SIRQ_E015+1)
-#define SKERR_SIRQ_E016MSG "Parity error MAC 1"
-#define SKERR_SIRQ_E017 (SKERR_SIRQ_E016+1)
-#define SKERR_SIRQ_E017MSG "Parity error MAC 2"
-#define SKERR_SIRQ_E018 (SKERR_SIRQ_E017+1)
-#define SKERR_SIRQ_E018MSG "Parity error RX 1"
-#define SKERR_SIRQ_E019 (SKERR_SIRQ_E018+1)
-#define SKERR_SIRQ_E019MSG "Parity error RX 2"
-#define SKERR_SIRQ_E020 (SKERR_SIRQ_E019+1)
-#define SKERR_SIRQ_E020MSG "MAC transmit FIFO underrun"
-#define SKERR_SIRQ_E021 (SKERR_SIRQ_E020+1)
-#define SKERR_SIRQ_E021MSG "Spurious TWSI interrupt"
-#define SKERR_SIRQ_E022 (SKERR_SIRQ_E021+1)
-#define SKERR_SIRQ_E022MSG "Cable pair swap error"
-#define SKERR_SIRQ_E023 (SKERR_SIRQ_E022+1)
-#define SKERR_SIRQ_E023MSG "Auto-negotiation error"
-#define SKERR_SIRQ_E024 (SKERR_SIRQ_E023+1)
-#define SKERR_SIRQ_E024MSG "FIFO overflow error"
-
-extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
-extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
-extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
-extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
-
-#endif /* _INC_SKGESIRQ_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: ski2c.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.34 $
- * Date: $Date: 2003/01/28 09:11:21 $
- * Purpose: Defines to access Voltage and Temperature Sensor
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: ski2c.h,v $
- * Revision 1.34 2003/01/28 09:11:21 rschmidt
- * Editorial changes
- *
- * Revision 1.33 2002/10/14 16:40:50 rschmidt
- * Editorial changes (TWSI)
- *
- * Revision 1.32 2002/08/13 08:55:07 rschmidt
- * Editorial changes
- *
- * Revision 1.31 2002/08/06 09:44:22 jschmalz
- * Extensions and changes for Yukon
- *
- * Revision 1.30 2001/04/05 11:38:09 rassmann
- * Set SenState to idle in SkI2cWaitIrq().
- * Changed error message in SkI2cWaitIrq().
- *
- * Revision 1.29 2000/08/03 14:28:17 rassmann
- * - Added function to wait for I2C being ready before resetting the board.
- * - Replaced one duplicate "out of range" message with correct one.
- *
- * Revision 1.28 1999/11/22 13:55:46 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.27 1999/05/20 09:23:10 cgoos
- * Changes for 1000Base-T (Fan sensors).
- *
- * Revision 1.26 1998/12/01 13:45:47 gklug
- * add: InitLevel to I2c struct
- *
- * Revision 1.25 1998/11/03 06:55:16 gklug
- * add: Dummy Reads to I2c struct
- *
- * Revision 1.24 1998/10/02 14:28:59 cgoos
- * Added prototype for SkI2cIsr.
- *
- * Revision 1.23 1998/09/08 12:20:11 gklug
- * add: prototypes for init and read functions
- *
- * Revision 1.22 1998/09/08 07:37:56 gklug
- * add: log error if PCI_IO voltage sensor could not be initialized
- *
- * Revision 1.21 1998/09/04 08:38:05 malthoff
- * Change the values for I2C_READ and I2C_WRITE
- *
- * Revision 1.20 1998/08/25 07:52:22 gklug
- * chg: Timestamps (last) added for logging
- *
- * Revision 1.19 1998/08/25 06:09:00 gklug
- * rmv: warning and error levels of the individual sensors.
- * add: timing definitions for sending traps and logging errors
- *
- * Revision 1.18 1998/08/20 11:41:15 gklug
- * chg: omit STRCPY macro by using char * as Sensor Description
- *
- * Revision 1.17 1998/08/20 11:37:43 gklug
- * chg: change Ioc to IoC
- *
- * Revision 1.16 1998/08/20 11:30:38 gklug
- * fix: SenRead declaration
- *
- * Revision 1.15 1998/08/20 11:27:53 gklug
- * fix: Compile bugs with new awrning constants
- *
- * Revision 1.14 1998/08/20 08:53:12 gklug
- * fix: compiler errors
- * add: Threshold values
- *
- * Revision 1.13 1998/08/19 12:21:16 gklug
- * fix: remove struct from C files (see CCC)
- * add: typedefs for all structs
- *
- * Revision 1.12 1998/08/19 10:57:41 gklug
- * add: Warning levels
- *
- * Revision 1.11 1998/08/18 08:37:02 malthoff
- * Prototypes not required for SK_DIAG.
- *
- * Revision 1.10 1998/08/17 13:54:00 gklug
- * fix: declaration of event function
- *
- * Revision 1.9 1998/08/17 06:48:39 malthoff
- * Remove some unrequired macros.
- * Fix the compiler errors.
- *
- * Revision 1.8 1998/08/14 06:47:19 gklug
- * fix: Values are intergers
- *
- * Revision 1.7 1998/08/14 06:26:05 gklug
- * add: Init error message
- *
- * Revision 1.6 1998/08/13 08:31:08 gklug
- * add: Error message
- *
- * Revision 1.5 1998/08/12 14:32:04 gklug
- * add: new error code/message
- *
- * Revision 1.4 1998/08/12 13:39:08 gklug
- * chg: names of error messages
- * add: defines for Sensor type and thresholds
- *
- * Revision 1.3 1998/08/11 07:57:16 gklug
- * add: sensor struct
- * add: Timeout defines
- * add: I2C control struct for pAC
- *
- * Revision 1.2 1998/07/17 11:29:02 gklug
- * rmv: Microwire and SMTPANIC
- *
- * Revision 1.1 1998/06/19 14:30:10 malthoff
- * Created. Sources taken from ML Project.
- *
- *
- ******************************************************************************/
-
-/*
- * SKI2C.H contains all I2C specific defines
- */
-
-#ifndef _SKI2C_H_
-#define _SKI2C_H_
-
-typedef struct s_Sensor SK_SENSOR;
-
-#include "h/skgei2c.h"
-
-/*
- * Define the I2C events.
- */
-#define SK_I2CEV_IRQ 1 /* IRQ happened Event */
-#define SK_I2CEV_TIM 2 /* Timeout event */
-#define SK_I2CEV_CLEAR 3 /* Clear MIB Values */
-
-/*
- * Define READ and WRITE Constants.
- */
-#undef I2C_READ /* just in case */
-#undef I2C_WRITE /* just in case */
-#define I2C_READ 0
-#define I2C_WRITE 1
-#define I2C_BURST 1
-#define I2C_SINGLE 0
-
-#define SKERR_I2C_E001 (SK_ERRBASE_I2C+0)
-#define SKERR_I2C_E001MSG "Sensor index unknown"
-#define SKERR_I2C_E002 (SKERR_I2C_E001+1)
-#define SKERR_I2C_E002MSG "TWSI: transfer does not complete"
-#define SKERR_I2C_E003 (SKERR_I2C_E002+1)
-#define SKERR_I2C_E003MSG "LM80: NAK on device send"
-#define SKERR_I2C_E004 (SKERR_I2C_E003+1)
-#define SKERR_I2C_E004MSG "LM80: NAK on register send"
-#define SKERR_I2C_E005 (SKERR_I2C_E004+1)
-#define SKERR_I2C_E005MSG "LM80: NAK on device (2) send"
-#define SKERR_I2C_E006 (SKERR_I2C_E005+1)
-#define SKERR_I2C_E006MSG "Unknown event"
-#define SKERR_I2C_E007 (SKERR_I2C_E006+1)
-#define SKERR_I2C_E007MSG "LM80 read out of state"
-#define SKERR_I2C_E008 (SKERR_I2C_E007+1)
-#define SKERR_I2C_E008MSG "Unexpected sensor read completed"
-#define SKERR_I2C_E009 (SKERR_I2C_E008+1)
-#define SKERR_I2C_E009MSG "WARNING: temperature sensor out of range"
-#define SKERR_I2C_E010 (SKERR_I2C_E009+1)
-#define SKERR_I2C_E010MSG "WARNING: voltage sensor out of range"
-#define SKERR_I2C_E011 (SKERR_I2C_E010+1)
-#define SKERR_I2C_E011MSG "ERROR: temperature sensor out of range"
-#define SKERR_I2C_E012 (SKERR_I2C_E011+1)
-#define SKERR_I2C_E012MSG "ERROR: voltage sensor out of range"
-#define SKERR_I2C_E013 (SKERR_I2C_E012+1)
-#define SKERR_I2C_E013MSG "ERROR: couldn't init sensor"
-#define SKERR_I2C_E014 (SKERR_I2C_E013+1)
-#define SKERR_I2C_E014MSG "WARNING: fan sensor out of range"
-#define SKERR_I2C_E015 (SKERR_I2C_E014+1)
-#define SKERR_I2C_E015MSG "ERROR: fan sensor out of range"
-#define SKERR_I2C_E016 (SKERR_I2C_E015+1)
-#define SKERR_I2C_E016MSG "TWSI: active transfer does not complete"
-
-/*
- * Define Timeout values
- */
-#define SK_I2C_TIM_LONG 2000000L /* 2 seconds */
-#define SK_I2C_TIM_SHORT 100000L /* 100 milliseconds */
-#define SK_I2C_TIM_WATCH 1000000L /* 1 second */
-
-/*
- * Define trap and error log hold times
- */
-#ifndef SK_SEN_ERR_TR_HOLD
-#define SK_SEN_ERR_TR_HOLD (4*SK_TICKS_PER_SEC)
-#endif
-#ifndef SK_SEN_ERR_LOG_HOLD
-#define SK_SEN_ERR_LOG_HOLD (60*SK_TICKS_PER_SEC)
-#endif
-#ifndef SK_SEN_WARN_TR_HOLD
-#define SK_SEN_WARN_TR_HOLD (15*SK_TICKS_PER_SEC)
-#endif
-#ifndef SK_SEN_WARN_LOG_HOLD
-#define SK_SEN_WARN_LOG_HOLD (15*60*SK_TICKS_PER_SEC)
-#endif
-
-/*
- * Defines for SenType
- */
-#define SK_SEN_UNKNOWN 0
-#define SK_SEN_TEMP 1
-#define SK_SEN_VOLT 2
-#define SK_SEN_FAN 3
-
-/*
- * Define for the SenErrorFlag
- */
-#define SK_SEN_ERR_NOT_PRESENT 0 /* Error Flag: Sensor not present */
-#define SK_SEN_ERR_OK 1 /* Error Flag: O.K. */
-#define SK_SEN_ERR_WARN 2 /* Error Flag: Warning */
-#define SK_SEN_ERR_ERR 3 /* Error Flag: Error */
-#define SK_SEN_ERR_FAULTY 4 /* Error Flag: Faulty */
-
-/*
- * Define the Sensor struct
- */
-struct s_Sensor {
- char *SenDesc; /* Description */
- int SenType; /* Voltage or Temperature */
- SK_I32 SenValue; /* Current value of the sensor */
- SK_I32 SenThreErrHigh; /* High error Threshhold of this sensor */
- SK_I32 SenThreWarnHigh; /* High warning Threshhold of this sensor */
- SK_I32 SenThreErrLow; /* Lower error Threshold of the sensor */
- SK_I32 SenThreWarnLow; /* Lower warning Threshold of the sensor */
- int SenErrFlag; /* Sensor indicated an error */
- SK_BOOL SenInit; /* Is sensor initialized ? */
- SK_U64 SenErrCts; /* Error trap counter */
- SK_U64 SenWarnCts; /* Warning trap counter */
- SK_U64 SenBegErrTS; /* Begin error timestamp */
- SK_U64 SenBegWarnTS; /* Begin warning timestamp */
- SK_U64 SenLastErrTrapTS; /* Last error trap timestamp */
- SK_U64 SenLastErrLogTS; /* Last error log timestamp */
- SK_U64 SenLastWarnTrapTS; /* Last warning trap timestamp */
- SK_U64 SenLastWarnLogTS; /* Last warning log timestamp */
- int SenState; /* Sensor State (see HW specific include) */
- int (*SenRead)(SK_AC *pAC, SK_IOC IoC, struct s_Sensor *pSen);
- /* Sensors read function */
- SK_U16 SenReg; /* Register Address for this sensor */
- SK_U8 SenDev; /* Device Selection for this sensor */
-};
-
-typedef struct s_I2c {
- SK_SENSOR SenTable[SK_MAX_SENSORS]; /* Sensor Table */
- int CurrSens; /* Which sensor is currently queried */
- int MaxSens; /* Max. number of sensors */
- int TimerMode; /* Use the timer also to watch the state machine */
- int InitLevel; /* Initialized Level */
-#ifndef SK_DIAG
- int DummyReads; /* Number of non-checked dummy reads */
- SK_TIMER SenTimer; /* Sensors timer */
-#endif /* !SK_DIAG */
-} SK_I2C;
-
-extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
-#ifndef SK_DIAG
-extern int SkI2cEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
-extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
-extern void SkI2cWaitIrq(SK_AC *pAC, SK_IOC IoC);
-extern void SkI2cIsr(SK_AC *pAC, SK_IOC IoC);
-
-#endif
-#endif /* n_SKI2C_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skqueue.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.14 $
- * Date: $Date: 2002/03/15 10:52:13 $
- * Purpose: Defines for the Event queue
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skqueue.h,v $
- * Revision 1.14 2002/03/15 10:52:13 mkunz
- * Added event classes for link aggregation
- *
- * Revision 1.13 1999/11/22 13:59:05 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.12 1998/09/08 08:48:01 gklug
- * add: init level handling
- *
- * Revision 1.11 1998/09/03 14:15:11 gklug
- * add: CSUM and HWAC Eventclass and function.
- * fix: pParaPtr according to CCC
- *
- * Revision 1.10 1998/08/20 12:43:03 gklug
- * add: typedef SK_QUEUE
- *
- * Revision 1.9 1998/08/19 09:50:59 gklug
- * fix: remove struct keyword from c-code (see CCC) add typedefs
- *
- * Revision 1.8 1998/08/18 07:00:01 gklug
- * fix: SK_PTR not defined use void * instead.
- *
- * Revision 1.7 1998/08/17 13:43:19 gklug
- * chg: Parameter will be union of 64bit para, 2 times SK_U32 or SK_PTR
- *
- * Revision 1.6 1998/08/14 07:09:30 gklug
- * fix: chg pAc -> pAC
- *
- * Revision 1.5 1998/08/11 14:26:44 gklug
- * chg: Event Dispatcher returns now int.
- *
- * Revision 1.4 1998/08/11 12:15:21 gklug
- * add: Error numbers of skqueue module
- *
- * Revision 1.3 1998/08/07 12:54:23 gklug
- * fix: first compiled version
- *
- * Revision 1.2 1998/08/07 09:34:00 gklug
- * adapt structure defs to CCC
- * add: prototypes for functions
- *
- * Revision 1.1 1998/07/30 14:52:12 gklug
- * Initial version.
- * Defines Event Classes, Event structs and queue management variables.
- *
- *
- *
- ******************************************************************************/
-
-/*
- * SKQUEUE.H contains all defines and types for the event queue
- */
-
-#ifndef _SKQUEUE_H_
-#define _SKQUEUE_H_
-
-
-/*
- * define the event classes to be served
- */
-#define SKGE_DRV 1 /* Driver Event Class */
-#define SKGE_RLMT 2 /* RLMT Event Class */
-#define SKGE_I2C 3 /* i2C Event Class */
-#define SKGE_PNMI 4 /* PNMI Event Class */
-#define SKGE_CSUM 5 /* Checksum Event Class */
-#define SKGE_HWAC 6 /* Hardware Access Event Class */
-
-#define SKGE_SWT 9 /* Software Timer Event Class */
-#define SKGE_LACP 10 /* LACP Aggregation Event Class */
-#define SKGE_RSF 11 /* RSF Aggregation Event Class */
-#define SKGE_MARKER 12 /* MARKER Aggregation Event Class */
-#define SKGE_FD 13 /* FD Distributor Event Class */
-
-/*
- * define event queue as circular buffer
- */
-#define SK_MAX_EVENT 64
-
-/*
- * Parameter union for the Para stuff
- */
-typedef union u_EvPara {
- void *pParaPtr; /* Parameter Pointer */
- SK_U64 Para64; /* Parameter 64bit version */
- SK_U32 Para32[2]; /* Parameter Array of 32bit parameters */
-} SK_EVPARA;
-
-/*
- * Event Queue
- * skqueue.c
- * events are class/value pairs
- * class is addressee, e.g. RMT, PCM etc.
- * value is command, e.g. line state change, ring op change etc.
- */
-typedef struct s_EventElem {
- SK_U32 Class ; /* Event class */
- SK_U32 Event ; /* Event value */
- SK_EVPARA Para ; /* Event parameter */
-} SK_EVENTELEM;
-
-typedef struct s_Queue {
- SK_EVENTELEM EvQueue[SK_MAX_EVENT];
- SK_EVENTELEM *EvPut ;
- SK_EVENTELEM *EvGet ;
-} SK_QUEUE;
-
-extern void SkEventInit(SK_AC *pAC, SK_IOC Ioc, int Level);
-extern void SkEventQueue(SK_AC *pAC, SK_U32 Class, SK_U32 Event,
- SK_EVPARA Para);
-extern int SkEventDispatcher(SK_AC *pAC,SK_IOC Ioc);
-
-
-/* Define Error Numbers and messages */
-#define SKERR_Q_E001 (SK_ERRBASE_QUEUE+0)
-#define SKERR_Q_E001MSG "Event queue overflow"
-#define SKERR_Q_E002 (SKERR_Q_E001+1)
-#define SKERR_Q_E002MSG "Undefined event class"
-#endif /* _SKQUEUE_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skrlmt.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.35 $
- * Date: $Date: 2003/01/31 14:12:41 $
- * Purpose: Header file for Redundant Link ManagemenT.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skrlmt.h,v $
- * Revision 1.35 2003/01/31 14:12:41 mkunz
- * single port adapter runs now with two identical MAC addresses
- *
- * Revision 1.34 2002/09/23 15:13:41 rwahl
- * Editorial changes.
- *
- * Revision 1.33 2001/07/03 12:16:48 mkunz
- * New Flag ChgBcPrio (Change priority of last broadcast received)
- *
- * Revision 1.32 2001/02/14 14:06:31 rassmann
- * Editorial changes.
- *
- * Revision 1.31 2001/02/05 14:25:26 rassmann
- * Prepared RLMT for transparent operation.
- *
- * Revision 1.30 2001/01/22 13:41:39 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.29 2000/11/17 08:58:00 rassmann
- * Moved CheckSwitch from SK_RLMT_PACKET_RECEIVED to SK_RLMT_TIM event.
- *
- * Revision 1.28 2000/11/09 12:24:34 rassmann
- * Editorial changes.
- *
- * Revision 1.27 1999/11/22 13:59:56 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.26 1999/10/04 14:01:19 rassmann
- * Corrected reaction to reception of BPDU frames (#10441).
- *
- * Revision 1.25 1999/07/20 12:53:39 rassmann
- * Fixed documentation errors for lookahead macros.
- *
- * Revision 1.24 1999/05/28 11:15:56 rassmann
- * Changed behaviour to reflect Design Spec v1.2.
- * Controlling Link LED(s).
- * Introduced RLMT Packet Version field in RLMT Packet.
- * Newstyle lookahead macros (checking meta-information before looking at
- * the packet).
- *
- * Revision 1.23 1999/01/28 12:50:42 rassmann
- * Not using broadcast time stamps in CheckLinkState mode.
- *
- * Revision 1.22 1999/01/27 14:13:04 rassmann
- * Monitoring broadcast traffic.
- * Switching more reliably and not too early if switch is
- * configured for spanning tree.
- *
- * Revision 1.21 1998/12/08 13:11:25 rassmann
- * Stopping SegTimer at RlmtStop.
- *
- * Revision 1.20 1998/11/24 12:37:33 rassmann
- * Implemented segmentation check.
- *
- * Revision 1.19 1998/11/17 13:43:06 rassmann
- * Handling (logical) tx failure.
- * Sending packet on logical address after PORT_SWITCH.
- *
- * Revision 1.18 1998/11/13 16:56:56 rassmann
- * Added macro version of SkRlmtLookaheadPacket.
- *
- * Revision 1.17 1998/11/06 18:06:05 rassmann
- * Corrected timing when RLMT checks fail.
- * Clearing tx counter earlier in periodical checks.
- *
- * Revision 1.16 1998/11/03 13:53:50 rassmann
- * RLMT should switch now (at least in mode 3).
- *
- * Revision 1.15 1998/10/22 11:39:52 rassmann
- * Corrected signed/unsigned mismatches.
- * Corrected receive list handling and address recognition.
- *
- * Revision 1.14 1998/10/15 15:16:36 rassmann
- * Finished Spanning Tree checking.
- * Checked with lint.
- *
- * Revision 1.13 1998/09/24 19:16:08 rassmann
- * Code cleanup.
- * Introduced Timer for PORT_DOWN due to no RX.
- *
- * Revision 1.12 1998/09/16 11:09:52 rassmann
- * Syntax corrections.
- *
- * Revision 1.11 1998/09/15 11:28:50 rassmann
- * Syntax corrections.
- *
- * Revision 1.10 1998/09/14 17:07:38 rassmann
- * Added code for port checking via LAN.
- * Changed Mbuf definition.
- *
- * Revision 1.9 1998/09/07 11:14:15 rassmann
- * Syntax corrections.
- *
- * Revision 1.8 1998/09/07 09:06:08 rassmann
- * Syntax corrections.
- *
- * Revision 1.7 1998/09/04 19:41:34 rassmann
- * Syntax corrections.
- * Started entering code for checking local links.
- *
- * Revision 1.6 1998/09/04 12:14:28 rassmann
- * Interface cleanup.
- *
- * Revision 1.5 1998/09/02 16:55:29 rassmann
- * Updated to reflect new DRV/HWAC/RLMT interface.
- *
- * Revision 1.4 1998/09/02 07:26:02 afischer
- * typedef for SK_RLMT_PORT
- *
- * Revision 1.3 1998/08/27 14:29:03 rassmann
- * Code cleanup.
- *
- * Revision 1.2 1998/08/27 14:26:25 rassmann
- * Updated interface.
- *
- * Revision 1.1 1998/08/21 08:29:10 rassmann
- * First public version.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This is the header file for Redundant Link ManagemenT.
- *
- * Include File Hierarchy:
- *
- * "skdrv1st.h"
- * ...
- * "sktypes.h"
- * "skqueue.h"
- * "skaddr.h"
- * "skrlmt.h"
- * ...
- * "skdrv2nd.h"
- *
- ******************************************************************************/
-
-#ifndef __INC_SKRLMT_H
-#define __INC_SKRLMT_H
-
-#ifdef __cplusplus
-#error C++ is not yet supported.
-extern "C" {
-#endif /* cplusplus */
-
-/* defines ********************************************************************/
-
-#define SK_RLMT_NET_DOWN_TEMP 1 /* NET_DOWN due to last port down. */
-#define SK_RLMT_NET_DOWN_FINAL 2 /* NET_DOWN due to RLMT_STOP. */
-
-/* ----- Default queue sizes - must be multiples of 8 KB ----- */
-
-/* Less than 8 KB free in RX queue => pause frames. */
-#define SK_RLMT_STANDBY_QRXSIZE 128 /* Size of rx standby queue in KB. */
-#define SK_RLMT_STANDBY_QXASIZE 32 /* Size of async standby queue in KB. */
-#define SK_RLMT_STANDBY_QXSSIZE 0 /* Size of sync standby queue in KB. */
-
-#define SK_RLMT_MAX_TX_BUF_SIZE 60 /* Maximum RLMT transmit size. */
-
-/* ----- PORT states ----- */
-
-#define SK_RLMT_PS_INIT 0 /* Port state: Init. */
-#define SK_RLMT_PS_LINK_DOWN 1 /* Port state: Link down. */
-#define SK_RLMT_PS_DOWN 2 /* Port state: Port down. */
-#define SK_RLMT_PS_GOING_UP 3 /* Port state: Going up. */
-#define SK_RLMT_PS_UP 4 /* Port state: Up. */
-
-/* ----- RLMT states ----- */
-
-#define SK_RLMT_RS_INIT 0 /* RLMT state: Init. */
-#define SK_RLMT_RS_NET_DOWN 1 /* RLMT state: Net down. */
-#define SK_RLMT_RS_NET_UP 2 /* RLMT state: Net up. */
-
-/* ----- PORT events ----- */
-
-#define SK_RLMT_LINK_UP 1001 /* Link came up. */
-#define SK_RLMT_LINK_DOWN 1002 /* Link went down. */
-#define SK_RLMT_PORT_ADDR 1003 /* Port address changed. */
-
-/* ----- RLMT events ----- */
-
-#define SK_RLMT_START 2001 /* Start RLMT. */
-#define SK_RLMT_STOP 2002 /* Stop RLMT. */
-#define SK_RLMT_PACKET_RECEIVED 2003 /* Packet was received for RLMT. */
-#define SK_RLMT_STATS_CLEAR 2004 /* Clear statistics. */
-#define SK_RLMT_STATS_UPDATE 2005 /* Update statistics. */
-#define SK_RLMT_PREFPORT_CHANGE 2006 /* Change preferred port. */
-#define SK_RLMT_MODE_CHANGE 2007 /* New RlmtMode. */
-#define SK_RLMT_SET_NETS 2008 /* Number of Nets (1 or 2). */
-
-/* ----- RLMT mode bits ----- */
-
-/*
- * CAUTION: These defines are private to RLMT.
- * Please use the RLMT mode defines below.
- */
-
-#define SK_RLMT_CHECK_LINK 1 /* Check Link. */
-#define SK_RLMT_CHECK_LOC_LINK 2 /* Check other link on same adapter. */
-#define SK_RLMT_CHECK_SEG 4 /* Check segmentation. */
-
-#ifndef RLMT_CHECK_REMOTE
-#define SK_RLMT_CHECK_OTHERS SK_RLMT_CHECK_LOC_LINK
-#else /* RLMT_CHECK_REMOTE */
-#define SK_RLMT_CHECK_REM_LINK 8 /* Check link(s) on other adapter(s). */
-#define SK_RLMT_MAX_REMOTE_PORTS_CHECKED 3
-#define SK_RLMT_CHECK_OTHERS \
- (SK_RLMT_CHECK_LOC_LINK | SK_RLMT_CHECK_REM_LINK)
-#endif /* RLMT_CHECK_REMOTE */
-
-#ifndef SK_RLMT_ENABLE_TRANSPARENT
-#define SK_RLMT_TRANSPARENT 0 /* RLMT transparent - inactive. */
-#else /* SK_RLMT_ENABLE_TRANSPARENT */
-#define SK_RLMT_TRANSPARENT 128 /* RLMT transparent. */
-#endif /* SK_RLMT_ENABLE_TRANSPARENT */
-
-/* ----- RLMT modes ----- */
-
-/* Check Link State. */
-#define SK_RLMT_MODE_CLS (SK_RLMT_CHECK_LINK)
-
-/* Check Local Ports: check other links on the same adapter. */
-#define SK_RLMT_MODE_CLP (SK_RLMT_CHECK_LINK | SK_RLMT_CHECK_LOC_LINK)
-
-/* Check Local Ports and Segmentation Status. */
-#define SK_RLMT_MODE_CLPSS \
- (SK_RLMT_CHECK_LINK | SK_RLMT_CHECK_LOC_LINK | SK_RLMT_CHECK_SEG)
-
-#ifdef RLMT_CHECK_REMOTE
-/* Check Local and Remote Ports: check links (local or remote). */
- Name of define TBD!
-#define SK_RLMT_MODE_CRP \
- (SK_RLMT_CHECK_LINK | SK_RLMT_CHECK_LOC_LINK | SK_RLMT_CHECK_REM_LINK)
-
-/* Check Local and Remote Ports and Segmentation Status. */
- Name of define TBD!
-#define SK_RLMT_MODE_CRPSS \
- (SK_RLMT_CHECK_LINK | SK_RLMT_CHECK_LOC_LINK | \
- SK_RLMT_CHECK_REM_LINK | SK_RLMT_CHECK_SEG)
-#endif /* RLMT_CHECK_REMOTE */
-
-/* ----- RLMT lookahead result bits ----- */
-
-#define SK_RLMT_RX_RLMT 1 /* Give packet to RLMT. */
-#define SK_RLMT_RX_PROTOCOL 2 /* Give packet to protocol. */
-
-/* Macros */
-
-#if 0
-SK_AC *pAC /* adapter context */
-SK_U32 PortNum /* receiving port */
-unsigned PktLen /* received packet's length */
-SK_BOOL IsBc /* Flag: packet is broadcast */
-unsigned *pOffset /* offs. of bytes to present to SK_RLMT_LOOKAHEAD */
-unsigned *pNumBytes /* #Bytes to present to SK_RLMT_LOOKAHEAD */
-#endif /* 0 */
-
-#define SK_RLMT_PRE_LOOKAHEAD(pAC,PortNum,PktLen,IsBc,pOffset,pNumBytes) { \
- SK_AC *_pAC; \
- SK_U32 _PortNum; \
- _pAC = (pAC); \
- _PortNum = (SK_U32)(PortNum); \
- /* _pAC->Rlmt.Port[_PortNum].PacketsRx++; */ \
- _pAC->Rlmt.Port[_PortNum].PacketsPerTimeSlot++; \
- if (_pAC->Rlmt.RlmtOff) { \
- *(pNumBytes) = 0; \
- } \
- else {\
- if ((_pAC->Rlmt.Port[_PortNum].Net->RlmtMode & SK_RLMT_TRANSPARENT) != 0) { \
- *(pNumBytes) = 0; \
- } \
- else if (IsBc) { \
- if (_pAC->Rlmt.Port[_PortNum].Net->RlmtMode != SK_RLMT_MODE_CLS) { \
- *(pNumBytes) = 6; \
- *(pOffset) = 6; \
- } \
- else { \
- *(pNumBytes) = 0; \
- } \
- } \
- else { \
- if ((PktLen) > SK_RLMT_MAX_TX_BUF_SIZE) { \
- /* _pAC->Rlmt.Port[_PortNum].DataPacketsPerTimeSlot++; */ \
- *(pNumBytes) = 0; \
- } \
- else { \
- *(pNumBytes) = 6; \
- *(pOffset) = 0; \
- } \
- } \
- } \
-}
-
-#if 0
-SK_AC *pAC /* adapter context */
-SK_U32 PortNum /* receiving port */
-SK_U8 *pLaPacket, /* received packet's data (points to pOffset) */
-SK_BOOL IsBc /* Flag: packet is broadcast */
-SK_BOOL IsMc /* Flag: packet is multicast */
-unsigned *pForRlmt /* Result: bits SK_RLMT_RX_RLMT, SK_RLMT_RX_PROTOCOL */
-SK_RLMT_LOOKAHEAD() expects *pNumBytes from
-packet offset *pOffset (s.a.) at *pLaPacket.
-
-If you use SK_RLMT_LOOKAHEAD in a path where you already know if the packet is
-BC, MC, or UC, you should use constants for IsBc and IsMc, so that your compiler
-can trash unneeded parts of the if construction.
-#endif /* 0 */
-
-#define SK_RLMT_LOOKAHEAD(pAC,PortNum,pLaPacket,IsBc,IsMc,pForRlmt) { \
- SK_AC *_pAC; \
- SK_U32 _PortNum; \
- SK_U8 *_pLaPacket; \
- _pAC = (pAC); \
- _PortNum = (SK_U32)(PortNum); \
- _pLaPacket = (SK_U8 *)(pLaPacket); \
- if (IsBc) {\
- if (!SK_ADDR_EQUAL(_pLaPacket, _pAC->Addr.Net[_pAC->Rlmt.Port[ \
- _PortNum].Net->NetNumber].CurrentMacAddress.a)) { \
- _pAC->Rlmt.Port[_PortNum].BcTimeStamp = SkOsGetTime(_pAC); \
- _pAC->Rlmt.CheckSwitch = SK_TRUE; \
- } \
- /* _pAC->Rlmt.Port[_PortNum].DataPacketsPerTimeSlot++; */ \
- *(pForRlmt) = SK_RLMT_RX_PROTOCOL; \
- } \
- else if (IsMc) { \
- if (SK_ADDR_EQUAL(_pLaPacket, BridgeMcAddr.a)) { \
- _pAC->Rlmt.Port[_PortNum].BpduPacketsPerTimeSlot++; \
- if (_pAC->Rlmt.Port[_PortNum].Net->RlmtMode & SK_RLMT_CHECK_SEG) { \
- *(pForRlmt) = SK_RLMT_RX_RLMT | SK_RLMT_RX_PROTOCOL; \
- } \
- else { \
- *(pForRlmt) = SK_RLMT_RX_PROTOCOL; \
- } \
- } \
- else if (SK_ADDR_EQUAL(_pLaPacket, SkRlmtMcAddr.a)) { \
- *(pForRlmt) = SK_RLMT_RX_RLMT; \
- } \
- else { \
- /* _pAC->Rlmt.Port[_PortNum].DataPacketsPerTimeSlot++; */ \
- *(pForRlmt) = SK_RLMT_RX_PROTOCOL; \
- } \
- } \
- else { \
- if (SK_ADDR_EQUAL( \
- _pLaPacket, \
- _pAC->Addr.Port[_PortNum].CurrentMacAddress.a)) { \
- *(pForRlmt) = SK_RLMT_RX_RLMT; \
- } \
- else { \
- /* _pAC->Rlmt.Port[_PortNum].DataPacketsPerTimeSlot++; */ \
- *(pForRlmt) = SK_RLMT_RX_PROTOCOL; \
- } \
- } \
-}
-
-#ifdef SK_RLMT_FAST_LOOKAHEAD
-Error: SK_RLMT_FAST_LOOKAHEAD no longer used. Use new macros for lookahead.
-#endif /* SK_RLMT_FAST_LOOKAHEAD */
-#ifdef SK_RLMT_SLOW_LOOKAHEAD
-Error: SK_RLMT_SLOW_LOOKAHEAD no longer used. Use new macros for lookahead.
-#endif /* SK_RLMT_SLOW_LOOKAHEAD */
-
-/* typedefs *******************************************************************/
-
-#ifdef SK_RLMT_MBUF_PRIVATE
-typedef struct s_RlmtMbuf {
- some content
-} SK_RLMT_MBUF;
-#endif /* SK_RLMT_MBUF_PRIVATE */
-
-
-#ifdef SK_LA_INFO
-typedef struct s_Rlmt_PacketInfo {
- unsigned PacketLength; /* Length of packet. */
- unsigned PacketType; /* Directed/Multicast/Broadcast. */
-} SK_RLMT_PINFO;
-#endif /* SK_LA_INFO */
-
-
-typedef struct s_RootId {
- SK_U8 Id[8]; /* Root Bridge Id. */
-} SK_RLMT_ROOT_ID;
-
-
-typedef struct s_port {
- SK_MAC_ADDR CheckAddr;
- SK_BOOL SuspectTx;
-} SK_PORT_CHECK;
-
-
-typedef struct s_RlmtNet SK_RLMT_NET;
-
-
-typedef struct s_RlmtPort {
-
-/* ----- Public part (read-only) ----- */
-
- SK_U8 PortState; /* Current state of this port. */
-
- /* For PNMI */
- SK_BOOL LinkDown;
- SK_BOOL PortDown;
- SK_U8 Align01;
-
- SK_U32 PortNumber; /* Number of port on adapter. */
- SK_RLMT_NET * Net; /* Net port belongs to. */
-
- SK_U64 TxHelloCts;
- SK_U64 RxHelloCts;
- SK_U64 TxSpHelloReqCts;
- SK_U64 RxSpHelloCts;
-
-/* ----- Private part ----- */
-
-/* SK_U64 PacketsRx; */ /* Total packets received. */
- SK_U32 PacketsPerTimeSlot; /* Packets rxed between TOs. */
-/* SK_U32 DataPacketsPerTimeSlot; */ /* Data packets ... */
- SK_U32 BpduPacketsPerTimeSlot; /* BPDU packets rxed in TS. */
- SK_U64 BcTimeStamp; /* Time of last BC receive. */
- SK_U64 GuTimeStamp; /* Time of entering GOING_UP. */
-
- SK_TIMER UpTimer; /* Timer struct Link/Port up. */
- SK_TIMER DownRxTimer; /* Timer struct down rx. */
- SK_TIMER DownTxTimer; /* Timer struct down tx. */
-
- SK_U32 CheckingState; /* Checking State. */
-
- SK_ADDR_PORT * AddrPort;
-
- SK_U8 Random[4]; /* Random value. */
- unsigned PortsChecked; /* #ports checked. */
- unsigned PortsSuspect; /* #ports checked that are s. */
- SK_PORT_CHECK PortCheck[1];
-/* SK_PORT_CHECK PortCheck[SK_MAX_MACS - 1]; */
-
- SK_BOOL PortStarted; /* Port is started. */
- SK_BOOL PortNoRx; /* NoRx for >= 1 time slot. */
- SK_BOOL RootIdSet;
- SK_RLMT_ROOT_ID Root; /* Root Bridge Id. */
-} SK_RLMT_PORT;
-
-
-struct s_RlmtNet {
-
-/* ----- Public part (read-only) ----- */
-
- SK_U32 NetNumber; /* Number of net. */
-
- SK_RLMT_PORT * Port[SK_MAX_MACS]; /* Ports that belong to this net. */
- SK_U32 NumPorts; /* Number of ports. */
- SK_U32 PrefPort; /* Preferred port. */
-
- /* For PNMI */
-
- SK_U32 ChgBcPrio; /* Change Priority of last broadcast received */
- SK_U32 RlmtMode; /* Check ... */
- SK_U32 ActivePort; /* Active port. */
- SK_U32 Preference; /* 0xFFFFFFFF: Automatic. */
-
- SK_U8 RlmtState; /* Current RLMT state. */
-
-/* ----- Private part ----- */
- SK_BOOL RootIdSet;
- SK_U16 Align01;
-
- int LinksUp; /* #Links up. */
- int PortsUp; /* #Ports up. */
- SK_U32 TimeoutValue; /* RLMT timeout value. */
-
- SK_U32 CheckingState; /* Checking State. */
- SK_RLMT_ROOT_ID Root; /* Root Bridge Id. */
-
- SK_TIMER LocTimer; /* Timer struct. */
- SK_TIMER SegTimer; /* Timer struct. */
-};
-
-
-typedef struct s_Rlmt {
-
-/* ----- Public part (read-only) ----- */
-
- SK_U32 NumNets; /* Number of nets. */
- SK_U32 NetsStarted; /* Number of nets started. */
- SK_RLMT_NET Net[SK_MAX_NETS]; /* Array of available nets. */
- SK_RLMT_PORT Port[SK_MAX_MACS]; /* Array of available ports. */
-
-/* ----- Private part ----- */
- SK_BOOL CheckSwitch;
- SK_BOOL RlmtOff; /* set to zero if the Mac addresses
- are equal or the second one
- is zero */
- SK_U16 Align01;
-
-} SK_RLMT;
-
-
-extern SK_MAC_ADDR BridgeMcAddr;
-extern SK_MAC_ADDR SkRlmtMcAddr;
-
-/* function prototypes ********************************************************/
-
-
-#ifndef SK_KR_PROTO
-
-/* Functions provided by SkRlmt */
-
-/* ANSI/C++ compliant function prototypes */
-
-extern void SkRlmtInit(
- SK_AC *pAC,
- SK_IOC IoC,
- int Level);
-
-extern int SkRlmtEvent(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 Event,
- SK_EVPARA Para);
-
-#else /* defined(SK_KR_PROTO) */
-
-/* Non-ANSI/C++ compliant function prototypes */
-
-#error KR-style function prototypes are not yet provided.
-
-#endif /* defined(SK_KR_PROTO)) */
-
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __INC_SKRLMT_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: sktimer.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.9 $
- * Date: $Date: 1999/11/22 14:00:29 $
- * Purpose: Defines for the timer functions
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: sktimer.h,v $
- * Revision 1.9 1999/11/22 14:00:29 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.8 1998/09/08 08:48:02 gklug
- * add: init level handling
- *
- * Revision 1.7 1998/08/20 12:31:29 gklug
- * fix: SK_TIMCTRL needs to be defined
- *
- * Revision 1.6 1998/08/19 09:51:00 gklug
- * fix: remove struct keyword from c-code (see CCC) add typedefs
- *
- * Revision 1.5 1998/08/17 13:43:21 gklug
- * chg: Parameter will be union of 64bit para, 2 times SK_U32 or SK_PTR
- *
- * Revision 1.4 1998/08/14 07:09:31 gklug
- * fix: chg pAc -> pAC
- *
- * Revision 1.3 1998/08/07 12:54:24 gklug
- * fix: first compiled version
- *
- * Revision 1.2 1998/08/07 09:35:29 gklug
- * add: Timer control struct for Adapters context
- * add: function prototypes
- *
- * Revision 1.1 1998/08/05 11:27:01 gklug
- * First version: adapted from SMT
- *
- *
- ******************************************************************************/
-
-/*
- * SKTIMER.H contains all defines and types for the timer functions
- */
-
-#ifndef _SKTIMER_H_
-#define _SKTIMER_H_
-
-#include "h/skqueue.h"
-
-/*
- * SK timer
- * - needed wherever a timer is used. Put this in your data structure
- * wherever you want.
- */
-typedef struct s_Timer SK_TIMER;
-
-struct s_Timer {
- SK_TIMER *TmNext ; /* linked list */
- SK_U32 TmClass ; /* Timer Event class */
- SK_U32 TmEvent ; /* Timer Event value */
- SK_EVPARA TmPara ; /* Timer Event parameter */
- SK_U32 TmDelta ; /* delta time */
- int TmActive ; /* flag : active/inactive */
-} ;
-
-/*
- * Timer control struct.
- * - use in Adapters context name pAC->Tim
- */
-typedef struct s_TimCtrl {
- SK_TIMER *StQueue ; /* Head of Timer queue */
-} SK_TIMCTRL ;
-
-extern void SkTimerInit(SK_AC *pAC,SK_IOC Ioc, int Level);
-extern void SkTimerStop(SK_AC *pAC,SK_IOC Ioc,SK_TIMER *pTimer);
-extern void SkTimerStart(SK_AC *pAC,SK_IOC Ioc,SK_TIMER *pTimer,
- SK_U32 Time,SK_U32 Class,SK_U32 Event,SK_EVPARA Para);
-extern void SkTimerDone(SK_AC *pAC,SK_IOC Ioc);
-#endif /* _SKTIMER_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: sktypes.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.3 $
- * Date: $Date: 2003/02/25 14:16:40 $
- * Purpose: Define data types for Linux
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
- /*****************************************************************************
- *
- * History:
- *
- * $Log: sktypes.h,v $
- * Revision 1.3 2003/02/25 14:16:40 mlindner
- * Fix: Copyright statement
- *
- * Revision 1.2 1999/11/22 14:01:58 cgoos
- * Changed license header to GPL.
- * Now using Linux' fixed size types instead of standard types.
- *
- * Revision 1.1 1999/02/16 07:41:40 cgoos
- * First version.
- *
- *
- *
- *****************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * In this file, all data types that are needed by the common modules
- * are mapped to Linux data types.
- *
- *
- * Include File Hierarchy:
- *
- *
- ******************************************************************************/
-
-#ifndef __INC_SKTYPES_H
-#define __INC_SKTYPES_H
-
-
-/* defines *******************************************************************/
-
-/*
- * Data types with a specific size. 'I' = signed, 'U' = unsigned.
- */
-#define SK_I8 s8
-#define SK_U8 u8
-#define SK_I16 s16
-#define SK_U16 u16
-#define SK_I32 s32
-#define SK_U32 u32
-#define SK_I64 s64
-#define SK_U64 u64
-
-#define SK_UPTR ulong /* casting pointer <-> integral */
-
-/*
-* Boolean type.
-*/
-#define SK_BOOL SK_U8
-#define SK_FALSE 0
-#define SK_TRUE (!SK_FALSE)
-
-/* typedefs *******************************************************************/
-
-/* function prototypes ********************************************************/
-
-#endif /* __INC_SKTYPES_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: version.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.4 $
- * Date: $Date: 2003/02/25 14:16:40 $
- * Purpose: SK specific Error log support
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- * $Log: skversion.h,v $
- * Revision 1.4 2003/02/25 14:16:40 mlindner
- * Fix: Copyright statement
- *
- * Revision 1.3 2003/02/25 13:30:18 mlindner
- * Add: Support for various vendors
- *
- * Revision 1.1.2.1 2001/09/05 13:38:30 mlindner
- * Removed FILE description
- *
- * Revision 1.1 2001/03/06 09:25:00 mlindner
- * first version
- *
- *
- *
- ******************************************************************************/
-
-
-static const char SysKonnectFileId[] = "@(#) (C) SysKonnect GmbH.";
-static const char SysKonnectBuildNumber[] =
- "@(#)SK-BUILD: 6.05 PL: 01";
-
-#define BOOT_STRING "sk98lin: Network Device Driver v6.05\n" \
- "(C)Copyright 1999-2003 Marvell(R)."
-
-#define VER_STRING "6.05"
+++ /dev/null
-/******************************************************************************
- *
- * Name: skvpd.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.15 $
- * Date: $Date: 2003/01/13 10:39:38 $
- * Purpose: Defines and Macros for VPD handling
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skvpd.h,v $
- * Revision 1.15 2003/01/13 10:39:38 rschmidt
- * Replaced define for PCI device Id for YUKON with GENESIS
- * Editorial changes
- *
- * Revision 1.14 2002/11/14 15:18:10 gheinig
- * Added const specifier to key and buf parameters for VpdPara,VpdRead
- * and VpdWrite. This is necessary for the Diag 7 GUI API
- *
- * Revision 1.13 2002/10/14 15:58:18 rschmidt
- * Added entry in rom_size struct s_vpd
- * Editorial changes
- *
- * Revision 1.12 2002/09/09 14:43:51 mkarl
- * added PCI Id of Yukon for reading VPD in diag before the adapter has
- * been initialized
- * editorial changes
- *
- * Revision 1.11 2002/07/26 13:19:16 mkarl
- * added support for Yukon
- * added vpd_size to VPD struct
- *
- * Revision 1.10 2000/08/10 11:29:07 rassmann
- * Editorial changes.
- * Preserving 32-bit alignment in structs for the adapter context.
- * Removed unused function VpdWriteDword() (#if 0).
- * Made VpdReadKeyword() available for SKDIAG only.
- *
- * Revision 1.9 1999/11/22 14:02:27 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.8 1999/03/11 14:26:40 malthoff
- * Replace __STDC__ with SK_KR_PROTO.
- *
- * Revision 1.7 1998/10/28 07:27:17 gklug
- * rmv: SWAP macros
- * add: VPD_IN/OUT8 macros
- * chg: interface definition
- *
- * Revision 1.6 1998/10/22 10:03:44 gklug
- * fix: use SK_OUT16 instead of SK_OUTW
- *
- * Revision 1.5 1998/10/14 07:05:31 cgoos
- * Changed constants in SK_SWAP_32 to UL.
- *
- * Revision 1.4 1998/08/19 08:14:09 gklug
- * fix: remove struct keyword as much as possible from the C-code (see CCC)
- *
- * Revision 1.3 1998/08/18 08:18:56 malthoff
- * Modify VPD in and out macros for SK_DIAG
- *
- * Revision 1.2 1998/07/03 14:49:08 malthoff
- * Add VPD_INxx() and VPD_OUTxx() macros for the Diagnostics tool.
- *
- * Revision 1.1 1998/06/19 14:08:03 malthoff
- * Created.
- *
- *
- ******************************************************************************/
-
-/*
- * skvpd.h contains Diagnostic specific defines for VPD handling
- */
-
-#ifndef __INC_SKVPD_H_
-#define __INC_SKVPD_H_
-
-/*
- * Define Resource Type Identifiers and VPD keywords
- */
-#define RES_ID 0x82 /* Resource Type ID String (Product Name) */
-#define RES_VPD_R 0x90 /* start of VPD read only area */
-#define RES_VPD_W 0x91 /* start of VPD read/write area */
-#define RES_END 0x78 /* Resource Type End Tag */
-
-#ifndef VPD_NAME
-#define VPD_NAME "Name" /* Product Name, VPD name of RES_ID */
-#endif /* VPD_NAME */
-#define VPD_PN "PN" /* Adapter Part Number */
-#define VPD_EC "EC" /* Adapter Engineering Level */
-#define VPD_MN "MN" /* Manufacture ID */
-#define VPD_SN "SN" /* Serial Number */
-#define VPD_CP "CP" /* Extended Capability */
-#define VPD_RV "RV" /* Checksum and Reserved */
-#define VPD_YA "YA" /* Asset Tag Identifier */
-#define VPD_VL "VL" /* First Error Log Message (SK specific) */
-#define VPD_VF "VF" /* Second Error Log Message (SK specific) */
-#define VPD_RW "RW" /* Remaining Read / Write Area */
-
-/* 'type' values for vpd_setup_para() */
-#define VPD_RO_KEY 1 /* RO keys are "PN", "EC", "MN", "SN", "RV" */
-#define VPD_RW_KEY 2 /* RW keys are "Yx", "Vx", and "RW" */
-
-/* 'op' values for vpd_setup_para() */
-#define ADD_KEY 1 /* add the key at the pos "RV" or "RW" */
-#define OWR_KEY 2 /* overwrite key if already exists */
-
-/*
- * Define READ and WRITE Constants.
- */
-
-#define VPD_DEV_ID_GENESIS 0x4300
-
-#define VPD_SIZE_YUKON 256
-#define VPD_SIZE_GENESIS 512
-#define VPD_SIZE 512
-#define VPD_READ 0x0000
-#define VPD_WRITE 0x8000
-
-#define VPD_STOP(pAC,IoC) VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG,VPD_WRITE)
-
-#define VPD_GET_RES_LEN(p) ((unsigned int) \
- (* (SK_U8 *)&(p)[1]) |\
- ((* (SK_U8 *)&(p)[2]) << 8))
-#define VPD_GET_VPD_LEN(p) ((unsigned int)(* (SK_U8 *)&(p)[2]))
-#define VPD_GET_VAL(p) ((char *)&(p)[3])
-
-#define VPD_MAX_LEN 50
-
-/* VPD status */
- /* bit 7..1 reserved */
-#define VPD_VALID (1<<0) /* VPD data buffer, vpd_free_ro, */
- /* and vpd_free_rw valid */
-
-/*
- * VPD structs
- */
-typedef struct s_vpd_status {
- unsigned short Align01; /* Alignment */
- unsigned short vpd_status; /* VPD status, description see above */
- int vpd_free_ro; /* unused bytes in read only area */
- int vpd_free_rw; /* bytes available in read/write area */
-} SK_VPD_STATUS;
-
-typedef struct s_vpd {
- SK_VPD_STATUS v; /* VPD status structure */
- char vpd_buf[VPD_SIZE]; /* VPD buffer */
- int rom_size; /* VPD ROM Size from PCI_OUR_REG_2 */
- int vpd_size; /* saved VPD-size */
-} SK_VPD;
-
-typedef struct s_vpd_para {
- unsigned int p_len; /* parameter length */
- char *p_val; /* points to the value */
-} SK_VPD_PARA;
-
-/*
- * structure of Large Resource Type Identifiers
- */
-
-/* was removed because of alignment problems */
-
-/*
- * structure of VPD keywords
- */
-typedef struct s_vpd_key {
- char p_key[2]; /* 2 bytes ID string */
- unsigned char p_len; /* 1 byte length */
- char p_val; /* start of the value string */
-} SK_VPD_KEY;
-
-
-/*
- * System specific VPD macros
- */
-#ifndef SKDIAG
-#ifndef VPD_DO_IO
-#define VPD_OUT8(pAC,IoC,Addr,Val) (void)SkPciWriteCfgByte(pAC,Addr,Val)
-#define VPD_OUT16(pAC,IoC,Addr,Val) (void)SkPciWriteCfgWord(pAC,Addr,Val)
-#define VPD_OUT32(pAC,IoC,Addr,Val) (void)SkPciWriteCfgDWord(pAC,Addr,Val)
-#define VPD_IN8(pAC,IoC,Addr,pVal) (void)SkPciReadCfgByte(pAC,Addr,pVal)
-#define VPD_IN16(pAC,IoC,Addr,pVal) (void)SkPciReadCfgWord(pAC,Addr,pVal)
-#define VPD_IN32(pAC,IoC,Addr,pVal) (void)SkPciReadCfgDWord(pAC,Addr,pVal)
-#else /* VPD_DO_IO */
-#define VPD_OUT8(pAC,IoC,Addr,Val) SK_OUT8(IoC,PCI_C(Addr),Val)
-#define VPD_OUT16(pAC,IoC,Addr,Val) SK_OUT16(IoC,PCI_C(Addr),Val)
-#define VPD_OUT32(pAC,IoC,Addr,Val) SK_OUT32(IoC,PCI_C(Addr),Val)
-#define VPD_IN8(pAC,IoC,Addr,pVal) SK_IN8(IoC,PCI_C(Addr),pVal)
-#define VPD_IN16(pAC,IoC,Addr,pVal) SK_IN16(IoC,PCI_C(Addr),pVal)
-#define VPD_IN32(pAC,IoC,Addr,pVal) SK_IN32(IoC,PCI_C(Addr),pVal)
-#endif /* VPD_DO_IO */
-#else /* SKDIAG */
-#define VPD_OUT8(pAC,Ioc,Addr,Val) { \
- if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciWriteCfgByte(pAC,Addr,Val); \
- else \
- SK_OUT8(pAC,PCI_C(Addr),Val); \
- }
-#define VPD_OUT16(pAC,Ioc,Addr,Val) { \
- if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciWriteCfgWord(pAC,Addr,Val); \
- else \
- SK_OUT16(pAC,PCI_C(Addr),Val); \
- }
-#define VPD_OUT32(pAC,Ioc,Addr,Val) { \
- if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciWriteCfgDWord(pAC,Addr,Val); \
- else \
- SK_OUT32(pAC,PCI_C(Addr),Val); \
- }
-#define VPD_IN8(pAC,Ioc,Addr,pVal) { \
- if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciReadCfgByte(pAC,Addr,pVal); \
- else \
- SK_IN8(pAC,PCI_C(Addr),pVal); \
- }
-#define VPD_IN16(pAC,Ioc,Addr,pVal) { \
- if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciReadCfgWord(pAC,Addr,pVal); \
- else \
- SK_IN16(pAC,PCI_C(Addr),pVal); \
- }
-#define VPD_IN32(pAC,Ioc,Addr,pVal) { \
- if ((pAC)->DgT.DgUseCfgCycle) \
- SkPciReadCfgDWord(pAC,Addr,pVal); \
- else \
- SK_IN32(pAC,PCI_C(Addr),pVal); \
- }
-#endif /* nSKDIAG */
-
-/* function prototypes ********************************************************/
-
-#ifndef SK_KR_PROTO
-#ifdef SKDIAG
-extern SK_U32 VpdReadDWord(
- SK_AC *pAC,
- SK_IOC IoC,
- int addr);
-#endif /* SKDIAG */
-
-extern int VpdSetupPara(
- SK_AC *pAC,
- const char *key,
- const char *buf,
- int len,
- int type,
- int op);
-
-extern SK_VPD_STATUS *VpdStat(
- SK_AC *pAC,
- SK_IOC IoC);
-
-extern int VpdKeys(
- SK_AC *pAC,
- SK_IOC IoC,
- char *buf,
- int *len,
- int *elements);
-
-extern int VpdRead(
- SK_AC *pAC,
- SK_IOC IoC,
- const char *key,
- char *buf,
- int *len);
-
-extern SK_BOOL VpdMayWrite(
- char *key);
-
-extern int VpdWrite(
- SK_AC *pAC,
- SK_IOC IoC,
- const char *key,
- const char *buf);
-
-extern int VpdDelete(
- SK_AC *pAC,
- SK_IOC IoC,
- char *key);
-
-extern int VpdUpdate(
- SK_AC *pAC,
- SK_IOC IoC);
-
-extern void VpdErrLog(
- SK_AC *pAC,
- SK_IOC IoC,
- char *msg);
-
-#ifdef SKDIAG
-extern int VpdReadBlock(
- SK_AC *pAC,
- SK_IOC IoC,
- char *buf,
- int addr,
- int len);
-
-extern int VpdWriteBlock(
- SK_AC *pAC,
- SK_IOC IoC,
- char *buf,
- int addr,
- int len);
-#endif /* SKDIAG */
-#else /* SK_KR_PROTO */
-extern SK_U32 VpdReadDWord();
-extern int VpdSetupPara();
-extern SK_VPD_STATUS *VpdStat();
-extern int VpdKeys();
-extern int VpdRead();
-extern SK_BOOL VpdMayWrite();
-extern int VpdWrite();
-extern int VpdDelete();
-extern int VpdUpdate();
-extern void VpdErrLog();
-#endif /* SK_KR_PROTO */
-
-#endif /* __INC_SKVPD_H_ */
+++ /dev/null
-/******************************************************************************
- *
- * Name: xmac_ii.h
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.46 $
- * Date: $Date: 2003/01/28 09:47:45 $
- * Purpose: Defines and Macros for Gigabit Ethernet Controller
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: xmac_ii.h,v $
- * Revision 1.46 2003/01/28 09:47:45 rschmidt
- * Added defines for copper MDI/MDIX configuration
- * Added defines for LED Control Register
- * Editorial changes
- *
- * Revision 1.45 2002/12/10 14:35:13 rschmidt
- * Corrected defines for Extended PHY Specific Control
- * Added defines for Ext. PHY Specific Ctrl 2 Reg. (Fiber specific)
- *
- * Revision 1.44 2002/12/09 14:58:41 rschmidt
- * Added defines for Ext. PHY Specific Ctrl Reg. (downshift feature)
- * Added 'GMR_FS_UN_SIZE'-Bit to Rx GMAC FIFO Flush Mask
- *
- * Revision 1.43 2002/12/05 10:14:45 rschmidt
- * Added define for GMAC's Half Duplex Burst Mode
- * Added define for Rx GMAC FIFO Flush Mask (default)
- *
- * Revision 1.42 2002/11/12 16:48:19 rschmidt
- * Added defines for Cable Diagnostic Register (GPHY)
- * Editorial changes
- *
- * Revision 1.41 2002/10/21 11:20:22 rschmidt
- * Added bit GMR_FS_GOOD_FC to GMR_FS_ANY_ERR
- * Editorial changes
- *
- * Revision 1.40 2002/10/14 14:54:14 rschmidt
- * Added defines for GPHY Specific Status and GPHY Interrupt Status
- * Added bits PHY_M_IS_AN_ERROR and PHY_M_IS_FIFO_ERROR to PHY_M_DEF_MSK
- * Editorial changes
- *
- * Revision 1.39 2002/10/10 15:53:44 mkarl
- * added some bit definitions for link speed status and LED's
- *
- * Revision 1.38 2002/08/21 16:23:46 rschmidt
- * Added defines for PHY Specific Ctrl Reg
- * Editorial changes
- *
- * Revision 1.37 2002/08/16 14:50:33 rschmidt
- * Added defines for Auto-Neg. Advertisement YUKON Fiber (88E1011S only)
- * Changed define PHY_M_DEF_MSK for GPHY IRQ Mask
- * Editorial changes
- *
- * Revision 1.36 2002/08/12 13:21:10 rschmidt
- * Added defines for different Broadcom PHY Ids
- *
- * Revision 1.35 2002/08/08 15:58:01 rschmidt
- * Added defines for Manual LED Override register (YUKON)
- * Editorial changes
- *
- * Revision 1.34 2002/07/31 17:23:36 rwahl
- * Added define GMR_FS_ANY_ERR (analogous to XMR_FS_ANY_ERR).
- *
- * Revision 1.33 2002/07/23 16:03:37 rschmidt
- * Added defines for GPHY registers
- * Editorial changes
- *
- * Revision 1.32 2002/07/15 18:14:37 rwahl
- * Added GMAC MIB counters definitions.
- * Editorial changes.
- *
- * Revision 1.31 2002/07/15 15:42:50 rschmidt
- * Removed defines from PHY specific reg. which are
- * common to all PHYs
- * Added defines for GMAC MIB Counters
- * Editorial changes
- *
- * Revision 1.30 2002/06/05 08:22:12 rschmidt
- * Changed defines for GMAC Rx Control Register and Rx Status
- * Editorial changes
- *
- * Revision 1.29 2002/04/25 11:43:56 rschmidt
- * Added define PHY_B_AS_PAUSE_MSK for BCom Pause Res.
- * Added new registers and defines for YUKON (GMAC, GPHY)
- * Added Receive Frame Status Encoding for YUKON
- * Editorial changes
- *
- * Revision 1.28 2000/11/09 12:32:49 rassmann
- * Renamed variables.
- *
- * Revision 1.27 2000/05/17 11:00:46 malthoff
- * Add bit for enable/disable power management in BCOM chip.
- *
- * Revision 1.26 1999/11/22 14:03:00 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.25 1999/08/12 19:19:38 malthoff
- * Add PHY_B_AC_TX_TST bit according to BCOM A1 errata sheet.
- *
- * Revision 1.24 1999/07/30 11:27:21 cgoos
- * Fixed a missing end-of-comment.
- *
- * Revision 1.23 1999/07/30 07:03:31 malthoff
- * Cut some long comments.
- * Correct the XMAC PHY ID definitions.
- *
- * Revision 1.22 1999/05/19 07:33:18 cgoos
- * Changes for 1000Base-T.
- *
- * Revision 1.21 1999/03/25 07:46:11 malthoff
- * Add XM_HW_CFG, XM_TS_READ, and XM_TS_LOAD registers.
- *
- * Revision 1.20 1999/03/12 13:36:09 malthoff
- * Remove __STDC__.
- *
- * Revision 1.19 1998/12/10 12:22:54 gklug
- * fix: RX_PAGE must be in interrupt mask
- *
- * Revision 1.18 1998/12/10 10:36:36 gklug
- * fix: swap of pause bits
- *
- * Revision 1.17 1998/11/18 13:21:45 gklug
- * fix: Default interrupt mask
- *
- * Revision 1.16 1998/10/29 15:53:21 gklug
- * fix: Default mask uses ASS (GP0) signal
- *
- * Revision 1.15 1998/10/28 13:52:52 malthoff
- * Add new bits in RX_CMD register.
- *
- * Revision 1.14 1998/10/19 15:34:53 gklug
- * fix: typos
- *
- * Revision 1.13 1998/10/14 07:19:03 malthoff
- * bug fix: Every define which describes bit 31
- * must be declared as unsigned long 'UL'.
- * fix bit definitions of PHY_AN_RFB and PHY_AN_PAUSE.
- * Remove ANP defines. Rework the RFB defines.
- *
- * Revision 1.12 1998/10/14 06:22:44 cgoos
- * Changed shifted constant to ULONG.
- *
- * Revision 1.11 1998/10/14 05:43:26 gklug
- * add: shift pause coding
- * fix: PAUSE bits definition
- *
- * Revision 1.10 1998/10/13 09:19:21 malthoff
- * Again change XMR_FS_ANY_ERR because of new info from XaQti.
- *
- * Revision 1.9 1998/10/09 07:58:30 malthoff
- * Add XMR_FS_FCS_ERR to XMR_FS_ANY_ERR.
- *
- * Revision 1.8 1998/10/09 07:18:17 malthoff
- * bug fix of a bug fix: XM_PAUSE_MODE and XM_DEF_MODE
- * are not inverted! Bug XM_DEF_MSK is inverted.
- *
- * Revision 1.7 1998/10/05 08:04:32 malthoff
- * bug fix: XM_PAUSE_MODE and XM_DEF_MODE
- * must be inverted declarations.
- *
- * Revision 1.6 1998/09/28 13:38:18 malthoff
- * Add default modes and masks XM_DEF_MSK,
- * XM_PAUSE_MODE and XM_DEF_MODE
- *
- * Revision 1.5 1998/09/16 14:42:04 malthoff
- * Bug Fix: XM_GP_PORT is a 32 bit (not a 16 bit) register.
- *
- * Revision 1.4 1998/08/20 14:59:47 malthoff
- * Rework this file after reading the XaQti data sheet
- * "Differences between Rev. B2 & Rev. C XMAC II".
- * This file is now 100% XMAC II Rev. C complained.
- *
- * Revision 1.3 1998/06/29 12:18:23 malthoff
- * Correct XMR_FS_ANY_ERR definition.
- *
- * Revision 1.2 1998/06/29 12:10:56 malthoff
- * Add define XMR_FS_ANY_ERR.
- *
- * Revision 1.1 1998/06/19 13:37:17 malthoff
- * created.
- *
- *
- ******************************************************************************/
-
-#ifndef __INC_XMAC_H
-#define __INC_XMAC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/* defines ********************************************************************/
-
-/*
- * XMAC II registers
- *
- * The XMAC registers are 16 or 32 bits wide.
- * The XMACs host processor interface is set to 16 bit mode,
- * therefore ALL registers will be addressed with 16 bit accesses.
- *
- * The following macros are provided to access the XMAC registers
- * XM_IN16(), XM_OUT16, XM_IN32(), XM_OUT32(), XM_INADR(), XM_OUTADR(),
- * XM_INHASH(), and XM_OUTHASH().
- * The macros are defined in SkGeHw.h.
- *
- * Note: NA reg = Network Address e.g DA, SA etc.
- *
- */
-#define XM_MMU_CMD 0x0000 /* 16 bit r/w MMU Command Register */
- /* 0x0004: reserved */
-#define XM_POFF 0x0008 /* 32 bit r/w Packet Offset Register */
-#define XM_BURST 0x000c /* 32 bit r/w Burst Register for half duplex*/
-#define XM_1L_VLAN_TAG 0x0010 /* 16 bit r/w One Level VLAN Tag ID */
-#define XM_2L_VLAN_TAG 0x0014 /* 16 bit r/w Two Level VLAN Tag ID */
- /* 0x0018 - 0x001e: reserved */
-#define XM_TX_CMD 0x0020 /* 16 bit r/w Transmit Command Register */
-#define XM_TX_RT_LIM 0x0024 /* 16 bit r/w Transmit Retry Limit Register */
-#define XM_TX_STIME 0x0028 /* 16 bit r/w Transmit Slottime Register */
-#define XM_TX_IPG 0x002c /* 16 bit r/w Transmit Inter Packet Gap */
-#define XM_RX_CMD 0x0030 /* 16 bit r/w Receive Command Register */
-#define XM_PHY_ADDR 0x0034 /* 16 bit r/w PHY Address Register */
-#define XM_PHY_DATA 0x0038 /* 16 bit r/w PHY Data Register */
- /* 0x003c: reserved */
-#define XM_GP_PORT 0x0040 /* 32 bit r/w General Purpose Port Register */
-#define XM_IMSK 0x0044 /* 16 bit r/w Interrupt Mask Register */
-#define XM_ISRC 0x0048 /* 16 bit r/o Interrupt Status Register */
-#define XM_HW_CFG 0x004c /* 16 bit r/w Hardware Config Register */
- /* 0x0050 - 0x005e: reserved */
-#define XM_TX_LO_WM 0x0060 /* 16 bit r/w Tx FIFO Low Water Mark */
-#define XM_TX_HI_WM 0x0062 /* 16 bit r/w Tx FIFO High Water Mark */
-#define XM_TX_THR 0x0064 /* 16 bit r/w Tx Request Threshold */
-#define XM_HT_THR 0x0066 /* 16 bit r/w Host Request Threshold */
-#define XM_PAUSE_DA 0x0068 /* NA reg r/w Pause Destination Address */
- /* 0x006e: reserved */
-#define XM_CTL_PARA 0x0070 /* 32 bit r/w Control Parameter Register */
-#define XM_MAC_OPCODE 0x0074 /* 16 bit r/w Opcode for MAC control frames */
-#define XM_MAC_PTIME 0x0076 /* 16 bit r/w Pause time for MAC ctrl frames*/
-#define XM_TX_STAT 0x0078 /* 32 bit r/o Tx Status LIFO Register */
-
- /* 0x0080 - 0x00fc: 16 NA reg r/w Exact Match Address Registers */
- /* use the XM_EXM() macro to address */
-#define XM_EXM_START 0x0080 /* r/w Start Address of the EXM Regs */
-
- /*
- * XM_EXM(Reg)
- *
- * returns the XMAC address offset of specified Exact Match Addr Reg
- *
- * para: Reg EXM register to addr (0 .. 15)
- *
- * usage: XM_INADDR(IoC, MAC_1, XM_EXM(i), &val[i]);
- */
-#define XM_EXM(Reg) (XM_EXM_START + ((Reg) << 3))
-
-#define XM_SRC_CHK 0x0100 /* NA reg r/w Source Check Address Register */
-#define XM_SA 0x0108 /* NA reg r/w Station Address Register */
-#define XM_HSM 0x0110 /* 64 bit r/w Hash Match Address Registers */
-#define XM_RX_LO_WM 0x0118 /* 16 bit r/w Receive Low Water Mark */
-#define XM_RX_HI_WM 0x011a /* 16 bit r/w Receive High Water Mark */
-#define XM_RX_THR 0x011c /* 32 bit r/w Receive Request Threshold */
-#define XM_DEV_ID 0x0120 /* 32 bit r/o Device ID Register */
-#define XM_MODE 0x0124 /* 32 bit r/w Mode Register */
-#define XM_LSA 0x0128 /* NA reg r/o Last Source Register */
- /* 0x012e: reserved */
-#define XM_TS_READ 0x0130 /* 32 bit r/o Time Stamp Read Register */
-#define XM_TS_LOAD 0x0134 /* 32 bit r/o Time Stamp Load Value */
- /* 0x0138 - 0x01fe: reserved */
-#define XM_STAT_CMD 0x0200 /* 16 bit r/w Statistics Command Register */
-#define XM_RX_CNT_EV 0x0204 /* 32 bit r/o Rx Counter Event Register */
-#define XM_TX_CNT_EV 0x0208 /* 32 bit r/o Tx Counter Event Register */
-#define XM_RX_EV_MSK 0x020c /* 32 bit r/w Rx Counter Event Mask */
-#define XM_TX_EV_MSK 0x0210 /* 32 bit r/w Tx Counter Event Mask */
- /* 0x0204 - 0x027e: reserved */
-#define XM_TXF_OK 0x0280 /* 32 bit r/o Frames Transmitted OK Conuter */
-#define XM_TXO_OK_HI 0x0284 /* 32 bit r/o Octets Transmitted OK High Cnt*/
-#define XM_TXO_OK_LO 0x0288 /* 32 bit r/o Octets Transmitted OK Low Cnt */
-#define XM_TXF_BC_OK 0x028c /* 32 bit r/o Broadcast Frames Xmitted OK */
-#define XM_TXF_MC_OK 0x0290 /* 32 bit r/o Multicast Frames Xmitted OK */
-#define XM_TXF_UC_OK 0x0294 /* 32 bit r/o Unicast Frames Xmitted OK */
-#define XM_TXF_LONG 0x0298 /* 32 bit r/o Tx Long Frame Counter */
-#define XM_TXE_BURST 0x029c /* 32 bit r/o Tx Burst Event Counter */
-#define XM_TXF_MPAUSE 0x02a0 /* 32 bit r/o Tx Pause MAC Ctrl Frame Cnt */
-#define XM_TXF_MCTRL 0x02a4 /* 32 bit r/o Tx MAC Ctrl Frame Counter */
-#define XM_TXF_SNG_COL 0x02a8 /* 32 bit r/o Tx Single Collision Counter */
-#define XM_TXF_MUL_COL 0x02ac /* 32 bit r/o Tx Multiple Collision Counter */
-#define XM_TXF_ABO_COL 0x02b0 /* 32 bit r/o Tx aborted due to Exces. Col. */
-#define XM_TXF_LAT_COL 0x02b4 /* 32 bit r/o Tx Late Collision Counter */
-#define XM_TXF_DEF 0x02b8 /* 32 bit r/o Tx Deferred Frame Counter */
-#define XM_TXF_EX_DEF 0x02bc /* 32 bit r/o Tx Excessive Deferall Counter */
-#define XM_TXE_FIFO_UR 0x02c0 /* 32 bit r/o Tx FIFO Underrun Event Cnt */
-#define XM_TXE_CS_ERR 0x02c4 /* 32 bit r/o Tx Carrier Sense Error Cnt */
-#define XM_TXP_UTIL 0x02c8 /* 32 bit r/o Tx Utilization in % */
- /* 0x02cc - 0x02ce: reserved */
-#define XM_TXF_64B 0x02d0 /* 32 bit r/o 64 Byte Tx Frame Counter */
-#define XM_TXF_127B 0x02d4 /* 32 bit r/o 65-127 Byte Tx Frame Counter */
-#define XM_TXF_255B 0x02d8 /* 32 bit r/o 128-255 Byte Tx Frame Counter */
-#define XM_TXF_511B 0x02dc /* 32 bit r/o 256-511 Byte Tx Frame Counter */
-#define XM_TXF_1023B 0x02e0 /* 32 bit r/o 512-1023 Byte Tx Frame Counter*/
-#define XM_TXF_MAX_SZ 0x02e4 /* 32 bit r/o 1024-MaxSize Byte Tx Frame Cnt*/
- /* 0x02e8 - 0x02fe: reserved */
-#define XM_RXF_OK 0x0300 /* 32 bit r/o Frames Received OK */
-#define XM_RXO_OK_HI 0x0304 /* 32 bit r/o Octets Received OK High Cnt */
-#define XM_RXO_OK_LO 0x0308 /* 32 bit r/o Octets Received OK Low Counter*/
-#define XM_RXF_BC_OK 0x030c /* 32 bit r/o Broadcast Frames Received OK */
-#define XM_RXF_MC_OK 0x0310 /* 32 bit r/o Multicast Frames Received OK */
-#define XM_RXF_UC_OK 0x0314 /* 32 bit r/o Unicast Frames Received OK */
-#define XM_RXF_MPAUSE 0x0318 /* 32 bit r/o Rx Pause MAC Ctrl Frame Cnt */
-#define XM_RXF_MCTRL 0x031c /* 32 bit r/o Rx MAC Ctrl Frame Counter */
-#define XM_RXF_INV_MP 0x0320 /* 32 bit r/o Rx invalid Pause Frame Cnt */
-#define XM_RXF_INV_MOC 0x0324 /* 32 bit r/o Rx Frames with inv. MAC Opcode*/
-#define XM_RXE_BURST 0x0328 /* 32 bit r/o Rx Burst Event Counter */
-#define XM_RXE_FMISS 0x032c /* 32 bit r/o Rx Missed Frames Event Cnt */
-#define XM_RXF_FRA_ERR 0x0330 /* 32 bit r/o Rx Framing Error Counter */
-#define XM_RXE_FIFO_OV 0x0334 /* 32 bit r/o Rx FIFO overflow Event Cnt */
-#define XM_RXF_JAB_PKT 0x0338 /* 32 bit r/o Rx Jabber Packet Frame Cnt */
-#define XM_RXE_CAR_ERR 0x033c /* 32 bit r/o Rx Carrier Event Error Cnt */
-#define XM_RXF_LEN_ERR 0x0340 /* 32 bit r/o Rx in Range Length Error */
-#define XM_RXE_SYM_ERR 0x0344 /* 32 bit r/o Rx Symbol Error Counter */
-#define XM_RXE_SHT_ERR 0x0348 /* 32 bit r/o Rx Short Event Error Cnt */
-#define XM_RXE_RUNT 0x034c /* 32 bit r/o Rx Runt Event Counter */
-#define XM_RXF_LNG_ERR 0x0350 /* 32 bit r/o Rx Frame too Long Error Cnt */
-#define XM_RXF_FCS_ERR 0x0354 /* 32 bit r/o Rx Frame Check Seq. Error Cnt */
- /* 0x0358 - 0x035a: reserved */
-#define XM_RXF_CEX_ERR 0x035c /* 32 bit r/o Rx Carrier Ext Error Frame Cnt*/
-#define XM_RXP_UTIL 0x0360 /* 32 bit r/o Rx Utilization in % */
- /* 0x0364 - 0x0366: reserved */
-#define XM_RXF_64B 0x0368 /* 32 bit r/o 64 Byte Rx Frame Counter */
-#define XM_RXF_127B 0x036c /* 32 bit r/o 65-127 Byte Rx Frame Counter */
-#define XM_RXF_255B 0x0370 /* 32 bit r/o 128-255 Byte Rx Frame Counter */
-#define XM_RXF_511B 0x0374 /* 32 bit r/o 256-511 Byte Rx Frame Counter */
-#define XM_RXF_1023B 0x0378 /* 32 bit r/o 512-1023 Byte Rx Frame Counter*/
-#define XM_RXF_MAX_SZ 0x037c /* 32 bit r/o 1024-MaxSize Byte Rx Frame Cnt*/
- /* 0x02e8 - 0x02fe: reserved */
-
-
-/*----------------------------------------------------------------------------*/
-/*
- * XMAC Bit Definitions
- *
- * If the bit access behaviour differs from the register access behaviour
- * (r/w, r/o) this is documented after the bit number.
- * The following bit access behaviours are used:
- * (sc) self clearing
- * (ro) read only
- */
-
-/* XM_MMU_CMD 16 bit r/w MMU Command Register */
- /* Bit 15..13: reserved */
-#define XM_MMU_PHY_RDY (1<<12) /* Bit 12: PHY Read Ready */
-#define XM_MMU_PHY_BUSY (1<<11) /* Bit 11: PHY Busy */
-#define XM_MMU_IGN_PF (1<<10) /* Bit 10: Ignore Pause Frame */
-#define XM_MMU_MAC_LB (1<<9) /* Bit 9: Enable MAC Loopback */
- /* Bit 8: reserved */
-#define XM_MMU_FRC_COL (1<<7) /* Bit 7: Force Collision */
-#define XM_MMU_SIM_COL (1<<6) /* Bit 6: Simulate Collision */
-#define XM_MMU_NO_PRE (1<<5) /* Bit 5: No MDIO Preamble */
-#define XM_MMU_GMII_FD (1<<4) /* Bit 4: GMII uses Full Duplex */
-#define XM_MMU_RAT_CTRL (1<<3) /* Bit 3: Enable Rate Control */
-#define XM_MMU_GMII_LOOP (1<<2) /* Bit 2: PHY is in Loopback Mode */
-#define XM_MMU_ENA_RX (1<<1) /* Bit 1: Enable Receiver */
-#define XM_MMU_ENA_TX (1<<0) /* Bit 0: Enable Transmitter */
-
-
-/* XM_TX_CMD 16 bit r/w Transmit Command Register */
- /* Bit 15..7: reserved */
-#define XM_TX_BK2BK (1<<6) /* Bit 6: Ignor Carrier Sense (Tx Bk2Bk)*/
-#define XM_TX_ENC_BYP (1<<5) /* Bit 5: Set Encoder in Bypass Mode */
-#define XM_TX_SAM_LINE (1<<4) /* Bit 4: (sc) Start utilization calculation */
-#define XM_TX_NO_GIG_MD (1<<3) /* Bit 3: Disable Carrier Extension */
-#define XM_TX_NO_PRE (1<<2) /* Bit 2: Disable Preamble Generation */
-#define XM_TX_NO_CRC (1<<1) /* Bit 1: Disable CRC Generation */
-#define XM_TX_AUTO_PAD (1<<0) /* Bit 0: Enable Automatic Padding */
-
-
-/* XM_TX_RT_LIM 16 bit r/w Transmit Retry Limit Register */
- /* Bit 15..5: reserved */
-#define XM_RT_LIM_MSK 0x1f /* Bit 4..0: Tx Retry Limit */
-
-
-/* XM_TX_STIME 16 bit r/w Transmit Slottime Register */
- /* Bit 15..7: reserved */
-#define XM_STIME_MSK 0x7f /* Bit 6..0: Tx Slottime bits */
-
-
-/* XM_TX_IPG 16 bit r/w Transmit Inter Packet Gap */
- /* Bit 15..8: reserved */
-#define XM_IPG_MSK 0xff /* Bit 7..0: IPG value bits */
-
-
-/* XM_RX_CMD 16 bit r/w Receive Command Register */
- /* Bit 15..9: reserved */
-#define XM_RX_LENERR_OK (1<<8) /* Bit 8 don't set Rx Err bit for */
- /* inrange error packets */
-#define XM_RX_BIG_PK_OK (1<<7) /* Bit 7 don't set Rx Err bit for */
- /* jumbo packets */
-#define XM_RX_IPG_CAP (1<<6) /* Bit 6 repl. type field with IPG */
-#define XM_RX_TP_MD (1<<5) /* Bit 5: Enable transparent Mode */
-#define XM_RX_STRIP_FCS (1<<4) /* Bit 4: Enable FCS Stripping */
-#define XM_RX_SELF_RX (1<<3) /* Bit 3: Enable Rx of own packets */
-#define XM_RX_SAM_LINE (1<<2) /* Bit 2: (sc) Start utilization calculation */
-#define XM_RX_STRIP_PAD (1<<1) /* Bit 1: Strip pad bytes of Rx frames */
-#define XM_RX_DIS_CEXT (1<<0) /* Bit 0: Disable carrier ext. check */
-
-
-/* XM_PHY_ADDR 16 bit r/w PHY Address Register */
- /* Bit 15..5: reserved */
-#define XM_PHY_ADDR_SZ 0x1f /* Bit 4..0: PHY Address bits */
-
-
-/* XM_GP_PORT 32 bit r/w General Purpose Port Register */
- /* Bit 31..7: reserved */
-#define XM_GP_ANIP (1L<<6) /* Bit 6: (ro) Auto-Neg. in progress */
-#define XM_GP_FRC_INT (1L<<5) /* Bit 5: (sc) Force Interrupt */
- /* Bit 4: reserved */
-#define XM_GP_RES_MAC (1L<<3) /* Bit 3: (sc) Reset MAC and FIFOs */
-#define XM_GP_RES_STAT (1L<<2) /* Bit 2: (sc) Reset the statistics module */
- /* Bit 1: reserved */
-#define XM_GP_INP_ASS (1L<<0) /* Bit 0: (ro) GP Input Pin asserted */
-
-
-/* XM_IMSK 16 bit r/w Interrupt Mask Register */
-/* XM_ISRC 16 bit r/o Interrupt Status Register */
- /* Bit 15: reserved */
-#define XM_IS_LNK_AE (1<<14) /* Bit 14: Link Asynchronous Event */
-#define XM_IS_TX_ABORT (1<<13) /* Bit 13: Transmit Abort, late Col. etc */
-#define XM_IS_FRC_INT (1<<12) /* Bit 12: Force INT bit set in GP */
-#define XM_IS_INP_ASS (1<<11) /* Bit 11: Input Asserted, GP bit 0 set */
-#define XM_IS_LIPA_RC (1<<10) /* Bit 10: Link Partner requests config */
-#define XM_IS_RX_PAGE (1<<9) /* Bit 9: Page Received */
-#define XM_IS_TX_PAGE (1<<8) /* Bit 8: Next Page Loaded for Transmit */
-#define XM_IS_AND (1<<7) /* Bit 7: Auto-Negotiation Done */
-#define XM_IS_TSC_OV (1<<6) /* Bit 6: Time Stamp Counter Overflow */
-#define XM_IS_RXC_OV (1<<5) /* Bit 5: Rx Counter Event Overflow */
-#define XM_IS_TXC_OV (1<<4) /* Bit 4: Tx Counter Event Overflow */
-#define XM_IS_RXF_OV (1<<3) /* Bit 3: Receive FIFO Overflow */
-#define XM_IS_TXF_UR (1<<2) /* Bit 2: Transmit FIFO Underrun */
-#define XM_IS_TX_COMP (1<<1) /* Bit 1: Frame Tx Complete */
-#define XM_IS_RX_COMP (1<<0) /* Bit 0: Frame Rx Complete */
-
-#define XM_DEF_MSK (~(XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE |\
- XM_IS_AND | XM_IS_RXC_OV | XM_IS_TXC_OV | XM_IS_TXF_UR))
-
-
-/* XM_HW_CFG 16 bit r/w Hardware Config Register */
- /* Bit 15.. 4: reserved */
-#define XM_HW_GEN_EOP (1<<3) /* Bit 3: generate End of Packet pulse */
-#define XM_HW_COM4SIG (1<<2) /* Bit 2: use Comma Detect for Sig. Det.*/
- /* Bit 1: reserved */
-#define XM_HW_GMII_MD (1<<0) /* Bit 0: GMII Interface selected */
-
-
-/* XM_TX_LO_WM 16 bit r/w Tx FIFO Low Water Mark */
-/* XM_TX_HI_WM 16 bit r/w Tx FIFO High Water Mark */
- /* Bit 15..10 reserved */
-#define XM_TX_WM_MSK 0x01ff /* Bit 9.. 0 Tx FIFO Watermark bits */
-
-/* XM_TX_THR 16 bit r/w Tx Request Threshold */
-/* XM_HT_THR 16 bit r/w Host Request Threshold */
-/* XM_RX_THR 16 bit r/w Rx Request Threshold */
- /* Bit 15..11 reserved */
-#define XM_THR_MSK 0x03ff /* Bit 10.. 0 Rx/Tx Request Threshold bits */
-
-
-/* XM_TX_STAT 32 bit r/o Tx Status LIFO Register */
-#define XM_ST_VALID (1UL<<31) /* Bit 31: Status Valid */
-#define XM_ST_BYTE_CNT (0x3fffL<<17) /* Bit 30..17: Tx frame Length */
-#define XM_ST_RETRY_CNT (0x1fL<<12) /* Bit 16..12: Retry Count */
-#define XM_ST_EX_COL (1L<<11) /* Bit 11: Excessive Collisions */
-#define XM_ST_EX_DEF (1L<<10) /* Bit 10: Excessive Deferral */
-#define XM_ST_BURST (1L<<9) /* Bit 9: p. xmitted in burst md*/
-#define XM_ST_DEFER (1L<<8) /* Bit 8: packet was defered */
-#define XM_ST_BC (1L<<7) /* Bit 7: Broadcast packet */
-#define XM_ST_MC (1L<<6) /* Bit 6: Multicast packet */
-#define XM_ST_UC (1L<<5) /* Bit 5: Unicast packet */
-#define XM_ST_TX_UR (1L<<4) /* Bit 4: FIFO Underrun occured */
-#define XM_ST_CS_ERR (1L<<3) /* Bit 3: Carrier Sense Error */
-#define XM_ST_LAT_COL (1L<<2) /* Bit 2: Late Collision Error */
-#define XM_ST_MUL_COL (1L<<1) /* Bit 1: Multiple Collisions */
-#define XM_ST_SGN_COL (1L<<0) /* Bit 0: Single Collision */
-
-/* XM_RX_LO_WM 16 bit r/w Receive Low Water Mark */
-/* XM_RX_HI_WM 16 bit r/w Receive High Water Mark */
- /* Bit 15..11: reserved */
-#define XM_RX_WM_MSK 0x03ff /* Bit 11.. 0: Rx FIFO Watermark bits */
-
-
-/* XM_DEV_ID 32 bit r/o Device ID Register */
-#define XM_DEV_OUI (0x00ffffffUL<<8) /* Bit 31..8: Device OUI */
-#define XM_DEV_REV (0x07L << 5) /* Bit 7..5: Chip Rev Num */
-
-
-/* XM_MODE 32 bit r/w Mode Register */
- /* Bit 31..27: reserved */
-#define XM_MD_ENA_REJ (1L<<26) /* Bit 26: Enable Frame Reject */
-#define XM_MD_SPOE_E (1L<<25) /* Bit 25: Send Pause on Edge */
- /* extern generated */
-#define XM_MD_TX_REP (1L<<24) /* Bit 24: Transmit Repeater Mode */
-#define XM_MD_SPOFF_I (1L<<23) /* Bit 23: Send Pause on FIFO full */
- /* intern generated */
-#define XM_MD_LE_STW (1L<<22) /* Bit 22: Rx Stat Word in Little Endian */
-#define XM_MD_TX_CONT (1L<<21) /* Bit 21: Send Continuous */
-#define XM_MD_TX_PAUSE (1L<<20) /* Bit 20: (sc) Send Pause Frame */
-#define XM_MD_ATS (1L<<19) /* Bit 19: Append Time Stamp */
-#define XM_MD_SPOL_I (1L<<18) /* Bit 18: Send Pause on Low */
- /* intern generated */
-#define XM_MD_SPOH_I (1L<<17) /* Bit 17: Send Pause on High */
- /* intern generated */
-#define XM_MD_CAP (1L<<16) /* Bit 16: Check Address Pair */
-#define XM_MD_ENA_HASH (1L<<15) /* Bit 15: Enable Hashing */
-#define XM_MD_CSA (1L<<14) /* Bit 14: Check Station Address */
-#define XM_MD_CAA (1L<<13) /* Bit 13: Check Address Array */
-#define XM_MD_RX_MCTRL (1L<<12) /* Bit 12: Rx MAC Control Frame */
-#define XM_MD_RX_RUNT (1L<<11) /* Bit 11: Rx Runt Frames */
-#define XM_MD_RX_IRLE (1L<<10) /* Bit 10: Rx in Range Len Err Frame */
-#define XM_MD_RX_LONG (1L<<9) /* Bit 9: Rx Long Frame */
-#define XM_MD_RX_CRCE (1L<<8) /* Bit 8: Rx CRC Error Frame */
-#define XM_MD_RX_ERR (1L<<7) /* Bit 7: Rx Error Frame */
-#define XM_MD_DIS_UC (1L<<6) /* Bit 6: Disable Rx Unicast */
-#define XM_MD_DIS_MC (1L<<5) /* Bit 5: Disable Rx Multicast */
-#define XM_MD_DIS_BC (1L<<4) /* Bit 4: Disable Rx Broadcast */
-#define XM_MD_ENA_PROM (1L<<3) /* Bit 3: Enable Promiscuous */
-#define XM_MD_ENA_BE (1L<<2) /* Bit 2: Enable Big Endian */
-#define XM_MD_FTF (1L<<1) /* Bit 1: (sc) Flush Tx FIFO */
-#define XM_MD_FRF (1L<<0) /* Bit 0: (sc) Flush Rx FIFO */
-
-#define XM_PAUSE_MODE (XM_MD_SPOE_E | XM_MD_SPOL_I | XM_MD_SPOH_I)
-#define XM_DEF_MODE (XM_MD_RX_RUNT | XM_MD_RX_IRLE | XM_MD_RX_LONG |\
- XM_MD_RX_CRCE | XM_MD_RX_ERR | XM_MD_CSA | XM_MD_CAA)
-
-/* XM_STAT_CMD 16 bit r/w Statistics Command Register */
- /* Bit 16..6: reserved */
-#define XM_SC_SNP_RXC (1<<5) /* Bit 5: (sc) Snap Rx Counters */
-#define XM_SC_SNP_TXC (1<<4) /* Bit 4: (sc) Snap Tx Counters */
-#define XM_SC_CP_RXC (1<<3) /* Bit 3: Copy Rx Counters Continuously */
-#define XM_SC_CP_TXC (1<<2) /* Bit 2: Copy Tx Counters Continuously */
-#define XM_SC_CLR_RXC (1<<1) /* Bit 1: (sc) Clear Rx Counters */
-#define XM_SC_CLR_TXC (1<<0) /* Bit 0: (sc) Clear Tx Counters */
-
-
-/* XM_RX_CNT_EV 32 bit r/o Rx Counter Event Register */
-/* XM_RX_EV_MSK 32 bit r/w Rx Counter Event Mask */
-#define XMR_MAX_SZ_OV (1UL<<31) /* Bit 31: 1024-MaxSize Rx Cnt Ov*/
-#define XMR_1023B_OV (1L<<30) /* Bit 30: 512-1023Byte Rx Cnt Ov*/
-#define XMR_511B_OV (1L<<29) /* Bit 29: 256-511 Byte Rx Cnt Ov*/
-#define XMR_255B_OV (1L<<28) /* Bit 28: 128-255 Byte Rx Cnt Ov*/
-#define XMR_127B_OV (1L<<27) /* Bit 27: 65-127 Byte Rx Cnt Ov */
-#define XMR_64B_OV (1L<<26) /* Bit 26: 64 Byte Rx Cnt Ov */
-#define XMR_UTIL_OV (1L<<25) /* Bit 25: Rx Util Cnt Overflow */
-#define XMR_UTIL_UR (1L<<24) /* Bit 24: Rx Util Cnt Underrun */
-#define XMR_CEX_ERR_OV (1L<<23) /* Bit 23: CEXT Err Cnt Ov */
- /* Bit 22: reserved */
-#define XMR_FCS_ERR_OV (1L<<21) /* Bit 21: Rx FCS Error Cnt Ov */
-#define XMR_LNG_ERR_OV (1L<<20) /* Bit 20: Rx too Long Err Cnt Ov*/
-#define XMR_RUNT_OV (1L<<19) /* Bit 19: Runt Event Cnt Ov */
-#define XMR_SHT_ERR_OV (1L<<18) /* Bit 18: Rx Short Ev Err Cnt Ov*/
-#define XMR_SYM_ERR_OV (1L<<17) /* Bit 17: Rx Sym Err Cnt Ov */
- /* Bit 16: reserved */
-#define XMR_CAR_ERR_OV (1L<<15) /* Bit 15: Rx Carr Ev Err Cnt Ov */
-#define XMR_JAB_PKT_OV (1L<<14) /* Bit 14: Rx Jabb Packet Cnt Ov */
-#define XMR_FIFO_OV (1L<<13) /* Bit 13: Rx FIFO Ov Ev Cnt Ov */
-#define XMR_FRA_ERR_OV (1L<<12) /* Bit 12: Rx Framing Err Cnt Ov */
-#define XMR_FMISS_OV (1L<<11) /* Bit 11: Rx Missed Ev Cnt Ov */
-#define XMR_BURST (1L<<10) /* Bit 10: Rx Burst Event Cnt Ov */
-#define XMR_INV_MOC (1L<<9) /* Bit 9: Rx with inv. MAC OC Ov*/
-#define XMR_INV_MP (1L<<8) /* Bit 8: Rx inv Pause Frame Ov */
-#define XMR_MCTRL_OV (1L<<7) /* Bit 7: Rx MAC Ctrl-F Cnt Ov */
-#define XMR_MPAUSE_OV (1L<<6) /* Bit 6: Rx Pause MAC Ctrl-F Ov*/
-#define XMR_UC_OK_OV (1L<<5) /* Bit 5: Rx Unicast Frame CntOv*/
-#define XMR_MC_OK_OV (1L<<4) /* Bit 4: Rx Multicast Cnt Ov */
-#define XMR_BC_OK_OV (1L<<3) /* Bit 3: Rx Broadcast Cnt Ov */
-#define XMR_OK_LO_OV (1L<<2) /* Bit 2: Octets Rx OK Low CntOv*/
-#define XMR_OK_HI_OV (1L<<1) /* Bit 1: Octets Rx OK Hi Cnt Ov*/
-#define XMR_OK_OV (1L<<0) /* Bit 0: Frames Received Ok Ov */
-
-#define XMR_DEF_MSK (XMR_OK_LO_OV | XMR_OK_HI_OV)
-
-/* XM_TX_CNT_EV 32 bit r/o Tx Counter Event Register */
-/* XM_TX_EV_MSK 32 bit r/w Tx Counter Event Mask */
- /* Bit 31..26: reserved */
-#define XMT_MAX_SZ_OV (1L<<25) /* Bit 25: 1024-MaxSize Tx Cnt Ov*/
-#define XMT_1023B_OV (1L<<24) /* Bit 24: 512-1023Byte Tx Cnt Ov*/
-#define XMT_511B_OV (1L<<23) /* Bit 23: 256-511 Byte Tx Cnt Ov*/
-#define XMT_255B_OV (1L<<22) /* Bit 22: 128-255 Byte Tx Cnt Ov*/
-#define XMT_127B_OV (1L<<21) /* Bit 21: 65-127 Byte Tx Cnt Ov */
-#define XMT_64B_OV (1L<<20) /* Bit 20: 64 Byte Tx Cnt Ov */
-#define XMT_UTIL_OV (1L<<19) /* Bit 19: Tx Util Cnt Overflow */
-#define XMT_UTIL_UR (1L<<18) /* Bit 18: Tx Util Cnt Underrun */
-#define XMT_CS_ERR_OV (1L<<17) /* Bit 17: Tx Carr Sen Err Cnt Ov*/
-#define XMT_FIFO_UR_OV (1L<<16) /* Bit 16: Tx FIFO Ur Ev Cnt Ov */
-#define XMT_EX_DEF_OV (1L<<15) /* Bit 15: Tx Ex Deferall Cnt Ov */
-#define XMT_DEF (1L<<14) /* Bit 14: Tx Deferred Cnt Ov */
-#define XMT_LAT_COL_OV (1L<<13) /* Bit 13: Tx Late Col Cnt Ov */
-#define XMT_ABO_COL_OV (1L<<12) /* Bit 12: Tx abo dueto Ex Col Ov*/
-#define XMT_MUL_COL_OV (1L<<11) /* Bit 11: Tx Mult Col Cnt Ov */
-#define XMT_SNG_COL (1L<<10) /* Bit 10: Tx Single Col Cnt Ov */
-#define XMT_MCTRL_OV (1L<<9) /* Bit 9: Tx MAC Ctrl Counter Ov*/
-#define XMT_MPAUSE (1L<<8) /* Bit 8: Tx Pause MAC Ctrl-F Ov*/
-#define XMT_BURST (1L<<7) /* Bit 7: Tx Burst Event Cnt Ov */
-#define XMT_LONG (1L<<6) /* Bit 6: Tx Long Frame Cnt Ov */
-#define XMT_UC_OK_OV (1L<<5) /* Bit 5: Tx Unicast Cnt Ov */
-#define XMT_MC_OK_OV (1L<<4) /* Bit 4: Tx Multicast Cnt Ov */
-#define XMT_BC_OK_OV (1L<<3) /* Bit 3: Tx Broadcast Cnt Ov */
-#define XMT_OK_LO_OV (1L<<2) /* Bit 2: Octets Tx OK Low CntOv*/
-#define XMT_OK_HI_OV (1L<<1) /* Bit 1: Octets Tx OK Hi Cnt Ov*/
-#define XMT_OK_OV (1L<<0) /* Bit 0: Frames Tx Ok Ov */
-
-#define XMT_DEF_MSK (XMT_OK_LO_OV | XMT_OK_HI_OV)
-
-/*
- * Receive Frame Status Encoding
- */
-#define XMR_FS_LEN (0x3fffUL<<18) /* Bit 31..18: Rx Frame Length */
-#define XMR_FS_2L_VLAN (1L<<17) /* Bit 17: tagged wh 2Lev VLAN ID*/
-#define XMR_FS_1L_VLAN (1L<<16) /* Bit 16: tagged wh 1Lev VLAN ID*/
-#define XMR_FS_BC (1L<<15) /* Bit 15: Broadcast Frame */
-#define XMR_FS_MC (1L<<14) /* Bit 14: Multicast Frame */
-#define XMR_FS_UC (1L<<13) /* Bit 13: Unicast Frame */
- /* Bit 12: reserved */
-#define XMR_FS_BURST (1L<<11) /* Bit 11: Burst Mode */
-#define XMR_FS_CEX_ERR (1L<<10) /* Bit 10: Carrier Ext. Error */
-#define XMR_FS_802_3 (1L<<9) /* Bit 9: 802.3 Frame */
-#define XMR_FS_COL_ERR (1L<<8) /* Bit 8: Collision Error */
-#define XMR_FS_CAR_ERR (1L<<7) /* Bit 7: Carrier Event Error */
-#define XMR_FS_LEN_ERR (1L<<6) /* Bit 6: In-Range Length Error */
-#define XMR_FS_FRA_ERR (1L<<5) /* Bit 5: Framing Error */
-#define XMR_FS_RUNT (1L<<4) /* Bit 4: Runt Frame */
-#define XMR_FS_LNG_ERR (1L<<3) /* Bit 3: Giant (Jumbo) Frame */
-#define XMR_FS_FCS_ERR (1L<<2) /* Bit 2: Frame Check Sequ Err */
-#define XMR_FS_ERR (1L<<1) /* Bit 1: Frame Error */
-#define XMR_FS_MCTRL (1L<<0) /* Bit 0: MAC Control Packet */
-
-/*
- * XMR_FS_ERR will be set if
- * XMR_FS_FCS_ERR, XMR_FS_LNG_ERR, XMR_FS_RUNT,
- * XMR_FS_FRA_ERR, XMR_FS_LEN_ERR, or XMR_FS_CEX_ERR
- * is set. XMR_FS_LNG_ERR and XMR_FS_LEN_ERR will issue
- * XMR_FS_ERR unless the corresponding bit in the Receive Command
- * Register is set.
- */
-#define XMR_FS_ANY_ERR XMR_FS_ERR
-
-/*----------------------------------------------------------------------------*/
-/*
- * XMAC-PHY Registers, indirect addressed over the XMAC
- */
-#define PHY_XMAC_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_XMAC_STAT 0x01 /* 16 bit r/w PHY Status Register */
-#define PHY_XMAC_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
-#define PHY_XMAC_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
-#define PHY_XMAC_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
-#define PHY_XMAC_AUNE_LP 0x05 /* 16 bit r/o Link Partner Abi Reg */
-#define PHY_XMAC_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
-#define PHY_XMAC_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_XMAC_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
- /* 0x09 - 0x0e: reserved */
-#define PHY_XMAC_EXT_STAT 0x0f /* 16 bit r/o Ext Status Register */
-#define PHY_XMAC_RES_ABI 0x10 /* 16 bit r/o PHY Resolved Ability */
-
-/*----------------------------------------------------------------------------*/
-/*
- * Broadcom-PHY Registers, indirect addressed over XMAC
- */
-#define PHY_BCOM_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_BCOM_STAT 0x01 /* 16 bit r/o PHY Status Register */
-#define PHY_BCOM_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
-#define PHY_BCOM_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
-#define PHY_BCOM_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
-#define PHY_BCOM_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
-#define PHY_BCOM_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
-#define PHY_BCOM_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_BCOM_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
- /* Broadcom-specific registers */
-#define PHY_BCOM_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
-#define PHY_BCOM_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
- /* 0x0b - 0x0e: reserved */
-#define PHY_BCOM_EXT_STAT 0x0f /* 16 bit r/o Extended Status Reg */
-#define PHY_BCOM_P_EXT_CTRL 0x10 /* 16 bit r/w PHY Extended Ctrl Reg */
-#define PHY_BCOM_P_EXT_STAT 0x11 /* 16 bit r/o PHY Extended Stat Reg */
-#define PHY_BCOM_RE_CTR 0x12 /* 16 bit r/w Receive Error Counter */
-#define PHY_BCOM_FC_CTR 0x13 /* 16 bit r/w False Carr Sense Cnt */
-#define PHY_BCOM_RNO_CTR 0x14 /* 16 bit r/w Receiver NOT_OK Cnt */
- /* 0x15 - 0x17: reserved */
-#define PHY_BCOM_AUX_CTRL 0x18 /* 16 bit r/w Auxiliary Control Reg */
-#define PHY_BCOM_AUX_STAT 0x19 /* 16 bit r/o Auxiliary Stat Summary */
-#define PHY_BCOM_INT_STAT 0x1a /* 16 bit r/o Interrupt Status Reg */
-#define PHY_BCOM_INT_MASK 0x1b /* 16 bit r/w Interrupt Mask Reg */
- /* 0x1c: reserved */
- /* 0x1d - 0x1f: test registers */
-
-/*----------------------------------------------------------------------------*/
-/*
- * Marvel-PHY Registers, indirect addressed over GMAC
- */
-#define PHY_MARV_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_MARV_STAT 0x01 /* 16 bit r/o PHY Status Register */
-#define PHY_MARV_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
-#define PHY_MARV_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
-#define PHY_MARV_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
-#define PHY_MARV_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
-#define PHY_MARV_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
-#define PHY_MARV_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_MARV_NEPG_LP 0x08 /* 16 bit r/o Next Page Link P Reg */
- /* Marvel-specific registers */
-#define PHY_MARV_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Ctrl Reg */
-#define PHY_MARV_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
- /* 0x0b - 0x0e: reserved */
-#define PHY_MARV_EXT_STAT 0x0f /* 16 bit r/o Extended Status Reg */
-#define PHY_MARV_PHY_CTRL 0x10 /* 16 bit r/w PHY Specific Ctrl Reg */
-#define PHY_MARV_PHY_STAT 0x11 /* 16 bit r/o PHY Specific Stat Reg */
-#define PHY_MARV_INT_MASK 0x12 /* 16 bit r/w Interrupt Mask Reg */
-#define PHY_MARV_INT_STAT 0x13 /* 16 bit r/o Interrupt Status Reg */
-#define PHY_MARV_EXT_CTRL 0x14 /* 16 bit r/w Ext. PHY Specific Ctrl */
-#define PHY_MARV_RXE_CNT 0x15 /* 16 bit r/w Receive Error Counter */
-#define PHY_MARV_EXT_ADR 0x16 /* 16 bit r/w Ext. Ad. for Cable Diag. */
- /* 0x17: reserved */
-#define PHY_MARV_LED_CTRL 0x18 /* 16 bit r/w LED Control Reg */
-#define PHY_MARV_LED_OVER 0x19 /* 16 bit r/w Manual LED Override Reg */
-#define PHY_MARV_EXT_CTRL_2 0x1a /* 16 bit r/w Ext. PHY Specific Ctrl 2 */
-#define PHY_MARV_EXT_P_STAT 0x1b /* 16 bit r/w Ext. PHY Spec. Stat Reg */
-#define PHY_MARV_CABLE_DIAG 0x1c /* 16 bit r/o Cable Diagnostic Reg */
- /* 0x1d - 0x1f: reserved */
-
-/*----------------------------------------------------------------------------*/
-/*
- * Level One-PHY Registers, indirect addressed over XMAC
- */
-#define PHY_LONE_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_LONE_STAT 0x01 /* 16 bit r/o PHY Status Register */
-#define PHY_LONE_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
-#define PHY_LONE_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
-#define PHY_LONE_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
-#define PHY_LONE_AUNE_LP 0x05 /* 16 bit r/o Link Part Ability Reg */
-#define PHY_LONE_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
-#define PHY_LONE_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_LONE_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner*/
- /* Level One-specific registers */
-#define PHY_LONE_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg*/
-#define PHY_LONE_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
- /* 0x0b -0x0e: reserved */
-#define PHY_LONE_EXT_STAT 0x0f /* 16 bit r/o Extended Status Reg */
-#define PHY_LONE_PORT_CFG 0x10 /* 16 bit r/w Port Configuration Reg*/
-#define PHY_LONE_Q_STAT 0x11 /* 16 bit r/o Quick Status Reg */
-#define PHY_LONE_INT_ENAB 0x12 /* 16 bit r/w Interrupt Enable Reg */
-#define PHY_LONE_INT_STAT 0x13 /* 16 bit r/o Interrupt Status Reg */
-#define PHY_LONE_LED_CFG 0x14 /* 16 bit r/w LED Configuration Reg */
-#define PHY_LONE_PORT_CTRL 0x15 /* 16 bit r/w Port Control Reg */
-#define PHY_LONE_CIM 0x16 /* 16 bit r/o CIM Reg */
- /* 0x17 -0x1c: reserved */
-
-/*----------------------------------------------------------------------------*/
-/*
- * National-PHY Registers, indirect addressed over XMAC
- */
-#define PHY_NAT_CTRL 0x00 /* 16 bit r/w PHY Control Register */
-#define PHY_NAT_STAT 0x01 /* 16 bit r/w PHY Status Register */
-#define PHY_NAT_ID0 0x02 /* 16 bit r/o PHY ID0 Register */
-#define PHY_NAT_ID1 0x03 /* 16 bit r/o PHY ID1 Register */
-#define PHY_NAT_AUNE_ADV 0x04 /* 16 bit r/w Auto-Neg. Advertisement */
-#define PHY_NAT_AUNE_LP 0x05 /* 16 bit r/o Link Partner Ability Reg */
-#define PHY_NAT_AUNE_EXP 0x06 /* 16 bit r/o Auto-Neg. Expansion Reg */
-#define PHY_NAT_NEPG 0x07 /* 16 bit r/w Next Page Register */
-#define PHY_NAT_NEPG_LP 0x08 /* 16 bit r/o Next Page Link Partner Reg */
- /* National-specific registers */
-#define PHY_NAT_1000T_CTRL 0x09 /* 16 bit r/w 1000Base-T Control Reg */
-#define PHY_NAT_1000T_STAT 0x0a /* 16 bit r/o 1000Base-T Status Reg */
- /* 0x0b -0x0e: reserved */
-#define PHY_NAT_EXT_STAT 0x0f /* 16 bit r/o Extended Status Register */
-#define PHY_NAT_EXT_CTRL1 0x10 /* 16 bit r/o Extended Control Reg1 */
-#define PHY_NAT_Q_STAT1 0x11 /* 16 bit r/o Quick Status Reg1 */
-#define PHY_NAT_10B_OP 0x12 /* 16 bit r/o 10Base-T Operations Reg */
-#define PHY_NAT_EXT_CTRL2 0x13 /* 16 bit r/o Extended Control Reg1 */
-#define PHY_NAT_Q_STAT2 0x14 /* 16 bit r/o Quick Status Reg2 */
- /* 0x15 -0x18: reserved */
-#define PHY_NAT_PHY_ADDR 0x19 /* 16 bit r/o PHY Address Register */
-
-
-/*----------------------------------------------------------------------------*/
-
-/*
- * PHY bit definitions
- * Bits defined as PHY_X_..., PHY_B_..., PHY_L_... or PHY_N_... are
- * Xmac/Broadcom/LevelOne/National-specific.
- * All other are general.
- */
-
-/***** PHY_XMAC_CTRL 16 bit r/w PHY Control Register *****/
-/***** PHY_BCOM_CTRL 16 bit r/w PHY Control Register *****/
-/***** PHY_LONE_CTRL 16 bit r/w PHY Control Register *****/
-#define PHY_CT_RESET (1<<15) /* Bit 15: (sc) clear all PHY related regs */
-#define PHY_CT_LOOP (1<<14) /* Bit 14: enable Loopback over PHY */
-#define PHY_CT_SPS_LSB (1<<13) /* Bit 13: (BC,L1) Speed select, lower bit */
-#define PHY_CT_ANE (1<<12) /* Bit 12: Auto-Negotiation Enabled */
-#define PHY_CT_PDOWN (1<<11) /* Bit 11: (BC,L1) Power Down Mode */
-#define PHY_CT_ISOL (1<<10) /* Bit 10: (BC,L1) Isolate Mode */
-#define PHY_CT_RE_CFG (1<<9) /* Bit 9: (sc) Restart Auto-Negotiation */
-#define PHY_CT_DUP_MD (1<<8) /* Bit 8: Duplex Mode */
-#define PHY_CT_COL_TST (1<<7) /* Bit 7: (BC,L1) Collision Test enabled */
-#define PHY_CT_SPS_MSB (1<<6) /* Bit 6: (BC,L1) Speed select, upper bit */
- /* Bit 5..0: reserved */
-
-#define PHY_CT_SP1000 PHY_CT_SPS_MSB /* enable speed of 1000 Mbps */
-#define PHY_CT_SP100 PHY_CT_SPS_LSB /* enable speed of 100 Mbps */
-#define PHY_CT_SP10 (0) /* enable speed of 10 Mbps */
-
-
-/***** PHY_XMAC_STAT 16 bit r/w PHY Status Register *****/
-/***** PHY_BCOM_STAT 16 bit r/w PHY Status Register *****/
-/***** PHY_MARV_STAT 16 bit r/w PHY Status Register *****/
-/***** PHY_LONE_STAT 16 bit r/w PHY Status Register *****/
- /* Bit 15..9: reserved */
- /* (BC/L1) 100/10 Mbps cap bits ignored*/
-#define PHY_ST_EXT_ST (1<<8) /* Bit 8: Extended Status Present */
- /* Bit 7: reserved */
-#define PHY_ST_PRE_SUP (1<<6) /* Bit 6: (BC/L1) preamble suppression */
-#define PHY_ST_AN_OVER (1<<5) /* Bit 5: Auto-Negotiation Over */
-#define PHY_ST_REM_FLT (1<<4) /* Bit 4: Remote Fault Condition Occured */
-#define PHY_ST_AN_CAP (1<<3) /* Bit 3: Auto-Negotiation Capability */
-#define PHY_ST_LSYNC (1<<2) /* Bit 2: Link Synchronized */
-#define PHY_ST_JAB_DET (1<<1) /* Bit 1: (BC/L1) Jabber Detected */
-#define PHY_ST_EXT_REG (1<<0) /* Bit 0: Extended Register available */
-
-
-/***** PHY_XMAC_ID1 16 bit r/o PHY ID1 Register */
-/***** PHY_BCOM_ID1 16 bit r/o PHY ID1 Register */
-/***** PHY_MARV_ID1 16 bit r/o PHY ID1 Register */
-/***** PHY_LONE_ID1 16 bit r/o PHY ID1 Register */
-#define PHY_I1_OUI_MSK (0x3f<<10) /* Bit 15..10: Organization Unique ID */
-#define PHY_I1_MOD_NUM (0x3f<<4) /* Bit 9.. 4: Model Number */
-#define PHY_I1_REV_MSK 0x0f /* Bit 3.. 0: Revision Number */
-
-/* different Broadcom PHY Ids */
-#define PHY_BCOM_ID1_A1 0x6041
-#define PHY_BCOM_ID1_B2 0x6043
-#define PHY_BCOM_ID1_C0 0x6044
-#define PHY_BCOM_ID1_C5 0x6047
-
-
-/***** PHY_XMAC_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
-/***** PHY_XMAC_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
-#define PHY_AN_NXT_PG (1<<15) /* Bit 15: Request Next Page */
-#define PHY_X_AN_ACK (1<<14) /* Bit 14: (ro) Acknowledge Received */
-#define PHY_X_AN_RFB (3<<12) /* Bit 13..12: Remote Fault Bits */
- /* Bit 11.. 9: reserved */
-#define PHY_X_AN_PAUSE (3<<7) /* Bit 8.. 7: Pause Bits */
-#define PHY_X_AN_HD (1<<6) /* Bit 6: Half Duplex */
-#define PHY_X_AN_FD (1<<5) /* Bit 5: Full Duplex */
- /* Bit 4.. 0: reserved */
-
-/***** PHY_BCOM_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
-/***** PHY_BCOM_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
-/* PHY_AN_NXT_PG (see XMAC) Bit 15: Request Next Page */
- /* Bit 14: reserved */
-#define PHY_B_AN_RF (1<<13) /* Bit 13: Remote Fault */
- /* Bit 12: reserved */
-#define PHY_B_AN_ASP (1<<11) /* Bit 11: Asymmetric Pause */
-#define PHY_B_AN_PC (1<<10) /* Bit 10: Pause Capable */
- /* Bit 9..5: 100/10 BT cap bits ingnored */
-#define PHY_B_AN_SEL 0x1f /* Bit 4..0: Selector Field, 00001=Ethernet*/
-
-/***** PHY_LONE_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
-/***** PHY_LONE_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
-/* PHY_AN_NXT_PG (see XMAC) Bit 15: Request Next Page */
- /* Bit 14: reserved */
-#define PHY_L_AN_RF (1<<13) /* Bit 13: Remote Fault */
- /* Bit 12: reserved */
-#define PHY_L_AN_ASP (1<<11) /* Bit 11: Asymmetric Pause */
-#define PHY_L_AN_PC (1<<10) /* Bit 10: Pause Capable */
- /* Bit 9..5: 100/10 BT cap bits ingnored */
-#define PHY_L_AN_SEL 0x1f /* Bit 4..0: Selector Field, 00001=Ethernet*/
-
-/***** PHY_NAT_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
-/***** PHY_NAT_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/
-/* PHY_AN_NXT_PG (see XMAC) Bit 15: Request Next Page */
- /* Bit 14: reserved */
-#define PHY_N_AN_RF (1<<13) /* Bit 13: Remote Fault */
- /* Bit 12: reserved */
-#define PHY_N_AN_100F (1<<11) /* Bit 11: 100Base-T2 FD Support */
-#define PHY_N_AN_100H (1<<10) /* Bit 10: 100Base-T2 HD Support */
- /* Bit 9..5: 100/10 BT cap bits ingnored */
-#define PHY_N_AN_SEL 0x1f /* Bit 4..0: Selector Field, 00001=Ethernet*/
-
-/* field type definition for PHY_x_AN_SEL */
-#define PHY_SEL_TYPE 0x01 /* 00001 = Ethernet */
-
-/***** PHY_XMAC_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
- /* Bit 15..4: reserved */
-#define PHY_AN_LP_NP (1<<3) /* Bit 3: Link Partner can Next Page */
-#define PHY_AN_LOC_NP (1<<2) /* Bit 2: Local PHY can Next Page */
-#define PHY_AN_RX_PG (1<<1) /* Bit 1: Page Received */
- /* Bit 0: reserved */
-
-/***** PHY_BCOM_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
- /* Bit 15..5: reserved */
-#define PHY_B_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
-/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
-/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
-/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
-#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
-
-/***** PHY_LONE_AUNE_EXP 16 bit r/o Auto-Negotiation Expansion Reg *****/
-#define PHY_L_AN_BP (1<<5) /* Bit 5: Base Page Indication */
-#define PHY_L_AN_PDF (1<<4) /* Bit 4: Parallel Detection Fault */
-/* PHY_AN_LP_NP (see XMAC) Bit 3: Link Partner can Next Page */
-/* PHY_AN_LOC_NP (see XMAC) Bit 2: Local PHY can Next Page */
-/* PHY_AN_RX_PG (see XMAC) Bit 1: Page Received */
-#define PHY_B_AN_LP_CAP (1<<0) /* Bit 0: Link Partner Auto-Neg. Cap. */
-
-
-/***** PHY_XMAC_NEPG 16 bit r/w Next Page Register *****/
-/***** PHY_BCOM_NEPG 16 bit r/w Next Page Register *****/
-/***** PHY_LONE_NEPG 16 bit r/w Next Page Register *****/
-/***** PHY_XMAC_NEPG_LP 16 bit r/o Next Page Link Partner *****/
-/***** PHY_BCOM_NEPG_LP 16 bit r/o Next Page Link Partner *****/
-/***** PHY_LONE_NEPG_LP 16 bit r/o Next Page Link Partner *****/
-#define PHY_NP_MORE (1<<15) /* Bit 15: More, Next Pages to follow */
-#define PHY_NP_ACK1 (1<<14) /* Bit 14: (ro) Ack 1, for receiving a message*/
-#define PHY_NP_MSG_VAL (1<<13) /* Bit 13: Message Page valid */
-#define PHY_NP_ACK2 (1<<12) /* Bit 12: Ack 2, comply with msg content*/
-#define PHY_NP_TOG (1<<11) /* Bit 11: Toggle Bit, ensure sync */
-#define PHY_NP_MSG 0x07ff /* Bit 10..0: Message from/to Link Partner */
-
-/*
- * XMAC-Specific
- */
-/***** PHY_XMAC_EXT_STAT 16 bit r/w Extended Status Register *****/
-#define PHY_X_EX_FD (1<<15) /* Bit 15: Device Supports Full Duplex */
-#define PHY_X_EX_HD (1<<14) /* Bit 14: Device Supports Half Duplex */
- /* Bit 13..0: reserved */
-
-/***** PHY_XMAC_RES_ABI 16 bit r/o PHY Resolved Ability *****/
- /* Bit 15..9: reserved */
-#define PHY_X_RS_PAUSE (3<<7) /* Bit 8..7: selected Pause Mode */
-#define PHY_X_RS_HD (1<<6) /* Bit 6: Half Duplex Mode selected */
-#define PHY_X_RS_FD (1<<5) /* Bit 5: Full Duplex Mode selected */
-#define PHY_X_RS_ABLMIS (1<<4) /* Bit 4: duplex or pause cap mismatch */
-#define PHY_X_RS_PAUMIS (1<<3) /* Bit 3: pause capability missmatch */
- /* Bit 2..0: reserved */
-/*
- * Remote Fault Bits (PHY_X_AN_RFB) encoding
- */
-#define X_RFB_OK (0<<12) /* Bit 13..12 No errors, Link OK */
-#define X_RFB_LF (1<<12) /* Bit 13..12 Link Failure */
-#define X_RFB_OFF (2<<12) /* Bit 13..12 Offline */
-#define X_RFB_AN_ERR (3<<12) /* Bit 13..12 Auto-Negotiation Error */
-
-/*
- * Pause Bits (PHY_X_AN_PAUSE and PHY_X_RS_PAUSE) encoding
- */
-#define PHY_X_P_NO_PAUSE (0<<7) /* Bit 8..7: no Pause Mode */
-#define PHY_X_P_SYM_MD (1<<7) /* Bit 8..7: symmetric Pause Mode */
-#define PHY_X_P_ASYM_MD (2<<7) /* Bit 8..7: asymmetric Pause Mode */
-#define PHY_X_P_BOTH_MD (3<<7) /* Bit 8..7: both Pause Mode */
-
-
-/*
- * Broadcom-Specific
- */
-/***** PHY_BCOM_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_B_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_B_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
-#define PHY_B_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
-#define PHY_B_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
-#define PHY_B_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_B_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
- /* Bit 7..0: reserved */
-
-/***** PHY_BCOM_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
-#define PHY_B_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
-#define PHY_B_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
-#define PHY_B_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
-#define PHY_B_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status */
-#define PHY_B_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
-#define PHY_B_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
- /* Bit 9..8: reserved */
-#define PHY_B_1000S_IEC 0xff /* Bit 7..0: Idle Error Count */
-
-/***** PHY_BCOM_EXT_STAT 16 bit r/o Extended Status Register *****/
-#define PHY_B_ES_X_FD_CAP (1<<15) /* Bit 15: 1000Base-X FD capable */
-#define PHY_B_ES_X_HD_CAP (1<<14) /* Bit 14: 1000Base-X HD capable */
-#define PHY_B_ES_T_FD_CAP (1<<13) /* Bit 13: 1000Base-T FD capable */
-#define PHY_B_ES_T_HD_CAP (1<<12) /* Bit 12: 1000Base-T HD capable */
- /* Bit 11..0: reserved */
-
-/***** PHY_BCOM_P_EXT_CTRL 16 bit r/w PHY Extended Control Reg *****/
-#define PHY_B_PEC_MAC_PHY (1<<15) /* Bit 15: 10BIT/GMI-Interface */
-#define PHY_B_PEC_DIS_CROSS (1<<14) /* Bit 14: Disable MDI Crossover */
-#define PHY_B_PEC_TX_DIS (1<<13) /* Bit 13: Tx output Disabled */
-#define PHY_B_PEC_INT_DIS (1<<12) /* Bit 12: Interrupts Disabled */
-#define PHY_B_PEC_F_INT (1<<11) /* Bit 11: Force Interrupt */
-#define PHY_B_PEC_BY_45 (1<<10) /* Bit 10: Bypass 4B5B-Decoder */
-#define PHY_B_PEC_BY_SCR (1<<9) /* Bit 9: Bypass Scrambler */
-#define PHY_B_PEC_BY_MLT3 (1<<8) /* Bit 8: Bypass MLT3 Encoder */
-#define PHY_B_PEC_BY_RXA (1<<7) /* Bit 7: Bypass Rx Alignm. */
-#define PHY_B_PEC_RES_SCR (1<<6) /* Bit 6: Reset Scrambler */
-#define PHY_B_PEC_EN_LTR (1<<5) /* Bit 5: Ena LED Traffic Mode */
-#define PHY_B_PEC_LED_ON (1<<4) /* Bit 4: Force LED's on */
-#define PHY_B_PEC_LED_OFF (1<<3) /* Bit 3: Force LED's off */
-#define PHY_B_PEC_EX_IPG (1<<2) /* Bit 2: Extend Tx IPG Mode */
-#define PHY_B_PEC_3_LED (1<<1) /* Bit 1: Three Link LED mode */
-#define PHY_B_PEC_HIGH_LA (1<<0) /* Bit 0: GMII FIFO Elasticy */
-
-/***** PHY_BCOM_P_EXT_STAT 16 bit r/o PHY Extended Status Reg *****/
- /* Bit 15..14: reserved */
-#define PHY_B_PES_CROSS_STAT (1<<13) /* Bit 13: MDI Crossover Status */
-#define PHY_B_PES_INT_STAT (1<<12) /* Bit 12: Interrupt Status */
-#define PHY_B_PES_RRS (1<<11) /* Bit 11: Remote Receiver Stat. */
-#define PHY_B_PES_LRS (1<<10) /* Bit 10: Local Receiver Stat. */
-#define PHY_B_PES_LOCKED (1<<9) /* Bit 9: Locked */
-#define PHY_B_PES_LS (1<<8) /* Bit 8: Link Status */
-#define PHY_B_PES_RF (1<<7) /* Bit 7: Remote Fault */
-#define PHY_B_PES_CE_ER (1<<6) /* Bit 6: Carrier Ext Error */
-#define PHY_B_PES_BAD_SSD (1<<5) /* Bit 5: Bad SSD */
-#define PHY_B_PES_BAD_ESD (1<<4) /* Bit 4: Bad ESD */
-#define PHY_B_PES_RX_ER (1<<3) /* Bit 3: Receive Error */
-#define PHY_B_PES_TX_ER (1<<2) /* Bit 2: Transmit Error */
-#define PHY_B_PES_LOCK_ER (1<<1) /* Bit 1: Lock Error */
-#define PHY_B_PES_MLT3_ER (1<<0) /* Bit 0: MLT3 code Error */
-
-/***** PHY_BCOM_FC_CTR 16 bit r/w False Carrier Counter *****/
- /* Bit 15..8: reserved */
-#define PHY_B_FC_CTR 0xff /* Bit 7..0: False Carrier Counter */
-
-/***** PHY_BCOM_RNO_CTR 16 bit r/w Receive NOT_OK Counter *****/
-#define PHY_B_RC_LOC_MSK 0xff00 /* Bit 15..8: Local Rx NOT_OK cnt */
-#define PHY_B_RC_REM_MSK 0x00ff /* Bit 7..0: Remote Rx NOT_OK cnt */
-
-/***** PHY_BCOM_AUX_CTRL 16 bit r/w Auxiliary Control Reg *****/
-#define PHY_B_AC_L_SQE (1<<15) /* Bit 15: Low Squelch */
-#define PHY_B_AC_LONG_PACK (1<<14) /* Bit 14: Rx Long Packets */
-#define PHY_B_AC_ER_CTRL (3<<12) /* Bit 13..12: Edgerate Control */
- /* Bit 11: reserved */
-#define PHY_B_AC_TX_TST (1<<10) /* Bit 10: Tx test bit, always 1 */
- /* Bit 9.. 8: reserved */
-#define PHY_B_AC_DIS_PRF (1<<7) /* Bit 7: dis part resp filter */
- /* Bit 6: reserved */
-#define PHY_B_AC_DIS_PM (1<<5) /* Bit 5: dis power management */
- /* Bit 4: reserved */
-#define PHY_B_AC_DIAG (1<<3) /* Bit 3: Diagnostic Mode */
- /* Bit 2.. 0: reserved */
-
-/***** PHY_BCOM_AUX_STAT 16 bit r/o Auxiliary Status Reg *****/
-#define PHY_B_AS_AN_C (1<<15) /* Bit 15: AutoNeg complete */
-#define PHY_B_AS_AN_CA (1<<14) /* Bit 14: AN Complete Ack */
-#define PHY_B_AS_ANACK_D (1<<13) /* Bit 13: AN Ack Detect */
-#define PHY_B_AS_ANAB_D (1<<12) /* Bit 12: AN Ability Detect */
-#define PHY_B_AS_NPW (1<<11) /* Bit 11: AN Next Page Wait */
-#define PHY_B_AS_AN_RES_MSK (7<<8) /* Bit 10..8: AN HDC */
-#define PHY_B_AS_PDF (1<<7) /* Bit 7: Parallel Detect. Fault */
-#define PHY_B_AS_RF (1<<6) /* Bit 6: Remote Fault */
-#define PHY_B_AS_ANP_R (1<<5) /* Bit 5: AN Page Received */
-#define PHY_B_AS_LP_ANAB (1<<4) /* Bit 4: LP AN Ability */
-#define PHY_B_AS_LP_NPAB (1<<3) /* Bit 3: LP Next Page Ability */
-#define PHY_B_AS_LS (1<<2) /* Bit 2: Link Status */
-#define PHY_B_AS_PRR (1<<1) /* Bit 1: Pause Resolution-Rx */
-#define PHY_B_AS_PRT (1<<0) /* Bit 0: Pause Resolution-Tx */
-
-#define PHY_B_AS_PAUSE_MSK (PHY_B_AS_PRR | PHY_B_AS_PRT)
-
-/***** PHY_BCOM_INT_STAT 16 bit r/o Interrupt Status Reg *****/
-/***** PHY_BCOM_INT_MASK 16 bit r/w Interrupt Mask Reg *****/
- /* Bit 15: reserved */
-#define PHY_B_IS_PSE (1<<14) /* Bit 14: Pair Swap Error */
-#define PHY_B_IS_MDXI_SC (1<<13) /* Bit 13: MDIX Status Change */
-#define PHY_B_IS_HCT (1<<12) /* Bit 12: counter above 32k */
-#define PHY_B_IS_LCT (1<<11) /* Bit 11: counter above 128 */
-#define PHY_B_IS_AN_PR (1<<10) /* Bit 10: Page Received */
-#define PHY_B_IS_NO_HDCL (1<<9) /* Bit 9: No HCD Link */
-#define PHY_B_IS_NO_HDC (1<<8) /* Bit 8: No HCD */
-#define PHY_B_IS_NEG_USHDC (1<<7) /* Bit 7: Negotiated Unsup. HCD */
-#define PHY_B_IS_SCR_S_ER (1<<6) /* Bit 6: Scrambler Sync Error */
-#define PHY_B_IS_RRS_CHANGE (1<<5) /* Bit 5: Remote Rx Stat Change */
-#define PHY_B_IS_LRS_CHANGE (1<<4) /* Bit 4: Local Rx Stat Change */
-#define PHY_B_IS_DUP_CHANGE (1<<3) /* Bit 3: Duplex Mode Change */
-#define PHY_B_IS_LSP_CHANGE (1<<2) /* Bit 2: Link Speed Change */
-#define PHY_B_IS_LST_CHANGE (1<<1) /* Bit 1: Link Status Changed */
-#define PHY_B_IS_CRC_ER (1<<0) /* Bit 0: CRC Error */
-
-#define PHY_B_DEF_MSK (~(PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE))
-
-/* Pause Bits (PHY_B_AN_ASP and PHY_B_AN_PC) encoding */
-#define PHY_B_P_NO_PAUSE (0<<10) /* Bit 11..10: no Pause Mode */
-#define PHY_B_P_SYM_MD (1<<10) /* Bit 11..10: symmetric Pause Mode */
-#define PHY_B_P_ASYM_MD (2<<10) /* Bit 11..10: asymmetric Pause Mode */
-#define PHY_B_P_BOTH_MD (3<<10) /* Bit 11..10: both Pause Mode */
-
-/*
- * Resolved Duplex mode and Capabilities (Aux Status Summary Reg)
- */
-#define PHY_B_RES_1000FD (7<<8) /* Bit 10..8: 1000Base-T Full Dup. */
-#define PHY_B_RES_1000HD (6<<8) /* Bit 10..8: 1000Base-T Half Dup. */
-/* others: 100/10: invalid for us */
-
-/*
- * Level One-Specific
- */
-/***** PHY_LONE_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_L_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_L_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
-#define PHY_L_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
-#define PHY_L_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
-#define PHY_L_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_L_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
- /* Bit 7..0: reserved */
-
-/***** PHY_LONE_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
-#define PHY_L_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
-#define PHY_L_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
-#define PHY_L_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
-#define PHY_L_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status*/
-#define PHY_L_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
-#define PHY_L_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
- /* Bit 9..8: reserved */
-#define PHY_B_1000S_IEC 0xff /* Bit 7..0: Idle Error Count */
-
-/***** PHY_LONE_EXT_STAT 16 bit r/o Extended Status Register *****/
-#define PHY_L_ES_X_FD_CAP (1<<15) /* Bit 15: 1000Base-X FD capable */
-#define PHY_L_ES_X_HD_CAP (1<<14) /* Bit 14: 1000Base-X HD capable */
-#define PHY_L_ES_T_FD_CAP (1<<13) /* Bit 13: 1000Base-T FD capable */
-#define PHY_L_ES_T_HD_CAP (1<<12) /* Bit 12: 1000Base-T HD capable */
- /* Bit 11..0: reserved */
-
-/***** PHY_LONE_PORT_CFG 16 bit r/w Port Configuration Reg *****/
-#define PHY_L_PC_REP_MODE (1<<15) /* Bit 15: Repeater Mode */
- /* Bit 14: reserved */
-#define PHY_L_PC_TX_DIS (1<<13) /* Bit 13: Tx output Disabled */
-#define PHY_L_PC_BY_SCR (1<<12) /* Bit 12: Bypass Scrambler */
-#define PHY_L_PC_BY_45 (1<<11) /* Bit 11: Bypass 4B5B-Decoder */
-#define PHY_L_PC_JAB_DIS (1<<10) /* Bit 10: Jabber Disabled */
-#define PHY_L_PC_SQE (1<<9) /* Bit 9: Enable Heartbeat */
-#define PHY_L_PC_TP_LOOP (1<<8) /* Bit 8: TP Loopback */
-#define PHY_L_PC_SSS (1<<7) /* Bit 7: Smart Speed Selection */
-#define PHY_L_PC_FIFO_SIZE (1<<6) /* Bit 6: FIFO Size */
-#define PHY_L_PC_PRE_EN (1<<5) /* Bit 5: Preamble Enable */
-#define PHY_L_PC_CIM (1<<4) /* Bit 4: Carrier Integrity Mon */
-#define PHY_L_PC_10_SER (1<<3) /* Bit 3: Use Serial Output */
-#define PHY_L_PC_ANISOL (1<<2) /* Bit 2: Unisolate Port */
-#define PHY_L_PC_TEN_BIT (1<<1) /* Bit 1: 10bit iface mode on */
-#define PHY_L_PC_ALTCLOCK (1<<0) /* Bit 0: (ro) ALTCLOCK Mode on */
-
-/***** PHY_LONE_Q_STAT 16 bit r/o Quick Status Reg *****/
-#define PHY_L_QS_D_RATE (3<<14) /* Bit 15..14: Data Rate */
-#define PHY_L_QS_TX_STAT (1<<13) /* Bit 13: Transmitting */
-#define PHY_L_QS_RX_STAT (1<<12) /* Bit 12: Receiving */
-#define PHY_L_QS_COL_STAT (1<<11) /* Bit 11: Collision */
-#define PHY_L_QS_L_STAT (1<<10) /* Bit 10: Link is up */
-#define PHY_L_QS_DUP_MOD (1<<9) /* Bit 9: Full/Half Duplex */
-#define PHY_L_QS_AN (1<<8) /* Bit 8: AutoNeg is On */
-#define PHY_L_QS_AN_C (1<<7) /* Bit 7: AN is Complete */
-#define PHY_L_QS_LLE (7<<4) /* Bit 6: Line Length Estim. */
-#define PHY_L_QS_PAUSE (1<<3) /* Bit 3: LP advertised Pause */
-#define PHY_L_QS_AS_PAUSE (1<<2) /* Bit 2: LP adv. asym. Pause */
-#define PHY_L_QS_ISOLATE (1<<1) /* Bit 1: CIM Isolated */
-#define PHY_L_QS_EVENT (1<<0) /* Bit 0: Event has occurred */
-
-/***** PHY_LONE_INT_ENAB 16 bit r/w Interrupt Enable Reg *****/
-/***** PHY_LONE_INT_STAT 16 bit r/o Interrupt Status Reg *****/
- /* Bit 15..14: reserved */
-#define PHY_L_IS_AN_F (1<<13) /* Bit 13: Auto-Negotiation fault */
- /* Bit 12: not described */
-#define PHY_L_IS_CROSS (1<<11) /* Bit 11: Crossover used */
-#define PHY_L_IS_POL (1<<10) /* Bit 10: Polarity correct. used*/
-#define PHY_L_IS_SS (1<<9) /* Bit 9: Smart Speed Downgrade*/
-#define PHY_L_IS_CFULL (1<<8) /* Bit 8: Counter Full */
-#define PHY_L_IS_AN_C (1<<7) /* Bit 7: AutoNeg Complete */
-#define PHY_L_IS_SPEED (1<<6) /* Bit 6: Speed Changed */
-#define PHY_L_IS_DUP (1<<5) /* Bit 5: Duplex Changed */
-#define PHY_L_IS_LS (1<<4) /* Bit 4: Link Status Changed */
-#define PHY_L_IS_ISOL (1<<3) /* Bit 3: Isolate Occured */
-#define PHY_L_IS_MDINT (1<<2) /* Bit 2: (ro) STAT: MII Int Pending */
-#define PHY_L_IS_INTEN (1<<1) /* Bit 1: ENAB: Enable IRQs */
-#define PHY_L_IS_FORCE (1<<0) /* Bit 0: ENAB: Force Interrupt */
-
-/* int. mask */
-#define PHY_L_DEF_MSK (PHY_L_IS_LS | PHY_L_IS_ISOL | PHY_L_IS_INTEN)
-
-/***** PHY_LONE_LED_CFG 16 bit r/w LED Configuration Reg *****/
-#define PHY_L_LC_LEDC (3<<14) /* Bit 15..14: Col/Blink/On/Off */
-#define PHY_L_LC_LEDR (3<<12) /* Bit 13..12: Rx/Blink/On/Off */
-#define PHY_L_LC_LEDT (3<<10) /* Bit 11..10: Tx/Blink/On/Off */
-#define PHY_L_LC_LEDG (3<<8) /* Bit 9..8: Giga/Blink/On/Off */
-#define PHY_L_LC_LEDS (3<<6) /* Bit 7..6: 10-100/Blink/On/Off */
-#define PHY_L_LC_LEDL (3<<4) /* Bit 5..4: Link/Blink/On/Off */
-#define PHY_L_LC_LEDF (3<<2) /* Bit 3..2: Duplex/Blink/On/Off */
-#define PHY_L_LC_PSTRECH (1<<1) /* Bit 1: Strech LED Pulses */
-#define PHY_L_LC_FREQ (1<<0) /* Bit 0: 30/100 ms */
-
-/***** PHY_LONE_PORT_CTRL 16 bit r/w Port Control Reg *****/
-#define PHY_L_PC_TX_TCLK (1<<15) /* Bit 15: Enable TX_TCLK */
- /* Bit 14: reserved */
-#define PHY_L_PC_ALT_NP (1<<13) /* Bit 14: Alternate Next Page */
-#define PHY_L_PC_GMII_ALT (1<<12) /* Bit 13: Alternate GMII driver */
- /* Bit 11: reserved */
-#define PHY_L_PC_TEN_CRS (1<<10) /* Bit 10: Extend CRS*/
- /* Bit 9..0: not described */
-
-/***** PHY_LONE_CIM 16 bit r/o CIM Reg *****/
-#define PHY_L_CIM_ISOL (255<<8)/* Bit 15..8: Isolate Count */
-#define PHY_L_CIM_FALSE_CAR (255<<0)/* Bit 7..0: False Carrier Count */
-
-
-/*
- * Pause Bits (PHY_L_AN_ASP and PHY_L_AN_PC) encoding
- */
-#define PHY_L_P_NO_PAUSE (0<<10) /* Bit 11..10: no Pause Mode */
-#define PHY_L_P_SYM_MD (1<<10) /* Bit 11..10: symmetric Pause Mode */
-#define PHY_L_P_ASYM_MD (2<<10) /* Bit 11..10: asymmetric Pause Mode */
-#define PHY_L_P_BOTH_MD (3<<10) /* Bit 11..10: both Pause Mode */
-
-
-/*
- * National-Specific
- */
-/***** PHY_NAT_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_N_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_N_1000C_MSE (1<<12) /* Bit 12: Master/Slave Enable */
-#define PHY_N_1000C_MSC (1<<11) /* Bit 11: M/S Configuration */
-#define PHY_N_1000C_RD (1<<10) /* Bit 10: Repeater/DTE */
-#define PHY_N_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_N_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
-#define PHY_N_1000C_APC (1<<7) /* Bit 7: Asymmetric Pause Cap. */
- /* Bit 6..0: reserved */
-
-/***** PHY_NAT_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/
-#define PHY_N_1000S_MSF (1<<15) /* Bit 15: Master/Slave Fault */
-#define PHY_N_1000S_MSR (1<<14) /* Bit 14: Master/Slave Result */
-#define PHY_N_1000S_LRS (1<<13) /* Bit 13: Local Receiver Status */
-#define PHY_N_1000S_RRS (1<<12) /* Bit 12: Remote Receiver Status*/
-#define PHY_N_1000S_LP_FD (1<<11) /* Bit 11: Link Partner can FD */
-#define PHY_N_1000S_LP_HD (1<<10) /* Bit 10: Link Partner can HD */
-#define PHY_N_1000C_LP_APC (1<<9) /* Bit 9: LP Asym. Pause Cap. */
- /* Bit 8: reserved */
-#define PHY_N_1000S_IEC 0xff /* Bit 7..0: Idle Error Count */
-
-/***** PHY_NAT_EXT_STAT 16 bit r/o Extended Status Register *****/
-#define PHY_N_ES_X_FD_CAP (1<<15) /* Bit 15: 1000Base-X FD capable */
-#define PHY_N_ES_X_HD_CAP (1<<14) /* Bit 14: 1000Base-X HD capable */
-#define PHY_N_ES_T_FD_CAP (1<<13) /* Bit 13: 1000Base-T FD capable */
-#define PHY_N_ES_T_HD_CAP (1<<12) /* Bit 12: 1000Base-T HD capable */
- /* Bit 11..0: reserved */
-
-/* todo: those are still missing */
-/***** PHY_NAT_EXT_CTRL1 16 bit r/o Extended Control Reg1 *****/
-/***** PHY_NAT_Q_STAT1 16 bit r/o Quick Status Reg1 *****/
-/***** PHY_NAT_10B_OP 16 bit r/o 10Base-T Operations Reg *****/
-/***** PHY_NAT_EXT_CTRL2 16 bit r/o Extended Control Reg1 *****/
-/***** PHY_NAT_Q_STAT2 16 bit r/o Quick Status Reg2 *****/
-/***** PHY_NAT_PHY_ADDR 16 bit r/o PHY Address Register *****/
-
-/*
- * Marvell-Specific
- */
-/***** PHY_MARV_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/
-/***** PHY_MARV_AUNE_LP 16 bit r/w Link Part Ability Reg *****/
-#define PHY_M_AN_NXT_PG BIT_15 /* Request Next Page */
-#define PHY_M_AN_ACK BIT_14 /* (ro) Acknowledge Received */
-#define PHY_M_AN_RF BIT_13 /* Remote Fault */
- /* Bit 12: reserved */
-#define PHY_M_AN_ASP BIT_11 /* Asymmetric Pause */
-#define PHY_M_AN_PC BIT_10 /* MAC Pause implemented */
-#define PHY_M_AN_100_FD BIT_8 /* Advertise 100Base-TX Full Duplex */
-#define PHY_M_AN_100_HD BIT_7 /* Advertise 100Base-TX Half Duplex */
-#define PHY_M_AN_10_FD BIT_6 /* Advertise 10Base-TX Full Duplex */
-#define PHY_M_AN_10_HD BIT_5 /* Advertise 10Base-TX Half Duplex */
-
-/* special defines for FIBER (88E1011S only) */
-#define PHY_M_AN_ASP_X BIT_8 /* Asymmetric Pause */
-#define PHY_M_AN_PC_X BIT_7 /* MAC Pause implemented */
-#define PHY_M_AN_1000X_AHD BIT_6 /* Advertise 10000Base-X Half Duplex */
-#define PHY_M_AN_1000X_AFD BIT_5 /* Advertise 10000Base-X Full Duplex */
-
-/* Pause Bits (PHY_M_AN_ASP_X and PHY_M_AN_PC_X) encoding */
-#define PHY_M_P_NO_PAUSE_X (0<<7) /* Bit 8.. 7: no Pause Mode */
-#define PHY_M_P_SYM_MD_X (1<<7) /* Bit 8.. 7: symmetric Pause Mode */
-#define PHY_M_P_ASYM_MD_X (2<<7) /* Bit 8.. 7: asymmetric Pause Mode */
-#define PHY_M_P_BOTH_MD_X (3<<7) /* Bit 8.. 7: both Pause Mode */
-
-/***** PHY_MARV_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/
-#define PHY_M_1000C_TEST (7<<13) /* Bit 15..13: Test Modes */
-#define PHY_M_1000C_MSE (1<<12) /* Bit 12: Manual Master/Slave Enable */
-#define PHY_M_1000C_MSC (1<<11) /* Bit 11: M/S Configuration (1=Master) */
-#define PHY_M_1000C_MPD (1<<10) /* Bit 10: Multi-Port Device */
-#define PHY_M_1000C_AFD (1<<9) /* Bit 9: Advertise Full Duplex */
-#define PHY_M_1000C_AHD (1<<8) /* Bit 8: Advertise Half Duplex */
- /* Bit 7..0: reserved */
-
-/***** PHY_MARV_PHY_CTRL 16 bit r/w PHY Specific Ctrl Reg *****/
-
-#define PHY_M_PC_TX_FFD_MSK (3<<14) /* Bit 15..14: Tx FIFO Depth Mask */
-#define PHY_M_PC_RX_FFD_MSK (3<<12) /* Bit 13..12: Rx FIFO Depth Mask */
-#define PHY_M_PC_ASS_CRS_TX (1<<11) /* Bit 11: Assert CRS on Transmit */
-#define PHY_M_PC_FL_GOOD (1<<10) /* Bit 10: Force Link Good */
-#define PHY_M_PC_EN_DET_MSK (3<<8) /* Bit 9.. 8: Energy Detect Mask */
-#define PHY_M_PC_ENA_EXT_D (1<<7) /* Bit 7: Enable Ext. Distance (10BT) */
-#define PHY_M_PC_MDIX_MSK (3<<5) /* Bit 6.. 5: MDI/MDIX Config. Mask */
-#define PHY_M_PC_DIS_125CLK (1<<4) /* Bit 4: Disable 125 CLK */
-#define PHY_M_PC_MAC_POW_UP (1<<3) /* Bit 3: MAC Power up */
-#define PHY_M_PC_SQE_T_ENA (1<<2) /* Bit 2: SQE Test Enabled */
-#define PHY_M_PC_POL_R_DIS (1<<1) /* Bit 1: Polarity Reversal Disabled */
-#define PHY_M_PC_DIS_JABBER (1<<0) /* Bit 0: Disable Jabber */
-
-#define PHY_M_PC_MDI_XMODE(x) SHIFT5(x)
-#define PHY_M_PC_MAN_MDI 0 /* 00 = Manual MDI configuration */
-#define PHY_M_PC_MAN_MDIX 1 /* 01 = Manual MDIX configuration */
-#define PHY_M_PC_ENA_AUTO 3 /* 11 = Enable Automatic Crossover */
-
-/***** PHY_MARV_PHY_STAT 16 bit r/o PHY Specific Status Reg *****/
-#define PHY_M_PS_SPEED_MSK (3<<14) /* Bit 15..14: Speed Mask */
-#define PHY_M_PS_SPEED_1000 (1<<15) /* 10 = 1000 Mbps */
-#define PHY_M_PS_SPEED_100 (1<<14) /* 01 = 100 Mbps */
-#define PHY_M_PS_SPEED_10 0 /* 00 = 10 Mbps */
-#define PHY_M_PS_FULL_DUP (1<<13) /* Bit 13: Full Duplex */
-#define PHY_M_PS_PAGE_REC (1<<12) /* Bit 12: Page Received */
-#define PHY_M_PS_SPDUP_RES (1<<11) /* Bit 11: Speed & Duplex Resolved */
-#define PHY_M_PS_LINK_UP (1<<10) /* Bit 10: Link Up */
-#define PHY_M_PS_CABLE_MSK (3<<7) /* Bit 9.. 7: Cable Length Mask */
-#define PHY_M_PS_MDI_X_STAT (1<<6) /* Bit 6: MDI Crossover Stat (1=MDIX) */
-#define PHY_M_PS_DOWNS_STAT (1<<5) /* Bit 5: Downshift Status (1=downsh.) */
-#define PHY_M_PS_ENDET_STAT (1<<4) /* Bit 4: Energy Detect Status (1=act) */
-#define PHY_M_PS_TX_P_EN (1<<3) /* Bit 3: Tx Pause Enabled */
-#define PHY_M_PS_RX_P_EN (1<<2) /* Bit 2: Rx Pause Enabled */
-#define PHY_M_PS_POL_REV (1<<1) /* Bit 1: Polarity Reversed */
-#define PHY_M_PC_JABBER (1<<0) /* Bit 0: Jabber */
-
-#define PHY_M_PS_PAUSE_MSK (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN)
-
-/***** PHY_MARV_INT_MASK 16 bit r/w Interrupt Mask Reg *****/
-/***** PHY_MARV_INT_STAT 16 bit r/o Interrupt Status Reg *****/
-#define PHY_M_IS_AN_ERROR (1<<15) /* Bit 15: Auto-Negotiation Error */
-#define PHY_M_IS_LSP_CHANGE (1<<14) /* Bit 14: Link Speed Changed */
-#define PHY_M_IS_DUP_CHANGE (1<<13) /* Bit 13: Duplex Mode Changed */
-#define PHY_M_IS_AN_PR (1<<12) /* Bit 12: Page Received */
-#define PHY_M_IS_AN_COMPL (1<<11) /* Bit 11: Auto-Negotiation Completed */
-#define PHY_M_IS_LST_CHANGE (1<<10) /* Bit 10: Link Status Changed */
-#define PHY_M_IS_SYMB_ERROR (1<<9) /* Bit 9: Symbol Error */
-#define PHY_M_IS_FALSE_CARR (1<<8) /* Bit 8: False Carrier */
-#define PHY_M_IS_FIFO_ERROR (1<<7) /* Bit 7: FIFO Overflow/Underrun Error */
-#define PHY_M_IS_MDI_CHANGE (1<<6) /* Bit 6: MDI Crossover Changed */
-#define PHY_M_IS_DOWNSH_DET (1<<5) /* Bit 5: Downshift Detected */
-#define PHY_M_IS_END_CHANGE (1<<4) /* Bit 4: Energy Detect Changed */
- /* Bit 3..2: reserved */
-#define PHY_M_IS_POL_CHANGE (1<<1) /* Bit 1: Polarity Changed */
-#define PHY_M_IS_JABBER (1<<0) /* Bit 0: Jabber */
-
-#define PHY_M_DEF_MSK (PHY_M_IS_AN_ERROR | PHY_M_IS_AN_PR | \
- PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR)
-
-/***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/
-#define PHY_M_EC_M_DSC_MSK (3<<10) /* Bit 11..10: Master downshift counter */
-#define PHY_M_EC_S_DSC_MSK (3<<8) /* Bit 9.. 8: Slave downshift counter */
-#define PHY_M_EC_MAC_S_MSK (7<<4) /* Bit 6.. 4: Def. MAC interface speed */
-
-#define PHY_M_EC_M_DSC(x) SHIFT10(x) /* 00=1x; 01=2x; 10=3x; 11=4x */
-#define PHY_M_EC_S_DSC(x) SHIFT8(x) /* 00=dis; 01=1x; 10=2x; 11=3x */
-#define PHY_M_EC_MAC_S(x) SHIFT4(x) /* 01X=0; 110=2.5; 111=25 (MHz) */
-
-#define MAC_TX_CLK_0_MHZ 2
-#define MAC_TX_CLK_2_5_MHZ 6
-#define MAC_TX_CLK_25_MHZ 7
-
-/***** PHY_MARV_LED_CTRL 16 bit r/w LED Control Reg *****/
-#define PHY_M_LEDC_DIS_LED (1<<15) /* Bit 15: Disable LED */
-#define PHY_M_LEDC_PULS_MSK (7<<12) /* Bit 14..12: Pulse Stretch Mask */
-#define PHY_M_LEDC_F_INT (1<<11) /* Bit 11: Force Interrupt */
-#define PHY_M_LEDC_BL_R_MSK (7<<8) /* Bit 10.. 8: Blink Rate Mask */
- /* Bit 7.. 5: reserved */
-#define PHY_M_LEDC_LINK_MSK (3<<3) /* Bit 4.. 3: Link Control Mask */
-#define PHY_M_LEDC_DP_CTRL (1<<2) /* Bit 2: Duplex Control */
-#define PHY_M_LEDC_RX_CTRL (1<<1) /* Bit 1: Rx activity / Link */
-#define PHY_M_LEDC_TX_CTRL (1<<0) /* Bit 0: Tx activity / Link */
-
-#define PHY_M_LED_PULS_DUR(x) SHIFT12(x) /* Pulse Stretch Duration */
-
-#define PULS_NO_STR 0 /* no pulse stretching */
-#define PULS_21MS 1 /* 21 ms to 42 ms */
-#define PULS_42MS 2 /* 42 ms to 84 ms */
-#define PULS_84MS 3 /* 84 ms to 170 ms */
-#define PULS_170MS 4 /* 170 ms to 340 ms */
-#define PULS_340MS 5 /* 340 ms to 670 ms */
-#define PULS_670MS 6 /* 670 ms to 1.3 s */
-#define PULS_1300MS 7 /* 1.3 s to 2.7 s */
-
-#define PHY_M_LED_BLINK_RT(x) SHIFT8(x) /* Blink Rate */
-
-#define BLINK_42MS 0 /* 42 ms */
-#define BLINK_84MS 1 /* 84 ms */
-#define BLINK_170MS 2 /* 170 ms */
-#define BLINK_340MS 3 /* 340 ms */
-#define BLINK_670MS 4 /* 670 ms */
- /* values 5 - 7: reserved */
-
-/***** PHY_MARV_LED_OVER 16 bit r/w Manual LED Override Reg *****/
-#define PHY_M_LED_MO_DUP(x) SHIFT10(x) /* Bit 11..10: Duplex */
-#define PHY_M_LED_MO_10(x) SHIFT8(x) /* Bit 9.. 8: Link 10 */
-#define PHY_M_LED_MO_100(x) SHIFT6(x) /* Bit 7.. 6: Link 100 */
-#define PHY_M_LED_MO_1000(x) SHIFT4(x) /* Bit 5.. 4: Link 1000 */
-#define PHY_M_LED_MO_RX(x) SHIFT2(x) /* Bit 3.. 2: Rx */
-#define PHY_M_LED_MO_TX(x) SHIFT0(x) /* Bit 1.. 0: Tx */
-
-#define MO_LED_NORM 0
-#define MO_LED_BLINK 1
-#define MO_LED_OFF 2
-#define MO_LED_ON 3
-
-/***** PHY_MARV_EXT_CTRL_2 16 bit r/w Ext. PHY Specific Ctrl 2 *****/
- /* Bit 15.. 7: reserved */
-#define PHY_M_EC2_FI_IMPED (1<<6) /* Bit 6: Fiber Input Impedance */
-#define PHY_M_EC2_FO_IMPED (1<<5) /* Bit 5: Fiber Output Impedance */
-#define PHY_M_EC2_FO_M_CLK (1<<4) /* Bit 4: Fiber Mode Clock Enable */
-#define PHY_M_EC2_FO_BOOST (1<<3) /* Bit 3: Fiber Output Boost */
-#define PHY_M_EC2_FO_AM_MSK 7 /* Bit 2.. 0: Fiber Output Amplitude */
-
-/***** PHY_MARV_CABLE_DIAG 16 bit r/o Cable Diagnostic Reg *****/
-#define PHY_M_CABD_ENA_TEST (1<<15) /* Bit 15: Enable Test */
-#define PHY_M_CABD_STAT_MSK (3<<13) /* Bit 14..13: Status */
- /* Bit 12.. 8: reserved */
-#define PHY_M_CABD_DIST_MSK 0xff /* Bit 7.. 0: Distance */
-
-/* values for Cable Diagnostic Status (11=fail; 00=OK; 10=open; 01=short) */
-#define CABD_STAT_NORMAL 0
-#define CABD_STAT_SHORT 1
-#define CABD_STAT_OPEN 2
-#define CABD_STAT_FAIL 3
-
-
-/*
- * GMAC registers
- *
- * The GMAC registers are 16 or 32 bits wide.
- * The GMACs host processor interface is 16 bits wide,
- * therefore ALL registers will be addressed with 16 bit accesses.
- *
- * The following macros are provided to access the GMAC registers
- * GM_IN16(), GM_OUT16, GM_IN32(), GM_OUT32(), GM_INADR(), GM_OUTADR(),
- * GM_INHASH(), and GM_OUTHASH().
- * The macros are defined in SkGeHw.h.
- *
- * Note: NA reg = Network Address e.g DA, SA etc.
- *
- */
-
-/* Port Registers */
-#define GM_GP_STAT 0x0000 /* 16 bit r/o General Purpose Status */
-#define GM_GP_CTRL 0x0004 /* 16 bit r/w General Purpose Control */
-#define GM_TX_CTRL 0x0008 /* 16 bit r/w Transmit Control Reg. */
-#define GM_RX_CTRL 0x000c /* 16 bit r/w Receive Control Reg. */
-#define GM_TX_FLOW_CTRL 0x0010 /* 16 bit r/w Transmit Flow Control */
-#define GM_TX_PARAM 0x0014 /* 16 bit r/w Transmit Parameter Reg. */
-#define GM_SERIAL_MODE 0x0018 /* 16 bit r/w Serial Mode Register */
-
-/* Source Address Registers */
-#define GM_SRC_ADDR_1L 0x001c /* 16 bit r/w Source Address 1 (low) */
-#define GM_SRC_ADDR_1M 0x0020 /* 16 bit r/w Source Address 1 (middle) */
-#define GM_SRC_ADDR_1H 0x0024 /* 16 bit r/w Source Address 1 (high) */
-#define GM_SRC_ADDR_2L 0x0028 /* 16 bit r/w Source Address 2 (low) */
-#define GM_SRC_ADDR_2M 0x002c /* 16 bit r/w Source Address 2 (middle) */
-#define GM_SRC_ADDR_2H 0x0030 /* 16 bit r/w Source Address 2 (high) */
-
-/* Multicast Address Hash Registers */
-#define GM_MC_ADDR_H1 0x0034 /* 16 bit r/w Multicast Address Hash 1 */
-#define GM_MC_ADDR_H2 0x0038 /* 16 bit r/w Multicast Address Hash 2 */
-#define GM_MC_ADDR_H3 0x003c /* 16 bit r/w Multicast Address Hash 3 */
-#define GM_MC_ADDR_H4 0x0040 /* 16 bit r/w Multicast Address Hash 4 */
-
-/* Interrupt Source Registers */
-#define GM_TX_IRQ_SRC 0x0044 /* 16 bit r/o Tx Overflow IRQ Source */
-#define GM_RX_IRQ_SRC 0x0048 /* 16 bit r/o Rx Overflow IRQ Source */
-#define GM_TR_IRQ_SRC 0x004c /* 16 bit r/o Tx/Rx Over. IRQ Source */
-
-/* Interrupt Mask Registers */
-#define GM_TX_IRQ_MSK 0x0050 /* 16 bit r/w Tx Overflow IRQ Mask */
-#define GM_RX_IRQ_MSK 0x0054 /* 16 bit r/w Rx Overflow IRQ Mask */
-#define GM_TR_IRQ_MSK 0x0058 /* 16 bit r/w Tx/Rx Over. IRQ Mask */
-
-/* Serial Management Interface (SMI) Registers */
-#define GM_SMI_CTRL 0x0080 /* 16 bit r/w SMI Control Register */
-#define GM_SMI_DATA 0x0084 /* 16 bit r/w SMI Data Register */
-#define GM_PHY_ADDR 0x0088 /* 16 bit r/w GPHY Address Register */
-
-/* MIB Counters */
-#define GM_MIB_CNT_BASE 0x0100 /* Base Address of MIB Counters */
-#define GM_MIB_CNT_SIZE 44 /* Number of MIB Counters */
-
-/*
- * MIB Counters base address definitions (low word) -
- * use offset 4 for access to high word (32 bit r/o)
- */
-#define GM_RXF_UC_OK \
- (GM_MIB_CNT_BASE + 0) /* Unicast Frames Received OK */
-#define GM_RXF_BC_OK \
- (GM_MIB_CNT_BASE + 8) /* Broadcast Frames Received OK */
-#define GM_RXF_MPAUSE \
- (GM_MIB_CNT_BASE + 16) /* Pause MAC Ctrl Frames Received */
-#define GM_RXF_MC_OK \
- (GM_MIB_CNT_BASE + 24) /* Multicast Frames Received OK */
-#define GM_RXF_FCS_ERR \
- (GM_MIB_CNT_BASE + 32) /* Rx Frame Check Seq. Error */
- /* GM_MIB_CNT_BASE + 40: reserved */
-#define GM_RXO_OK_LO \
- (GM_MIB_CNT_BASE + 48) /* Octets Received OK Low */
-#define GM_RXO_OK_HI \
- (GM_MIB_CNT_BASE + 56) /* Octets Received OK High */
-#define GM_RXO_ERR_LO \
- (GM_MIB_CNT_BASE + 64) /* Octets Received Invalid Low */
-#define GM_RXO_ERR_HI \
- (GM_MIB_CNT_BASE + 72) /* Octets Received Invalid High */
-#define GM_RXF_SHT \
- (GM_MIB_CNT_BASE + 80) /* Frames <64 Byte Received OK */
-#define GM_RXE_FRAG \
- (GM_MIB_CNT_BASE + 88) /* Frames <64 Byte Receeived with FCS Err */
-#define GM_RXF_64B \
- (GM_MIB_CNT_BASE + 96) /* 64 Byte Rx Frame */
-#define GM_RXF_127B \
- (GM_MIB_CNT_BASE + 104) /* 65-127 Byte Rx Frame */
-#define GM_RXF_255B \
- (GM_MIB_CNT_BASE + 112) /* 128-255 Byte Rx Frame */
-#define GM_RXF_511B \
- (GM_MIB_CNT_BASE + 120) /* 256-511 Byte Rx Frame */
-#define GM_RXF_1023B \
- (GM_MIB_CNT_BASE + 128) /* 512-1023 Byte Rx Frame */
-#define GM_RXF_1518B \
- (GM_MIB_CNT_BASE + 136) /* 1024-1518 Byte Rx Frame */
-#define GM_RXF_MAX_SZ \
- (GM_MIB_CNT_BASE + 144) /* 1519-MaxSize Byte Rx Frame */
-#define GM_RXF_LNG_ERR \
- (GM_MIB_CNT_BASE + 152) /* Rx Frame too Long Error */
-#define GM_RXF_JAB_PKT \
- (GM_MIB_CNT_BASE + 160) /* Rx Jabber Packet Frame */
- /* GM_MIB_CNT_BASE + 168: reserved */
-#define GM_RXE_FIFO_OV \
- (GM_MIB_CNT_BASE + 176) /* Rx FIFO overflow Event */
- /* GM_MIB_CNT_BASE + 184: reserved */
-#define GM_TXF_UC_OK \
- (GM_MIB_CNT_BASE + 192) /* Unicast Frames Xmitted OK */
-#define GM_TXF_BC_OK \
- (GM_MIB_CNT_BASE + 200) /* Broadcast Frames Xmitted OK */
-#define GM_TXF_MPAUSE \
- (GM_MIB_CNT_BASE + 208) /* Pause MAC Ctrl Frames Xmitted */
-#define GM_TXF_MC_OK \
- (GM_MIB_CNT_BASE + 216) /* Multicast Frames Xmitted OK */
-#define GM_TXO_OK_LO \
- (GM_MIB_CNT_BASE + 224) /* Octets Transmitted OK Low */
-#define GM_TXO_OK_HI \
- (GM_MIB_CNT_BASE + 232) /* Octets Transmitted OK High */
-#define GM_TXF_64B \
- (GM_MIB_CNT_BASE + 240) /* 64 Byte Tx Frame */
-#define GM_TXF_127B \
- (GM_MIB_CNT_BASE + 248) /* 65-127 Byte Tx Frame */
-#define GM_TXF_255B \
- (GM_MIB_CNT_BASE + 256) /* 128-255 Byte Tx Frame */
-#define GM_TXF_511B \
- (GM_MIB_CNT_BASE + 264) /* 256-511 Byte Tx Frame */
-#define GM_TXF_1023B \
- (GM_MIB_CNT_BASE + 272) /* 512-1023 Byte Tx Frame */
-#define GM_TXF_1518B \
- (GM_MIB_CNT_BASE + 280) /* 1024-1518 Byte Tx Frame */
-#define GM_TXF_MAX_SZ \
- (GM_MIB_CNT_BASE + 288) /* 1519-MaxSize Byte Tx Frame */
- /* GM_MIB_CNT_BASE + 296: reserved */
-#define GM_TXF_COL \
- (GM_MIB_CNT_BASE + 304) /* Tx Collision */
-#define GM_TXF_LAT_COL \
- (GM_MIB_CNT_BASE + 312) /* Tx Late Collision */
-#define GM_TXF_ABO_COL \
- (GM_MIB_CNT_BASE + 320) /* Tx aborted due to Exces. Col. */
-#define GM_TXF_MUL_COL \
- (GM_MIB_CNT_BASE + 328) /* Tx Multiple Collision */
-#define GM_TXF_SNG_COL \
- (GM_MIB_CNT_BASE + 336) /* Tx Single Collision */
-#define GM_TXE_FIFO_UR \
- (GM_MIB_CNT_BASE + 344) /* Tx FIFO Underrun Event */
-
-/*----------------------------------------------------------------------------*/
-/*
- * GMAC Bit Definitions
- *
- * If the bit access behaviour differs from the register access behaviour
- * (r/w, r/o) this is documented after the bit number.
- * The following bit access behaviours are used:
- * (sc) self clearing
- * (r/o) read only
- */
-
-/* GM_GP_STAT 16 bit r/o General Purpose Status Register */
-
-#define GM_GPSR_SPEED (1<<15) /* Bit 15: Port Speed (1 = 100 Mbps) */
-#define GM_GPSR_DUPLEX (1<<14) /* Bit 14: Duplex Mode (1 = Full) */
-#define GM_GPSR_FC_TX_DIS (1<<13) /* Bit 13: Tx Flow Control Mode Disabled */
-#define GM_GPSR_LINK_UP (1<<12) /* Bit 12: Link Up Status */
-#define GM_GPSR_PAUSE (1<<11) /* Bit 11: Pause State */
-#define GM_GPSR_TX_ACTIVE (1<<10) /* Bit 10: Tx in Progress */
-#define GM_GPSR_EXC_COL (1<<9) /* Bit 9: Excessive Collisions Occured */
-#define GM_GPSR_LAT_COL (1<<8) /* Bit 8: Late Collisions Occured */
- /* Bit 7..6: reserved */
-#define GM_GPSR_PHY_ST_CH (1<<5) /* Bit 5: PHY Status Change */
-#define GM_GPSR_GIG_SPEED (1<<4) /* Bit 4: Gigabit Speed (1 = 1000 Mbps) */
-#define GM_GPSR_PART_MODE (1<<3) /* Bit 3: Partition mode */
-#define GM_GPSR_FC_RX_DIS (1<<2) /* Bit 2: Rx Flow Control Mode Disabled */
-#define GM_GPSR_PROM_EN (1<<1) /* Bit 1: Promiscuous Mode Enabled */
- /* Bit 0: reserved */
-
-/* GM_GP_CTRL 16 bit r/w General Purpose Control Register */
- /* Bit 15: reserved */
-#define GM_GPCR_PROM_ENA (1<<14) /* Bit 14: Enable Promiscuous Mode */
-#define GM_GPCR_FC_TX_DIS (1<<13) /* Bit 13: Disable Tx Flow Control Mode */
-#define GM_GPCR_TX_ENA (1<<12) /* Bit 12: Enable Transmit */
-#define GM_GPCR_RX_ENA (1<<11) /* Bit 11: Enable Receive */
-#define GM_GPCR_BURST_ENA (1<<10) /* Bit 10: Enable Burst Mode */
-#define GM_GPCR_LOOP_ENA (1<<9) /* Bit 9: Enable MAC Loopback Mode */
-#define GM_GPCR_PART_ENA (1<<8) /* Bit 8: Enable Partition Mode */
-#define GM_GPCR_GIGS_ENA (1<<7) /* Bit 7: Gigabit Speed (1000 Mbps) */
-#define GM_GPCR_FL_PASS (1<<6) /* Bit 6: Force Link Pass */
-#define GM_GPCR_DUP_FULL (1<<5) /* Bit 5: Full Duplex Mode */
-#define GM_GPCR_FC_RX_DIS (1<<4) /* Bit 4: Disable Rx Flow Control Mode */
-#define GM_GPCR_SPEED_100 (1<<3) /* Bit 3: Port Speed 100 Mbps */
-#define GM_GPCR_AU_DUP_DIS (1<<2) /* Bit 2: Disable Auto-Update for Duplex */
-#define GM_GPCR_AU_FCT_DIS (1<<1) /* Bit 1: Disable Auto-Update for Flow-c. */
-#define GM_GPCR_AU_SPD_DIS (1<<0) /* Bit 0: Disable Auto-Update for Speed */
-
-#define GM_GPCR_SPEED_1000 (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100)
-#define GM_GPCR_AU_ALL_DIS (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |\
- GM_GPCR_AU_SPD_DIS)
-
-/* GM_TX_CTRL 16 bit r/w Transmit Control Register */
-
-#define GM_TXCR_FORCE_JAM (1<<15) /* Bit 15: Force Jam / Flow-Control */
-#define GM_TXCR_CRC_DIS (1<<14) /* Bit 14: Disable insertion of CRC */
-#define GM_TXCR_PAD_DIS (1<<13) /* Bit 13: Disable padding of packets */
-#define GM_TXCR_COL_THR (4<<10) /* Bit 12..10: Collision Threshold */
-
-/* GM_RX_CTRL 16 bit r/w Receive Control Register */
-#define GM_RXCR_UCF_ENA (1<<15) /* Bit 15: Enable Unicast filtering */
-#define GM_RXCR_MCF_ENA (1<<14) /* Bit 14: Enable Multicast filtering */
-#define GM_RXCR_CRC_DIS (1<<13) /* Bit 13: Remove 4-byte CRC */
-#define GM_RXCR_PASS_FC (1<<12) /* Bit 12: Pass FC packets to FIFO */
-
-/* GM_TX_PARAM 16 bit r/w Transmit Parameter Register */
-#define GM_TXPA_JAMLEN_MSK (0x03<<14) /* Bit 15..14: Jam Length */
-#define GM_TXPA_JAMIPG_MSK (0x1f<<9) /* Bit 13..9: Jam IPG */
-#define GM_TXPA_JAMDAT_MSK (0x1f<<4) /* Bit 8..4: IPG Jam to Data */
- /* Bit 3..0: reserved */
-#define JAM_LEN_VAL(x) SHIFT14(x)
-#define JAM_IPG_VAL(x) SHIFT9(x)
-#define IPG_JAM_DATA(x) SHIFT4(x)
-
-/* GM_SERIAL_MODE 16 bit r/w Serial Mode Register */
-#define GM_SMOD_DATABL_MSK (0x1f<<11) /* Bit 15..11: Data Blinder */
-#define GM_SMOD_LIMIT_4 (1<<10) /* Bit 10: 4 consecutive transmit trials */
-#define GM_SMOD_VLAN_ENA (1<<9) /* Bit 9: Enable VLAN (Max. Frame Length) */
-#define GM_SMOD_JUMBO_ENA (1<<8) /* Bit 8: Enable Jumbo (Max. Frame Length) */
- /* Bit 7..5: reserved */
-#define GM_SMOD_IPG_MSK 0x1f /* Bit 4..0: Inter-Packet Gap (IPG) */
-
-#define DATA_BLIND_VAL(x) SHIFT11(x)
-#define DATA_BLIND_FAST_ETH 0x1c
-#define DATA_BLIND_GIGABIT 4
-
-#define IPG_VAL_FAST_ETH 0x1e
-#define IPG_VAL_GIGABIT 6
-
-/* GM_SMI_CTRL 16 bit r/w SMI Control Register */
-
-#define GM_SMI_CT_PHY_AD(x) SHIFT11(x)
-#define GM_SMI_CT_REG_AD(x) SHIFT6(x)
-#define GM_SMI_CT_OP_RD (1<<5) /* Bit 5: OpCode Read (0=Write)*/
-#define GM_SMI_CT_RD_VAL (1<<4) /* Bit 4: Read Valid (Read completed) */
-#define GM_SMI_CT_BUSY (1<<3) /* Bit 3: Busy (Operation in progress) */
- /* Bit 2..0: reserved */
-
-/* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
- /* Bit 15..6: reserved */
-#define GM_PAR_MIB_CLR (1<<5) /* Bit 5: Set MIB Clear Counter Mode */
-#define GM_PAR_MIB_TST (1<<4) /* Bit 4: MIB Load Counter (Test Mode) */
- /* Bit 3..0: reserved */
-
-/* Receive Frame Status Encoding */
-#define GMR_FS_LEN (0xffffUL<<16) /* Bit 31..16: Rx Frame Length */
- /* Bit 15..14: reserved */
-#define GMR_FS_VLAN (1L<<13) /* Bit 13: VLAN Packet */
-#define GMR_FS_JABBER (1L<<12) /* Bit 12: Jabber Packet */
-#define GMR_FS_UN_SIZE (1L<<11) /* Bit 11: Undersize Packet */
-#define GMR_FS_MC (1L<<10) /* Bit 10: Multicast Packet */
-#define GMR_FS_BC (1L<<9) /* Bit 9: Broadcast Packet */
-#define GMR_FS_RX_OK (1L<<8) /* Bit 8: Receive OK (Good Packet) */
-#define GMR_FS_GOOD_FC (1L<<7) /* Bit 7: Good Flow-Control Packet */
-#define GMR_FS_BAD_FC (1L<<6) /* Bit 6: Bad Flow-Control Packet */
-#define GMR_FS_MII_ERR (1L<<5) /* Bit 5: MII Error */
-#define GMR_FS_LONG_ERR (1L<<4) /* Bit 4: Too Long Packet */
-#define GMR_FS_FRAGMENT (1L<<3) /* Bit 3: Fragment */
- /* Bit 2: reserved */
-#define GMR_FS_CRC_ERR (1L<<1) /* Bit 1: CRC Error */
-#define GMR_FS_RX_FF_OV (1L<<0) /* Bit 0: Rx FIFO Overflow */
-
-/*
- * GMR_FS_ANY_ERR (analogous to XMR_FS_ANY_ERR)
- */
-#define GMR_FS_ANY_ERR (GMR_FS_CRC_ERR | \
- GMR_FS_LONG_ERR | \
- GMR_FS_MII_ERR | \
- GMR_FS_BAD_FC | \
- GMR_FS_GOOD_FC | \
- GMR_FS_JABBER)
-
-/* Rx GMAC FIFO Flush Mask (default) */
-#define RX_FF_FL_DEF_MSK (GMR_FS_CRC_ERR | \
- GMR_FS_RX_FF_OV | \
- GMR_FS_MII_ERR | \
- GMR_FS_BAD_FC | \
- GMR_FS_GOOD_FC | \
- GMR_FS_UN_SIZE | \
- GMR_FS_JABBER)
-
-/* typedefs *******************************************************************/
-
-
-/* function prototypes ********************************************************/
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __INC_XMAC_H */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skaddr.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.48 $
- * Date: $Date: 2003/02/12 17:09:37 $
- * Purpose: Manage Addresses (Multicast and Unicast) and Promiscuous Mode.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skaddr.c,v $
- * Revision 1.48 2003/02/12 17:09:37 tschilli
- * Fix in SkAddrOverride() to set both (physical and logical) MAC addresses
- * in case that both addresses are identical.
- *
- * Revision 1.47 2002/09/17 06:31:10 tschilli
- * Handling of SK_PROM_MODE_ALL_MC flag in SkAddrGmacMcUpdate()
- * and SkAddrGmacPromiscuousChange() fixed.
- * Editorial changes.
- *
- * Revision 1.46 2002/08/22 07:55:41 tschilli
- * New function SkGmacMcHash() for GMAC multicast hashing algorithm added.
- * Editorial changes.
- *
- * Revision 1.45 2002/08/15 12:29:35 tschilli
- * SkAddrGmacMcUpdate() and SkAddrGmacPromiscuousChange() changed.
- *
- * Revision 1.44 2002/08/14 12:18:03 rschmidt
- * Replaced direct handling of MAC Hashing (XMAC and GMAC)
- * with routine SkMacHashing().
- * Replaced wrong 3rd para 'i' with 'PortNumber' in SkMacPromiscMode().
- *
- * Revision 1.43 2002/08/13 09:37:43 rschmidt
- * Corrected some SK_DBG_MSG outputs.
- * Replaced wrong 2nd para pAC with IoC in SkMacPromiscMode().
- * Editorial changes.
- *
- * Revision 1.42 2002/08/12 11:24:36 rschmidt
- * Remove setting of logical MAC address GM_SRC_ADDR_2 in SkAddrInit().
- * Replaced direct handling of MAC Promiscuous Mode (XMAC and GMAC)
- * with routine SkMacPromiscMode().
- * Editorial changes.
- *
- * Revision 1.41 2002/06/10 13:52:18 tschilli
- * Changes for handling YUKON.
- * All changes are internally and not visible to the programmer
- * using this module.
- *
- * Revision 1.40 2001/02/14 14:04:59 rassmann
- * Editorial changes.
- *
- * Revision 1.39 2001/01/30 10:30:04 rassmann
- * Editorial changes.
- *
- * Revision 1.38 2001/01/25 16:26:52 rassmann
- * Ensured that logical address overrides are done on net's active port.
- *
- * Revision 1.37 2001/01/22 13:41:34 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.36 2000/08/07 11:10:39 rassmann
- * Editorial changes.
- *
- * Revision 1.35 2000/05/04 09:38:41 rassmann
- * Editorial changes.
- * Corrected multicast address hashing.
- *
- * Revision 1.34 1999/11/22 13:23:44 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.33 1999/05/28 10:56:06 rassmann
- * Editorial changes.
- *
- * Revision 1.32 1999/03/31 10:59:20 rassmann
- * Returning Success instead of DupAddr if address shall be overridden
- * with same value.
- *
- * Revision 1.31 1999/01/14 16:18:17 rassmann
- * Corrected multicast initialization.
- *
- * Revision 1.30 1999/01/04 10:30:35 rassmann
- * SkAddrOverride only possible after SK_INIT_IO phase.
- *
- * Revision 1.29 1998/12/29 13:13:10 rassmann
- * An address override is now preserved in the SK_INIT_IO phase.
- * All functions return an int now.
- * Extended parameter checking.
- *
- * Revision 1.28 1998/12/01 11:45:53 rassmann
- * Code cleanup.
- *
- * Revision 1.27 1998/12/01 09:22:49 rassmann
- * SkAddrMcAdd and SkAddrMcUpdate returned SK_MC_FILTERING_INEXACT
- * too often.
- *
- * Revision 1.26 1998/11/24 12:39:44 rassmann
- * Reserved multicast entry for BPDU address.
- * 13 multicast entries left for protocol.
- *
- * Revision 1.25 1998/11/17 16:54:23 rassmann
- * Using exact match for up to 14 multicast addresses.
- * Still receiving all multicasts if more addresses are added.
- *
- * Revision 1.24 1998/11/13 17:24:31 rassmann
- * Changed return value of SkAddrOverride to int.
- *
- * Revision 1.23 1998/11/13 16:56:18 rassmann
- * Added macro SK_ADDR_COMPARE.
- * Changed return type of SkAddrOverride to SK_BOOL.
- *
- * Revision 1.22 1998/11/04 17:06:17 rassmann
- * Corrected McUpdate and PromiscuousChange functions.
- *
- * Revision 1.21 1998/10/29 14:34:04 rassmann
- * Clearing SK_ADDR struct at startup.
- *
- * Revision 1.20 1998/10/28 18:16:34 rassmann
- * Avoiding I/Os before SK_INIT_RUN level.
- * Aligning InexactFilter.
- *
- * Revision 1.19 1998/10/28 11:29:28 rassmann
- * Programming physical address in SkAddrMcUpdate.
- * Corrected programming of exact match entries.
- *
- * Revision 1.18 1998/10/28 10:34:48 rassmann
- * Corrected reading of physical addresses.
- *
- * Revision 1.17 1998/10/28 10:26:13 rassmann
- * Getting ports' current MAC addresses from EPROM now.
- * Added debug output.
- *
- * Revision 1.16 1998/10/27 16:20:12 rassmann
- * Reading MAC address byte by byte.
- *
- * Revision 1.15 1998/10/22 11:39:09 rassmann
- * Corrected signed/unsigned mismatches.
- *
- * Revision 1.14 1998/10/19 17:12:35 rassmann
- * Syntax corrections.
- *
- * Revision 1.13 1998/10/19 17:02:19 rassmann
- * Now reading permanent MAC addresses from CRF.
- *
- * Revision 1.12 1998/10/15 15:15:48 rassmann
- * Changed Flags Parameters from SK_U8 to int.
- * Checked with lint.
- *
- * Revision 1.11 1998/09/24 19:15:12 rassmann
- * Code cleanup.
- *
- * Revision 1.10 1998/09/18 20:18:54 rassmann
- * Added HW access.
- * Implemented swapping.
- *
- * Revision 1.9 1998/09/16 11:32:00 rassmann
- * Including skdrv1st.h again. :(
- *
- * Revision 1.8 1998/09/16 11:09:34 rassmann
- * Syntax corrections.
- *
- * Revision 1.7 1998/09/14 17:06:34 rassmann
- * Minor changes.
- *
- * Revision 1.6 1998/09/07 08:45:41 rassmann
- * Syntax corrections.
- *
- * Revision 1.5 1998/09/04 19:40:19 rassmann
- * Interface enhancements.
- *
- * Revision 1.4 1998/09/04 12:14:12 rassmann
- * Interface cleanup.
- *
- * Revision 1.3 1998/09/02 16:56:40 rassmann
- * Updated interface.
- *
- * Revision 1.2 1998/08/27 14:26:09 rassmann
- * Updated interface.
- *
- * Revision 1.1 1998/08/21 08:30:22 rassmann
- * First public version.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This module is intended to manage multicast addresses, address override,
- * and promiscuous mode on GEnesis and Yukon adapters.
- *
- * Address Layout:
- * port address: physical MAC address
- * 1st exact match: logical MAC address (GEnesis only)
- * 2nd exact match: RLMT multicast (GEnesis only)
- * exact match 3-13: OS-specific multicasts (GEnesis only)
- *
- * Include File Hierarchy:
- *
- * "skdrv1st.h"
- * "skdrv2nd.h"
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#ifndef lint
-static const char SysKonnectFileId[] =
- "@(#) $Id: skaddr.c,v 1.48 2003/02/12 17:09:37 tschilli Exp $ (C) SysKonnect.";
-#endif /* !defined(lint) */
-
-#define __SKADDR_C
-
-#ifdef __cplusplus
-#error C++ is not yet supported.
-extern "C" {
-#endif /* cplusplus */
-
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-
-/* defines ********************************************************************/
-
-
-#define XMAC_POLY 0xEDB88320UL /* CRC32-Poly - XMAC: Little Endian */
-#define GMAC_POLY 0x04C11DB7L /* CRC16-Poly - GMAC: Little Endian */
-#define HASH_BITS 6 /* #bits in hash */
-#define SK_MC_BIT 0x01
-
-/* Error numbers and messages. */
-
-#define SKERR_ADDR_E001 (SK_ERRBASE_ADDR + 0)
-#define SKERR_ADDR_E001MSG "Bad Flags."
-#define SKERR_ADDR_E002 (SKERR_ADDR_E001 + 1)
-#define SKERR_ADDR_E002MSG "New Error."
-
-/* typedefs *******************************************************************/
-
-/* None. */
-
-/* global variables ***********************************************************/
-
-/* 64-bit hash values with all bits set. */
-
-SK_U16 OnesHash[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
-
-/* local variables ************************************************************/
-
-#ifdef DEBUG
-static int Next0[SK_MAX_MACS] = {0, 0};
-#endif /* DEBUG */
-
-/* functions ******************************************************************/
-
-/******************************************************************************
- *
- * SkAddrInit - initialize data, set state to init
- *
- * Description:
- *
- * SK_INIT_DATA
- * ============
- *
- * This routine clears the multicast tables and resets promiscuous mode.
- * Some entries are reserved for the "logical MAC address", the
- * SK-RLMT multicast address, and the BPDU multicast address.
- *
- *
- * SK_INIT_IO
- * ==========
- *
- * All permanent MAC addresses are read from EPROM.
- * If the current MAC addresses are not already set in software,
- * they are set to the values of the permanent addresses.
- * The current addresses are written to the corresponding MAC.
- *
- *
- * SK_INIT_RUN
- * ===========
- *
- * Nothing.
- *
- * Context:
- * init, pageable
- *
- * Returns:
- * SK_ADDR_SUCCESS
- */
-int SkAddrInit(
-SK_AC *pAC, /* the adapter context */
-SK_IOC IoC, /* I/O context */
-int Level) /* initialization level */
-{
- int j;
- SK_U32 i;
- SK_U8 *InAddr;
- SK_U16 *OutAddr;
- SK_ADDR_PORT *pAPort;
-
- switch (Level) {
- case SK_INIT_DATA:
- SK_MEMSET((char *) &pAC->Addr, 0, sizeof(SK_ADDR));
-
- for (i = 0; i < SK_MAX_MACS; i++) {
- pAPort = &pAC->Addr.Port[i];
- pAPort->PromMode = SK_PROM_MODE_NONE;
-
- pAPort->FirstExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
- pAPort->FirstExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
- pAPort->NextExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
- pAPort->NextExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
- }
-#ifdef xDEBUG
- for (i = 0; i < SK_MAX_MACS; i++) {
- if (pAC->Addr.Port[i].NextExactMatchRlmt <
- SK_ADDR_FIRST_MATCH_RLMT) {
- Next0[i] |= 4;
- }
- }
-#endif /* DEBUG */
- /* pAC->Addr.InitDone = SK_INIT_DATA; */
- break;
-
- case SK_INIT_IO:
- for (i = 0; i < SK_MAX_NETS; i++) {
- pAC->Addr.Net[i].ActivePort = pAC->Rlmt.Net[i].ActivePort;
- }
-#ifdef xDEBUG
- for (i = 0; i < SK_MAX_MACS; i++) {
- if (pAC->Addr.Port[i].NextExactMatchRlmt <
- SK_ADDR_FIRST_MATCH_RLMT) {
- Next0[i] |= 8;
- }
- }
-#endif /* DEBUG */
-
- /* Read permanent logical MAC address from Control Register File. */
- for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
- InAddr = (SK_U8 *) &pAC->Addr.Net[0].PermanentMacAddress.a[j];
- SK_IN8(IoC, B2_MAC_1 + j, InAddr);
- }
-
- if (!pAC->Addr.Net[0].CurrentMacAddressSet) {
- /* Set the current logical MAC address to the permanent one. */
- pAC->Addr.Net[0].CurrentMacAddress =
- pAC->Addr.Net[0].PermanentMacAddress;
- pAC->Addr.Net[0].CurrentMacAddressSet = SK_TRUE;
- }
-
- /* Set the current logical MAC address. */
- pAC->Addr.Port[pAC->Addr.Net[0].ActivePort].Exact[0] =
- pAC->Addr.Net[0].CurrentMacAddress;
-#if SK_MAX_NETS > 1
- /* Set logical MAC address for net 2 to (log | 3). */
- if (!pAC->Addr.Net[1].CurrentMacAddressSet) {
- pAC->Addr.Net[1].PermanentMacAddress =
- pAC->Addr.Net[0].PermanentMacAddress;
- pAC->Addr.Net[1].PermanentMacAddress.a[5] |= 3;
- /* Set the current logical MAC address to the permanent one. */
- pAC->Addr.Net[1].CurrentMacAddress =
- pAC->Addr.Net[1].PermanentMacAddress;
- pAC->Addr.Net[1].CurrentMacAddressSet = SK_TRUE;
- }
-#endif /* SK_MAX_NETS > 1 */
-
-#ifdef DEBUG
- for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
- ("Permanent MAC Address (Net%d): %02X %02X %02X %02X %02X %02X\n",
- i,
- pAC->Addr.Net[i].PermanentMacAddress.a[0],
- pAC->Addr.Net[i].PermanentMacAddress.a[1],
- pAC->Addr.Net[i].PermanentMacAddress.a[2],
- pAC->Addr.Net[i].PermanentMacAddress.a[3],
- pAC->Addr.Net[i].PermanentMacAddress.a[4],
- pAC->Addr.Net[i].PermanentMacAddress.a[5]))
-
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
- ("Logical MAC Address (Net%d): %02X %02X %02X %02X %02X %02X\n",
- i,
- pAC->Addr.Net[i].CurrentMacAddress.a[0],
- pAC->Addr.Net[i].CurrentMacAddress.a[1],
- pAC->Addr.Net[i].CurrentMacAddress.a[2],
- pAC->Addr.Net[i].CurrentMacAddress.a[3],
- pAC->Addr.Net[i].CurrentMacAddress.a[4],
- pAC->Addr.Net[i].CurrentMacAddress.a[5]))
- }
-#endif /* DEBUG */
-
- for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
- pAPort = &pAC->Addr.Port[i];
-
- /* Read permanent port addresses from Control Register File. */
- for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
- InAddr = (SK_U8 *) &pAPort->PermanentMacAddress.a[j];
- SK_IN8(IoC, B2_MAC_2 + 8 * i + j, InAddr);
- }
-
- if (!pAPort->CurrentMacAddressSet) {
- /*
- * Set the current and previous physical MAC address
- * of this port to its permanent MAC address.
- */
- pAPort->CurrentMacAddress = pAPort->PermanentMacAddress;
- pAPort->PreviousMacAddress = pAPort->PermanentMacAddress;
- pAPort->CurrentMacAddressSet = SK_TRUE;
- }
-
- /* Set port's current physical MAC address. */
- OutAddr = (SK_U16 *) &pAPort->CurrentMacAddress.a[0];
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- XM_OUTADDR(IoC, i, XM_SA, OutAddr);
- }
- else {
- GM_OUTADDR(IoC, i, GM_SRC_ADDR_1L, OutAddr);
- }
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
- ("SkAddrInit: Permanent Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAPort->PermanentMacAddress.a[0],
- pAPort->PermanentMacAddress.a[1],
- pAPort->PermanentMacAddress.a[2],
- pAPort->PermanentMacAddress.a[3],
- pAPort->PermanentMacAddress.a[4],
- pAPort->PermanentMacAddress.a[5]))
-
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
- ("SkAddrInit: Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAPort->CurrentMacAddress.a[0],
- pAPort->CurrentMacAddress.a[1],
- pAPort->CurrentMacAddress.a[2],
- pAPort->CurrentMacAddress.a[3],
- pAPort->CurrentMacAddress.a[4],
- pAPort->CurrentMacAddress.a[5]))
-#endif /* DEBUG */
- }
- /* pAC->Addr.InitDone = SK_INIT_IO; */
- break;
-
- case SK_INIT_RUN:
-#ifdef xDEBUG
- for (i = 0; i < SK_MAX_MACS; i++) {
- if (pAC->Addr.Port[i].NextExactMatchRlmt <
- SK_ADDR_FIRST_MATCH_RLMT) {
- Next0[i] |= 16;
- }
- }
-#endif /* DEBUG */
-
- /* pAC->Addr.InitDone = SK_INIT_RUN; */
- break;
-
- default: /* error */
- break;
- }
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrInit */
-
-
-/******************************************************************************
- *
- * SkAddrMcClear - clear the multicast table
- *
- * Description:
- * This routine clears the multicast table.
- *
- * If not suppressed by Flag SK_MC_SW_ONLY, the hardware is updated
- * immediately.
- *
- * It calls either SkAddrXmacMcClear or SkAddrGmacMcClear, according
- * to the adapter in use. The real work is done there.
- *
- * Context:
- * runtime, pageable
- * may be called starting with SK_INIT_DATA with flag SK_MC_SW_ONLY
- * may be called after SK_INIT_IO without limitation
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrMcClear(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Index of affected port */
-int Flags) /* permanent/non-perm, sw-only */
-{
- int ReturnCode;
-
- if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- ReturnCode = SkAddrXmacMcClear(pAC, IoC, PortNumber, Flags);
- }
- else {
- ReturnCode = SkAddrGmacMcClear(pAC, IoC, PortNumber, Flags);
- }
-
- return (ReturnCode);
-
-} /* SkAddrMcClear */
-
-
-/******************************************************************************
- *
- * SkAddrXmacMcClear - clear the multicast table
- *
- * Description:
- * This routine clears the multicast table
- * (either entry 2 or entries 3-16 and InexactFilter) of the given port.
- * If not suppressed by Flag SK_MC_SW_ONLY, the hardware is updated
- * immediately.
- *
- * Context:
- * runtime, pageable
- * may be called starting with SK_INIT_DATA with flag SK_MC_SW_ONLY
- * may be called after SK_INIT_IO without limitation
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrXmacMcClear(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Index of affected port */
-int Flags) /* permanent/non-perm, sw-only */
-{
- int i;
-
- if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
-
- /* Clear RLMT multicast addresses. */
- pAC->Addr.Port[PortNumber].NextExactMatchRlmt = SK_ADDR_FIRST_MATCH_RLMT;
- }
- else { /* not permanent => DRV */
-
- /* Clear InexactFilter */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0;
- }
-
- /* Clear DRV multicast addresses. */
-
- pAC->Addr.Port[PortNumber].NextExactMatchDrv = SK_ADDR_FIRST_MATCH_DRV;
- }
-
- if (!(Flags & SK_MC_SW_ONLY)) {
- (void) SkAddrXmacMcUpdate(pAC, IoC, PortNumber);
- }
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrXmacMcClear */
-
-
-/******************************************************************************
- *
- * SkAddrGmacMcClear - clear the multicast table
- *
- * Description:
- * This routine clears the multicast hashing table (InexactFilter)
- * (either the RLMT or the driver bits) of the given port.
- *
- * If not suppressed by Flag SK_MC_SW_ONLY, the hardware is updated
- * immediately.
- *
- * Context:
- * runtime, pageable
- * may be called starting with SK_INIT_DATA with flag SK_MC_SW_ONLY
- * may be called after SK_INIT_IO without limitation
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrGmacMcClear(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Index of affected port */
-int Flags) /* permanent/non-perm, sw-only */
-{
- int i;
-
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("GMAC InexactFilter (not cleared): %02X %02X %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[1],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[2],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[3],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[4],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[5],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[6],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]))
-#endif /* DEBUG */
-
- /* Clear InexactFilter */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0;
- }
-
- if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
-
- /* Copy DRV bits to InexactFilter. */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[i];
-
- /* Clear InexactRlmtFilter. */
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[i] = 0;
-
- }
- }
- else { /* not permanent => DRV */
-
- /* Copy RLMT bits to InexactFilter. */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[i];
-
- /* Clear InexactDrvFilter. */
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[i] = 0;
- }
- }
-
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("GMAC InexactFilter (cleared): %02X %02X %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[1],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[2],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[3],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[4],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[5],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[6],
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]))
-#endif /* DEBUG */
-
- if (!(Flags & SK_MC_SW_ONLY)) {
- (void) SkAddrGmacMcUpdate(pAC, IoC, PortNumber);
- }
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrGmacMcClear */
-
-#ifndef SK_ADDR_CHEAT
-
-/******************************************************************************
- *
- * SkXmacMcHash - hash multicast address
- *
- * Description:
- * This routine computes the hash value for a multicast address.
- * A CRC32 algorithm is used.
- *
- * Notes:
- * The code was adapted from the XaQti data sheet.
- *
- * Context:
- * runtime, pageable
- *
- * Returns:
- * Hash value of multicast address.
- */
-SK_U32 SkXmacMcHash(
-unsigned char *pMc) /* Multicast address */
-{
- SK_U32 Idx;
- SK_U32 Bit;
- SK_U32 Data;
- SK_U32 Crc;
-
- Crc = 0xFFFFFFFFUL;
- for (Idx = 0; Idx < SK_MAC_ADDR_LEN; Idx++) {
- Data = *pMc++;
- for (Bit = 0; Bit < 8; Bit++, Data >>= 1) {
- Crc = (Crc >> 1) ^ (((Crc ^ Data) & 1) ? XMAC_POLY : 0);
- }
- }
-
- return (Crc & ((1 << HASH_BITS) - 1));
-
-} /* SkXmacMcHash */
-
-
-/******************************************************************************
- *
- * SkGmacMcHash - hash multicast address
- *
- * Description:
- * This routine computes the hash value for a multicast address.
- * A CRC16 algorithm is used.
- *
- * Notes:
- *
- *
- * Context:
- * runtime, pageable
- *
- * Returns:
- * Hash value of multicast address.
- */
-SK_U32 SkGmacMcHash(
-unsigned char *pMc) /* Multicast address */
-{
- SK_U32 Data;
- SK_U32 TmpData;
- SK_U32 Crc;
- int Byte;
- int Bit;
-
- Crc = 0xFFFFFFFFUL;
- for (Byte = 0; Byte < 6; Byte++) {
- /* Get next byte. */
- Data = (SK_U32) pMc[Byte];
-
- /* Change bit order in byte. */
- TmpData = Data;
- for (Bit = 0; Bit < 8; Bit++) {
- if (TmpData & 1L) {
- Data |= 1L << (7 - Bit);
- }
- else {
- Data &= ~(1L << (7 - Bit));
- }
- TmpData >>= 1;
- }
-
- Crc ^= (Data << 24);
- for (Bit = 0; Bit < 8; Bit++) {
- if (Crc & 0x80000000) {
- Crc = (Crc << 1) ^ GMAC_POLY;
- }
- else {
- Crc <<= 1;
- }
- }
- }
-
- return (Crc & ((1 << HASH_BITS) - 1));
-
-} /* SkGmacMcHash */
-
-#endif /* not SK_ADDR_CHEAT */
-
-/******************************************************************************
- *
- * SkAddrMcAdd - add a multicast address to a port
- *
- * Description:
- * This routine enables reception for a given address on the given port.
- *
- * It calls either SkAddrXmacMcAdd or SkAddrGmacMcAdd, according to the
- * adapter in use. The real work is done there.
- *
- * Notes:
- * The return code is only valid for SK_PROM_MODE_NONE.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_DATA
- *
- * Returns:
- * SK_MC_FILTERING_EXACT
- * SK_MC_FILTERING_INEXACT
- * SK_MC_ILLEGAL_ADDRESS
- * SK_MC_ILLEGAL_PORT
- * SK_MC_RLMT_OVERFLOW
- */
-int SkAddrMcAdd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Port Number */
-SK_MAC_ADDR *pMc, /* multicast address to be added */
-int Flags) /* permanent/non-permanent */
-{
- int ReturnCode;
-
- if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- ReturnCode = SkAddrXmacMcAdd(pAC, IoC, PortNumber, pMc, Flags);
- }
- else {
- ReturnCode = SkAddrGmacMcAdd(pAC, IoC, PortNumber, pMc, Flags);
- }
-
- return (ReturnCode);
-
-} /* SkAddrMcAdd */
-
-
-/******************************************************************************
- *
- * SkAddrXmacMcAdd - add a multicast address to a port
- *
- * Description:
- * This routine enables reception for a given address on the given port.
- *
- * Notes:
- * The return code is only valid for SK_PROM_MODE_NONE.
- *
- * The multicast bit is only checked if there are no free exact match
- * entries.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_DATA
- *
- * Returns:
- * SK_MC_FILTERING_EXACT
- * SK_MC_FILTERING_INEXACT
- * SK_MC_ILLEGAL_ADDRESS
- * SK_MC_RLMT_OVERFLOW
- */
-int SkAddrXmacMcAdd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Port Number */
-SK_MAC_ADDR *pMc, /* multicast address to be added */
-int Flags) /* permanent/non-permanent */
-{
- int i;
- SK_U8 Inexact;
-#ifndef SK_ADDR_CHEAT
- SK_U32 HashBit;
-#endif /* !defined(SK_ADDR_CHEAT) */
-
- if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
-#ifdef xDEBUG
- if (pAC->Addr.Port[PortNumber].NextExactMatchRlmt <
- SK_ADDR_FIRST_MATCH_RLMT) {
- Next0[PortNumber] |= 1;
- return (SK_MC_RLMT_OVERFLOW);
- }
-#endif /* DEBUG */
-
- if (pAC->Addr.Port[PortNumber].NextExactMatchRlmt >
- SK_ADDR_LAST_MATCH_RLMT) {
- return (SK_MC_RLMT_OVERFLOW);
- }
-
- /* Set a RLMT multicast address. */
-
- pAC->Addr.Port[PortNumber].Exact[
- pAC->Addr.Port[PortNumber].NextExactMatchRlmt++] = *pMc;
-
- return (SK_MC_FILTERING_EXACT);
- }
-
-#ifdef xDEBUG
- if (pAC->Addr.Port[PortNumber].NextExactMatchDrv <
- SK_ADDR_FIRST_MATCH_DRV) {
- Next0[PortNumber] |= 2;
- return (SK_MC_RLMT_OVERFLOW);
- }
-#endif /* DEBUG */
-
- if (pAC->Addr.Port[PortNumber].NextExactMatchDrv <= SK_ADDR_LAST_MATCH_DRV) {
-
- /* Set exact match entry. */
- pAC->Addr.Port[PortNumber].Exact[
- pAC->Addr.Port[PortNumber].NextExactMatchDrv++] = *pMc;
-
- /* Clear InexactFilter */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0;
- }
- }
- else {
- if (!(pMc->a[0] & SK_MC_BIT)) {
- /* Hashing only possible with multicast addresses. */
- return (SK_MC_ILLEGAL_ADDRESS);
- }
-#ifndef SK_ADDR_CHEAT
- /* Compute hash value of address. */
- HashBit = 63 - SkXmacMcHash(&pMc->a[0]);
-
- /* Add bit to InexactFilter. */
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[HashBit / 8] |=
- 1 << (HashBit % 8);
-#else /* SK_ADDR_CHEAT */
- /* Set all bits in InexactFilter. */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0xFF;
- }
-#endif /* SK_ADDR_CHEAT */
- }
-
- for (Inexact = 0, i = 0; i < 8; i++) {
- Inexact |= pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i];
- }
-
- if (Inexact == 0 && pAC->Addr.Port[PortNumber].PromMode == 0) {
- return (SK_MC_FILTERING_EXACT);
- }
- else {
- return (SK_MC_FILTERING_INEXACT);
- }
-
-} /* SkAddrXmacMcAdd */
-
-
-/******************************************************************************
- *
- * SkAddrGmacMcAdd - add a multicast address to a port
- *
- * Description:
- * This routine enables reception for a given address on the given port.
- *
- * Notes:
- * The return code is only valid for SK_PROM_MODE_NONE.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_DATA
- *
- * Returns:
- * SK_MC_FILTERING_INEXACT
- * SK_MC_ILLEGAL_ADDRESS
- */
-int SkAddrGmacMcAdd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Port Number */
-SK_MAC_ADDR *pMc, /* multicast address to be added */
-int Flags) /* permanent/non-permanent */
-{
- int i;
-#ifndef SK_ADDR_CHEAT
- SK_U32 HashBit;
-#endif /* !defined(SK_ADDR_CHEAT) */
-
- if (!(pMc->a[0] & SK_MC_BIT)) {
- /* Hashing only possible with multicast addresses. */
- return (SK_MC_ILLEGAL_ADDRESS);
- }
-
-#ifndef SK_ADDR_CHEAT
-
- /* Compute hash value of address. */
- HashBit = SkGmacMcHash(&pMc->a[0]);
-
- if (Flags & SK_ADDR_PERMANENT) { /* permanent => RLMT */
-
- /* Add bit to InexactRlmtFilter. */
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[HashBit / 8] |=
- 1 << (HashBit % 8);
-
- /* Copy bit to InexactFilter. */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[i];
- }
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("GMAC InexactRlmtFilter: %02X %02X %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[0],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[1],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[2],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[3],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[4],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[5],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[6],
- pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[7]))
-#endif /* DEBUG */
- }
- else { /* not permanent => DRV */
-
- /* Add bit to InexactDrvFilter. */
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[HashBit / 8] |=
- 1 << (HashBit % 8);
-
- /* Copy bit to InexactFilter. */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] |=
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[i];
- }
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("GMAC InexactDrvFilter: %02X %02X %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[0],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[1],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[2],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[3],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[4],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[5],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[6],
- pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[7]))
-#endif /* DEBUG */
- }
-
-#else /* SK_ADDR_CHEAT */
-
- /* Set all bits in InexactFilter. */
- for (i = 0; i < 8; i++) {
- pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i] = 0xFF;
- }
-#endif /* SK_ADDR_CHEAT */
-
- return (SK_MC_FILTERING_INEXACT);
-
-} /* SkAddrGmacMcAdd */
-
-
-/******************************************************************************
- *
- * SkAddrMcUpdate - update the HW MC address table and set the MAC address
- *
- * Description:
- * This routine enables reception of the addresses contained in a local
- * table for a given port.
- * It also programs the port's current physical MAC address.
- *
- * It calls either SkAddrXmacMcUpdate or SkAddrGmacMcUpdate, according
- * to the adapter in use. The real work is done there.
- *
- * Notes:
- * The return code is only valid for SK_PROM_MODE_NONE.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_MC_FILTERING_EXACT
- * SK_MC_FILTERING_INEXACT
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrMcUpdate(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber) /* Port Number */
-{
- int ReturnCode;
-
- if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- ReturnCode = SkAddrXmacMcUpdate(pAC, IoC, PortNumber);
- }
- else {
- ReturnCode = SkAddrGmacMcUpdate(pAC, IoC, PortNumber);
- }
-
- return (ReturnCode);
-
-} /* SkAddrMcUpdate */
-
-
-/******************************************************************************
- *
- * SkAddrXmacMcUpdate - update the HW MC address table and set the MAC address
- *
- * Description:
- * This routine enables reception of the addresses contained in a local
- * table for a given port.
- * It also programs the port's current physical MAC address.
- *
- * Notes:
- * The return code is only valid for SK_PROM_MODE_NONE.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_MC_FILTERING_EXACT
- * SK_MC_FILTERING_INEXACT
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrXmacMcUpdate(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber) /* Port Number */
-{
- SK_U32 i;
- SK_U8 Inexact;
- SK_U16 *OutAddr;
- SK_ADDR_PORT *pAPort;
-
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrXmacMcUpdate on Port %u.\n", PortNumber))
-
- pAPort = &pAC->Addr.Port[PortNumber];
-
-#ifdef DEBUG
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
-#endif /* DEBUG */
-
- /* Start with 0 to also program the logical MAC address. */
- for (i = 0; i < pAPort->NextExactMatchRlmt; i++) {
- /* Set exact match address i on XMAC */
- OutAddr = (SK_U16 *) &pAPort->Exact[i].a[0];
- XM_OUTADDR(IoC, PortNumber, XM_EXM(i), OutAddr);
- }
-
- /* Clear other permanent exact match addresses on XMAC */
- if (pAPort->NextExactMatchRlmt <= SK_ADDR_LAST_MATCH_RLMT) {
-
- SkXmClrExactAddr(pAC, IoC, PortNumber, pAPort->NextExactMatchRlmt,
- SK_ADDR_LAST_MATCH_RLMT);
- }
-
- for (i = pAPort->FirstExactMatchDrv; i < pAPort->NextExactMatchDrv; i++) {
- OutAddr = (SK_U16 *) &pAPort->Exact[i].a[0];
- XM_OUTADDR(IoC, PortNumber, XM_EXM(i), OutAddr);
- }
-
- /* Clear other non-permanent exact match addresses on XMAC */
- if (pAPort->NextExactMatchDrv <= SK_ADDR_LAST_MATCH_DRV) {
-
- SkXmClrExactAddr(pAC, IoC, PortNumber, pAPort->NextExactMatchDrv,
- SK_ADDR_LAST_MATCH_DRV);
- }
-
- for (Inexact = 0, i = 0; i < 8; i++) {
- Inexact |= pAPort->InexactFilter.Bytes[i];
- }
-
- if (pAPort->PromMode & SK_PROM_MODE_ALL_MC) {
-
- /* Set all bits in 64-bit hash register. */
- XM_OUTHASH(IoC, PortNumber, XM_HSM, &OnesHash);
-
- /* Enable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
- else if (Inexact != 0) {
-
- /* Set 64-bit hash register to InexactFilter. */
- XM_OUTHASH(IoC, PortNumber, XM_HSM, &pAPort->InexactFilter.Bytes[0]);
-
- /* Enable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
- else {
- /* Disable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_FALSE);
- }
-
- if (pAPort->PromMode != SK_PROM_MODE_NONE) {
- (void) SkAddrXmacPromiscuousChange(pAC, IoC, PortNumber, pAPort->PromMode);
- }
-
- /* Set port's current physical MAC address. */
- OutAddr = (SK_U16 *) &pAPort->CurrentMacAddress.a[0];
-
- XM_OUTADDR(IoC, PortNumber, XM_SA, OutAddr);
-
-#ifdef xDEBUG
- for (i = 0; i < pAPort->NextExactMatchRlmt; i++) {
- SK_U8 InAddr8[6];
- SK_U16 *InAddr;
-
- /* Get exact match address i from port PortNumber. */
- InAddr = (SK_U16 *) &InAddr8[0];
-
- XM_INADDR(IoC, PortNumber, XM_EXM(i), InAddr);
-
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrXmacMcUpdate: MC address %d on Port %u: ",
- "%02x %02x %02x %02x %02x %02x -- %02x %02x %02x %02x %02x %02x\n",
- i,
- PortNumber,
- InAddr8[0],
- InAddr8[1],
- InAddr8[2],
- InAddr8[3],
- InAddr8[4],
- InAddr8[5],
- pAPort->Exact[i].a[0],
- pAPort->Exact[i].a[1],
- pAPort->Exact[i].a[2],
- pAPort->Exact[i].a[3],
- pAPort->Exact[i].a[4],
- pAPort->Exact[i].a[5]))
- }
-#endif /* DEBUG */
-
- /* Determine return value. */
- if (Inexact == 0 && pAPort->PromMode == 0) {
- return (SK_MC_FILTERING_EXACT);
- }
- else {
- return (SK_MC_FILTERING_INEXACT);
- }
-
-} /* SkAddrXmacMcUpdate */
-
-
-/******************************************************************************
- *
- * SkAddrGmacMcUpdate - update the HW MC address table and set the MAC address
- *
- * Description:
- * This routine enables reception of the addresses contained in a local
- * table for a given port.
- * It also programs the port's current physical MAC address.
- *
- * Notes:
- * The return code is only valid for SK_PROM_MODE_NONE.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_MC_FILTERING_EXACT
- * SK_MC_FILTERING_INEXACT
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrGmacMcUpdate(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber) /* Port Number */
-{
- SK_U32 i;
- SK_U8 Inexact;
- SK_U16 *OutAddr;
- SK_ADDR_PORT *pAPort;
-
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrGmacMcUpdate on Port %u.\n", PortNumber))
-
- pAPort = &pAC->Addr.Port[PortNumber];
-
-#ifdef DEBUG
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
-#endif /* DEBUG */
-
- for (Inexact = 0, i = 0; i < 8; i++) {
- Inexact |= pAPort->InexactFilter.Bytes[i];
- }
-
- /* Set 64-bit hash register to InexactFilter. */
- GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1,
- &pAPort->InexactFilter.Bytes[0]);
-
- if (pAPort->PromMode & SK_PROM_MODE_ALL_MC) {
-
- /* Set all bits in 64-bit hash register. */
- GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1, &OnesHash);
-
- /* Enable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
- else {
- /* Enable Hashing. */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
-
- if (pAPort->PromMode != SK_PROM_MODE_NONE) {
- (void) SkAddrGmacPromiscuousChange(pAC, IoC, PortNumber, pAPort->PromMode);
- }
-
- /* Set port's current physical MAC address. */
- OutAddr = (SK_U16 *) &pAPort->CurrentMacAddress.a[0];
- GM_OUTADDR(IoC, PortNumber, GM_SRC_ADDR_1L, OutAddr);
-
- /* Set port's current logical MAC address. */
- OutAddr = (SK_U16 *) &pAPort->Exact[0].a[0];
- GM_OUTADDR(IoC, PortNumber, GM_SRC_ADDR_2L, OutAddr);
-
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrGmacMcUpdate: Permanent Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAPort->Exact[0].a[0],
- pAPort->Exact[0].a[1],
- pAPort->Exact[0].a[2],
- pAPort->Exact[0].a[3],
- pAPort->Exact[0].a[4],
- pAPort->Exact[0].a[5]))
-
- SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrGmacMcUpdate: Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAPort->CurrentMacAddress.a[0],
- pAPort->CurrentMacAddress.a[1],
- pAPort->CurrentMacAddress.a[2],
- pAPort->CurrentMacAddress.a[3],
- pAPort->CurrentMacAddress.a[4],
- pAPort->CurrentMacAddress.a[5]))
-#endif /* DEBUG */
-
- /* Determine return value. */
- if (Inexact == 0 && pAPort->PromMode == 0) {
- return (SK_MC_FILTERING_EXACT);
- }
- else {
- return (SK_MC_FILTERING_INEXACT);
- }
-
-} /* SkAddrGmacMcUpdate */
-
-
-/******************************************************************************
- *
- * SkAddrOverride - override a port's MAC address
- *
- * Description:
- * This routine overrides the MAC address of one port.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_ADDR_SUCCESS if successful.
- * SK_ADDR_DUPLICATE_ADDRESS if duplicate MAC address.
- * SK_ADDR_MULTICAST_ADDRESS if multicast or broadcast address.
- * SK_ADDR_TOO_EARLY if SK_INIT_IO was not executed before.
- */
-int SkAddrOverride(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* Port Number */
-SK_MAC_ADDR *pNewAddr, /* new MAC address */
-int Flags) /* logical/physical MAC address */
-{
- SK_EVPARA Para;
- SK_U32 NetNumber;
- SK_U32 i;
- SK_U16 *OutAddr;
-
- NetNumber = pAC->Rlmt.Port[PortNumber].Net->NetNumber;
-
- if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (pNewAddr != NULL && (pNewAddr->a[0] & SK_MC_BIT) != 0) {
- return (SK_ADDR_MULTICAST_ADDRESS);
- }
-
- if (!pAC->Addr.Net[NetNumber].CurrentMacAddressSet) {
- return (SK_ADDR_TOO_EARLY);
- }
-
- if (Flags & SK_ADDR_SET_LOGICAL) { /* Activate logical MAC address. */
- /* Parameter *pNewAddr is ignored. */
- for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
- if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
- return (SK_ADDR_TOO_EARLY);
- }
- }
-
- /* Set PortNumber to number of net's active port. */
- PortNumber = pAC->Rlmt.Net[NetNumber].
- Port[pAC->Addr.Net[NetNumber].ActivePort]->PortNumber;
-
- pAC->Addr.Port[PortNumber].Exact[0] =
- pAC->Addr.Net[NetNumber].CurrentMacAddress;
-
- /* Write address to first exact match entry of active port. */
- (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
- }
- else if (Flags & SK_ADDR_CLEAR_LOGICAL) {
- /* Deactivate logical MAC address. */
- /* Parameter *pNewAddr is ignored. */
- for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
- if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
- return (SK_ADDR_TOO_EARLY);
- }
- }
-
- /* Set PortNumber to number of net's active port. */
- PortNumber = pAC->Rlmt.Net[NetNumber].
- Port[pAC->Addr.Net[NetNumber].ActivePort]->PortNumber;
-
- for (i = 0; i < SK_MAC_ADDR_LEN; i++ ) {
- pAC->Addr.Port[PortNumber].Exact[0].a[i] = 0;
- }
-
- /* Write address to first exact match entry of active port. */
- (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
- }
- else if (Flags & SK_ADDR_PHYSICAL_ADDRESS) { /* Physical MAC address. */
- if (SK_ADDR_EQUAL(pNewAddr->a,
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a)) {
- return (SK_ADDR_DUPLICATE_ADDRESS);
- }
-
- for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
- if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
- return (SK_ADDR_TOO_EARLY);
- }
-
- if (SK_ADDR_EQUAL(pNewAddr->a,
- pAC->Addr.Port[i].CurrentMacAddress.a)) {
- if (i == PortNumber) {
- return (SK_ADDR_SUCCESS);
- }
- else {
- return (SK_ADDR_DUPLICATE_ADDRESS);
- }
- }
- }
-
- pAC->Addr.Port[PortNumber].PreviousMacAddress =
- pAC->Addr.Port[PortNumber].CurrentMacAddress;
- pAC->Addr.Port[PortNumber].CurrentMacAddress = *pNewAddr;
-
- /* Change port's physical MAC address. */
- OutAddr = (SK_U16 *) pNewAddr;
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- XM_OUTADDR(IoC, PortNumber, XM_SA, OutAddr);
- }
- else {
- GM_OUTADDR(IoC, PortNumber, GM_SRC_ADDR_1L, OutAddr);
- }
-
- /* Report address change to RLMT. */
- Para.Para32[0] = PortNumber;
- Para.Para32[0] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_PORT_ADDR, Para);
- }
- else { /* Logical MAC address. */
- if (SK_ADDR_EQUAL(pNewAddr->a,
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a)) {
- return (SK_ADDR_SUCCESS);
- }
-
- for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
- if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
- return (SK_ADDR_TOO_EARLY);
- }
-
- if (SK_ADDR_EQUAL(pNewAddr->a,
- pAC->Addr.Port[i].CurrentMacAddress.a)) {
- return (SK_ADDR_DUPLICATE_ADDRESS);
- }
- }
-
- /*
- * In case that the physical and the logical MAC addresses are equal
- * we must also change the physical MAC address here.
- * In this case we have an adapter which initially was programmed with
- * two identical MAC addresses.
- */
- if (SK_ADDR_EQUAL(pAC->Addr.Port[PortNumber].CurrentMacAddress.a,
- pAC->Addr.Port[PortNumber].Exact[0].a)) {
-
- pAC->Addr.Port[PortNumber].PreviousMacAddress =
- pAC->Addr.Port[PortNumber].CurrentMacAddress;
- pAC->Addr.Port[PortNumber].CurrentMacAddress = *pNewAddr;
-
- /* Report address change to RLMT. */
- Para.Para32[0] = PortNumber;
- Para.Para32[0] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_PORT_ADDR, Para);
- }
-
- /* Set PortNumber to number of net's active port. */
- PortNumber = pAC->Rlmt.Net[NetNumber].
- Port[pAC->Addr.Net[NetNumber].ActivePort]->PortNumber;
-
- pAC->Addr.Net[NetNumber].CurrentMacAddress = *pNewAddr;
- pAC->Addr.Port[PortNumber].Exact[0] = *pNewAddr;
-#ifdef DEBUG
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrOverride: Permanent MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.Net[NetNumber].PermanentMacAddress.a[0],
- pAC->Addr.Net[NetNumber].PermanentMacAddress.a[1],
- pAC->Addr.Net[NetNumber].PermanentMacAddress.a[2],
- pAC->Addr.Net[NetNumber].PermanentMacAddress.a[3],
- pAC->Addr.Net[NetNumber].PermanentMacAddress.a[4],
- pAC->Addr.Net[NetNumber].PermanentMacAddress.a[5]))
-
- SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
- ("SkAddrOverride: New logical MAC Address: %02X %02X %02X %02X %02X %02X\n",
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a[0],
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a[1],
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a[2],
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a[3],
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a[4],
- pAC->Addr.Net[NetNumber].CurrentMacAddress.a[5]))
-#endif /* DEBUG */
-
- /* Write address to first exact match entry of active port. */
- (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
- }
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrOverride */
-
-
-/******************************************************************************
- *
- * SkAddrPromiscuousChange - set promiscuous mode for given port
- *
- * Description:
- * This routine manages promiscuous mode:
- * - none
- * - all LLC frames
- * - all MC frames
- *
- * It calls either SkAddrXmacPromiscuousChange or
- * SkAddrGmacPromiscuousChange, according to the adapter in use.
- * The real work is done there.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrPromiscuousChange(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* port whose promiscuous mode changes */
-int NewPromMode) /* new promiscuous mode */
-{
- int ReturnCode;
-
- if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- ReturnCode = SkAddrXmacPromiscuousChange(pAC, IoC, PortNumber, NewPromMode);
- }
- else {
- ReturnCode = SkAddrGmacPromiscuousChange(pAC, IoC, PortNumber, NewPromMode);
- }
-
- return (ReturnCode);
-
-} /* SkAddrPromiscuousChange */
-
-
-/******************************************************************************
- *
- * SkAddrXmacPromiscuousChange - set promiscuous mode for given port
- *
- * Description:
- * This routine manages promiscuous mode:
- * - none
- * - all LLC frames
- * - all MC frames
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrXmacPromiscuousChange(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* port whose promiscuous mode changes */
-int NewPromMode) /* new promiscuous mode */
-{
- int i;
- SK_BOOL InexactModeBit;
- SK_U8 Inexact;
- SK_U8 HwInexact;
- SK_FILTER64 HwInexactFilter;
- SK_U16 LoMode; /* Lower 16 bits of XMAC Mode Register. */
- int CurPromMode = SK_PROM_MODE_NONE;
-
- /* Read CurPromMode from Hardware. */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
-
- if ((LoMode & XM_MD_ENA_PROM) != 0) {
- /* Promiscuous mode! */
- CurPromMode |= SK_PROM_MODE_LLC;
- }
-
- for (Inexact = 0xFF, i = 0; i < 8; i++) {
- Inexact &= pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i];
- }
- if (Inexact == 0xFF) {
- CurPromMode |= (pAC->Addr.Port[PortNumber].PromMode & SK_PROM_MODE_ALL_MC);
- }
- else {
- /* Get InexactModeBit (bit XM_MD_ENA_HASH in mode register) */
- XM_IN16(IoC, PortNumber, XM_MODE, &LoMode);
-
- InexactModeBit = (LoMode & XM_MD_ENA_HASH) != 0;
-
- /* Read 64-bit hash register from XMAC */
- XM_INHASH(IoC, PortNumber, XM_HSM, &HwInexactFilter.Bytes[0]);
-
- for (HwInexact = 0xFF, i = 0; i < 8; i++) {
- HwInexact &= HwInexactFilter.Bytes[i];
- }
-
- if (InexactModeBit && (HwInexact == 0xFF)) {
- CurPromMode |= SK_PROM_MODE_ALL_MC;
- }
- }
-
- pAC->Addr.Port[PortNumber].PromMode = NewPromMode;
-
- if (NewPromMode == CurPromMode) {
- return (SK_ADDR_SUCCESS);
- }
-
- if ((NewPromMode & SK_PROM_MODE_ALL_MC) &&
- !(CurPromMode & SK_PROM_MODE_ALL_MC)) { /* All MC. */
-
- /* Set all bits in 64-bit hash register. */
- XM_OUTHASH(IoC, PortNumber, XM_HSM, &OnesHash);
-
- /* Enable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
- else if ((CurPromMode & SK_PROM_MODE_ALL_MC) &&
- !(NewPromMode & SK_PROM_MODE_ALL_MC)) { /* Norm MC. */
- for (Inexact = 0, i = 0; i < 8; i++) {
- Inexact |= pAC->Addr.Port[PortNumber].InexactFilter.Bytes[i];
- }
- if (Inexact == 0) {
- /* Disable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_FALSE);
- }
- else {
- /* Set 64-bit hash register to InexactFilter. */
- XM_OUTHASH(IoC, PortNumber, XM_HSM,
- &pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0]);
-
- /* Enable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
- }
-
- if ((NewPromMode & SK_PROM_MODE_LLC) &&
- !(CurPromMode & SK_PROM_MODE_LLC)) { /* Prom. LLC */
- /* Set the MAC in Promiscuous Mode */
- SkMacPromiscMode(pAC, IoC, PortNumber, SK_TRUE);
- }
- else if ((CurPromMode & SK_PROM_MODE_LLC) &&
- !(NewPromMode & SK_PROM_MODE_LLC)) { /* Norm. LLC. */
- /* Clear Promiscuous Mode */
- SkMacPromiscMode(pAC, IoC, PortNumber, SK_FALSE);
- }
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrXmacPromiscuousChange */
-
-
-/******************************************************************************
- *
- * SkAddrGmacPromiscuousChange - set promiscuous mode for given port
- *
- * Description:
- * This routine manages promiscuous mode:
- * - none
- * - all LLC frames
- * - all MC frames
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrGmacPromiscuousChange(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 PortNumber, /* port whose promiscuous mode changes */
-int NewPromMode) /* new promiscuous mode */
-{
- SK_U16 ReceiveControl; /* GMAC Receive Control Register */
- int CurPromMode = SK_PROM_MODE_NONE;
-
- /* Read CurPromMode from Hardware. */
- GM_IN16(IoC, PortNumber, GM_RX_CTRL, &ReceiveControl);
-
- if ((ReceiveControl & (GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA)) == 0) {
- /* Promiscuous mode! */
- CurPromMode |= SK_PROM_MODE_LLC;
- }
-
- if ((ReceiveControl & GM_RXCR_MCF_ENA) == 0) {
- /* All Multicast mode! */
- CurPromMode |= (pAC->Addr.Port[PortNumber].PromMode & SK_PROM_MODE_ALL_MC);
- }
-
- pAC->Addr.Port[PortNumber].PromMode = NewPromMode;
-
- if (NewPromMode == CurPromMode) {
- return (SK_ADDR_SUCCESS);
- }
-
- if ((NewPromMode & SK_PROM_MODE_ALL_MC) &&
- !(CurPromMode & SK_PROM_MODE_ALL_MC)) { /* All MC */
-
- /* Set all bits in 64-bit hash register. */
- GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1, &OnesHash);
-
- /* Enable Hashing */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
-
- if ((CurPromMode & SK_PROM_MODE_ALL_MC) &&
- !(NewPromMode & SK_PROM_MODE_ALL_MC)) { /* Norm. MC */
-
- /* Set 64-bit hash register to InexactFilter. */
- GM_OUTHASH(IoC, PortNumber, GM_MC_ADDR_H1,
- &pAC->Addr.Port[PortNumber].InexactFilter.Bytes[0]);
-
- /* Enable Hashing. */
- SkMacHashing(pAC, IoC, PortNumber, SK_TRUE);
- }
-
- if ((NewPromMode & SK_PROM_MODE_LLC) &&
- !(CurPromMode & SK_PROM_MODE_LLC)) { /* Prom. LLC */
-
- /* Set the MAC to Promiscuous Mode. */
- SkMacPromiscMode(pAC, IoC, PortNumber, SK_TRUE);
- }
- else if ((CurPromMode & SK_PROM_MODE_LLC) &&
- !(NewPromMode & SK_PROM_MODE_LLC)) { /* Norm. LLC */
-
- /* Clear Promiscuous Mode. */
- SkMacPromiscMode(pAC, IoC, PortNumber, SK_FALSE);
- }
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrGmacPromiscuousChange */
-
-
-/******************************************************************************
- *
- * SkAddrSwap - swap address info
- *
- * Description:
- * This routine swaps address info of two ports.
- *
- * Context:
- * runtime, pageable
- * may be called after SK_INIT_IO
- *
- * Returns:
- * SK_ADDR_SUCCESS
- * SK_ADDR_ILLEGAL_PORT
- */
-int SkAddrSwap(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-SK_U32 FromPortNumber, /* Port1 Index */
-SK_U32 ToPortNumber) /* Port2 Index */
-{
- int i;
- SK_U8 Byte;
- SK_MAC_ADDR MacAddr;
- SK_U32 DWord;
-
- if (FromPortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (ToPortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- if (pAC->Rlmt.Port[FromPortNumber].Net != pAC->Rlmt.Port[ToPortNumber].Net) {
- return (SK_ADDR_ILLEGAL_PORT);
- }
-
- /*
- * Swap:
- * - Exact Match Entries (GEnesis and Yukon)
- * Yukon uses first entry for the logical MAC
- * address (stored in the second GMAC register).
- * - FirstExactMatchRlmt (GEnesis only)
- * - NextExactMatchRlmt (GEnesis only)
- * - FirstExactMatchDrv (GEnesis only)
- * - NextExactMatchDrv (GEnesis only)
- * - 64-bit filter (InexactFilter)
- * - Promiscuous Mode
- * of ports.
- */
-
- for (i = 0; i < SK_ADDR_EXACT_MATCHES; i++) {
- MacAddr = pAC->Addr.Port[FromPortNumber].Exact[i];
- pAC->Addr.Port[FromPortNumber].Exact[i] =
- pAC->Addr.Port[ToPortNumber].Exact[i];
- pAC->Addr.Port[ToPortNumber].Exact[i] = MacAddr;
- }
-
- for (i = 0; i < 8; i++) {
- Byte = pAC->Addr.Port[FromPortNumber].InexactFilter.Bytes[i];
- pAC->Addr.Port[FromPortNumber].InexactFilter.Bytes[i] =
- pAC->Addr.Port[ToPortNumber].InexactFilter.Bytes[i];
- pAC->Addr.Port[ToPortNumber].InexactFilter.Bytes[i] = Byte;
- }
-
- i = pAC->Addr.Port[FromPortNumber].PromMode;
- pAC->Addr.Port[FromPortNumber].PromMode = pAC->Addr.Port[ToPortNumber].PromMode;
- pAC->Addr.Port[ToPortNumber].PromMode = i;
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- DWord = pAC->Addr.Port[FromPortNumber].FirstExactMatchRlmt;
- pAC->Addr.Port[FromPortNumber].FirstExactMatchRlmt =
- pAC->Addr.Port[ToPortNumber].FirstExactMatchRlmt;
- pAC->Addr.Port[ToPortNumber].FirstExactMatchRlmt = DWord;
-
- DWord = pAC->Addr.Port[FromPortNumber].NextExactMatchRlmt;
- pAC->Addr.Port[FromPortNumber].NextExactMatchRlmt =
- pAC->Addr.Port[ToPortNumber].NextExactMatchRlmt;
- pAC->Addr.Port[ToPortNumber].NextExactMatchRlmt = DWord;
-
- DWord = pAC->Addr.Port[FromPortNumber].FirstExactMatchDrv;
- pAC->Addr.Port[FromPortNumber].FirstExactMatchDrv =
- pAC->Addr.Port[ToPortNumber].FirstExactMatchDrv;
- pAC->Addr.Port[ToPortNumber].FirstExactMatchDrv = DWord;
-
- DWord = pAC->Addr.Port[FromPortNumber].NextExactMatchDrv;
- pAC->Addr.Port[FromPortNumber].NextExactMatchDrv =
- pAC->Addr.Port[ToPortNumber].NextExactMatchDrv;
- pAC->Addr.Port[ToPortNumber].NextExactMatchDrv = DWord;
- }
-
- /* CAUTION: Solution works if only ports of one adapter are in use. */
- for (i = 0; (SK_U32) i < pAC->Rlmt.Net[pAC->Rlmt.Port[ToPortNumber].
- Net->NetNumber].NumPorts; i++) {
- if (pAC->Rlmt.Net[pAC->Rlmt.Port[ToPortNumber].Net->NetNumber].
- Port[i]->PortNumber == ToPortNumber) {
- pAC->Addr.Net[pAC->Rlmt.Port[ToPortNumber].Net->NetNumber].
- ActivePort = i;
- /* 20001207 RA: Was "ToPortNumber;". */
- }
- }
-
- (void) SkAddrMcUpdate(pAC, IoC, FromPortNumber);
- (void) SkAddrMcUpdate(pAC, IoC, ToPortNumber);
-
- return (SK_ADDR_SUCCESS);
-
-} /* SkAddrSwap */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skcsum.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.10 $
- * Date: $Date: 2002/04/11 10:02:04 $
- * Purpose: Store/verify Internet checksum in send/receive packets.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skcsum.c,v $
- * Revision 1.10 2002/04/11 10:02:04 rwahl
- * Fix in SkCsGetSendInfo():
- * - function did not return ProtocolFlags in every case.
- * - pseudo header csum calculated wrong for big endian.
- *
- * Revision 1.9 2001/06/13 07:42:08 gklug
- * fix: NetNumber was wrong in CLEAR_STAT event
- * add: check for good NetNumber in Clear STAT
- *
- * Revision 1.8 2001/02/06 11:15:36 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.7 2000/06/29 13:17:05 rassmann
- * Corrected reception of a packet with UDP checksum == 0 (which means there
- * is no UDP checksum).
- *
- * Revision 1.6 2000/02/21 12:35:10 cgoos
- * Fixed license header comment.
- *
- * Revision 1.5 2000/02/21 11:05:19 cgoos
- * Merged changes back to common source.
- * Fixed rx path for BIG ENDIAN architecture.
- *
- * Revision 1.1 1999/07/26 15:28:12 mkarl
- * added return SKCS_STATUS_IP_CSUM_ERROR_UDP and
- * SKCS_STATUS_IP_CSUM_ERROR_TCP to pass the NidsTester
- * changed from common source to windows specific source
- * therefore restarting with v1.0
- *
- * Revision 1.3 1999/05/10 08:39:33 mkarl
- * prevent overflows in SKCS_HTON16
- * fixed a bug in pseudo header checksum calculation
- * added some comments
- *
- * Revision 1.2 1998/10/22 11:53:28 swolf
- * Now using SK_DBG_MSG.
- *
- * Revision 1.1 1998/09/01 15:35:41 swolf
- * initial revision
- *
- * 13-May-1998 sw Created.
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#ifdef SK_USE_CSUM /* Check if CSUM is to be used. */
-
-#ifndef lint
-static const char SysKonnectFileId[] = "@(#)"
- "$Id: skcsum.c,v 1.10 2002/04/11 10:02:04 rwahl Exp $"
- " (C) SysKonnect.";
-#endif /* !lint */
-
-/******************************************************************************
- *
- * Description:
- *
- * This is the "GEnesis" common module "CSUM".
- *
- * This module contains the code necessary to calculate, store, and verify the
- * Internet Checksum of IP, TCP, and UDP frames.
- *
- * "GEnesis" is an abbreviation of "Gigabit Ethernet Network System in Silicon"
- * and is the code name of this SysKonnect project.
- *
- * Compilation Options:
- *
- * SK_USE_CSUM - Define if CSUM is to be used. Otherwise, CSUM will be an
- * empty module.
- *
- * SKCS_OVERWRITE_PROTO - Define to overwrite the default protocol id
- * definitions. In this case, all SKCS_PROTO_xxx definitions must be made
- * external.
- *
- * SKCS_OVERWRITE_STATUS - Define to overwrite the default return status
- * definitions. In this case, all SKCS_STATUS_xxx definitions must be made
- * external.
- *
- * Include File Hierarchy:
- *
- * "h/skdrv1st.h"
- * "h/skcsum.h"
- * "h/sktypes.h"
- * "h/skqueue.h"
- * "h/skdrv2nd.h"
- *
- ******************************************************************************/
-
-#include "h/skdrv1st.h"
-#include "h/skcsum.h"
-#include "h/skdrv2nd.h"
-
-/* defines ********************************************************************/
-
-/* The size of an Ethernet MAC header. */
-#define SKCS_ETHERNET_MAC_HEADER_SIZE (6+6+2)
-
-/* The size of the used topology's MAC header. */
-#define SKCS_MAC_HEADER_SIZE SKCS_ETHERNET_MAC_HEADER_SIZE
-
-/* The size of the IP header without any option fields. */
-#define SKCS_IP_HEADER_SIZE 20
-
-/*
- * Field offsets within the IP header.
- */
-
-/* "Internet Header Version" and "Length". */
-#define SKCS_OFS_IP_HEADER_VERSION_AND_LENGTH 0
-
-/* "Total Length". */
-#define SKCS_OFS_IP_TOTAL_LENGTH 2
-
-/* "Flags" "Fragment Offset". */
-#define SKCS_OFS_IP_FLAGS_AND_FRAGMENT_OFFSET 6
-
-/* "Next Level Protocol" identifier. */
-#define SKCS_OFS_IP_NEXT_LEVEL_PROTOCOL 9
-
-/* Source IP address. */
-#define SKCS_OFS_IP_SOURCE_ADDRESS 12
-
-/* Destination IP address. */
-#define SKCS_OFS_IP_DESTINATION_ADDRESS 16
-
-
-/*
- * Field offsets within the UDP header.
- */
-
-/* UDP checksum. */
-#define SKCS_OFS_UDP_CHECKSUM 6
-
-/* IP "Next Level Protocol" identifiers (see RFC 790). */
-#define SKCS_PROTO_ID_TCP 6 /* Transport Control Protocol */
-#define SKCS_PROTO_ID_UDP 17 /* User Datagram Protocol */
-
-/* IP "Don't Fragment" bit. */
-#define SKCS_IP_DONT_FRAGMENT SKCS_HTON16(0x4000)
-
-/* Add a byte offset to a pointer. */
-#define SKCS_IDX(pPtr, Ofs) ((void *) ((char *) (pPtr) + (Ofs)))
-
-/*
- * Macros that convert host to network representation and vice versa, i.e.
- * little/big endian conversion on little endian machines only.
- */
-#ifdef SK_LITTLE_ENDIAN
-#define SKCS_HTON16(Val16) (((unsigned) (Val16) >> 8) | (((Val16) & 0xFF) << 8))
-#endif /* SK_LITTLE_ENDIAN */
-#ifdef SK_BIG_ENDIAN
-#define SKCS_HTON16(Val16) (Val16)
-#endif /* SK_BIG_ENDIAN */
-#define SKCS_NTOH16(Val16) SKCS_HTON16(Val16)
-
-/* typedefs *******************************************************************/
-
-/* function prototypes ********************************************************/
-
-/******************************************************************************
- *
- * SkCsGetSendInfo - get checksum information for a send packet
- *
- * Description:
- * Get all checksum information necessary to send a TCP or UDP packet. The
- * function checks the IP header passed to it. If the high-level protocol
- * is either TCP or UDP the pseudo header checksum is calculated and
- * returned.
- *
- * The function returns the total length of the IP header (including any
- * IP option fields), which is the same as the start offset of the IP data
- * which in turn is the start offset of the TCP or UDP header.
- *
- * The function also returns the TCP or UDP pseudo header checksum, which
- * should be used as the start value for the hardware checksum calculation.
- * (Note that any actual pseudo header checksum can never calculate to
- * zero.)
- *
- * Note:
- * There is a bug in the ASIC which may lead to wrong checksums.
- *
- * Arguments:
- * pAc - A pointer to the adapter context struct.
- *
- * pIpHeader - Pointer to IP header. Must be at least the IP header *not*
- * including any option fields, i.e. at least 20 bytes.
- *
- * Note: This pointer will be used to address 8-, 16-, and 32-bit
- * variables with the respective alignment offsets relative to the pointer.
- * Thus, the pointer should point to a 32-bit aligned address. If the
- * target system cannot address 32-bit variables on non 32-bit aligned
- * addresses, then the pointer *must* point to a 32-bit aligned address.
- *
- * pPacketInfo - A pointer to the packet information structure for this
- * packet. Before calling this SkCsGetSendInfo(), the following field must
- * be initialized:
- *
- * ProtocolFlags - Initialize with any combination of
- * SKCS_PROTO_XXX bit flags. SkCsGetSendInfo() will only work on
- * the protocols specified here. Any protocol(s) not specified
- * here will be ignored.
- *
- * Note: Only one checksum can be calculated in hardware. Thus, if
- * SKCS_PROTO_IP is specified in the 'ProtocolFlags',
- * SkCsGetSendInfo() must calculate the IP header checksum in
- * software. It might be a better idea to have the calling
- * protocol stack calculate the IP header checksum.
- *
- * Returns: N/A
- * On return, the following fields in 'pPacketInfo' may or may not have
- * been filled with information, depending on the protocol(s) found in the
- * packet:
- *
- * ProtocolFlags - Returns the SKCS_PROTO_XXX bit flags of the protocol(s)
- * that were both requested by the caller and actually found in the packet.
- * Protocol(s) not specified by the caller and/or not found in the packet
- * will have their respective SKCS_PROTO_XXX bit flags reset.
- *
- * Note: For IP fragments, TCP and UDP packet information is ignored.
- *
- * IpHeaderLength - The total length in bytes of the complete IP header
- * including any option fields is returned here. This is the start offset
- * of the IP data, i.e. the TCP or UDP header if present.
- *
- * IpHeaderChecksum - If IP has been specified in the 'ProtocolFlags', the
- * 16-bit Internet Checksum of the IP header is returned here. This value
- * is to be stored into the packet's 'IP Header Checksum' field.
- *
- * PseudoHeaderChecksum - If this is a TCP or UDP packet and if TCP or UDP
- * has been specified in the 'ProtocolFlags', the 16-bit Internet Checksum
- * of the TCP or UDP pseudo header is returned here.
- */
-#if 0
-void SkCsGetSendInfo(
-SK_AC *pAc, /* Adapter context struct. */
-void *pIpHeader, /* IP header. */
-SKCS_PACKET_INFO *pPacketInfo, /* Packet information struct. */
-int NetNumber) /* Net number */
-{
- /* Internet Header Version found in IP header. */
- unsigned InternetHeaderVersion;
-
- /* Length of the IP header as found in IP header. */
- unsigned IpHeaderLength;
-
- /* Bit field specifiying the desired/found protocols. */
- unsigned ProtocolFlags;
-
- /* Next level protocol identifier found in IP header. */
- unsigned NextLevelProtocol;
-
- /* Length of IP data portion. */
- unsigned IpDataLength;
-
- /* TCP/UDP pseudo header checksum. */
- unsigned long PseudoHeaderChecksum;
-
- /* Pointer to next level protocol statistics structure. */
- SKCS_PROTO_STATS *NextLevelProtoStats;
-
- /* Temporary variable. */
- unsigned Tmp;
-
- Tmp = *(SK_U8 *)
- SKCS_IDX(pIpHeader, SKCS_OFS_IP_HEADER_VERSION_AND_LENGTH);
-
- /* Get the Internet Header Version (IHV). */
- /* Note: The IHV is stored in the upper four bits. */
-
- InternetHeaderVersion = Tmp >> 4;
-
- /* Check the Internet Header Version. */
- /* Note: We currently only support IP version 4. */
-
- if (InternetHeaderVersion != 4) { /* IPv4? */
- SK_DBG_MSG(pAc, SK_DBGMOD_CSUM, SK_DBGCAT_ERR | SK_DBGCAT_TX,
- ("Tx: Unknown Internet Header Version %u.\n",
- InternetHeaderVersion));
- pPacketInfo->ProtocolFlags = 0;
- pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].TxUnableCts++;
- return;
- }
-
- /* Get the IP header length (IHL). */
- /*
- * Note: The IHL is stored in the lower four bits as the number of
- * 4-byte words.
- */
-
- IpHeaderLength = (Tmp & 0xf) * 4;
- pPacketInfo->IpHeaderLength = IpHeaderLength;
-
- /* Check the IP header length. */
-
- /* 04-Aug-1998 sw - Really check the IHL? Necessary? */
-
- if (IpHeaderLength < 5*4) {
- SK_DBG_MSG(pAc, SK_DBGMOD_CSUM, SK_DBGCAT_ERR | SK_DBGCAT_TX,
- ("Tx: Invalid IP Header Length %u.\n", IpHeaderLength));
- pPacketInfo->ProtocolFlags = 0;
- pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].TxUnableCts++;
- return;
- }
-
- /* This is an IPv4 frame with a header of valid length. */
-
- pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].TxOkCts++;
-
- /* Check if we should calculate the IP header checksum. */
-
- ProtocolFlags = pPacketInfo->ProtocolFlags;
-
- if (ProtocolFlags & SKCS_PROTO_IP) {
- pPacketInfo->IpHeaderChecksum =
- SkCsCalculateChecksum(pIpHeader, IpHeaderLength);
- }
-
- /* Get the next level protocol identifier. */
-
- NextLevelProtocol =
- *(SK_U8 *) SKCS_IDX(pIpHeader, SKCS_OFS_IP_NEXT_LEVEL_PROTOCOL);
-
- /*
- * Check if this is a TCP or UDP frame and if we should calculate the
- * TCP/UDP pseudo header checksum.
- *
- * Also clear all protocol bit flags of protocols not present in the
- * frame.
- */
-
- if ((ProtocolFlags & SKCS_PROTO_TCP) != 0 &&
- NextLevelProtocol == SKCS_PROTO_ID_TCP) {
- /* TCP/IP frame. */
- ProtocolFlags &= SKCS_PROTO_TCP | SKCS_PROTO_IP;
- NextLevelProtoStats =
- &pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_TCP];
- }
- else if ((ProtocolFlags & SKCS_PROTO_UDP) != 0 &&
- NextLevelProtocol == SKCS_PROTO_ID_UDP) {
- /* UDP/IP frame. */
- ProtocolFlags &= SKCS_PROTO_UDP | SKCS_PROTO_IP;
- NextLevelProtoStats =
- &pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_UDP];
- }
- else {
- /*
- * Either not a TCP or UDP frame and/or TCP/UDP processing not
- * specified.
- */
- pPacketInfo->ProtocolFlags = ProtocolFlags & SKCS_PROTO_IP;
- return;
- }
-
- /* Check if this is an IP fragment. */
-
- /*
- * Note: An IP fragment has a non-zero "Fragment Offset" field and/or
- * the "More Fragments" bit set. Thus, if both the "Fragment Offset"
- * and the "More Fragments" are zero, it is *not* a fragment. We can
- * easily check both at the same time since they are in the same 16-bit
- * word.
- */
-
- if ((*(SK_U16 *)
- SKCS_IDX(pIpHeader, SKCS_OFS_IP_FLAGS_AND_FRAGMENT_OFFSET) &
- ~SKCS_IP_DONT_FRAGMENT) != 0) {
- /* IP fragment; ignore all other protocols. */
- pPacketInfo->ProtocolFlags = ProtocolFlags & SKCS_PROTO_IP;
- NextLevelProtoStats->TxUnableCts++;
- return;
- }
-
- /*
- * Calculate the TCP/UDP pseudo header checksum.
- */
-
- /* Get total length of IP header and data. */
-
- IpDataLength =
- *(SK_U16 *) SKCS_IDX(pIpHeader, SKCS_OFS_IP_TOTAL_LENGTH);
-
- /* Get length of IP data portion. */
-
- IpDataLength = SKCS_NTOH16(IpDataLength) - IpHeaderLength;
-
- /* Calculate the sum of all pseudo header fields (16-bit). */
-
- PseudoHeaderChecksum =
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_SOURCE_ADDRESS + 0) +
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_SOURCE_ADDRESS + 2) +
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_DESTINATION_ADDRESS + 0) +
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_DESTINATION_ADDRESS + 2) +
- (unsigned long) SKCS_HTON16(NextLevelProtocol) +
- (unsigned long) SKCS_HTON16(IpDataLength);
-
- /* Add-in any carries. */
-
- SKCS_OC_ADD(PseudoHeaderChecksum, PseudoHeaderChecksum, 0);
-
- /* Add-in any new carry. */
-
- SKCS_OC_ADD(pPacketInfo->PseudoHeaderChecksum, PseudoHeaderChecksum, 0);
-
- pPacketInfo->ProtocolFlags = ProtocolFlags;
- NextLevelProtoStats->TxOkCts++; /* Success. */
-} /* SkCsGetSendInfo */
-
-
-/******************************************************************************
- *
- * SkCsGetReceiveInfo - verify checksum information for a received packet
- *
- * Description:
- * Verify a received frame's checksum. The function returns a status code
- * reflecting the result of the verification.
- *
- * Note:
- * Before calling this function you have to verify that the frame is
- * not padded and Checksum1 and Checksum2 are bigger than 1.
- *
- * Arguments:
- * pAc - Pointer to adapter context struct.
- *
- * pIpHeader - Pointer to IP header. Must be at least the length in bytes
- * of the received IP header including any option fields. For UDP packets,
- * 8 additional bytes are needed to access the UDP checksum.
- *
- * Note: The actual length of the IP header is stored in the lower four
- * bits of the first octet of the IP header as the number of 4-byte words,
- * so it must be multiplied by four to get the length in bytes. Thus, the
- * maximum IP header length is 15 * 4 = 60 bytes.
- *
- * Checksum1 - The first 16-bit Internet Checksum calculated by the
- * hardware starting at the offset returned by SkCsSetReceiveFlags().
- *
- * Checksum2 - The second 16-bit Internet Checksum calculated by the
- * hardware starting at the offset returned by SkCsSetReceiveFlags().
- *
- * Returns:
- * SKCS_STATUS_UNKNOWN_IP_VERSION - Not an IP v4 frame.
- * SKCS_STATUS_IP_CSUM_ERROR - IP checksum error.
- * SKCS_STATUS_IP_CSUM_ERROR_TCP - IP checksum error in TCP frame.
- * SKCS_STATUS_IP_CSUM_ERROR_UDP - IP checksum error in UDP frame
- * SKCS_STATUS_IP_FRAGMENT - IP fragment (IP checksum ok).
- * SKCS_STATUS_IP_CSUM_OK - IP checksum ok (not a TCP or UDP frame).
- * SKCS_STATUS_TCP_CSUM_ERROR - TCP checksum error (IP checksum ok).
- * SKCS_STATUS_UDP_CSUM_ERROR - UDP checksum error (IP checksum ok).
- * SKCS_STATUS_TCP_CSUM_OK - IP and TCP checksum ok.
- * SKCS_STATUS_UDP_CSUM_OK - IP and UDP checksum ok.
- * SKCS_STATUS_IP_CSUM_OK_NO_UDP - IP checksum OK and no UDP checksum.
- *
- * Note: If SKCS_OVERWRITE_STATUS is defined, the SKCS_STATUS_XXX values
- * returned here can be defined in some header file by the module using CSUM.
- * In this way, the calling module can assign return values for its own needs,
- * e.g. by assigning bit flags to the individual protocols.
- */
-SKCS_STATUS SkCsGetReceiveInfo(
-SK_AC *pAc, /* Adapter context struct. */
-void *pIpHeader, /* IP header. */
-unsigned Checksum1, /* Hardware checksum 1. */
-unsigned Checksum2, /* Hardware checksum 2. */
-int NetNumber) /* Net number */
-{
- /* Internet Header Version found in IP header. */
- unsigned InternetHeaderVersion;
-
- /* Length of the IP header as found in IP header. */
- unsigned IpHeaderLength;
-
- /* Length of IP data portion. */
- unsigned IpDataLength;
-
- /* IP header checksum. */
- unsigned IpHeaderChecksum;
-
- /* IP header options checksum, if any. */
- unsigned IpOptionsChecksum;
-
- /* IP data checksum, i.e. TCP/UDP checksum. */
- unsigned IpDataChecksum;
-
- /* Next level protocol identifier found in IP header. */
- unsigned NextLevelProtocol;
-
- /* The checksum of the "next level protocol", i.e. TCP or UDP. */
- unsigned long NextLevelProtocolChecksum;
-
- /* Pointer to next level protocol statistics structure. */
- SKCS_PROTO_STATS *NextLevelProtoStats;
-
- /* Temporary variable. */
- unsigned Tmp;
-
- Tmp = *(SK_U8 *)
- SKCS_IDX(pIpHeader, SKCS_OFS_IP_HEADER_VERSION_AND_LENGTH);
-
- /* Get the Internet Header Version (IHV). */
- /* Note: The IHV is stored in the upper four bits. */
-
- InternetHeaderVersion = Tmp >> 4;
-
- /* Check the Internet Header Version. */
- /* Note: We currently only support IP version 4. */
-
- if (InternetHeaderVersion != 4) { /* IPv4? */
- SK_DBG_MSG(pAc, SK_DBGMOD_CSUM, SK_DBGCAT_ERR | SK_DBGCAT_RX,
- ("Rx: Unknown Internet Header Version %u.\n",
- InternetHeaderVersion));
- pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].RxUnableCts++;
- return (SKCS_STATUS_UNKNOWN_IP_VERSION);
- }
-
- /* Get the IP header length (IHL). */
- /*
- * Note: The IHL is stored in the lower four bits as the number of
- * 4-byte words.
- */
-
- IpHeaderLength = (Tmp & 0xf) * 4;
-
- /* Check the IP header length. */
-
- /* 04-Aug-1998 sw - Really check the IHL? Necessary? */
-
- if (IpHeaderLength < 5*4) {
- SK_DBG_MSG(pAc, SK_DBGMOD_CSUM, SK_DBGCAT_ERR | SK_DBGCAT_RX,
- ("Rx: Invalid IP Header Length %u.\n", IpHeaderLength));
- pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].RxErrCts++;
- return (SKCS_STATUS_IP_CSUM_ERROR);
- }
-
- /* This is an IPv4 frame with a header of valid length. */
-
- /* Get the IP header and data checksum. */
-
- IpDataChecksum = Checksum2;
-
- /*
- * The IP header checksum is calculated as follows:
- *
- * IpHeaderChecksum = Checksum1 - Checksum2
- */
-
- SKCS_OC_SUB(IpHeaderChecksum, Checksum1, Checksum2);
-
- /* Check if any IP header options. */
-
- if (IpHeaderLength > SKCS_IP_HEADER_SIZE) {
-
- /* Get the IP options checksum. */
-
- IpOptionsChecksum = SkCsCalculateChecksum(
- SKCS_IDX(pIpHeader, SKCS_IP_HEADER_SIZE),
- IpHeaderLength - SKCS_IP_HEADER_SIZE);
-
- /* Adjust the IP header and IP data checksums. */
-
- SKCS_OC_ADD(IpHeaderChecksum, IpHeaderChecksum, IpOptionsChecksum);
-
- SKCS_OC_SUB(IpDataChecksum, IpDataChecksum, IpOptionsChecksum);
- }
-
- /*
- * Check if the IP header checksum is ok.
- *
- * NOTE: We must check the IP header checksum even if the caller just wants
- * us to check upper-layer checksums, because we cannot do any further
- * processing of the packet without a valid IP checksum.
- */
-
- /* Get the next level protocol identifier. */
-
- NextLevelProtocol = *(SK_U8 *)
- SKCS_IDX(pIpHeader, SKCS_OFS_IP_NEXT_LEVEL_PROTOCOL);
-
- if (IpHeaderChecksum != 0xFFFF) {
- pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_IP].RxErrCts++;
- /* the NDIS tester wants to know the upper level protocol too */
- if (NextLevelProtocol == SKCS_PROTO_ID_TCP) {
- return(SKCS_STATUS_IP_CSUM_ERROR_TCP);
- }
- else if (NextLevelProtocol == SKCS_PROTO_ID_UDP) {
- return(SKCS_STATUS_IP_CSUM_ERROR_UDP);
- }
- return (SKCS_STATUS_IP_CSUM_ERROR);
- }
-
- /*
- * Check if this is a TCP or UDP frame and if we should calculate the
- * TCP/UDP pseudo header checksum.
- *
- * Also clear all protocol bit flags of protocols not present in the
- * frame.
- */
-
- if ((pAc->Csum.ReceiveFlags[NetNumber] & SKCS_PROTO_TCP) != 0 &&
- NextLevelProtocol == SKCS_PROTO_ID_TCP) {
- /* TCP/IP frame. */
- NextLevelProtoStats =
- &pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_TCP];
- }
- else if ((pAc->Csum.ReceiveFlags[NetNumber] & SKCS_PROTO_UDP) != 0 &&
- NextLevelProtocol == SKCS_PROTO_ID_UDP) {
- /* UDP/IP frame. */
- NextLevelProtoStats =
- &pAc->Csum.ProtoStats[NetNumber][SKCS_PROTO_STATS_UDP];
- }
- else {
- /*
- * Either not a TCP or UDP frame and/or TCP/UDP processing not
- * specified.
- */
- return (SKCS_STATUS_IP_CSUM_OK);
- }
-
- /* Check if this is an IP fragment. */
-
- /*
- * Note: An IP fragment has a non-zero "Fragment Offset" field and/or
- * the "More Fragments" bit set. Thus, if both the "Fragment Offset"
- * and the "More Fragments" are zero, it is *not* a fragment. We can
- * easily check both at the same time since they are in the same 16-bit
- * word.
- */
-
- if ((*(SK_U16 *)
- SKCS_IDX(pIpHeader, SKCS_OFS_IP_FLAGS_AND_FRAGMENT_OFFSET) &
- ~SKCS_IP_DONT_FRAGMENT) != 0) {
- /* IP fragment; ignore all other protocols. */
- NextLevelProtoStats->RxUnableCts++;
- return (SKCS_STATUS_IP_FRAGMENT);
- }
-
- /*
- * 08-May-2000 ra
- *
- * From RFC 768 (UDP)
- * If the computed checksum is zero, it is transmitted as all ones (the
- * equivalent in one's complement arithmetic). An all zero transmitted
- * checksum value means that the transmitter generated no checksum (for
- * debugging or for higher level protocols that don't care).
- */
-
- if (NextLevelProtocol == SKCS_PROTO_ID_UDP &&
- *(SK_U16*)SKCS_IDX(pIpHeader, IpHeaderLength + 6) == 0x0000) {
-
- NextLevelProtoStats->RxOkCts++;
-
- return (SKCS_STATUS_IP_CSUM_OK_NO_UDP);
- }
-
- /*
- * Calculate the TCP/UDP checksum.
- */
-
- /* Get total length of IP header and data. */
-
- IpDataLength =
- *(SK_U16 *) SKCS_IDX(pIpHeader, SKCS_OFS_IP_TOTAL_LENGTH);
-
- /* Get length of IP data portion. */
-
- IpDataLength = SKCS_NTOH16(IpDataLength) - IpHeaderLength;
-
- NextLevelProtocolChecksum =
-
- /* Calculate the pseudo header checksum. */
-
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_SOURCE_ADDRESS + 0) +
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_SOURCE_ADDRESS + 2) +
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_DESTINATION_ADDRESS + 0) +
- (unsigned long) *(SK_U16 *) SKCS_IDX(pIpHeader,
- SKCS_OFS_IP_DESTINATION_ADDRESS + 2) +
- (unsigned long) SKCS_HTON16(NextLevelProtocol) +
- (unsigned long) SKCS_HTON16(IpDataLength) +
-
- /* Add the TCP/UDP header checksum. */
-
- (unsigned long) IpDataChecksum;
-
- /* Add-in any carries. */
-
- SKCS_OC_ADD(NextLevelProtocolChecksum, NextLevelProtocolChecksum, 0);
-
- /* Add-in any new carry. */
-
- SKCS_OC_ADD(NextLevelProtocolChecksum, NextLevelProtocolChecksum, 0);
-
- /* Check if the TCP/UDP checksum is ok. */
-
- if ((unsigned) NextLevelProtocolChecksum == 0xFFFF) {
-
- /* TCP/UDP checksum ok. */
-
- NextLevelProtoStats->RxOkCts++;
-
- return (NextLevelProtocol == SKCS_PROTO_ID_TCP ?
- SKCS_STATUS_TCP_CSUM_OK : SKCS_STATUS_UDP_CSUM_OK);
- }
-
- /* TCP/UDP checksum error. */
-
- NextLevelProtoStats->RxErrCts++;
-
- return (NextLevelProtocol == SKCS_PROTO_ID_TCP ?
- SKCS_STATUS_TCP_CSUM_ERROR : SKCS_STATUS_UDP_CSUM_ERROR);
-} /* SkCsGetReceiveInfo */
-#endif
-
-
-/******************************************************************************
- *
- * SkCsSetReceiveFlags - set checksum receive flags
- *
- * Description:
- * Use this function to set the various receive flags. According to the
- * protocol flags set by the caller, the start offsets within received
- * packets of the two hardware checksums are returned. These offsets must
- * be stored in all receive descriptors.
- *
- * Arguments:
- * pAc - Pointer to adapter context struct.
- *
- * ReceiveFlags - Any combination of SK_PROTO_XXX flags of the protocols
- * for which the caller wants checksum information on received frames.
- *
- * pChecksum1Offset - The start offset of the first receive descriptor
- * hardware checksum to be calculated for received frames is returned
- * here.
- *
- * pChecksum2Offset - The start offset of the second receive descriptor
- * hardware checksum to be calculated for received frames is returned
- * here.
- *
- * Returns: N/A
- * Returns the two hardware checksum start offsets.
- */
-void SkCsSetReceiveFlags(
-SK_AC *pAc, /* Adapter context struct. */
-unsigned ReceiveFlags, /* New receive flags. */
-unsigned *pChecksum1Offset, /* Offset for hardware checksum 1. */
-unsigned *pChecksum2Offset, /* Offset for hardware checksum 2. */
-int NetNumber)
-{
- /* Save the receive flags. */
-
- pAc->Csum.ReceiveFlags[NetNumber] = ReceiveFlags;
-
- /* First checksum start offset is the IP header. */
- *pChecksum1Offset = SKCS_MAC_HEADER_SIZE;
-
- /*
- * Second checksum start offset is the IP data. Note that this may vary
- * if there are any IP header options in the actual packet.
- */
- *pChecksum2Offset = SKCS_MAC_HEADER_SIZE + SKCS_IP_HEADER_SIZE;
-} /* SkCsSetReceiveFlags */
-
-#ifndef SkCsCalculateChecksum
-
-/******************************************************************************
- *
- * SkCsCalculateChecksum - calculate checksum for specified data
- *
- * Description:
- * Calculate and return the 16-bit Internet Checksum for the specified
- * data.
- *
- * Arguments:
- * pData - Pointer to data for which the checksum shall be calculated.
- * Note: The pointer should be aligned on a 16-bit boundary.
- *
- * Length - Length in bytes of data to checksum.
- *
- * Returns:
- * The 16-bit Internet Checksum for the specified data.
- *
- * Note: The checksum is calculated in the machine's natural byte order,
- * i.e. little vs. big endian. Thus, the resulting checksum is different
- * for the same input data on little and big endian machines.
- *
- * However, when written back to the network packet, the byte order is
- * always in correct network order.
- */
-unsigned SkCsCalculateChecksum(
-void *pData, /* Data to checksum. */
-unsigned Length) /* Length of data. */
-{
- SK_U16 *pU16; /* Pointer to the data as 16-bit words. */
- unsigned long Checksum; /* Checksum; must be at least 32 bits. */
-
- /* Sum up all 16-bit words. */
-
- pU16 = (SK_U16 *) pData;
- for (Checksum = 0; Length > 1; Length -= 2) {
- Checksum += *pU16++;
- }
-
- /* If this is an odd number of bytes, add-in the last byte. */
-
- if (Length > 0) {
-#ifdef SK_BIG_ENDIAN
- /* Add the last byte as the high byte. */
- Checksum += ((unsigned) *(SK_U8 *) pU16) << 8;
-#else /* !SK_BIG_ENDIAN */
- /* Add the last byte as the low byte. */
- Checksum += *(SK_U8 *) pU16;
-#endif /* !SK_BIG_ENDIAN */
- }
-
- /* Add-in any carries. */
-
- SKCS_OC_ADD(Checksum, Checksum, 0);
-
- /* Add-in any new carry. */
-
- SKCS_OC_ADD(Checksum, Checksum, 0);
-
- /* Note: All bits beyond the 16-bit limit are now zero. */
-
- return ((unsigned) Checksum);
-} /* SkCsCalculateChecksum */
-
-#endif /* SkCsCalculateChecksum */
-
-/******************************************************************************
- *
- * SkCsEvent - the CSUM event dispatcher
- *
- * Description:
- * This is the event handler for the CSUM module.
- *
- * Arguments:
- * pAc - Pointer to adapter context.
- *
- * Ioc - I/O context.
- *
- * Event - Event id.
- *
- * Param - Event dependent parameter.
- *
- * Returns:
- * The 16-bit Internet Checksum for the specified data.
- *
- * Note: The checksum is calculated in the machine's natural byte order,
- * i.e. little vs. big endian. Thus, the resulting checksum is different
- * for the same input data on little and big endian machines.
- *
- * However, when written back to the network packet, the byte order is
- * always in correct network order.
- */
-int SkCsEvent(
-SK_AC *pAc, /* Pointer to adapter context. */
-SK_IOC Ioc, /* I/O context. */
-SK_U32 Event, /* Event id. */
-SK_EVPARA Param) /* Event dependent parameter. */
-{
- int ProtoIndex;
- int NetNumber;
-
- switch (Event) {
- /*
- * Clear protocol statistics.
- *
- * Param - Protocol index, or -1 for all protocols.
- * - Net number.
- */
- case SK_CSUM_EVENT_CLEAR_PROTO_STATS:
-
- ProtoIndex = (int)Param.Para32[1];
- NetNumber = (int)Param.Para32[0];
- if (ProtoIndex < 0) { /* Clear for all protocols. */
- if (NetNumber >= 0) {
- memset(&pAc->Csum.ProtoStats[NetNumber][0], 0,
- sizeof(pAc->Csum.ProtoStats[NetNumber]));
- }
- }
- else { /* Clear for individual protocol. */
- memset(&pAc->Csum.ProtoStats[NetNumber][ProtoIndex], 0,
- sizeof(pAc->Csum.ProtoStats[NetNumber][ProtoIndex]));
- }
- break;
- default:
- break;
- }
- return (0); /* Success. */
-} /* SkCsEvent */
-
-#endif /* SK_USE_CSUM */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skge.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.46 $
- * Date: $Date: 2003/02/25 14:16:36 $
- * Purpose: The main driver source module
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * Driver for SysKonnect Gigabit Ethernet Server Adapters:
- *
- * SK-9871 (single link 1000Base-ZX)
- * SK-9872 (dual link 1000Base-ZX)
- * SK-9861 (single link 1000Base-SX, VF45 Volition Plug)
- * SK-9862 (dual link 1000Base-SX, VF45 Volition Plug)
- * SK-9841 (single link 1000Base-LX)
- * SK-9842 (dual link 1000Base-LX)
- * SK-9843 (single link 1000Base-SX)
- * SK-9844 (dual link 1000Base-SX)
- * SK-9821 (single link 1000Base-T)
- * SK-9822 (dual link 1000Base-T)
- * SK-9881 (single link 1000Base-SX V2 LC)
- * SK-9871 (single link 1000Base-ZX V2)
- * SK-9861 (single link 1000Base-SX V2, VF45 Volition Plug)
- * SK-9841 (single link 1000Base-LX V2)
- * SK-9843 (single link 1000Base-SX V2)
- * SK-9821 (single link 1000Base-T V2)
- *
- * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
- * SysKonnects GEnesis Solaris driver
- * Author: Christoph Goos (cgoos@syskonnect.de)
- * Mirko Lindner (mlindner@syskonnect.de)
- *
- * Address all question to: linux@syskonnect.de
- *
- * The technical manual for the adapters is available from SysKonnect's
- * web pages: www.syskonnect.com
- * Goto "Support" and search Knowledge Base for "manual".
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skge.c,v $
- * Revision 1.46 2003/02/25 14:16:36 mlindner
- * Fix: Copyright statement
- *
- * Revision 1.45 2003/02/25 13:25:55 mlindner
- * Add: Performance improvements
- * Add: Support for various vendors
- * Fix: Init function
- *
- * Revision 1.44 2003/01/09 09:25:26 mlindner
- * Fix: Remove useless init_module/cleanup_module forward declarations
- *
- * Revision 1.43 2002/11/29 08:42:41 mlindner
- * Fix: Boot message
- *
- * Revision 1.42 2002/11/28 13:30:23 mlindner
- * Add: New frame check
- *
- * Revision 1.41 2002/11/27 13:55:18 mlindner
- * Fix: Drop wrong csum packets
- * Fix: Initialize proc_entry after hw check
- *
- * Revision 1.40 2002/10/31 07:50:37 tschilli
- * Function SkGeInitAssignRamToQueues() from common module inserted.
- * Autonegotiation is set to ON for all adapters.
- * LinkSpeedUsed is used in link up status report.
- * Role parameter will show up for 1000 Mbps links only.
- * GetConfiguration() inserted after init level 1 in SkGeChangeMtu().
- * All return values of SkGeInit() and SkGeInitPort() are checked.
- *
- * Revision 1.39 2002/10/02 12:56:05 mlindner
- * Add: Support for Yukon
- * Add: Support for ZEROCOPY, scatter-gather and hw checksum
- * Add: New transmit ring function (use SG and TCP/UDP hardware checksumming)
- * Add: New init function
- * Add: Speed check and setup
- * Add: Merge source for kernel 2.2.x and 2.4.x
- * Add: Opcode check for tcp
- * Add: Frame length check
- * Fix: Transmit complete interrupt
- * Fix: Interrupt moderation
- *
- * Revision 1.29.2.13 2002/01/14 12:44:52 mlindner
- * Fix: Rlmt modes
- *
- * Revision 1.29.2.12 2001/12/07 12:06:18 mlindner
- * Fix: malloc -> slab changes
- *
- * Revision 1.29.2.11 2001/12/06 15:19:20 mlindner
- * Add: DMA attributes
- * Fix: Module initialisation
- * Fix: pci_map_single and pci_unmap_single replaced
- *
- * Revision 1.29.2.10 2001/12/06 09:56:50 mlindner
- * Corrected some printk's
- *
- * Revision 1.29.2.9 2001/09/05 12:15:34 mlindner
- * Add: LBFO Changes
- * Fix: Counter Errors (Jumbo == to long errors)
- * Fix: Changed pAC->PciDev declaration
- * Fix: too short counters
- *
- * Revision 1.29.2.8 2001/06/25 12:10:44 mlindner
- * fix: ReceiveIrq() changed.
- *
- * Revision 1.29.2.7 2001/06/25 08:07:05 mlindner
- * fix: RLMT locking in ReceiveIrq() changed.
- *
- * Revision 1.29.2.6 2001/05/21 07:59:29 mlindner
- * fix: MTU init problems
- *
- * Revision 1.29.2.5 2001/05/08 11:25:08 mlindner
- * fix: removed VLAN error message
- *
- * Revision 1.29.2.4 2001/05/04 13:31:43 gklug
- * fix: do not handle eth_copy on bad fragments received.
- *
- * Revision 1.29.2.3 2001/04/23 08:06:43 mlindner
- * Fix: error handling
- *
- * Revision 1.29.2.2 2001/03/15 12:04:54 mlindner
- * Fixed memory problem
- *
- * Revision 1.29.2.1 2001/03/12 16:41:44 mlindner
- * add: procfs function
- * add: dual-net function
- * add: RLMT networks
- * add: extended PNMI features
- *
- * Kernel 2.4.x specific:
- * Revision 1.xx 2000/09/12 13:31:56 cgoos
- * Fixed missign "dev=NULL in skge_probe.
- * Added counting for jumbo frames (corrects error statistic).
- * Removed VLAN tag check (enables VLAN support).
- *
- * Kernel 2.2.x specific:
- * Revision 1.29 2000/02/21 13:31:56 cgoos
- * Fixed "unused" warning for UltraSPARC change.
- *
- * Partially kernel 2.2.x specific:
- * Revision 1.28 2000/02/21 10:32:36 cgoos
- * Added fixes for UltraSPARC.
- * Now printing RlmtMode and PrefPort setting at startup.
- * Changed XmitFrame return value.
- * Fixed rx checksum calculation for BIG ENDIAN systems.
- * Fixed rx jumbo frames counted as ierrors.
- *
- *
- * Revision 1.27 1999/11/25 09:06:28 cgoos
- * Changed base_addr to unsigned long.
- *
- * Revision 1.26 1999/11/22 13:29:16 cgoos
- * Changed license header to GPL.
- * Changes for inclusion in linux kernel (2.2.13).
- * Removed 2.0.x defines.
- * Changed SkGeProbe to skge_probe.
- * Added checks in SkGeIoctl.
- *
- * Revision 1.25 1999/10/07 14:47:52 cgoos
- * Changed 984x to 98xx.
- *
- * Revision 1.24 1999/09/30 07:21:01 cgoos
- * Removed SK_RLMT_SLOW_LOOKAHEAD option.
- * Giving spanning tree packets also to OS now.
- *
- * Revision 1.23 1999/09/29 07:36:50 cgoos
- * Changed assignment for IsBc/IsMc.
- *
- * Revision 1.22 1999/09/28 12:57:09 cgoos
- * Added CheckQueue also to Single-Port-ISR.
- *
- * Revision 1.21 1999/09/28 12:42:41 cgoos
- * Changed parameter strings for RlmtMode.
- *
- * Revision 1.20 1999/09/28 12:37:57 cgoos
- * Added CheckQueue for fast delivery of RLMT frames.
- *
- * Revision 1.19 1999/09/16 07:57:25 cgoos
- * Copperfield changes.
- *
- * Revision 1.18 1999/09/03 13:06:30 cgoos
- * Fixed RlmtMode=CheckSeg bug: wrong DEV_KFREE_SKB in RLMT_SEND caused
- * double allocated skb's.
- * FrameStat in ReceiveIrq was accessed via wrong Rxd.
- * Queue size for async. standby Tx queue was zero.
- * FillRxLimit of 0 could cause problems with ReQueue, changed to 1.
- * Removed debug output of checksum statistic.
- *
- * Revision 1.17 1999/08/11 13:55:27 cgoos
- * Transmit descriptor polling was not reenabled after SkGePortInit.
- *
- * Revision 1.16 1999/07/27 15:17:29 cgoos
- * Added some "\n" in output strings (removed while debuging...).
- *
- * Revision 1.15 1999/07/23 12:09:30 cgoos
- * Performance optimization, rx checksumming, large frame support.
- *
- * Revision 1.14 1999/07/14 11:26:27 cgoos
- * Removed Link LED settings (now in RLMT).
- * Added status output at NET UP.
- * Fixed SMP problems with Tx and SWITCH running in parallel.
- * Fixed return code problem at RLMT_SEND event.
- *
- * Revision 1.13 1999/04/07 10:11:42 cgoos
- * Fixed Single Port problems.
- * Fixed Multi-Adapter problems.
- * Always display startup string.
- *
- * Revision 1.12 1999/03/29 12:26:37 cgoos
- * Reversed locking to fine granularity.
- * Fixed skb double alloc problem (caused by incorrect xmit return code).
- * Enhanced function descriptions.
- *
- * Revision 1.11 1999/03/15 13:10:51 cgoos
- * Changed device identifier in output string to ethX.
- *
- * Revision 1.10 1999/03/15 12:12:34 cgoos
- * Changed copyright notice.
- *
- * Revision 1.9 1999/03/15 12:10:17 cgoos
- * Changed locking to one driver lock.
- * Added check of SK_AC-size (for consistency with library).
- *
- * Revision 1.8 1999/03/08 11:44:02 cgoos
- * Fixed missing dev->tbusy in SkGeXmit.
- * Changed large frame (jumbo) buffer number.
- * Added copying of short frames.
- *
- * Revision 1.7 1999/03/04 13:26:57 cgoos
- * Fixed spinlock calls for SMP.
- *
- * Revision 1.6 1999/03/02 09:53:51 cgoos
- * Added descriptor revertion for big endian machines.
- *
- * Revision 1.5 1999/03/01 08:50:59 cgoos
- * Fixed SkGeChangeMtu.
- * Fixed pci config space accesses.
- *
- * Revision 1.4 1999/02/18 15:48:44 cgoos
- * Corrected some printk's.
- *
- * Revision 1.3 1999/02/18 12:45:55 cgoos
- * Changed SK_MAX_CARD_PARAM to default 16
- *
- * Revision 1.2 1999/02/18 10:55:32 cgoos
- * Removed SkGeDrvTimeStamp function.
- * Printing "ethX:" before adapter type at adapter init.
- *
- *
- * 10-Feb-1999 cg Created, based on Linux' acenic.c, 3c59x.c and
- * SysKonnects GEnesis Solaris driver
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Possible compiler options (#define xxx / -Dxxx):
- *
- * debugging can be enable by changing SK_DEBUG_CHKMOD and
- * SK_DEBUG_CHKCAT in makefile (described there).
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This is the main module of the Linux GE driver.
- *
- * All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
- * are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
- * Those are used for drivers on multiple OS', so some thing may seem
- * unnecessary complicated on Linux. Please do not try to 'clean up'
- * them without VERY good reasons, because this will make it more
- * difficult to keep the Linux driver in synchronisation with the
- * other versions.
- *
- * Include file hierarchy:
- *
- * <linux/module.h>
- *
- * "h/skdrv1st.h"
- * <linux/version.h>
- * <linux/types.h>
- * <linux/kernel.h>
- * <linux/string.h>
- * <linux/errno.h>
- * <linux/ioport.h>
- * <linux/slab.h>
- * <linux/interrupt.h>
- * <linux/pci.h>
- * <asm/byteorder.h>
- * <asm/bitops.h>
- * <asm/io.h>
- * <linux/netdevice.h>
- * <linux/etherdevice.h>
- * <linux/skbuff.h>
- * those three depending on kernel version used:
- * <linux/bios32.h>
- * <linux/init.h>
- * <asm/uaccess.h>
- * <net/checksum.h>
- *
- * "h/skerror.h"
- * "h/skdebug.h"
- * "h/sktypes.h"
- * "h/lm80.h"
- * "h/xmac_ii.h"
- *
- * "h/skdrv2nd.h"
- * "h/skqueue.h"
- * "h/skgehwt.h"
- * "h/sktimer.h"
- * "h/ski2c.h"
- * "h/skgepnmi.h"
- * "h/skvpd.h"
- * "h/skgehw.h"
- * "h/skgeinit.h"
- * "h/skaddr.h"
- * "h/skgesirq.h"
- * "h/skcsum.h"
- * "h/skrlmt.h"
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#include "h/skversion.h"
-#if 0
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/proc_fs.h>
-#endif
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-
-
-/* defines ******************************************************************/
-/* for debuging on x86 only */
-/* #define BREAKPOINT() asm(" int $3"); */
-
-/* use the scatter-gather functionality with sendfile() */
-#if 0
-#define SK_ZEROCOPY
-#endif
-
-/* use of a transmit complete interrupt */
-#define USE_TX_COMPLETE
-
-/* use interrupt moderation (for tx complete only) */
-#define USE_INT_MOD
-#define INTS_PER_SEC 1000
-
-/*
- * threshold for copying small receive frames
- * set to 0 to avoid copying, set to 9001 to copy all frames
- */
-#define SK_COPY_THRESHOLD 50
-
-/* number of adapters that can be configured via command line params */
-#define SK_MAX_CARD_PARAM 16
-
-
-/*
- * use those defines for a compile-in version of the driver instead
- * of command line parameters
- */
-/* #define LINK_SPEED_A {"Auto", } */
-/* #define LINK_SPEED_B {"Auto", } */
-/* #define AUTO_NEG_A {"Sense", } */
-/* #define AUTO_NEG_B {"Sense", } */
-/* #define DUP_CAP_A {"Both", } */
-/* #define DUP_CAP_B {"Both", } */
-/* #define FLOW_CTRL_A {"SymOrRem", } */
-/* #define FLOW_CTRL_B {"SymOrRem", } */
-/* #define ROLE_A {"Auto", } */
-/* #define ROLE_B {"Auto", } */
-/* #define PREF_PORT {"A", } */
-/* #define RLMT_MODE {"CheckLinkState", } */
-
-#define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
-#define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
-#define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
-
-/* function prototypes ******************************************************/
-static void FreeResources(struct SK_NET_DEVICE *dev);
-static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
-static SK_BOOL BoardAllocMem(SK_AC *pAC);
-static void BoardFreeMem(SK_AC *pAC);
-static void BoardInitMem(SK_AC *pAC);
-static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**,
- int*, SK_BOOL);
-
-#if 0
-static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
-static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
-static int SkGeOpen(struct SK_NET_DEVICE *dev);
-static int SkGeClose(struct SK_NET_DEVICE *dev);
-static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
-static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
-static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
-static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
-static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
-#else
-void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
-void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
-int SkGeOpen(struct SK_NET_DEVICE *dev);
-int SkGeClose(struct SK_NET_DEVICE *dev);
-int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
-#endif
-static void GetConfiguration(SK_AC*);
-static void ProductStr(SK_AC*);
-static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
-static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
-static void FillRxRing(SK_AC*, RX_PORT*);
-static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
-#if 0
-static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
-#else
-void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
-#endif
-static void ClearAndStartRx(SK_AC*, int);
-static void ClearTxIrq(SK_AC*, int, int);
-static void ClearRxRing(SK_AC*, RX_PORT*);
-static void ClearTxRing(SK_AC*, TX_PORT*);
-#if 0
-static void SetQueueSizes(SK_AC *pAC);
-
-static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
-#endif
-static void PortReInitBmu(SK_AC*, int);
-#if 0
-static int SkGeIocMib(DEV_NET*, unsigned int, int);
-static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
-#endif
-
-/*Extern */
-
-/* external Proc function */
-extern int proc_read(
- char *buffer,
- char **buffer_location,
- off_t offset,
- int buffer_length,
- int *eof,
- void *data);
-
-#ifdef DEBUG
-static void DumpMsg(struct sk_buff*, char*);
-static void DumpData(char*, int);
-static void DumpLong(char*, int);
-#endif
-void dump_frag( SK_U8 *data, int length);
-
-/* global variables *********************************************************/
-#if 0
-static const char *BootString = BOOT_STRING;
-#endif
-struct SK_NET_DEVICE *SkGeRootDev = NULL;
-static int probed __initdata = 0;
-
-/* local variables **********************************************************/
-static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
-static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
-
-
-/* local variables **********************************************************/
-const char SK_Root_Dir_entry[8];
-
-#if 0
-static struct proc_dir_entry *pSkRootDir;
-#endif
-
-
-static struct pci_device_id supported[] = {
- {PCI_VENDOR_ID_3COM, 0x1700},
- {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE},
- {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU},
- {}
-};
-
-
-/*****************************************************************************
- *
- * skge_probe - find all SK-98xx adapters
- *
- * Description:
- * This function scans the PCI bus for SK-98xx adapters. Resources for
- * each adapter are allocated and the adapter is brought into Init 1
- * state.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-#if 0
-static int __init skge_probe (void)
-#else
-int skge_probe (struct eth_device ** ret_dev)
-#endif
-{
-#if 0
- int proc_root_initialized = 0;
-#endif
- int boards_found = 0;
-#if 0
- int vendor_flag = SK_FALSE;
-#endif
- SK_AC *pAC;
- DEV_NET *pNet = NULL;
-#if 0
- struct proc_dir_entry *pProcFile;
- struct pci_dev *pdev = NULL;
- unsigned long base_address;
-#else
- u32 base_address;
-#endif
- struct SK_NET_DEVICE *dev = NULL;
-#if 0
- SK_BOOL DeviceFound = SK_FALSE;
-#endif
- SK_BOOL BootStringCount = SK_FALSE;
-#if 1
- pci_dev_t devno;
-#endif
-
- if (probed)
- return -ENODEV;
- probed++;
-
- if (!pci_present()) /* is PCI support present? */
- return -ENODEV;
-
-#if 0
- while((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev)))
-#else
- while((devno = pci_find_devices (supported, boards_found)) >= 0)
-#endif
- {
-
- dev = NULL;
- pNet = NULL;
-
-
-#if 0
- SK_PCI_ISCOMPLIANT(vendor_flag, pdev);
- if (!vendor_flag)
- continue;
-#endif
-
-/* if ((pdev->vendor != PCI_VENDOR_ID_SYSKONNECT) &&
- ((pdev->device != PCI_DEVICE_ID_SYSKONNECT_GE) ||
- (pdev->device != PCI_DEVICE_ID_SYSKONNECT_YU))){
- continue;
- }
-*/
-#if 0
- /* Configure DMA attributes. */
- if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff) &&
- pci_set_dma_mask(pdev, (u64) 0xffffffff))
- continue;
-#endif
-
-
-#if 0
- if ((dev = init_etherdev(dev, sizeof(DEV_NET))) == NULL) {
- printk(KERN_ERR "Unable to allocate etherdev "
- "structure!\n");
- break;
- }
-#else
- dev = malloc (sizeof *dev);
- memset(dev, 0, sizeof(*dev));
- dev->priv = malloc(sizeof(DEV_NET));
-#endif
-
- if (dev->priv == NULL) {
- printk(KERN_ERR "Unable to allocate adapter "
- "structure!\n");
- break;
- }
-
- pNet = dev->priv;
- pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
- if (pNet->pAC == NULL){
- kfree(dev->priv);
- printk(KERN_ERR "Unable to allocate adapter "
- "structure!\n");
- break;
- }
-
- /* Print message */
- if (!BootStringCount) {
- /* set display flag to TRUE so that */
- /* we only display this string ONCE */
- BootStringCount = SK_TRUE;
-#ifdef SK98_INFO
- printk("%s\n", BootString);
-#endif
- }
-
- memset(pNet->pAC, 0, sizeof(SK_AC));
- pAC = pNet->pAC;
-#if 0
- pAC->PciDev = pdev;
- pAC->PciDevId = pdev->device;
- pAC->dev[0] = dev;
- pAC->dev[1] = dev;
-#else
- pAC->PciDev = devno;
- ret_dev[0] = pAC->dev[0] = dev;
- ret_dev[1] = pAC->dev[1] = dev;
-#endif
- sprintf(pAC->Name, "SysKonnect SK-98xx");
- pAC->CheckQueue = SK_FALSE;
-
- pNet->Mtu = 1500;
- pNet->Up = 0;
-#if 0
- dev->irq = pdev->irq;
-
- dev->open = &SkGeOpen;
- dev->stop = &SkGeClose;
- dev->hard_start_xmit = &SkGeXmit;
- dev->get_stats = &SkGeStats;
- dev->set_multicast_list = &SkGeSetRxMode;
- dev->set_mac_address = &SkGeSetMacAddr;
- dev->do_ioctl = &SkGeIoctl;
- dev->change_mtu = &SkGeChangeMtu;
- dev->flags &= ~IFF_RUNNING;
-#endif
-
-#ifdef SK_ZEROCOPY
- if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
- /* Use only if yukon hardware */
- /* SK and ZEROCOPY - fly baby... */
- dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
- }
-#endif
-
-#if 0
- /*
- * Dummy value.
- */
- dev->base_addr = 42;
- pci_set_master(pdev);
-
- pci_set_master(pdev);
- base_address = pci_resource_start (pdev, 0);
-#else
- pci_write_config_dword(devno,
- PCI_COMMAND,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- pci_read_config_dword (devno, PCI_BASE_ADDRESS_0,
- &base_address);
-#endif
-
-#ifdef SK_BIG_ENDIAN
- /*
- * On big endian machines, we use the adapter's aibility of
- * reading the descriptors as big endian.
- */
- {
- SK_U32 our2;
- SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
- our2 |= PCI_REV_DESC;
- SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
- }
-#endif
-
- /*
- * Remap the regs into kernel space.
- */
-#if 0
- pAC->IoBase = (char*)ioremap(base_address, 0x4000);
-#else
- pAC->IoBase = (char*)pci_mem_to_phys(devno, base_address);
-#endif
-
- if (!pAC->IoBase){
- printk(KERN_ERR "%s: Unable to map I/O register, "
- "SK 98xx No. %i will be disabled.\n",
- dev->name, boards_found);
- kfree(dev);
- break;
- }
-
- pAC->Index = boards_found;
- if (SkGeBoardInit(dev, pAC)) {
- FreeResources(dev);
- kfree(dev);
- continue;
- }
-
-#if 0
- memcpy((caddr_t) &dev->dev_addr,
- (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
-#else
- memcpy((caddr_t) &dev->enetaddr,
- (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
-#endif
-
-#if 0
- /* First adapter... Create proc and print message */
- if (!DeviceFound) {
- DeviceFound = SK_TRUE;
- SK_MEMCPY(&SK_Root_Dir_entry, BootString,
- sizeof(SK_Root_Dir_entry) - 1);
-
- /*Create proc (directory)*/
- if(!proc_root_initialized) {
- pSkRootDir = create_proc_entry(SK_Root_Dir_entry,
- S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
- proc_root_initialized = 1;
- }
-
- pSkRootDir->owner = THIS_MODULE;
- }
-
-
- /* Create proc file */
- pProcFile = create_proc_entry(dev->name,
- S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
- pSkRootDir);
-
-
- pProcFile->read_proc = proc_read;
- pProcFile->write_proc = NULL;
- pProcFile->nlink = 1;
- pProcFile->size = sizeof(dev->name + 1);
- pProcFile->data = (void *)pProcFile;
-#endif
-
- pNet->PortNr = 0;
- pNet->NetNr = 0;
-
-#ifdef SK_ZEROCOPY
- if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
- /* SG and ZEROCOPY - fly baby... */
- dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
- }
-#endif
-
- boards_found++;
-
- /* More then one port found */
- if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
-#if 0
- if ((dev = init_etherdev(NULL, sizeof(DEV_NET))) == 0) {
- printk(KERN_ERR "Unable to allocate etherdev "
- "structure!\n");
- break;
- }
-#else
- dev = malloc (sizeof *dev);
- memset(dev, 0, sizeof(*dev));
- dev->priv = malloc(sizeof(DEV_NET));
-#endif
-
- pAC->dev[1] = dev;
- pNet = dev->priv;
- pNet->PortNr = 1;
- pNet->NetNr = 1;
- pNet->pAC = pAC;
- pNet->Mtu = 1500;
- pNet->Up = 0;
-
-#if 0
- dev->open = &SkGeOpen;
- dev->stop = &SkGeClose;
- dev->hard_start_xmit = &SkGeXmit;
- dev->get_stats = &SkGeStats;
- dev->set_multicast_list = &SkGeSetRxMode;
- dev->set_mac_address = &SkGeSetMacAddr;
- dev->do_ioctl = &SkGeIoctl;
- dev->change_mtu = &SkGeChangeMtu;
- dev->flags &= ~IFF_RUNNING;
-#endif
-
-#ifdef SK_ZEROCOPY
- if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
- /* SG and ZEROCOPY - fly baby... */
- dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
- }
-#endif
-
-#if 0
- pProcFile = create_proc_entry(dev->name,
- S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
- pSkRootDir);
-
-
- pProcFile->read_proc = proc_read;
- pProcFile->write_proc = NULL;
- pProcFile->nlink = 1;
- pProcFile->size = sizeof(dev->name + 1);
- pProcFile->data = (void *)pProcFile;
-#endif
-
-#if 0
- memcpy((caddr_t) &dev->dev_addr,
- (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
-#else
- memcpy((caddr_t) &dev->enetaddr,
- (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
-#endif
-
- printk("%s: %s\n", dev->name, pAC->DeviceStr);
- printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
-
- }
-
-
- /* Save the hardware revision */
- pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
- (pAC->GIni.GIPciHwRev & 0x0F);
-
- /*
- * This is bollocks, but we need to tell the net-init
- * code that it shall go for the next device.
- */
-#if 0
-#ifndef MODULE
- dev->base_addr = 0;
-#endif
-#endif
- }
-
- /*
- * If we're at this point we're going through skge_probe() for
- * the first time. Return success (0) if we've initialized 1
- * or more boards. Otherwise, return failure (-ENODEV).
- */
-
- return boards_found;
-} /* skge_probe */
-
-
-/*****************************************************************************
- *
- * FreeResources - release resources allocated for adapter
- *
- * Description:
- * This function releases the IRQ, unmaps the IO and
- * frees the desriptor ring.
- *
- * Returns: N/A
- *
- */
-static void FreeResources(struct SK_NET_DEVICE *dev)
-{
-SK_U32 AllocFlag;
-DEV_NET *pNet;
-SK_AC *pAC;
-
- if (dev->priv) {
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
- AllocFlag = pAC->AllocFlag;
-#if 0
- if (AllocFlag & SK_ALLOC_IRQ) {
- free_irq(dev->irq, dev);
- }
- if (pAC->IoBase) {
- iounmap(pAC->IoBase);
- }
-#endif
- if (pAC->pDescrMem) {
- BoardFreeMem(pAC);
- }
- }
-
-} /* FreeResources */
-
-#if 0
-MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
-MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
-MODULE_LICENSE("GPL");
-MODULE_PARM(Speed_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(Speed_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(AutoNeg_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(AutoNeg_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(DupCap_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(DupCap_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(Role_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(Role_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(PrefPort, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-MODULE_PARM(RlmtMode, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
-/* not used, just there because every driver should have them: */
-MODULE_PARM(options, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
-MODULE_PARM(debug, "i");
-#endif
-
-
-#ifdef LINK_SPEED_A
-static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED_A;
-#else
-static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef LINK_SPEED_B
-static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED_B;
-#else
-static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef AUTO_NEG_A
-static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
-#else
-static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef DUP_CAP_A
-static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
-#else
-static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef FLOW_CTRL_A
-static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
-#else
-static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef ROLE_A
-static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
-#else
-static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef AUTO_NEG_B
-static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
-#else
-static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef DUP_CAP_B
-static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
-#else
-static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef FLOW_CTRL_B
-static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
-#else
-static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef ROLE_B
-static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
-#else
-static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef PREF_PORT
-static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
-#else
-static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#ifdef RLMT_MODE
-static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
-#else
-static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
-#endif
-
-#if 0
-static int debug = 0; /* not used */
-static int options[SK_MAX_CARD_PARAM] = {0, }; /* not used */
-
-
-/*****************************************************************************
- *
- * skge_init_module - module initialization function
- *
- * Description:
- * Very simple, only call skge_probe and return approriate result.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-static int __init skge_init_module(void)
-{
- int cards;
- SkGeRootDev = NULL;
-
- /* just to avoid warnings ... */
- debug = 0;
- options[0] = 0;
-
- cards = skge_probe();
- if (cards == 0) {
- printk("sk98lin: No adapter found.\n");
- }
- return cards ? 0 : -ENODEV;
-} /* skge_init_module */
-
-
-/*****************************************************************************
- *
- * skge_cleanup_module - module unload function
- *
- * Description:
- * Disable adapter if it is still running, free resources,
- * free device struct.
- *
- * Returns: N/A
- */
-static void __exit skge_cleanup_module(void)
-{
-DEV_NET *pNet;
-SK_AC *pAC;
-struct SK_NET_DEVICE *next;
-unsigned long Flags;
-SK_EVPARA EvPara;
-
- while (SkGeRootDev) {
- pNet = (DEV_NET*) SkGeRootDev->priv;
- pAC = pNet->pAC;
- next = pAC->Next;
-
- netif_stop_queue(SkGeRootDev);
- SkGeYellowLED(pAC, pAC->IoBase, 0);
-
- if(pAC->BoardLevel == 2) {
- /* board is still alive */
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- EvPara.Para32[0] = 0;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- EvPara.Para32[0] = 1;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- SkEventDispatcher(pAC, pAC->IoBase);
- /* disable interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, 0);
- SkGeDeInit(pAC, pAC->IoBase);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- pAC->BoardLevel = 0;
- /* We do NOT check here, if IRQ was pending, of course*/
- }
-
- if(pAC->BoardLevel == 1) {
- /* board is still alive */
- SkGeDeInit(pAC, pAC->IoBase);
- pAC->BoardLevel = 0;
- }
-
- if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
- unregister_netdev(pAC->dev[1]);
- kfree(pAC->dev[1]);
- }
-
- FreeResources(SkGeRootDev);
-
- SkGeRootDev->get_stats = NULL;
- /*
- * otherwise unregister_netdev calls get_stats with
- * invalid IO ... :-(
- */
- unregister_netdev(SkGeRootDev);
- kfree(SkGeRootDev);
- kfree(pAC);
- SkGeRootDev = next;
- }
-
- /* clear proc-dir */
- remove_proc_entry(pSkRootDir->name, proc_net);
-
-} /* skge_cleanup_module */
-
-module_init(skge_init_module);
-module_exit(skge_cleanup_module);
-#endif
-
-
-/*****************************************************************************
- *
- * SkGeBoardInit - do level 0 and 1 initialization
- *
- * Description:
- * This function prepares the board hardware for running. The desriptor
- * ring is set up, the IRQ is allocated and the configuration settings
- * are examined.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
-{
-short i;
-unsigned long Flags;
-char *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
-char *VerStr = VER_STRING;
-#if 0
-int Ret; /* return code of request_irq */
-#endif
-SK_BOOL DualNet;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
- for (i=0; i<SK_MAX_MACS; i++) {
- pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
- pAC->TxPort[i][0].PortIndex = i;
- pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
- pAC->RxPort[i].PortIndex = i;
- }
-
- /* Initialize the mutexes */
- for (i=0; i<SK_MAX_MACS; i++) {
- spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
- spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
- }
- spin_lock_init(&pAC->SlowPathLock);
-
- /* level 0 init common modules here */
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- /* Does a RESET on board ...*/
- if (SkGeInit(pAC, pAC->IoBase, 0) != 0) {
- printk("HWInit (0) failed.\n");
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- return(-EAGAIN);
- }
- SkI2cInit( pAC, pAC->IoBase, 0);
- SkEventInit(pAC, pAC->IoBase, 0);
- SkPnmiInit( pAC, pAC->IoBase, 0);
- SkAddrInit( pAC, pAC->IoBase, 0);
- SkRlmtInit( pAC, pAC->IoBase, 0);
- SkTimerInit(pAC, pAC->IoBase, 0);
-
- pAC->BoardLevel = 0;
- pAC->RxBufSize = ETH_BUF_SIZE;
-
- SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
- SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
-
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- /* level 1 init common modules here (HW init) */
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
- printk("HWInit (1) failed.\n");
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- return(-EAGAIN);
- }
- SkI2cInit( pAC, pAC->IoBase, 1);
- SkEventInit(pAC, pAC->IoBase, 1);
- SkPnmiInit( pAC, pAC->IoBase, 1);
- SkAddrInit( pAC, pAC->IoBase, 1);
- SkRlmtInit( pAC, pAC->IoBase, 1);
- SkTimerInit(pAC, pAC->IoBase, 1);
-
- GetConfiguration(pAC);
- if (pAC->RlmtNets == 2) {
- pAC->GIni.GIPortUsage = SK_MUL_LINK;
- }
-
- pAC->BoardLevel = 1;
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
-#if 0
- if (pAC->GIni.GIMacsFound == 2) {
- Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
- } else if (pAC->GIni.GIMacsFound == 1) {
- Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
- pAC->Name, dev);
- } else {
- printk(KERN_WARNING "%s: Illegal number of ports: %d\n",
- dev->name, pAC->GIni.GIMacsFound);
- return -EAGAIN;
- }
-
- if (Ret) {
- printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
- dev->name, dev->irq);
- return -EAGAIN;
- }
-#endif
- pAC->AllocFlag |= SK_ALLOC_IRQ;
-
- /* Alloc memory for this board (Mem for RxD/TxD) : */
- if(!BoardAllocMem(pAC)) {
- printk("No memory for descriptor rings.\n");
- return(-EAGAIN);
- }
-
- SkCsSetReceiveFlags(pAC,
- SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
- &pAC->CsOfs1, &pAC->CsOfs2, 0);
- pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
-
- BoardInitMem(pAC);
-#if 0
- SetQueueSizes(pAC);
-#else
- /* tschilling: New common function with minimum size check. */
- DualNet = SK_FALSE;
- if (pAC->RlmtNets == 2) {
- DualNet = SK_TRUE;
- }
-
- if (SkGeInitAssignRamToQueues(
- pAC,
- pAC->ActivePort,
- DualNet)) {
- BoardFreeMem(pAC);
- printk("SkGeInitAssignRamToQueues failed.\n");
- return(-EAGAIN);
- }
-#endif
-
- /* Print adapter specific string from vpd */
- ProductStr(pAC);
-#ifdef SK98_INFO
- printk("%s: %s\n", dev->name, pAC->DeviceStr);
-
- /* Print configuration settings */
- printk(" PrefPort:%c RlmtMode:%s\n",
- 'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
- (pAC->RlmtMode==0) ? "Check Link State" :
- ((pAC->RlmtMode==1) ? "Check Link State" :
- ((pAC->RlmtMode==3) ? "Check Local Port" :
- ((pAC->RlmtMode==7) ? "Check Segmentation" :
- ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
-#endif
-
- SkGeYellowLED(pAC, pAC->IoBase, 1);
-
- /*
- * Register the device here
- */
- pAC->Next = SkGeRootDev;
- SkGeRootDev = dev;
-
- return (0);
-} /* SkGeBoardInit */
-
-
-/*****************************************************************************
- *
- * BoardAllocMem - allocate the memory for the descriptor rings
- *
- * Description:
- * This function allocates the memory for all descriptor rings.
- * Each ring is aligned for the desriptor alignment and no ring
- * has a 4 GByte boundary in it (because the upper 32 bit must
- * be constant for all descriptiors in one rings).
- *
- * Returns:
- * SK_TRUE, if all memory could be allocated
- * SK_FALSE, if not
- */
-static SK_BOOL BoardAllocMem(
-SK_AC *pAC)
-{
-caddr_t pDescrMem; /* pointer to descriptor memory area */
-size_t AllocLength; /* length of complete descriptor area */
-int i; /* loop counter */
-unsigned long BusAddr;
-
-
- /* rings plus one for alignment (do not cross 4 GB boundary) */
- /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
-#if (BITS_PER_LONG == 32)
- AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
-#else
- AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
- + RX_RING_SIZE + 8;
-#endif
-
- pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
- &pAC->pDescrMemDMA);
-
- if (pDescrMem == NULL) {
- return (SK_FALSE);
- }
- pAC->pDescrMem = pDescrMem;
- BusAddr = (unsigned long) pAC->pDescrMemDMA;
-
- /* Descriptors need 8 byte alignment, and this is ensured
- * by pci_alloc_consistent.
- */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
- i, (unsigned long) pDescrMem,
- BusAddr));
- pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
- pAC->TxPort[i][0].VTxDescrRing = BusAddr;
- pDescrMem += TX_RING_SIZE;
- BusAddr += TX_RING_SIZE;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("RX%d: pDescrMem: %lX, PhysDescrMem: %lX\n",
- i, (unsigned long) pDescrMem,
- (unsigned long)BusAddr));
- pAC->RxPort[i].pRxDescrRing = pDescrMem;
- pAC->RxPort[i].VRxDescrRing = BusAddr;
- pDescrMem += RX_RING_SIZE;
- BusAddr += RX_RING_SIZE;
- } /* for */
-
- return (SK_TRUE);
-} /* BoardAllocMem */
-
-
-/****************************************************************************
- *
- * BoardFreeMem - reverse of BoardAllocMem
- *
- * Description:
- * Free all memory allocated in BoardAllocMem: adapter context,
- * descriptor rings, locks.
- *
- * Returns: N/A
- */
-static void BoardFreeMem(
-SK_AC *pAC)
-{
-size_t AllocLength; /* length of complete descriptor area */
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("BoardFreeMem\n"));
-#if (BITS_PER_LONG == 32)
- AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
-#else
- AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
- + RX_RING_SIZE + 8;
-#endif
-
- pci_free_consistent(pAC->PciDev, AllocLength,
- pAC->pDescrMem, pAC->pDescrMemDMA);
- pAC->pDescrMem = NULL;
-} /* BoardFreeMem */
-
-
-/*****************************************************************************
- *
- * BoardInitMem - initiate the descriptor rings
- *
- * Description:
- * This function sets the descriptor rings up in memory.
- * The adapter is initialized with the descriptor start addresses.
- *
- * Returns: N/A
- */
-static void BoardInitMem(
-SK_AC *pAC) /* pointer to adapter context */
-{
-int i; /* loop counter */
-int RxDescrSize; /* the size of a rx descriptor rounded up to alignment*/
-int TxDescrSize; /* the size of a tx descriptor rounded up to alignment*/
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("BoardInitMem\n"));
-
- RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
- pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
- TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
- pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
-
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- TXD **txd_head, **txd_tail, **txd_prev;
-
- txd_head = &pAC->TxPort[i][0].pTxdRingHead;
- txd_tail = &pAC->TxPort[i][0].pTxdRingTail;
- txd_prev = &pAC->TxPort[i][0].pTxdRingPrev;
-
- SetupRing(
- pAC,
- pAC->TxPort[i][0].pTxDescrRing,
- pAC->TxPort[i][0].VTxDescrRing,
- (RXD**)txd_head,
- (RXD**)txd_tail,
- (RXD**)txd_prev,
- &pAC->TxPort[i][0].TxdRingFree,
- SK_TRUE);
- SetupRing(
- pAC,
- pAC->RxPort[i].pRxDescrRing,
- pAC->RxPort[i].VRxDescrRing,
- &pAC->RxPort[i].pRxdRingHead,
- &pAC->RxPort[i].pRxdRingTail,
- &pAC->RxPort[i].pRxdRingPrev,
- &pAC->RxPort[i].RxdRingFree,
- SK_FALSE);
- }
-} /* BoardInitMem */
-
-
-/*****************************************************************************
- *
- * SetupRing - create one descriptor ring
- *
- * Description:
- * This function creates one descriptor ring in the given memory area.
- * The head, tail and number of free descriptors in the ring are set.
- *
- * Returns:
- * none
- */
-static void SetupRing(
-SK_AC *pAC,
-void *pMemArea, /* a pointer to the memory area for the ring */
-uintptr_t VMemArea, /* the virtual bus address of the memory area */
-RXD **ppRingHead, /* address where the head should be written */
-RXD **ppRingTail, /* address where the tail should be written */
-RXD **ppRingPrev, /* address where the tail should be written */
-int *pRingFree, /* address where the # of free descr. goes */
-SK_BOOL IsTx) /* flag: is this a tx ring */
-{
-int i; /* loop counter */
-int DescrSize; /* the size of a descriptor rounded up to alignment*/
-int DescrNum; /* number of descriptors per ring */
-RXD *pDescr; /* pointer to a descriptor (receive or transmit) */
-RXD *pNextDescr; /* pointer to the next descriptor */
-RXD *pPrevDescr; /* pointer to the previous descriptor */
-uintptr_t VNextDescr; /* the virtual bus address of the next descriptor */
-
- if (IsTx == SK_TRUE) {
- DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
- DESCR_ALIGN;
- DescrNum = TX_RING_SIZE / DescrSize;
- } else {
- DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
- DESCR_ALIGN;
- DescrNum = RX_RING_SIZE / DescrSize;
- }
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("Descriptor size: %d Descriptor Number: %d\n",
- DescrSize,DescrNum));
-
- pDescr = (RXD*) pMemArea;
- pPrevDescr = NULL;
- pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
- VNextDescr = VMemArea + DescrSize;
- for(i=0; i<DescrNum; i++) {
- /* set the pointers right */
- pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
- pDescr->pNextRxd = pNextDescr;
- pDescr->TcpSumStarts = pAC->CsOfs;
-
- /* advance one step */
- pPrevDescr = pDescr;
- pDescr = pNextDescr;
- pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
- VNextDescr += DescrSize;
- }
- pPrevDescr->pNextRxd = (RXD*) pMemArea;
- pPrevDescr->VNextRxd = VMemArea;
- pDescr = (RXD*) pMemArea;
- *ppRingHead = (RXD*) pMemArea;
- *ppRingTail = *ppRingHead;
- *ppRingPrev = pPrevDescr;
- *pRingFree = DescrNum;
-} /* SetupRing */
-
-
-/*****************************************************************************
- *
- * PortReInitBmu - re-initiate the descriptor rings for one port
- *
- * Description:
- * This function reinitializes the descriptor rings of one port
- * in memory. The port must be stopped before.
- * The HW is initialized with the descriptor start addresses.
- *
- * Returns:
- * none
- */
-static void PortReInitBmu(
-SK_AC *pAC, /* pointer to adapter context */
-int PortIndex) /* index of the port for which to re-init */
-{
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("PortReInitBmu "));
-
- /* set address of first descriptor of ring in BMU */
- SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
- TX_Q_CUR_DESCR_LOW,
- (uint32_t)(((caddr_t)
- (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
- pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
- pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
- 0xFFFFFFFF));
- SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
- TX_Q_DESCR_HIGH,
- (uint32_t)(((caddr_t)
- (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
- pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
- pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
- SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CUR_DESCR_LOW,
- (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
- pAC->RxPort[PortIndex].pRxDescrRing +
- pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
- SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_DESCR_HIGH,
- (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
- pAC->RxPort[PortIndex].pRxDescrRing +
- pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
-} /* PortReInitBmu */
-
-
-/****************************************************************************
- *
- * SkGeIsr - handle adapter interrupts
- *
- * Description:
- * The interrupt routine is called when the network adapter
- * generates an interrupt. It may also be called if another device
- * shares this interrupt vector with the driver.
- *
- * Returns: N/A
- *
- */
-#if 0
-static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
-#else
-void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
-#endif
-{
-struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
-DEV_NET *pNet;
-SK_AC *pAC;
-SK_U32 IntSrc; /* interrupts source register contents */
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- /*
- * Check and process if its our interrupt
- */
- SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
- if (IntSrc == 0) {
- return;
- }
-
- while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
-#if 0 /* software irq currently not used */
- if (IntSrc & IRQ_SW) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("Software IRQ\n"));
- }
-#endif
- if (IntSrc & IRQ_EOF_RX1) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF RX1 IRQ\n"));
- ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
- SK_PNMI_CNT_RX_INTR(pAC, 0);
- }
- if (IntSrc & IRQ_EOF_RX2) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF RX2 IRQ\n"));
- ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
- SK_PNMI_CNT_RX_INTR(pAC, 1);
- }
-#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF AS TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC, 0);
- spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
- FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
- }
- if (IntSrc & IRQ_EOF_AS_TX2) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF AS TX2 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC, 1);
- spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
- FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
- spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
- }
-#if 0 /* only if sync. queues used */
- if (IntSrc & IRQ_EOF_SY_TX1) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF SY TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC, 1);
- spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
- FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
- ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
- }
- if (IntSrc & IRQ_EOF_SY_TX2) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF SY TX2 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC, 1);
- spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
- FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
- spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
- ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
- }
-#endif
-#endif
-
- /* do all IO at once */
- if (IntSrc & IRQ_EOF_RX1)
- ClearAndStartRx(pAC, 0);
- if (IntSrc & IRQ_EOF_RX2)
- ClearAndStartRx(pAC, 1);
-#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1)
- ClearTxIrq(pAC, 0, TX_PRIO_LOW);
- if (IntSrc & IRQ_EOF_AS_TX2)
- ClearTxIrq(pAC, 1, TX_PRIO_LOW);
-#endif
- SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
- } /* while (IntSrc & IRQ_MASK != 0) */
-
- if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
- ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
- pAC->CheckQueue = SK_FALSE;
- spin_lock(&pAC->SlowPathLock);
- if (IntSrc & SPECIAL_IRQS)
- SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
-
- SkEventDispatcher(pAC, pAC->IoBase);
- spin_unlock(&pAC->SlowPathLock);
- }
- /*
- * do it all again is case we cleared an interrupt that
- * came in after handling the ring (OUTs may be delayed
- * in hardware buffers, but are through after IN)
- */
-
- ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
- ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
-
- if (pAC->CheckQueue) {
- pAC->CheckQueue = SK_FALSE;
- spin_lock(&pAC->SlowPathLock);
- SkEventDispatcher(pAC, pAC->IoBase);
- spin_unlock(&pAC->SlowPathLock);
- }
-
-
- /* IRQ is processed - Enable IRQs again*/
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
-
- return;
-} /* SkGeIsr */
-
-
-/****************************************************************************
- *
- * SkGeIsrOnePort - handle adapter interrupts for single port adapter
- *
- * Description:
- * The interrupt routine is called when the network adapter
- * generates an interrupt. It may also be called if another device
- * shares this interrupt vector with the driver.
- * This is the same as above, but handles only one port.
- *
- * Returns: N/A
- *
- */
-#if 0
-static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
-#else
-void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
-#endif
-{
-struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
-DEV_NET *pNet;
-SK_AC *pAC;
-SK_U32 IntSrc; /* interrupts source register contents */
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- /*
- * Check and process if its our interrupt
- */
- SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
- if (IntSrc == 0) {
- return;
- }
-
- while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
-#if 0 /* software irq currently not used */
- if (IntSrc & IRQ_SW) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("Software IRQ\n"));
- }
-#endif
- if (IntSrc & IRQ_EOF_RX1) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF RX1 IRQ\n"));
- ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
- SK_PNMI_CNT_RX_INTR(pAC, 0);
- }
-#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF AS TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC, 0);
- spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
- FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
- }
-#if 0 /* only if sync. queues used */
- if (IntSrc & IRQ_EOF_SY_TX1) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_INT_SRC,
- ("EOF SY TX1 IRQ\n"));
- SK_PNMI_CNT_TX_INTR(pAC, 0);
- spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
- FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
- spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
- ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
- }
-#endif
-#endif
-
- /* do all IO at once */
- if (IntSrc & IRQ_EOF_RX1)
- ClearAndStartRx(pAC, 0);
-#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
- if (IntSrc & IRQ_EOF_AS_TX1)
- ClearTxIrq(pAC, 0, TX_PRIO_LOW);
-#endif
- SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
- } /* while (IntSrc & IRQ_MASK != 0) */
-
- if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
- ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
- pAC->CheckQueue = SK_FALSE;
- spin_lock(&pAC->SlowPathLock);
- if (IntSrc & SPECIAL_IRQS)
- SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
-
- SkEventDispatcher(pAC, pAC->IoBase);
- spin_unlock(&pAC->SlowPathLock);
- }
- /*
- * do it all again is case we cleared an interrupt that
- * came in after handling the ring (OUTs may be delayed
- * in hardware buffers, but are through after IN)
- */
- ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
-
- /* IRQ is processed - Enable IRQs again*/
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
-
- return;
-} /* SkGeIsrOnePort */
-
-
-/****************************************************************************
- *
- * SkGeOpen - handle start of initialized adapter
- *
- * Description:
- * This function starts the initialized adapter.
- * The board level variable is set and the adapter is
- * brought to full functionality.
- * The device flags are set for operation.
- * Do all necessary level 2 initialization, enable interrupts and
- * give start command to RLMT.
- *
- * Returns:
- * 0 on success
- * != 0 on error
- */
-#if 0
-static int SkGeOpen(
-#else
-int SkGeOpen(
-#endif
-struct SK_NET_DEVICE *dev)
-{
- DEV_NET *pNet;
- SK_AC *pAC;
- unsigned long Flags; /* for spin lock */
- int i;
- SK_EVPARA EvPara; /* an event parameter union */
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
-
- if (pAC->BoardLevel == 0) {
- /* level 1 init common modules here */
- if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
- printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
- return (-1);
- }
- SkI2cInit (pAC, pAC->IoBase, 1);
- SkEventInit (pAC, pAC->IoBase, 1);
- SkPnmiInit (pAC, pAC->IoBase, 1);
- SkAddrInit (pAC, pAC->IoBase, 1);
- SkRlmtInit (pAC, pAC->IoBase, 1);
- SkTimerInit (pAC, pAC->IoBase, 1);
- pAC->BoardLevel = 1;
- }
-
- if (pAC->BoardLevel != 2) {
- /* tschilling: Level 2 init modules here, check return value. */
- if (SkGeInit(pAC, pAC->IoBase, 2) != 0) {
- printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
- return (-1);
- }
- SkI2cInit (pAC, pAC->IoBase, 2);
- SkEventInit (pAC, pAC->IoBase, 2);
- SkPnmiInit (pAC, pAC->IoBase, 2);
- SkAddrInit (pAC, pAC->IoBase, 2);
- SkRlmtInit (pAC, pAC->IoBase, 2);
- SkTimerInit (pAC, pAC->IoBase, 2);
- pAC->BoardLevel = 2;
- }
-
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- /* Enable transmit descriptor polling. */
- SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
- FillRxRing(pAC, &pAC->RxPort[i]);
- }
- SkGeYellowLED(pAC, pAC->IoBase, 1);
-
-#ifdef USE_INT_MOD
-/* moderate only TX complete interrupts (these are not time critical) */
-#define IRQ_MOD_MASK (IRQ_EOF_AS_TX1 | IRQ_EOF_AS_TX2)
- {
- unsigned long ModBase;
- ModBase = 53125000 / INTS_PER_SEC;
- SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
- SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
- SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
- }
-#endif
-
- /* enable Interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
- SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
-
- if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
- EvPara.Para32[0] = pAC->RlmtNets;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
- EvPara);
- EvPara.Para32[0] = pAC->RlmtMode;
- EvPara.Para32[1] = 0;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
- EvPara);
- }
-
- EvPara.Para32[0] = pNet->NetNr;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
- SkEventDispatcher(pAC, pAC->IoBase);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- pAC->MaxPorts++;
- pNet->Up = 1;
-
- MOD_INC_USE_COUNT;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeOpen suceeded\n"));
-
- return (0);
-} /* SkGeOpen */
-
-
-/****************************************************************************
- *
- * SkGeClose - Stop initialized adapter
- *
- * Description:
- * Close initialized adapter.
- *
- * Returns:
- * 0 - on success
- * error code - on error
- */
-#if 0
-static int SkGeClose(
-#else
-int SkGeClose(
-#endif
-struct SK_NET_DEVICE *dev)
-{
- DEV_NET *pNet;
- SK_AC *pAC;
-
- unsigned long Flags; /* for spin lock */
- int i;
- int PortIdx;
- SK_EVPARA EvPara;
-
- netif_stop_queue(dev);
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- if (pAC->RlmtNets == 1)
- PortIdx = pAC->ActivePort;
- else
- PortIdx = pNet->NetNr;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
-
- /*
- * Clear multicast table, promiscuous mode ....
- */
- SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
- SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
- SK_PROM_MODE_NONE);
-
- if (pAC->MaxPorts == 1) {
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- /* disable interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, 0);
- EvPara.Para32[0] = pNet->NetNr;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- SkEventDispatcher(pAC, pAC->IoBase);
- SK_OUT32(pAC->IoBase, B0_IMSK, 0);
- /* stop the hardware */
- SkGeDeInit(pAC, pAC->IoBase);
- pAC->BoardLevel = 0;
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- } else {
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- EvPara.Para32[0] = pNet->NetNr;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- SkEventDispatcher(pAC, pAC->IoBase);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- /* Stop port */
- spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
- [TX_PRIO_LOW].TxDesRingLock, Flags);
- SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
- SK_STOP_ALL, SK_HARD_RST);
- spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
- [TX_PRIO_LOW].TxDesRingLock, Flags);
- }
-
- if (pAC->RlmtNets == 1) {
- /* clear all descriptor rings */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
- ClearRxRing(pAC, &pAC->RxPort[i]);
- ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
- }
- } else {
- /* clear port descriptor rings */
- ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
- ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
- ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
- }
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeClose: done "));
-
- pAC->MaxPorts--;
- pNet->Up = 0;
- MOD_DEC_USE_COUNT;
-
- return (0);
-} /* SkGeClose */
-
-
-/*****************************************************************************
- *
- * SkGeXmit - Linux frame transmit function
- *
- * Description:
- * The system calls this function to send frames onto the wire.
- * It puts the frame in the tx descriptor ring. If the ring is
- * full then, the 'tbusy' flag is set.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- * WARNING: returning 1 in 'tbusy' case caused system crashes (double
- * allocated skb's) !!!
- */
-#if 0
-static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
-#else
-int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
-#endif
-{
-DEV_NET *pNet;
-SK_AC *pAC;
-int Rc; /* return code of XmitFrame */
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
-#if 0
- if ((!skb_shinfo(skb)->nr_frags) ||
-#else
- if (1 ||
-#endif
- (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
- /* Don't activate scatter-gather and hardware checksum */
-
- if (pAC->RlmtNets == 2)
- Rc = XmitFrame(
- pAC,
- &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
- skb);
- else
- Rc = XmitFrame(
- pAC,
- &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
- skb);
- } else {
-#if 0
- /* scatter-gather and hardware TCP checksumming anabled*/
- if (pAC->RlmtNets == 2)
- Rc = XmitFrameSG(
- pAC,
- &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
- skb);
- else
- Rc = XmitFrameSG(
- pAC,
- &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
- skb);
-#endif
- }
-
- /* Transmitter out of resources? */
- if (Rc <= 0) {
- netif_stop_queue(dev);
- }
-
- /* If not taken, give buffer ownership back to the
- * queueing layer.
- */
- if (Rc < 0)
- return (1);
-
-#if 0
- dev->trans_start = jiffies;
-#endif
- return (0);
-} /* SkGeXmit */
-
-
-/*****************************************************************************
- *
- * XmitFrame - fill one socket buffer into the transmit ring
- *
- * Description:
- * This function puts a message into the transmit descriptor ring
- * if there is a descriptors left.
- * Linux skb's consist of only one continuous buffer.
- * The first step locks the ring. It is held locked
- * all time to avoid problems with SWITCH_../PORT_RESET.
- * Then the descriptoris allocated.
- * The second part is linking the buffer to the descriptor.
- * At the very last, the Control field of the descriptor
- * is made valid for the BMU and a start TX command is given
- * if necessary.
- *
- * Returns:
- * > 0 - on succes: the number of bytes in the message
- * = 0 - on resource shortage: this frame sent or dropped, now
- * the ring is full ( -> set tbusy)
- * < 0 - on failure: other problems ( -> return failure to upper layers)
- */
-static int XmitFrame(
-SK_AC *pAC, /* pointer to adapter context */
-TX_PORT *pTxPort, /* pointer to struct of port to send to */
-struct sk_buff *pMessage) /* pointer to send-message */
-{
-TXD *pTxd; /* the rxd to fill */
-unsigned long Flags;
-SK_U64 PhysAddr;
-int BytesSend;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("X"));
-
- spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
-#ifndef USE_TX_COMPLETE
- FreeTxDescriptors(pAC, pTxPort);
-#endif
- if (pTxPort->TxdRingFree == 0) {
- /* no enough free descriptors in ring at the moment */
- FreeTxDescriptors(pAC, pTxPort);
- if (pTxPort->TxdRingFree == 0) {
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
- SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_TX_PROGRESS,
- ("XmitFrame failed\n"));
- /* this message can not be sent now */
- /* Because tbusy seems to be set, the message should not be freed here */
- /* It will be used by the scheduler of the ethernet handler */
- return (-1);
- }
- }
- /* advance head counter behind descriptor needed for this frame */
- pTxd = pTxPort->pTxdRingHead;
- pTxPort->pTxdRingHead = pTxd->pNextTxd;
- pTxPort->TxdRingFree--;
- /* the needed descriptor is reserved now */
-
- /*
- * everything allocated ok, so add buffer to descriptor
- */
-
-#ifdef SK_DUMP_TX
- DumpMsg(pMessage, "XmitFrame");
-#endif
-
- /* set up descriptor and CONTROL dword */
-#if 0
- PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
- virt_to_page(pMessage->data),
- ((unsigned long) pMessage->data &
- ~PAGE_MASK),
- pMessage->len,
- PCI_DMA_TODEVICE);
-#else
- PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32) pMessage->data);
-#endif
- pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
- pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
- pTxd->pMBuf = pMessage;
- pTxd->TBControl = TX_CTRL_OWN_BMU | TX_CTRL_STF |
- TX_CTRL_CHECK_DEFAULT | TX_CTRL_SOFTWARE |
-#ifdef USE_TX_COMPLETE
- TX_CTRL_EOF | TX_CTRL_EOF_IRQ | pMessage->len;
-#else
- TX_CTRL_EOF | pMessage->len;
-#endif
-
- if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
- /* previous descriptor already done, so give tx start cmd */
- /* StartTx(pAC, pTxPort->HwAddr); */
- SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
- }
- pTxPort->pTxdRingPrev = pTxd;
-
-
- BytesSend = pMessage->len;
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
- /* after releasing the lock, the skb may be immidiately freed */
- if (pTxPort->TxdRingFree != 0)
- return (BytesSend);
- else
- return (0);
-
-} /* XmitFrame */
-
-/*****************************************************************************
- *
- * XmitFrameSG - fill one socket buffer into the transmit ring
- * (use SG and TCP/UDP hardware checksumming)
- *
- * Description:
- * This function puts a message into the transmit descriptor ring
- * if there is a descriptors left.
- *
- * Returns:
- * > 0 - on succes: the number of bytes in the message
- * = 0 - on resource shortage: this frame sent or dropped, now
- * the ring is full ( -> set tbusy)
- * < 0 - on failure: other problems ( -> return failure to upper layers)
- */
-#if 0
-static int XmitFrameSG(
-SK_AC *pAC, /* pointer to adapter context */
-TX_PORT *pTxPort, /* pointer to struct of port to send to */
-struct sk_buff *pMessage) /* pointer to send-message */
-{
-
- int i;
- int BytesSend;
- int hlength;
- int protocol;
- skb_frag_t *sk_frag;
- TXD *pTxd;
- TXD *pTxdFst;
- TXD *pTxdLst;
- SK_U64 PhysAddr;
- unsigned long Flags;
-
- spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
-#ifndef USE_TX_COMPLETE
- FreeTxDescriptors(pAC, pTxPort);
-#endif
- if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
- FreeTxDescriptors(pAC, pTxPort);
- if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
- SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_TX_PROGRESS,
- ("XmitFrameSG failed - Ring full\n"));
- /* this message can not be sent now */
- return(-1);
- }
- }
-
-
- pTxd = pTxPort->pTxdRingHead;
- pTxdFst = pTxd;
- pTxdLst = pTxd;
- BytesSend = 0;
- protocol = 0;
-
- /* map first fragment (header) */
- PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
- virt_to_page(pMessage->data),
- ((unsigned long) pMessage->data & ~PAGE_MASK),
- skb_headlen(pMessage),
- PCI_DMA_TODEVICE);
-
- pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
- pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
-
- /* HW checksum? */
- if (pMessage->ip_summed == CHECKSUM_HW) {
- pTxd->TBControl = TX_CTRL_STF |
- TX_CTRL_ST_FWD |
- skb_headlen(pMessage);
-
- /* We have to use the opcode for tcp here because the opcode for
- udp is not working in the hardware yet (revision 2.0)*/
- protocol = ((SK_U8)pMessage->data[23] & 0xf);
- if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
- pTxd->TBControl |= BMU_UDP_CHECK;
- else
- pTxd->TBControl |= BMU_TCP_CHECK ;
-
- hlength = ((SK_U8)pMessage->data[14] & 0xf) * 4;
- pTxd->TcpSumOfs = 0; /* PH-Checksum already claculated */
- pTxd->TcpSumSt = 14+hlength+16;
- pTxd->TcpSumWr = 14+hlength;
-
- } else {
- pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
- TX_CTRL_SOFTWARE |
- TX_CTRL_STF |
- skb_headlen(pMessage);
- }
-
- pTxd = pTxd->pNextTxd;
- pTxPort->TxdRingFree--;
- BytesSend += skb_headlen(pMessage);
-
-
- /* Map SG fragments */
- for (i = 0; i < skb_shinfo(pMessage)->nr_frags; i++) {
- sk_frag = &skb_shinfo(pMessage)->frags[i];
-
- /* we already have the proper value in entry */
- PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
- sk_frag->page,
- sk_frag->page_offset,
- sk_frag->size,
- PCI_DMA_TODEVICE);
-
- pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
- pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
- pTxd->pMBuf = pMessage;
-
- /* HW checksum */
- if (pMessage->ip_summed == CHECKSUM_HW) {
- pTxd->TBControl = TX_CTRL_OWN_BMU |
- TX_CTRL_SOFTWARE |
- TX_CTRL_ST_FWD;
-
- /* We have to use the opcode for tcp here because the opcode for
- udp is not working in the hardware yet (revision 2.0)*/
- if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
- pTxd->TBControl |= BMU_UDP_CHECK ;
- else
- pTxd->TBControl |= BMU_TCP_CHECK ;
-
- } else {
- pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
- TX_CTRL_SOFTWARE |
- TX_CTRL_OWN_BMU;
- }
-
- /* Last fragment */
- if( (i+1) == skb_shinfo(pMessage)->nr_frags ) {
-#ifdef USE_TX_COMPLETE
- pTxd->TBControl |= TX_CTRL_EOF |
- TX_CTRL_EOF_IRQ |
- sk_frag->size;
-#else
- pTxd->TBControl |= TX_CTRL_EOF |
- sk_frag->size;
-#endif
- pTxdFst->TBControl |= TX_CTRL_OWN_BMU |
- TX_CTRL_SOFTWARE;
-
- } else {
- pTxd->TBControl |= sk_frag->size;
- }
- pTxdLst = pTxd;
- pTxd = pTxd->pNextTxd;
- pTxPort->TxdRingFree--;
- BytesSend += sk_frag->size;
- }
-
- if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
- /* previous descriptor already done, so give tx start cmd */
- /* StartTx(pAC, pTxPort->HwAddr); */
- SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
- }
-
- pTxPort->pTxdRingPrev = pTxdLst;
- pTxPort->pTxdRingHead = pTxd;
-
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
-
- if (pTxPort->TxdRingFree > 0)
- return (BytesSend);
- else
- return (0);
-}
-#endif
-
-
-void dump_frag( SK_U8 *data, int length)
-{
- int i;
-
- printk("Length: %d\n", length);
- for( i=0; i < length; i++ ) {
- printk(" %02x", (SK_U8)*(data + i) );
- if( !((i+1) % 20) )
- printk("\n");
- }
- printk("\n\n");
-
-}
-
-
-/*****************************************************************************
- *
- * FreeTxDescriptors - release descriptors from the descriptor ring
- *
- * Description:
- * This function releases descriptors from a transmit ring if they
- * have been sent by the BMU.
- * If a descriptors is sent, it can be freed and the message can
- * be freed, too.
- * The SOFTWARE controllable bit is used to prevent running around a
- * completely free ring for ever. If this bit is no set in the
- * frame (by XmitFrame), this frame has never been sent or is
- * already freed.
- * The Tx descriptor ring lock must be held while calling this function !!!
- *
- * Returns:
- * none
- */
-static void FreeTxDescriptors(
-SK_AC *pAC, /* pointer to the adapter context */
-TX_PORT *pTxPort) /* pointer to destination port structure */
-{
-TXD *pTxd; /* pointer to the checked descriptor */
-TXD *pNewTail; /* pointer to 'end' of the ring */
-SK_U32 Control; /* TBControl field of descriptor */
-SK_U64 PhysAddr; /* address of DMA mapping */
-
- pNewTail = pTxPort->pTxdRingTail;
- pTxd = pNewTail;
- /*
- * loop forever; exits if TX_CTRL_SOFTWARE bit not set in start frame
- * or TX_CTRL_OWN_BMU bit set in any frame
- */
- while (1) {
- Control = pTxd->TBControl;
- if ((Control & TX_CTRL_SOFTWARE) == 0) {
- /*
- * software controllable bit is set in first
- * fragment when given to BMU. Not set means that
- * this fragment was never sent or is already
- * freed ( -> ring completely free now).
- */
- pTxPort->pTxdRingTail = pTxd;
- netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
- return;
- }
- if (Control & TX_CTRL_OWN_BMU) {
- pTxPort->pTxdRingTail = pTxd;
- if (pTxPort->TxdRingFree > 0) {
- netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
- }
- return;
- }
-
- /* release the DMA mapping */
- PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
- PhysAddr |= (SK_U64) pTxd->VDataLow;
- pci_unmap_page(pAC->PciDev, PhysAddr,
- pTxd->pMBuf->len,
- PCI_DMA_TODEVICE);
-
- if (Control & TX_CTRL_EOF)
- DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
-
- pTxPort->TxdRingFree++;
- pTxd->TBControl &= ~TX_CTRL_SOFTWARE;
- pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
- } /* while(forever) */
-} /* FreeTxDescriptors */
-
-/*****************************************************************************
- *
- * FillRxRing - fill the receive ring with valid descriptors
- *
- * Description:
- * This function fills the receive ring descriptors with data
- * segments and makes them valid for the BMU.
- * The active ring is filled completely, if possible.
- * The non-active ring is filled only partial to save memory.
- *
- * Description of rx ring structure:
- * head - points to the descriptor which will be used next by the BMU
- * tail - points to the next descriptor to give to the BMU
- *
- * Returns: N/A
- */
-static void FillRxRing(
-SK_AC *pAC, /* pointer to the adapter context */
-RX_PORT *pRxPort) /* ptr to port struct for which the ring
- should be filled */
-{
-unsigned long Flags;
-
- spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
- while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
- if(!FillRxDescriptor(pAC, pRxPort))
- break;
- }
- spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
-} /* FillRxRing */
-
-
-/*****************************************************************************
- *
- * FillRxDescriptor - fill one buffer into the receive ring
- *
- * Description:
- * The function allocates a new receive buffer and
- * puts it into the next descriptor.
- *
- * Returns:
- * SK_TRUE - a buffer was added to the ring
- * SK_FALSE - a buffer could not be added
- */
-static SK_BOOL FillRxDescriptor(
-SK_AC *pAC, /* pointer to the adapter context struct */
-RX_PORT *pRxPort) /* ptr to port struct of ring to fill */
-{
-struct sk_buff *pMsgBlock; /* pointer to a new message block */
-RXD *pRxd; /* the rxd to fill */
-SK_U16 Length; /* data fragment length */
-SK_U64 PhysAddr; /* physical address of a rx buffer */
-
- pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
- if (pMsgBlock == NULL) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_ENTRY,
- ("%s: Allocation of rx buffer failed !\n",
- pAC->dev[pRxPort->PortIndex]->name));
- SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
- return(SK_FALSE);
- }
- skb_reserve(pMsgBlock, 2); /* to align IP frames */
- /* skb allocated ok, so add buffer */
- pRxd = pRxPort->pRxdRingTail;
- pRxPort->pRxdRingTail = pRxd->pNextRxd;
- pRxPort->RxdRingFree--;
- Length = pAC->RxBufSize;
-#if 0
- PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
- virt_to_page(pMsgBlock->data),
- ((unsigned long) pMsgBlock->data &
- ~PAGE_MASK),
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
-#else
- PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32)pMsgBlock->data);
-#endif
- pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
- pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
- pRxd->pMBuf = pMsgBlock;
- pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
- RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
- return (SK_TRUE);
-
-} /* FillRxDescriptor */
-
-
-/*****************************************************************************
- *
- * ReQueueRxBuffer - fill one buffer back into the receive ring
- *
- * Description:
- * Fill a given buffer back into the rx ring. The buffer
- * has been previously allocated and aligned, and its phys.
- * address calculated, so this is no more necessary.
- *
- * Returns: N/A
- */
-static void ReQueueRxBuffer(
-SK_AC *pAC, /* pointer to the adapter context struct */
-RX_PORT *pRxPort, /* ptr to port struct of ring to fill */
-struct sk_buff *pMsg, /* pointer to the buffer */
-SK_U32 PhysHigh, /* phys address high dword */
-SK_U32 PhysLow) /* phys address low dword */
-{
-RXD *pRxd; /* the rxd to fill */
-SK_U16 Length; /* data fragment length */
-
- pRxd = pRxPort->pRxdRingTail;
- pRxPort->pRxdRingTail = pRxd->pNextRxd;
- pRxPort->RxdRingFree--;
- Length = pAC->RxBufSize;
- pRxd->VDataLow = PhysLow;
- pRxd->VDataHigh = PhysHigh;
- pRxd->pMBuf = pMsg;
- pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
- RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
- return;
-} /* ReQueueRxBuffer */
-
-
-/*****************************************************************************
- *
- * ReceiveIrq - handle a receive IRQ
- *
- * Description:
- * This function is called when a receive IRQ is set.
- * It walks the receive descriptor ring and sends up all
- * frames that are complete.
- *
- * Returns: N/A
- */
-#if 0
-static void ReceiveIrq(
-#else
-void ReceiveIrq(
-#endif
- SK_AC *pAC, /* pointer to adapter context */
- RX_PORT *pRxPort, /* pointer to receive port struct */
- SK_BOOL SlowPathLock) /* indicates if SlowPathLock is needed */
-{
-RXD *pRxd; /* pointer to receive descriptors */
-SK_U32 Control; /* control field of descriptor */
-struct sk_buff *pMsg; /* pointer to message holding frame */
-struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
-int FrameLength; /* total length of received frame */
-SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
-SK_EVPARA EvPara; /* an event parameter union */
-unsigned long Flags; /* for spin lock */
-int PortIndex = pRxPort->PortIndex;
-unsigned int Offset;
-unsigned int NumBytes;
-unsigned int ForRlmt;
-SK_BOOL IsBc;
-SK_BOOL IsMc;
-SK_BOOL IsBadFrame; /* Bad frame */
-
-SK_U32 FrameStat;
-unsigned short Csum1;
-unsigned short Csum2;
-unsigned short Type;
-#if 0
-int Result;
-#endif
-SK_U64 PhysAddr;
-
-rx_start:
- /* do forever; exit if RX_CTRL_OWN_BMU found */
- for ( pRxd = pRxPort->pRxdRingHead ;
- pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
- pRxd = pRxd->pNextRxd,
- pRxPort->pRxdRingHead = pRxd,
- pRxPort->RxdRingFree ++) {
-
- /*
- * For a better understanding of this loop
- * Go through every descriptor beginning at the head
- * Please note: the ring might be completely received so the OWN bit
- * set is not a good crirteria to leave that loop.
- * Therefore the RingFree counter is used.
- * On entry of this loop pRxd is a pointer to the Rxd that needs
- * to be checked next.
- */
-
- Control = pRxd->RBControl;
-
- /* check if this descriptor is ready */
- if ((Control & RX_CTRL_OWN_BMU) != 0) {
- /* this descriptor is not yet ready */
- /* This is the usual end of the loop */
- /* We don't need to start the ring again */
- FillRxRing(pAC, pRxPort);
- return;
- }
-
- /* get length of frame and check it */
- FrameLength = Control & RX_CTRL_LEN_MASK;
- if (FrameLength > pAC->RxBufSize) {
- goto rx_failed;
- }
-
- /* check for STF and EOF */
- if ((Control & (RX_CTRL_STF | RX_CTRL_EOF)) !=
- (RX_CTRL_STF | RX_CTRL_EOF)) {
- goto rx_failed;
- }
-
- /* here we have a complete frame in the ring */
- pMsg = pRxd->pMBuf;
-
- FrameStat = pRxd->FrameStat;
-
- /* check for frame length mismatch */
-#define XMR_FS_LEN_SHIFT 18
-#define GMR_FS_LEN_SHIFT 16
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS,
- ("skge: Frame length mismatch (%u/%u).\n",
- FrameLength,
- (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
- goto rx_failed;
- }
- }
- else {
- if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS,
- ("skge: Frame length mismatch (%u/%u).\n",
- FrameLength,
- (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
- goto rx_failed;
- }
- }
-
- /* Set Rx Status */
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
- IsBc = (FrameStat & XMR_FS_BC) != 0;
- IsMc = (FrameStat & XMR_FS_MC) != 0;
- IsBadFrame = (FrameStat &
- (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
- } else {
- IsBc = (FrameStat & GMR_FS_BC) != 0;
- IsMc = (FrameStat & GMR_FS_MC) != 0;
- IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
- ((FrameStat & GMR_FS_RX_OK) == 0));
- }
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
- ("Received frame of length %d on port %d\n",
- FrameLength, PortIndex));
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
- ("Number of free rx descriptors: %d\n",
- pRxPort->RxdRingFree));
-/* DumpMsg(pMsg, "Rx"); */
-
- if ((Control & RX_CTRL_STAT_VALID) != RX_CTRL_STAT_VALID ||
- (IsBadFrame)) {
-#if 0
- (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
-#endif
- /* there is a receive error in this frame */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS,
- ("skge: Error in received frame, dropped!\n"
- "Control: %x\nRxStat: %x\n",
- Control, FrameStat));
-
- PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
- PhysAddr |= (SK_U64) pRxd->VDataLow;
- pci_dma_sync_single(pAC->PciDev,
- (dma_addr_t) PhysAddr,
- FrameLength,
- PCI_DMA_FROMDEVICE);
- ReQueueRxBuffer(pAC, pRxPort, pMsg,
- pRxd->VDataHigh, pRxd->VDataLow);
-
- continue;
- }
-
- /*
- * if short frame then copy data to reduce memory waste
- */
- if ((FrameLength < SK_COPY_THRESHOLD) &&
- ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
- /*
- * Short frame detected and allocation successfull
- */
- /* use new skb and copy data */
- skb_reserve(pNewMsg, 2);
- skb_put(pNewMsg, FrameLength);
- PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
- PhysAddr |= (SK_U64) pRxd->VDataLow;
-
- pci_dma_sync_single(pAC->PciDev,
- (dma_addr_t) PhysAddr,
- FrameLength,
- PCI_DMA_FROMDEVICE);
- eth_copy_and_sum(pNewMsg, pMsg->data,
- FrameLength, 0);
- ReQueueRxBuffer(pAC, pRxPort, pMsg,
- pRxd->VDataHigh, pRxd->VDataLow);
- pMsg = pNewMsg;
-
- }
- else {
- /*
- * if large frame, or SKB allocation failed, pass
- * the SKB directly to the networking
- */
-
- PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
- PhysAddr |= (SK_U64) pRxd->VDataLow;
-
- /* release the DMA mapping */
- pci_unmap_single(pAC->PciDev,
- PhysAddr,
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
-
- /* set length in message */
- skb_put(pMsg, FrameLength);
- /* hardware checksum */
- Type = ntohs(*((short*)&pMsg->data[12]));
- if (Type == 0x800) {
- Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
- Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
-#if 0
- if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
- (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
- (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
- Result = SkCsGetReceiveInfo(pAC,
- &pMsg->data[14],
- Csum1, Csum2, pRxPort->PortIndex);
- if (Result ==
- SKCS_STATUS_IP_FRAGMENT ||
- Result ==
- SKCS_STATUS_IP_CSUM_OK ||
- Result ==
- SKCS_STATUS_TCP_CSUM_OK ||
- Result ==
- SKCS_STATUS_UDP_CSUM_OK) {
- pMsg->ip_summed =
- CHECKSUM_UNNECESSARY;
- } else {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS,
- ("skge: CRC error. Frame dropped!\n"));
- goto rx_failed;
- }
- }/* checksumControl calculation valid */
-#endif
- } /* IP frame */
- } /* frame > SK_COPY_TRESHOLD */
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
- ForRlmt = SK_RLMT_RX_PROTOCOL;
-#if 0
- IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
-#endif
- SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
- IsBc, &Offset, &NumBytes);
- if (NumBytes != 0) {
-#if 0
- IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
-#endif
- SK_RLMT_LOOKAHEAD(pAC, PortIndex,
- &pMsg->data[Offset],
- IsBc, IsMc, &ForRlmt);
- }
- if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
- /* send up only frames from active port */
- if ((PortIndex == pAC->ActivePort) ||
- (pAC->RlmtNets == 2)) {
- /* frame for upper layer */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
-#ifdef xDEBUG
- DumpMsg(pMsg, "Rx");
-#endif
- SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
- FrameLength, pRxPort->PortIndex);
-
-#if 0
- pMsg->dev = pAC->dev[pRxPort->PortIndex];
- pMsg->protocol = eth_type_trans(pMsg,
- pAC->dev[pRxPort->PortIndex]);
- netif_rx(pMsg);
- pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
-#else
- NetReceive(pMsg->data, pMsg->len);
- dev_kfree_skb_any(pMsg);
-#endif
- }
- else {
- /* drop frame */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS,
- ("D"));
- DEV_KFREE_SKB(pMsg);
- }
-
- } /* if not for rlmt */
- else {
- /* packet for rlmt */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
- pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
- pAC->IoBase, FrameLength);
- if (pRlmtMbuf != NULL) {
- pRlmtMbuf->pNext = NULL;
- pRlmtMbuf->Length = FrameLength;
- pRlmtMbuf->PortIdx = PortIndex;
- EvPara.pParaPtr = pRlmtMbuf;
- memcpy((char*)(pRlmtMbuf->pData),
- (char*)(pMsg->data),
- FrameLength);
-
- /* SlowPathLock needed? */
- if (SlowPathLock == SK_TRUE) {
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- SkEventQueue(pAC, SKGE_RLMT,
- SK_RLMT_PACKET_RECEIVED,
- EvPara);
- pAC->CheckQueue = SK_TRUE;
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- } else {
- SkEventQueue(pAC, SKGE_RLMT,
- SK_RLMT_PACKET_RECEIVED,
- EvPara);
- pAC->CheckQueue = SK_TRUE;
- }
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
- SK_DBGCAT_DRV_RX_PROGRESS,
- ("Q"));
- }
-#if 0
- if ((pAC->dev[pRxPort->PortIndex]->flags &
- (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
- (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
- SK_RLMT_RX_PROTOCOL) {
- pMsg->dev = pAC->dev[pRxPort->PortIndex];
- pMsg->protocol = eth_type_trans(pMsg,
- pAC->dev[pRxPort->PortIndex]);
- netif_rx(pMsg);
- pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
- }
-#else
- if (0) {
- }
-#endif
- else {
- DEV_KFREE_SKB(pMsg);
- }
-
- } /* if packet for rlmt */
- } /* for ... scanning the RXD ring */
-
- /* RXD ring is empty -> fill and restart */
- FillRxRing(pAC, pRxPort);
- /* do not start if called from Close */
- if (pAC->BoardLevel > 0) {
- ClearAndStartRx(pAC, PortIndex);
- }
- return;
-
-rx_failed:
- /* remove error frame */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
- ("Schrottdescriptor, length: 0x%x\n", FrameLength));
-
- /* release the DMA mapping */
-
- PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
- PhysAddr |= (SK_U64) pRxd->VDataLow;
- pci_unmap_page(pAC->PciDev,
- PhysAddr,
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
- DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
- pRxd->pMBuf = NULL;
- pRxPort->RxdRingFree++;
- pRxPort->pRxdRingHead = pRxd->pNextRxd;
- goto rx_start;
-
-} /* ReceiveIrq */
-
-
-/*****************************************************************************
- *
- * ClearAndStartRx - give a start receive command to BMU, clear IRQ
- *
- * Description:
- * This function sends a start command and a clear interrupt
- * command for one receive queue to the BMU.
- *
- * Returns: N/A
- * none
- */
-static void ClearAndStartRx(
-SK_AC *pAC, /* pointer to the adapter context */
-int PortIndex) /* index of the receive port (XMAC) */
-{
- SK_OUT8(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CTRL,
- RX_Q_CTRL_START | RX_Q_CTRL_CLR_I_EOF);
-} /* ClearAndStartRx */
-
-
-/*****************************************************************************
- *
- * ClearTxIrq - give a clear transmit IRQ command to BMU
- *
- * Description:
- * This function sends a clear tx IRQ command for one
- * transmit queue to the BMU.
- *
- * Returns: N/A
- */
-static void ClearTxIrq(
-SK_AC *pAC, /* pointer to the adapter context */
-int PortIndex, /* index of the transmit port (XMAC) */
-int Prio) /* priority or normal queue */
-{
- SK_OUT8(pAC->IoBase, TxQueueAddr[PortIndex][Prio]+TX_Q_CTRL,
- TX_Q_CTRL_CLR_I_EOF);
-} /* ClearTxIrq */
-
-
-/*****************************************************************************
- *
- * ClearRxRing - remove all buffers from the receive ring
- *
- * Description:
- * This function removes all receive buffers from the ring.
- * The receive BMU must be stopped before calling this function.
- *
- * Returns: N/A
- */
-static void ClearRxRing(
-SK_AC *pAC, /* pointer to adapter context */
-RX_PORT *pRxPort) /* pointer to rx port struct */
-{
-RXD *pRxd; /* pointer to the current descriptor */
-unsigned long Flags;
-SK_U64 PhysAddr;
-
- if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
- return;
- }
- spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
- pRxd = pRxPort->pRxdRingHead;
- do {
- if (pRxd->pMBuf != NULL) {
-
- PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
- PhysAddr |= (SK_U64) pRxd->VDataLow;
- pci_unmap_page(pAC->PciDev,
- PhysAddr,
- pAC->RxBufSize - 2,
- PCI_DMA_FROMDEVICE);
- DEV_KFREE_SKB(pRxd->pMBuf);
- pRxd->pMBuf = NULL;
- }
- pRxd->RBControl &= RX_CTRL_OWN_BMU;
- pRxd = pRxd->pNextRxd;
- pRxPort->RxdRingFree++;
- } while (pRxd != pRxPort->pRxdRingTail);
- pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
- spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
-} /* ClearRxRing */
-
-
-/*****************************************************************************
- *
- * ClearTxRing - remove all buffers from the transmit ring
- *
- * Description:
- * This function removes all transmit buffers from the ring.
- * The transmit BMU must be stopped before calling this function
- * and transmitting at the upper level must be disabled.
- * The BMU own bit of all descriptors is cleared, the rest is
- * done by calling FreeTxDescriptors.
- *
- * Returns: N/A
- */
-static void ClearTxRing(
-SK_AC *pAC, /* pointer to adapter context */
-TX_PORT *pTxPort) /* pointer to tx prt struct */
-{
-TXD *pTxd; /* pointer to the current descriptor */
-int i;
-unsigned long Flags;
-
- spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
- pTxd = pTxPort->pTxdRingHead;
- for (i=0; i<pAC->TxDescrPerRing; i++) {
- pTxd->TBControl &= ~TX_CTRL_OWN_BMU;
- pTxd = pTxd->pNextTxd;
- }
- FreeTxDescriptors(pAC, pTxPort);
- spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
-} /* ClearTxRing */
-
-
-#if 0
-/*****************************************************************************
- *
- * SetQueueSizes - configure the sizes of rx and tx queues
- *
- * Description:
- * This function assigns the sizes for active and passive port
- * to the appropriate HWinit structure variables.
- * The passive port(s) get standard values, all remaining RAM
- * is given to the active port.
- * The queue sizes are in kbyte and must be multiple of 8.
- * The limits for the number of buffers filled into the rx rings
- * is also set in this routine.
- *
- * Returns:
- * none
- */
-static void SetQueueSizes(
-SK_AC *pAC) /* pointer to the adapter context */
-{
-int StandbyRam; /* adapter RAM used for a standby port */
-int RemainingRam; /* adapter RAM available for the active port */
-int RxRam; /* RAM used for the active port receive queue */
-int i; /* loop counter */
-
-if (pAC->RlmtNets == 1) {
- StandbyRam = SK_RLMT_STANDBY_QRXSIZE + SK_RLMT_STANDBY_QXASIZE +
- SK_RLMT_STANDBY_QXSSIZE;
- RemainingRam = pAC->GIni.GIRamSize -
- (pAC->GIni.GIMacsFound-1) * StandbyRam;
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PRxQSize = SK_RLMT_STANDBY_QRXSIZE;
- pAC->GIni.GP[i].PXSQSize = SK_RLMT_STANDBY_QXSSIZE;
- pAC->GIni.GP[i].PXAQSize = SK_RLMT_STANDBY_QXASIZE;
- }
- RxRam = (RemainingRam * 8 / 10) & ~7;
- pAC->GIni.GP[pAC->ActivePort].PRxQSize = RxRam;
- pAC->GIni.GP[pAC->ActivePort].PXSQSize = 0;
- pAC->GIni.GP[pAC->ActivePort].PXAQSize =
- (RemainingRam - RxRam) & ~7;
- pAC->RxQueueSize = RxRam;
- pAC->TxSQueueSize = 0;
- pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("queue sizes settings - rx:%d txA:%d txS:%d\n",
- pAC->RxQueueSize,pAC->TxAQueueSize, pAC->TxSQueueSize));
-} else {
- RemainingRam = pAC->GIni.GIRamSize/pAC->GIni.GIMacsFound;
- RxRam = (RemainingRam * 8 / 10) & ~7;
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->GIni.GP[i].PRxQSize = RxRam;
- pAC->GIni.GP[i].PXSQSize = 0;
- pAC->GIni.GP[i].PXAQSize = (RemainingRam - RxRam) & ~7;
- }
-
- pAC->RxQueueSize = RxRam;
- pAC->TxSQueueSize = 0;
- pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
-}
- for (i=0; i<SK_MAX_MACS; i++) {
- pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing;
- }
-
- if (pAC->RlmtNets == 2) {
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
- }
- } else {
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
- }
- /*
- * Do not set the Limit to 0, because this could cause
- * wrap around with ReQueue'ed buffers (a buffer could
- * be requeued in the same position, made accessable to
- * the hardware, and the hardware could change its
- * contents!
- */
- pAC->RxPort[pAC->ActivePort].RxFillLimit = 1;
- }
-
-#ifdef DEBUG
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
- ("i: %d, RxQSize: %d, PXSQsize: %d, PXAQSize: %d\n",
- i,
- pAC->GIni.GP[i].PRxQSize,
- pAC->GIni.GP[i].PXSQSize,
- pAC->GIni.GP[i].PXAQSize));
- }
-#endif
-} /* SetQueueSizes */
-
-
-/*****************************************************************************
- *
- * SkGeSetMacAddr - Set the hardware MAC address
- *
- * Description:
- * This function sets the MAC address used by the adapter.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
-{
-
-DEV_NET *pNet = (DEV_NET*) dev->priv;
-SK_AC *pAC = pNet->pAC;
-
-struct sockaddr *addr = p;
-unsigned long Flags;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeSetMacAddr starts now...\n"));
- if(netif_running(dev))
- return -EBUSY;
-
- memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
-
- if (pAC->RlmtNets == 2)
- SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
- (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
- else
- SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
- (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
-
-
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- return 0;
-} /* SkGeSetMacAddr */
-#endif
-
-
-/*****************************************************************************
- *
- * SkGeSetRxMode - set receive mode
- *
- * Description:
- * This function sets the receive mode of an adapter. The adapter
- * supports promiscuous mode, allmulticast mode and a number of
- * multicast addresses. If more multicast addresses the available
- * are selected, a hash function in the hardware is used.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-#if 0
-static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
-{
-
-DEV_NET *pNet;
-SK_AC *pAC;
-
-struct dev_mc_list *pMcList;
-int i;
-int PortIdx;
-unsigned long Flags;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeSetRxMode starts now... "));
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
- if (pAC->RlmtNets == 1)
- PortIdx = pAC->ActivePort;
- else
- PortIdx = pNet->NetNr;
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- if (dev->flags & IFF_PROMISC) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("PROMISCUOUS mode\n"));
- SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
- SK_PROM_MODE_LLC);
- } else if (dev->flags & IFF_ALLMULTI) {
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("ALLMULTI mode\n"));
- SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
- SK_PROM_MODE_ALL_MC);
- } else {
- SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
- SK_PROM_MODE_NONE);
- SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("Number of MC entries: %d ", dev->mc_count));
-
- pMcList = dev->mc_list;
- for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
- SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
- (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
- ("%02x:%02x:%02x:%02x:%02x:%02x\n",
- pMcList->dmi_addr[0],
- pMcList->dmi_addr[1],
- pMcList->dmi_addr[2],
- pMcList->dmi_addr[3],
- pMcList->dmi_addr[4],
- pMcList->dmi_addr[5]));
- }
- SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
- }
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- return;
-} /* SkGeSetRxMode */
-
-
-/*****************************************************************************
- *
- * SkGeChangeMtu - set the MTU to another value
- *
- * Description:
- * This function sets is called whenever the MTU size is changed
- * (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
- * ethernet MTU size, long frame support is activated.
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
-{
-DEV_NET *pNet;
-DEV_NET *pOtherNet;
-SK_AC *pAC;
-unsigned long Flags;
-int i;
-SK_EVPARA EvPara;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeChangeMtu starts now...\n"));
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
- return -EINVAL;
- }
-
- if(pAC->BoardLevel != 2) {
- return -EINVAL;
- }
-
- pNet->Mtu = NewMtu;
- pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
- if ((pOtherNet->Mtu > 1500) && (NewMtu <= 1500) && (pOtherNet->Up==1)) {
- return(0);
- }
-
- EvPara.Para32[0] = pNet->NetNr;
- EvPara.Para32[1] = -1;
-
- pAC->RxBufSize = NewMtu + 32;
- dev->mtu = NewMtu;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("New MTU: %d\n", NewMtu));
-
- /* prevent reconfiguration while changing the MTU */
-
- /* disable interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, 0);
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
-
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- /* Stop both ports */
- EvPara.Para32[0] = 0;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- EvPara.Para32[0] = 1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- } else {
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
- }
-
- SkEventDispatcher(pAC, pAC->IoBase);
-
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- spin_lock_irqsave(
- &pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock, Flags);
- netif_stop_queue(pAC->dev[i]);
-
- }
-
- /*
- * adjust number of rx buffers allocated
- */
- if (NewMtu > 1500) {
- /* use less rx buffers */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 100;
- } else {
- if (i == pAC->ActivePort)
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 100;
- else
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 10;
- }
- }
- }
- else {
- /* use normal amount of rx buffers */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- pAC->RxPort[i].RxFillLimit = 1;
- } else {
- if (i == pAC->ActivePort)
- pAC->RxPort[i].RxFillLimit = 1;
- else
- pAC->RxPort[i].RxFillLimit =
- pAC->RxDescrPerRing - 100;
- }
- }
- }
-
- SkGeDeInit(pAC, pAC->IoBase);
-
- /*
- * enable/disable hardware support for long frames
- */
- if (NewMtu > 1500) {
-/* pAC->JumboActivated = SK_TRUE; /#* is never set back !!! */
- pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
- }
- else {
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- pAC->GIni.GIPortUsage = SK_MUL_LINK;
- } else {
- pAC->GIni.GIPortUsage = SK_RED_LINK;
- }
- }
-
- SkGeInit( pAC, pAC->IoBase, 1);
- SkI2cInit( pAC, pAC->IoBase, 1);
- SkEventInit(pAC, pAC->IoBase, 1);
- SkPnmiInit( pAC, pAC->IoBase, 1);
- SkAddrInit( pAC, pAC->IoBase, 1);
- SkRlmtInit( pAC, pAC->IoBase, 1);
- SkTimerInit(pAC, pAC->IoBase, 1);
-
- /*
- * tschilling:
- * Speed and others are set back to default in level 1 init!
- */
- GetConfiguration(pAC);
-
- SkGeInit( pAC, pAC->IoBase, 2);
- SkI2cInit( pAC, pAC->IoBase, 2);
- SkEventInit(pAC, pAC->IoBase, 2);
- SkPnmiInit( pAC, pAC->IoBase, 2);
- SkAddrInit( pAC, pAC->IoBase, 2);
- SkRlmtInit( pAC, pAC->IoBase, 2);
- SkTimerInit(pAC, pAC->IoBase, 2);
-
- /*
- * clear and reinit the rx rings here
- */
- for (i=0; i<pAC->GIni.GIMacsFound; i++) {
- ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
- ClearRxRing(pAC, &pAC->RxPort[i]);
- FillRxRing(pAC, &pAC->RxPort[i]);
-
- /* Enable transmit descriptor polling. */
- SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
- FillRxRing(pAC, &pAC->RxPort[i]);
- };
-
- SkGeYellowLED(pAC, pAC->IoBase, 1);
-
-#ifdef USE_INT_MOD
- {
- unsigned long ModBase;
- ModBase = 53125000 / INTS_PER_SEC;
- SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
- SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
- SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
- }
-#endif
-
- netif_start_queue(pAC->dev[pNet->PortNr]);
- for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
- spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
- }
-
- /* enable Interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
- SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
-
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
- SkEventDispatcher(pAC, pAC->IoBase);
-
- /* Found more than one port */
- if ((pAC->GIni.GIMacsFound == 2 ) &&
- (pAC->RlmtNets == 2)) {
- /* Start both ports */
- EvPara.Para32[0] = pAC->RlmtNets;
- EvPara.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
- EvPara);
-
-
- EvPara.Para32[1] = -1;
- EvPara.Para32[0] = pNet->PortNr;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
-
- if (pOtherNet->Up) {
- EvPara.Para32[0] = pOtherNet->PortNr;
- SkEventQueue(pAC, SKGE_RLMT,
- SK_RLMT_START, EvPara);
- }
- } else {
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
- }
-
- SkEventDispatcher(pAC, pAC->IoBase);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- return 0;
-} /* SkGeChangeMtu */
-
-
-/*****************************************************************************
- *
- * SkGeStats - return ethernet device statistics
- *
- * Description:
- * This function return statistic data about the ethernet device
- * to the operating system.
- *
- * Returns:
- * pointer to the statistic structure.
- */
-static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
-{
-DEV_NET *pNet = (DEV_NET*) dev->priv;
-SK_AC *pAC = pNet->pAC;
-SK_PNMI_STRUCT_DATA *pPnmiStruct; /* structure for all Pnmi-Data */
-SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */
-SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
-unsigned int Size; /* size of pnmi struct */
-unsigned long Flags; /* for spin lock */
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeStats starts now...\n"));
- pPnmiStruct = &pAC->PnmiStruct;
- memset(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- Size = SK_PNMI_STRUCT_SIZE;
- SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- pPnmiStat = &pPnmiStruct->Stat[0];
- pPnmiConf = &pPnmiStruct->Conf[0];
-
- pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
- pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
- pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
- pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
-
- if (pNet->Mtu <= 1500) {
- pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
- } else {
- pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
- pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
- }
-
-
- if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
- pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
-
- pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
- pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
- pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
- pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
- pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
-
- /* detailed rx_errors: */
- pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
- pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
- pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
- pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
- pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
- pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
-
- /* detailed tx_errors */
- pAC->stats.tx_aborted_errors = (SK_U32) 0;
- pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
- pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
- pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
- pAC->stats.tx_window_errors = (SK_U32) 0;
-
- return(&pAC->stats);
-} /* SkGeStats */
-
-
-/*****************************************************************************
- *
- * SkGeIoctl - IO-control function
- *
- * Description:
- * This function is called if an ioctl is issued on the device.
- * There are three subfunction for reading, writing and test-writing
- * the private MIB data structure (usefull for SysKonnect-internal tools).
- *
- * Returns:
- * 0, if everything is ok
- * !=0, on error
- */
-static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
-{
-DEV_NET *pNet;
-SK_AC *pAC;
-
-SK_GE_IOCTL Ioctl;
-unsigned int Err = 0;
-int Size;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeIoctl starts now...\n"));
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
- return -EFAULT;
- }
-
- switch(cmd) {
- case SK_IOCTL_SETMIB:
- case SK_IOCTL_PRESETMIB:
- if (!capable(CAP_NET_ADMIN)) return -EPERM;
- case SK_IOCTL_GETMIB:
- if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
- Ioctl.Len<sizeof(pAC->PnmiStruct)?
- Ioctl.Len : sizeof(pAC->PnmiStruct))) {
- return -EFAULT;
- }
- Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
- if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
- Ioctl.Len<Size? Ioctl.Len : Size)) {
- return -EFAULT;
- }
- Ioctl.Len = Size;
- if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
- return -EFAULT;
- }
- break;
- default:
- Err = -EOPNOTSUPP;
- }
- return(Err);
-} /* SkGeIoctl */
-
-
-/*****************************************************************************
- *
- * SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
- *
- * Description:
- * This function reads/writes the MIB data using PNMI (Private Network
- * Management Interface).
- * The destination for the data must be provided with the
- * ioctl call and is given to the driver in the form of
- * a user space address.
- * Copying from the user-provided data area into kernel messages
- * and back is done by copy_from_user and copy_to_user calls in
- * SkGeIoctl.
- *
- * Returns:
- * returned size from PNMI call
- */
-static int SkGeIocMib(
-DEV_NET *pNet, /* pointer to the adapter context */
-unsigned int Size, /* length of ioctl data */
-int mode) /* flag for set/preset */
-{
-unsigned long Flags; /* for spin lock */
-SK_AC *pAC;
-
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("SkGeIocMib starts now...\n"));
- pAC = pNet->pAC;
- /* access MIB */
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- switch(mode) {
- case SK_IOCTL_GETMIB:
- SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
- pNet->NetNr);
- break;
- case SK_IOCTL_PRESETMIB:
- SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
- pNet->NetNr);
- break;
- case SK_IOCTL_SETMIB:
- SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
- pNet->NetNr);
- break;
- default:
- break;
- }
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
- ("MIB data access succeeded\n"));
- return (Size);
-} /* SkGeIocMib */
-#endif
-
-
-/*****************************************************************************
- *
- * GetConfiguration - read configuration information
- *
- * Description:
- * This function reads per-adapter configuration information from
- * the options provided on the command line.
- *
- * Returns:
- * none
- */
-static void GetConfiguration(
-SK_AC *pAC) /* pointer to the adapter context structure */
-{
-SK_I32 Port; /* preferred port */
-int LinkSpeed; /* Link speed */
-int AutoNeg; /* auto negotiation off (0) or on (1) */
-int DuplexCap; /* duplex capabilities (0=both, 1=full, 2=half */
-int MSMode; /* master / slave mode selection */
-SK_BOOL AutoSet;
-SK_BOOL DupSet;
-/*
- * The two parameters AutoNeg. and DuplexCap. map to one configuration
- * parameter. The mapping is described by this table:
- * DuplexCap -> | both | full | half |
- * AutoNeg | | | |
- * -----------------------------------------------------------------
- * Off | illegal | Full | Half |
- * -----------------------------------------------------------------
- * On | AutoBoth | AutoFull | AutoHalf |
- * -----------------------------------------------------------------
- * Sense | AutoSense | AutoSense | AutoSense |
- */
-int Capabilities[3][3] =
- { { -1, SK_LMODE_FULL, SK_LMODE_HALF},
- {SK_LMODE_AUTOBOTH, SK_LMODE_AUTOFULL, SK_LMODE_AUTOHALF},
- {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
-#define DC_BOTH 0
-#define DC_FULL 1
-#define DC_HALF 2
-#define AN_OFF 0
-#define AN_ON 1
-#define AN_SENS 2
-
- /* settings for port A */
- /* settings link speed */
- LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
- if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- Speed_A[pAC->Index] != NULL) {
- if (strcmp(Speed_A[pAC->Index],"")==0) {
- LinkSpeed = SK_LSPEED_AUTO;
- }
- else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
- LinkSpeed = SK_LSPEED_AUTO;
- }
- else if (strcmp(Speed_A[pAC->Index],"10")==0) {
- LinkSpeed = SK_LSPEED_10MBPS;
- }
- else if (strcmp(Speed_A[pAC->Index],"100")==0) {
- LinkSpeed = SK_LSPEED_100MBPS;
- }
- else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
- LinkSpeed = SK_LSPEED_1000MBPS;
- }
- else printk("%s: Illegal value for Speed_A\n",
- pAC->dev[0]->name);
- }
-
- /* Check speed parameter */
- /* Only copper type adapter and GE V2 cards */
- if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
- (pAC->GIni.GICopperType != SK_TRUE)) &&
- ((LinkSpeed != SK_LSPEED_AUTO) &&
- (LinkSpeed != SK_LSPEED_1000MBPS))) {
- printk("%s: Illegal value for Speed_A. "
- "Not a copper card or GE V2 card\n Using "
- "speed 1000\n", pAC->dev[0]->name);
- LinkSpeed = SK_LSPEED_1000MBPS;
- }
- pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
-
- /* Autonegotiation */
- AutoNeg = AN_ON; /* tschilling: Default: Autonegotiation on! */
- AutoSet = SK_FALSE;
- if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- AutoNeg_A[pAC->Index] != NULL) {
- AutoSet = SK_TRUE;
- if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
- AutoSet = SK_FALSE;
- }
- else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
- AutoNeg = AN_ON;
- }
- else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
- AutoNeg = AN_OFF;
- }
- else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
- AutoNeg = AN_SENS;
- }
- else printk("%s: Illegal value for AutoNeg_A\n",
- pAC->dev[0]->name);
- }
-
- DuplexCap = DC_BOTH;
- DupSet = SK_FALSE;
- if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- DupCap_A[pAC->Index] != NULL) {
- DupSet = SK_TRUE;
- if (strcmp(DupCap_A[pAC->Index],"")==0) {
- DupSet = SK_FALSE;
- }
- else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
- DuplexCap = DC_BOTH;
- }
- else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
- DuplexCap = DC_FULL;
- }
- else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
- DuplexCap = DC_HALF;
- }
- else printk("%s: Illegal value for DupCap_A\n",
- pAC->dev[0]->name);
- }
-
- /* check for illegal combinations */
- if (AutoSet && AutoNeg==AN_SENS && DupSet) {
- printk("%s, Port A: DuplexCapabilities"
- " ignored using Sense mode\n", pAC->dev[0]->name);
- }
- if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
- printk("%s, Port A: Illegal combination"
- " of values AutoNeg. and DuplexCap.\n Using "
- "Full Duplex\n", pAC->dev[0]->name);
-
- DuplexCap = DC_FULL;
- }
- if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
- DuplexCap = DC_FULL;
- }
-
- if (!AutoSet && DupSet) {
- printk("%s, Port A: Duplex setting not"
- " possible in\n default AutoNegotiation mode"
- " (Sense).\n Using AutoNegotiation On\n",
- pAC->dev[0]->name);
- AutoNeg = AN_ON;
- }
-
- /* set the desired mode */
- pAC->GIni.GP[0].PLinkModeConf =
- Capabilities[AutoNeg][DuplexCap];
-
- pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
- if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- FlowCtrl_A[pAC->Index] != NULL) {
- if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_SYM_OR_REM;
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_SYMMETRIC;
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_LOC_SEND;
- }
- else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
- pAC->GIni.GP[0].PFlowCtrlMode =
- SK_FLOW_MODE_NONE;
- }
- else printk("Illegal value for FlowCtrl_A\n");
- }
- if (AutoNeg==AN_OFF && pAC->GIni.GP[0].PFlowCtrlMode!=
- SK_FLOW_MODE_NONE) {
- printk("%s, Port A: FlowControl"
- " impossible without AutoNegotiation,"
- " disabled\n", pAC->dev[0]->name);
- pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_NONE;
- }
-
- MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
- if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- Role_A[pAC->Index] != NULL) {
- if (strcmp(Role_A[pAC->Index],"")==0) {
- }
- else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
- MSMode = SK_MS_MODE_AUTO;
- }
- else if (strcmp(Role_A[pAC->Index],"Master")==0) {
- MSMode = SK_MS_MODE_MASTER;
- }
- else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
- MSMode = SK_MS_MODE_SLAVE;
- }
- else printk("%s: Illegal value for Role_A\n",
- pAC->dev[0]->name);
- }
- pAC->GIni.GP[0].PMSMode = MSMode;
-
-
- /* settings for port B */
- /* settings link speed */
- LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
- if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- Speed_B[pAC->Index] != NULL) {
- if (strcmp(Speed_B[pAC->Index],"")==0) {
- LinkSpeed = SK_LSPEED_AUTO;
- }
- else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
- LinkSpeed = SK_LSPEED_AUTO;
- }
- else if (strcmp(Speed_B[pAC->Index],"10")==0) {
- LinkSpeed = SK_LSPEED_10MBPS;
- }
- else if (strcmp(Speed_B[pAC->Index],"100")==0) {
- LinkSpeed = SK_LSPEED_100MBPS;
- }
- else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
- LinkSpeed = SK_LSPEED_1000MBPS;
- }
- else printk("%s: Illegal value for Speed_B\n",
- pAC->dev[1]->name);
- }
-
- /* Check speed parameter */
- /* Only copper type adapter and GE V2 cards */
- if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
- (pAC->GIni.GICopperType != SK_TRUE)) &&
- ((LinkSpeed != SK_LSPEED_AUTO) &&
- (LinkSpeed != SK_LSPEED_1000MBPS))) {
- printk("%s: Illegal value for Speed_B. "
- "Not a copper card or GE V2 card\n Using "
- "speed 1000\n", pAC->dev[1]->name);
- LinkSpeed = SK_LSPEED_1000MBPS;
- }
- pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
-
- /* Auto negotiation */
- AutoNeg = AN_SENS; /* default: do auto Sense */
- AutoSet = SK_FALSE;
- if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- AutoNeg_B[pAC->Index] != NULL) {
- AutoSet = SK_TRUE;
- if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
- AutoSet = SK_FALSE;
- }
- else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
- AutoNeg = AN_ON;
- }
- else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
- AutoNeg = AN_OFF;
- }
- else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
- AutoNeg = AN_SENS;
- }
- else printk("Illegal value for AutoNeg_B\n");
- }
-
- DuplexCap = DC_BOTH;
- DupSet = SK_FALSE;
- if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- DupCap_B[pAC->Index] != NULL) {
- DupSet = SK_TRUE;
- if (strcmp(DupCap_B[pAC->Index],"")==0) {
- DupSet = SK_FALSE;
- }
- else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
- DuplexCap = DC_BOTH;
- }
- else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
- DuplexCap = DC_FULL;
- }
- else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
- DuplexCap = DC_HALF;
- }
- else printk("Illegal value for DupCap_B\n");
- }
-
- /* check for illegal combinations */
- if (AutoSet && AutoNeg==AN_SENS && DupSet) {
- printk("%s, Port B: DuplexCapabilities"
- " ignored using Sense mode\n", pAC->dev[1]->name);
- }
- if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
- printk("%s, Port B: Illegal combination"
- " of values AutoNeg. and DuplexCap.\n Using "
- "Full Duplex\n", pAC->dev[1]->name);
-
- DuplexCap = DC_FULL;
- }
- if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
- DuplexCap = DC_FULL;
- }
-
- if (!AutoSet && DupSet) {
- printk("%s, Port B: Duplex setting not"
- " possible in\n default AutoNegotiation mode"
- " (Sense).\n Using AutoNegotiation On\n",
- pAC->dev[1]->name);
- AutoNeg = AN_ON;
- }
-
- /* set the desired mode */
- pAC->GIni.GP[1].PLinkModeConf =
- Capabilities[AutoNeg][DuplexCap];
-
- pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
- if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- FlowCtrl_B[pAC->Index] != NULL) {
- if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_SYM_OR_REM;
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_SYMMETRIC;
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_LOC_SEND;
- }
- else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
- pAC->GIni.GP[1].PFlowCtrlMode =
- SK_FLOW_MODE_NONE;
- }
- else printk("Illegal value for FlowCtrl_B\n");
- }
- if (AutoNeg==AN_OFF && pAC->GIni.GP[1].PFlowCtrlMode!=
- SK_FLOW_MODE_NONE) {
- printk("%s, Port B: FlowControl"
- " impossible without AutoNegotiation,"
- " disabled\n", pAC->dev[1]->name);
- pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_NONE;
- }
-
- MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
- if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- Role_B[pAC->Index] != NULL) {
- if (strcmp(Role_B[pAC->Index],"")==0) {
- }
- else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
- MSMode = SK_MS_MODE_AUTO;
- }
- else if (strcmp(Role_B[pAC->Index],"Master")==0) {
- MSMode = SK_MS_MODE_MASTER;
- }
- else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
- MSMode = SK_MS_MODE_SLAVE;
- }
- else printk("%s: Illegal value for Role_B\n",
- pAC->dev[1]->name);
- }
- pAC->GIni.GP[1].PMSMode = MSMode;
-
-
- /* settings for both ports */
- pAC->ActivePort = 0;
- if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- PrefPort[pAC->Index] != NULL) {
- if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
- pAC->ActivePort = 0;
- pAC->Rlmt.Net[0].Preference = -1; /* auto */
- pAC->Rlmt.Net[0].PrefPort = 0;
- }
- else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
- /*
- * do not set ActivePort here, thus a port
- * switch is issued after net up.
- */
- Port = 0;
- pAC->Rlmt.Net[0].Preference = Port;
- pAC->Rlmt.Net[0].PrefPort = Port;
- }
- else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
- /*
- * do not set ActivePort here, thus a port
- * switch is issued after net up.
- */
- Port = 1;
- pAC->Rlmt.Net[0].Preference = Port;
- pAC->Rlmt.Net[0].PrefPort = Port;
- }
- else printk("%s: Illegal value for PrefPort\n",
- pAC->dev[0]->name);
- }
-
- pAC->RlmtNets = 1;
-
- if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
- RlmtMode[pAC->Index] != NULL) {
- if (strcmp(RlmtMode[pAC->Index], "") == 0) {
- pAC->RlmtMode = 0;
- }
- else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
- pAC->RlmtMode = SK_RLMT_CHECK_LINK;
- }
- else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
- pAC->RlmtMode = SK_RLMT_CHECK_LINK |
- SK_RLMT_CHECK_LOC_LINK;
- }
- else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
- pAC->RlmtMode = SK_RLMT_CHECK_LINK |
- SK_RLMT_CHECK_LOC_LINK |
- SK_RLMT_CHECK_SEG;
- }
- else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
- (pAC->GIni.GIMacsFound == 2)) {
- pAC->RlmtMode = SK_RLMT_CHECK_LINK;
- pAC->RlmtNets = 2;
- }
- else {
- printk("%s: Illegal value for"
- " RlmtMode, using default\n", pAC->dev[0]->name);
- pAC->RlmtMode = 0;
- }
- }
- else {
- pAC->RlmtMode = 0;
- }
-} /* GetConfiguration */
-
-
-/*****************************************************************************
- *
- * ProductStr - return a adapter identification string from vpd
- *
- * Description:
- * This function reads the product name string from the vpd area
- * and puts it the field pAC->DeviceString.
- *
- * Returns: N/A
- */
-static void ProductStr(
-SK_AC *pAC /* pointer to adapter context */
-)
-{
-int StrLen = 80; /* length of the string, defined in SK_AC */
-char Keyword[] = VPD_NAME; /* vpd productname identifier */
-int ReturnCode; /* return code from vpd_read */
-unsigned long Flags;
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- ReturnCode = VpdRead(pAC, pAC->IoBase, Keyword, pAC->DeviceStr,
- &StrLen);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
- if (ReturnCode != 0) {
- /* there was an error reading the vpd data */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
- ("Error reading VPD data: %d\n", ReturnCode));
- pAC->DeviceStr[0] = '\0';
- }
-} /* ProductStr */
-
-
-/****************************************************************************/
-/* functions for common modules *********************************************/
-/****************************************************************************/
-
-
-/*****************************************************************************
- *
- * SkDrvAllocRlmtMbuf - allocate an RLMT mbuf
- *
- * Description:
- * This routine returns an RLMT mbuf or NULL. The RLMT Mbuf structure
- * is embedded into a socket buff data area.
- *
- * Context:
- * runtime
- *
- * Returns:
- * NULL or pointer to Mbuf.
- */
-SK_MBUF *SkDrvAllocRlmtMbuf(
-SK_AC *pAC, /* pointer to adapter context */
-SK_IOC IoC, /* the IO-context */
-unsigned BufferSize) /* size of the requested buffer */
-{
-SK_MBUF *pRlmtMbuf; /* pointer to a new rlmt-mbuf structure */
-struct sk_buff *pMsgBlock; /* pointer to a new message block */
-
- pMsgBlock = alloc_skb(BufferSize + sizeof(SK_MBUF), GFP_ATOMIC);
- if (pMsgBlock == NULL) {
- return (NULL);
- }
- pRlmtMbuf = (SK_MBUF*) pMsgBlock->data;
- skb_reserve(pMsgBlock, sizeof(SK_MBUF));
- pRlmtMbuf->pNext = NULL;
- pRlmtMbuf->pOs = pMsgBlock;
- pRlmtMbuf->pData = pMsgBlock->data; /* Data buffer. */
- pRlmtMbuf->Size = BufferSize; /* Data buffer size. */
- pRlmtMbuf->Length = 0; /* Length of packet (<= Size). */
- return (pRlmtMbuf);
-
-} /* SkDrvAllocRlmtMbuf */
-
-
-/*****************************************************************************
- *
- * SkDrvFreeRlmtMbuf - free an RLMT mbuf
- *
- * Description:
- * This routine frees one or more RLMT mbuf(s).
- *
- * Context:
- * runtime
- *
- * Returns:
- * Nothing
- */
-void SkDrvFreeRlmtMbuf(
-SK_AC *pAC, /* pointer to adapter context */
-SK_IOC IoC, /* the IO-context */
-SK_MBUF *pMbuf) /* size of the requested buffer */
-{
-SK_MBUF *pFreeMbuf;
-SK_MBUF *pNextMbuf;
-
- pFreeMbuf = pMbuf;
- do {
- pNextMbuf = pFreeMbuf->pNext;
- DEV_KFREE_SKB_ANY(pFreeMbuf->pOs);
- pFreeMbuf = pNextMbuf;
- } while ( pFreeMbuf != NULL );
-} /* SkDrvFreeRlmtMbuf */
-
-
-/*****************************************************************************
- *
- * SkOsGetTime - provide a time value
- *
- * Description:
- * This routine provides a time value. The unit is 1/HZ (defined by Linux).
- * It is not used for absolute time, but only for time differences.
- *
- *
- * Returns:
- * Time value
- */
-SK_U64 SkOsGetTime(SK_AC *pAC)
-{
-#if 0
- return jiffies;
-#else
- return get_timer(0);
-#endif
-} /* SkOsGetTime */
-
-
-/*****************************************************************************
- *
- * SkPciReadCfgDWord - read a 32 bit value from pci config space
- *
- * Description:
- * This routine reads a 32 bit value from the pci configuration
- * space.
- *
- * Returns:
- * 0 - indicate everything worked ok.
- * != 0 - error indication
- */
-int SkPciReadCfgDWord(
-SK_AC *pAC, /* Adapter Control structure pointer */
-int PciAddr, /* PCI register address */
-SK_U32 *pVal) /* pointer to store the read value */
-{
- pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
- return(0);
-} /* SkPciReadCfgDWord */
-
-
-/*****************************************************************************
- *
- * SkPciReadCfgWord - read a 16 bit value from pci config space
- *
- * Description:
- * This routine reads a 16 bit value from the pci configuration
- * space.
- *
- * Returns:
- * 0 - indicate everything worked ok.
- * != 0 - error indication
- */
-int SkPciReadCfgWord(
-SK_AC *pAC, /* Adapter Control structure pointer */
-int PciAddr, /* PCI register address */
-SK_U16 *pVal) /* pointer to store the read value */
-{
- pci_read_config_word(pAC->PciDev, PciAddr, pVal);
- return(0);
-} /* SkPciReadCfgWord */
-
-
-/*****************************************************************************
- *
- * SkPciReadCfgByte - read a 8 bit value from pci config space
- *
- * Description:
- * This routine reads a 8 bit value from the pci configuration
- * space.
- *
- * Returns:
- * 0 - indicate everything worked ok.
- * != 0 - error indication
- */
-int SkPciReadCfgByte(
-SK_AC *pAC, /* Adapter Control structure pointer */
-int PciAddr, /* PCI register address */
-SK_U8 *pVal) /* pointer to store the read value */
-{
- pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
- return(0);
-} /* SkPciReadCfgByte */
-
-
-/*****************************************************************************
- *
- * SkPciWriteCfgDWord - write a 32 bit value to pci config space
- *
- * Description:
- * This routine writes a 32 bit value to the pci configuration
- * space.
- *
- * Returns:
- * 0 - indicate everything worked ok.
- * != 0 - error indication
- */
-int SkPciWriteCfgDWord(
-SK_AC *pAC, /* Adapter Control structure pointer */
-int PciAddr, /* PCI register address */
-SK_U32 Val) /* pointer to store the read value */
-{
- pci_write_config_dword(pAC->PciDev, PciAddr, Val);
- return(0);
-} /* SkPciWriteCfgDWord */
-
-
-/*****************************************************************************
- *
- * SkPciWriteCfgWord - write a 16 bit value to pci config space
- *
- * Description:
- * This routine writes a 16 bit value to the pci configuration
- * space. The flag PciConfigUp indicates whether the config space
- * is accesible or must be set up first.
- *
- * Returns:
- * 0 - indicate everything worked ok.
- * != 0 - error indication
- */
-int SkPciWriteCfgWord(
-SK_AC *pAC, /* Adapter Control structure pointer */
-int PciAddr, /* PCI register address */
-SK_U16 Val) /* pointer to store the read value */
-{
- pci_write_config_word(pAC->PciDev, PciAddr, Val);
- return(0);
-} /* SkPciWriteCfgWord */
-
-
-/*****************************************************************************
- *
- * SkPciWriteCfgWord - write a 8 bit value to pci config space
- *
- * Description:
- * This routine writes a 8 bit value to the pci configuration
- * space. The flag PciConfigUp indicates whether the config space
- * is accesible or must be set up first.
- *
- * Returns:
- * 0 - indicate everything worked ok.
- * != 0 - error indication
- */
-int SkPciWriteCfgByte(
-SK_AC *pAC, /* Adapter Control structure pointer */
-int PciAddr, /* PCI register address */
-SK_U8 Val) /* pointer to store the read value */
-{
- pci_write_config_byte(pAC->PciDev, PciAddr, Val);
- return(0);
-} /* SkPciWriteCfgByte */
-
-
-/*****************************************************************************
- *
- * SkDrvEvent - handle driver events
- *
- * Description:
- * This function handles events from all modules directed to the driver
- *
- * Context:
- * Is called under protection of slow path lock.
- *
- * Returns:
- * 0 if everything ok
- * < 0 on error
- *
- */
-int SkDrvEvent(
-SK_AC *pAC, /* pointer to adapter context */
-SK_IOC IoC, /* io-context */
-SK_U32 Event, /* event-id */
-SK_EVPARA Param) /* event-parameter */
-{
-SK_MBUF *pRlmtMbuf; /* pointer to a rlmt-mbuf structure */
-struct sk_buff *pMsg; /* pointer to a message block */
-int FromPort; /* the port from which we switch away */
-int ToPort; /* the port we switch to */
-SK_EVPARA NewPara; /* parameter for further events */
-#if 0
-int Stat;
-#endif
-unsigned long Flags;
-SK_BOOL DualNet;
-
- switch (Event) {
- case SK_DRV_ADAP_FAIL:
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("ADAPTER FAIL EVENT\n"));
- printk("%s: Adapter failed.\n", pAC->dev[0]->name);
- /* disable interrupts */
- SK_OUT32(pAC->IoBase, B0_IMSK, 0);
- /* cgoos */
- break;
- case SK_DRV_PORT_FAIL:
- FromPort = Param.Para32[0];
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("PORT FAIL EVENT, Port: %d\n", FromPort));
- if (FromPort == 0) {
- printk("%s: Port A failed.\n", pAC->dev[0]->name);
- } else {
- printk("%s: Port B failed.\n", pAC->dev[1]->name);
- }
- /* cgoos */
- break;
- case SK_DRV_PORT_RESET: /* SK_U32 PortIdx */
- /* action list 4 */
- FromPort = Param.Para32[0];
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("PORT RESET EVENT, Port: %d ", FromPort));
- NewPara.Para64 = FromPort;
- SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
- spin_lock_irqsave(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
- SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
-#if 0
- pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
-#endif
- spin_unlock_irqrestore(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
-
- /* clear rx ring from received frames */
- ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
-
- ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
- spin_lock_irqsave(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
-
- /* tschilling: Handling of return value inserted. */
- if (SkGeInitPort(pAC, IoC, FromPort)) {
- if (FromPort == 0) {
- printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
- } else {
- printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
- }
- }
- SkAddrMcUpdate(pAC,IoC, FromPort);
- PortReInitBmu(pAC, FromPort);
- SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
- ClearAndStartRx(pAC, FromPort);
- spin_unlock_irqrestore(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
- break;
- case SK_DRV_NET_UP: /* SK_U32 PortIdx */
- /* action list 5 */
- FromPort = Param.Para32[0];
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("NET UP EVENT, Port: %d ", Param.Para32[0]));
-#ifdef SK98_INFO
- printk("%s: network connection up using"
- " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
-
- /* tschilling: Values changed according to LinkSpeedUsed. */
- Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
- if (Stat == SK_LSPEED_STAT_10MBPS) {
- printk(" speed: 10\n");
- } else if (Stat == SK_LSPEED_STAT_100MBPS) {
- printk(" speed: 100\n");
- } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
- printk(" speed: 1000\n");
- } else {
- printk(" speed: unknown\n");
- }
-
- Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
- if (Stat == SK_LMODE_STAT_AUTOHALF ||
- Stat == SK_LMODE_STAT_AUTOFULL) {
- printk(" autonegotiation: yes\n");
- }
- else {
- printk(" autonegotiation: no\n");
- }
- if (Stat == SK_LMODE_STAT_AUTOHALF ||
- Stat == SK_LMODE_STAT_HALF) {
- printk(" duplex mode: half\n");
- }
- else {
- printk(" duplex mode: full\n");
- }
- Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
- if (Stat == SK_FLOW_STAT_REM_SEND ) {
- printk(" flowctrl: remote send\n");
- }
- else if (Stat == SK_FLOW_STAT_LOC_SEND ){
- printk(" flowctrl: local send\n");
- }
- else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
- printk(" flowctrl: symmetric\n");
- }
- else {
- printk(" flowctrl: none\n");
- }
-
- /* tschilling: Check against CopperType now. */
- if ((pAC->GIni.GICopperType == SK_TRUE) &&
- (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
- SK_LSPEED_STAT_1000MBPS)) {
- Stat = pAC->GIni.GP[FromPort].PMSStatus;
- if (Stat == SK_MS_STAT_MASTER ) {
- printk(" role: master\n");
- }
- else if (Stat == SK_MS_STAT_SLAVE ) {
- printk(" role: slave\n");
- }
- else {
- printk(" role: ???\n");
- }
- }
-
-#ifdef SK_ZEROCOPY
- if (pAC->GIni.GIChipId == CHIP_ID_YUKON)
- printk(" scatter-gather: enabled\n");
- else
- printk(" scatter-gather: disabled\n");
-
-#else
- printk(" scatter-gather: disabled\n");
-#endif
-#endif /* SK98_INFO */
-
- if ((Param.Para32[0] != pAC->ActivePort) &&
- (pAC->RlmtNets == 1)) {
- NewPara.Para32[0] = pAC->ActivePort;
- NewPara.Para32[1] = Param.Para32[0];
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
- NewPara);
- }
-
- /* Inform the world that link protocol is up. */
-#if 0
- pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
-#endif
-
- break;
- case SK_DRV_NET_DOWN: /* SK_U32 Reason */
- /* action list 7 */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("NET DOWN EVENT "));
-#ifdef SK98_INFO
- printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
-#endif
-#if 0
- pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
-#endif
- break;
- case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("PORT SWITCH HARD "));
- case SK_DRV_SWITCH_SOFT: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
- /* action list 6 */
- printk("%s: switching to port %c\n", pAC->dev[0]->name,
- 'A'+Param.Para32[1]);
- case SK_DRV_SWITCH_INTERN: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
- FromPort = Param.Para32[0];
- ToPort = Param.Para32[1];
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("PORT SWITCH EVENT, From: %d To: %d (Pref %d) ",
- FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
- NewPara.Para64 = FromPort;
- SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
- NewPara.Para64 = ToPort;
- SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
- spin_lock_irqsave(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
- spin_lock_irqsave(
- &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
- SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
- SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
- spin_unlock_irqrestore(
- &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
- spin_unlock_irqrestore(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
-
- ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
- ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
-
- ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
- ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
- spin_lock_irqsave(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
- spin_lock_irqsave(
- &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
- pAC->ActivePort = ToPort;
-#if 0
- SetQueueSizes(pAC);
-#else
- /* tschilling: New common function with minimum size check. */
- DualNet = SK_FALSE;
- if (pAC->RlmtNets == 2) {
- DualNet = SK_TRUE;
- }
-
- if (SkGeInitAssignRamToQueues(
- pAC,
- pAC->ActivePort,
- DualNet)) {
- spin_unlock_irqrestore(
- &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
- spin_unlock_irqrestore(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
- printk("SkGeInitAssignRamToQueues failed.\n");
- break;
- }
-#endif
- /* tschilling: Handling of return values inserted. */
- if (SkGeInitPort(pAC, IoC, FromPort) ||
- SkGeInitPort(pAC, IoC, ToPort)) {
- printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
- }
- if (Event == SK_DRV_SWITCH_SOFT) {
- SkMacRxTxEnable(pAC, IoC, FromPort);
- }
- SkMacRxTxEnable(pAC, IoC, ToPort);
- SkAddrSwap(pAC, IoC, FromPort, ToPort);
- SkAddrMcUpdate(pAC, IoC, FromPort);
- SkAddrMcUpdate(pAC, IoC, ToPort);
- PortReInitBmu(pAC, FromPort);
- PortReInitBmu(pAC, ToPort);
- SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
- SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
- ClearAndStartRx(pAC, FromPort);
- ClearAndStartRx(pAC, ToPort);
- spin_unlock_irqrestore(
- &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
- spin_unlock_irqrestore(
- &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
- Flags);
- break;
- case SK_DRV_RLMT_SEND: /* SK_MBUF *pMb */
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("RLS "));
- pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
- pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
- skb_put(pMsg, pRlmtMbuf->Length);
- if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
- pMsg) < 0)
-
- DEV_KFREE_SKB_ANY(pMsg);
- break;
- default:
- break;
- }
- SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
- ("END EVENT "));
-
- return (0);
-} /* SkDrvEvent */
-
-
-/*****************************************************************************
- *
- * SkErrorLog - log errors
- *
- * Description:
- * This function logs errors to the system buffer and to the console
- *
- * Returns:
- * 0 if everything ok
- * < 0 on error
- *
- */
-void SkErrorLog(
-SK_AC *pAC,
-int ErrClass,
-int ErrNum,
-char *pErrorMsg)
-{
-char ClassStr[80];
-
- switch (ErrClass) {
- case SK_ERRCL_OTHER:
- strcpy(ClassStr, "Other error");
- break;
- case SK_ERRCL_CONFIG:
- strcpy(ClassStr, "Configuration error");
- break;
- case SK_ERRCL_INIT:
- strcpy(ClassStr, "Initialization error");
- break;
- case SK_ERRCL_NORES:
- strcpy(ClassStr, "Out of resources error");
- break;
- case SK_ERRCL_SW:
- strcpy(ClassStr, "internal Software error");
- break;
- case SK_ERRCL_HW:
- strcpy(ClassStr, "Hardware failure");
- break;
- case SK_ERRCL_COMM:
- strcpy(ClassStr, "Communication error");
- break;
- }
- printk(KERN_INFO "%s: -- ERROR --\n Class: %s\n"
- " Nr: 0x%x\n Msg: %s\n", pAC->dev[0]->name,
- ClassStr, ErrNum, pErrorMsg);
-
-} /* SkErrorLog */
-
-#ifdef DEBUG
-/****************************************************************************/
-/* "debug only" section *****************************************************/
-/****************************************************************************/
-
-
-/*****************************************************************************
- *
- * DumpMsg - print a frame
- *
- * Description:
- * This function prints frames to the system logfile/to the console.
- *
- * Returns: N/A
- *
- */
-static void DumpMsg(struct sk_buff *skb, char *str)
-{
- int msglen;
-
- if (skb == NULL) {
- printk("DumpMsg(): NULL-Message\n");
- return;
- }
-
- if (skb->data == NULL) {
- printk("DumpMsg(): Message empty\n");
- return;
- }
-
- msglen = skb->len;
- if (msglen > 64)
- msglen = 64;
-
- printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
-
- DumpData((char *)skb->data, msglen);
-
- printk("------- End of message ---------\n");
-} /* DumpMsg */
-
-
-/*****************************************************************************
- *
- * DumpData - print a data area
- *
- * Description:
- * This function prints a area of data to the system logfile/to the
- * console.
- *
- * Returns: N/A
- *
- */
-static void DumpData(char *p, int size)
-{
-register int i;
-int haddr, addr;
-char hex_buffer[180];
-char asc_buffer[180];
-char HEXCHAR[] = "0123456789ABCDEF";
-
- addr = 0;
- haddr = 0;
- hex_buffer[0] = 0;
- asc_buffer[0] = 0;
- for (i=0; i < size; ) {
- if (*p >= '0' && *p <='z')
- asc_buffer[addr] = *p;
- else
- asc_buffer[addr] = '.';
- addr++;
- asc_buffer[addr] = 0;
- hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[*p & 0x0f];
- haddr++;
- hex_buffer[haddr] = ' ';
- haddr++;
- hex_buffer[haddr] = 0;
- p++;
- i++;
- if (i%16 == 0) {
- printk("%s %s\n", hex_buffer, asc_buffer);
- addr = 0;
- haddr = 0;
- }
- }
-} /* DumpData */
-
-
-/*****************************************************************************
- *
- * DumpLong - print a data area as long values
- *
- * Description:
- * This function prints a area of data to the system logfile/to the
- * console.
- *
- * Returns: N/A
- *
- */
-static void DumpLong(char *pc, int size)
-{
-register int i;
-int haddr, addr;
-char hex_buffer[180];
-char asc_buffer[180];
-char HEXCHAR[] = "0123456789ABCDEF";
-long *p;
-int l;
-
- addr = 0;
- haddr = 0;
- hex_buffer[0] = 0;
- asc_buffer[0] = 0;
- p = (long*) pc;
- for (i=0; i < size; ) {
- l = (long) *p;
- hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[(l >> 24) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[(l >> 20) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[(l >> 16) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[(l >> 12) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[(l >> 8) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[(l >> 4) & 0xf];
- haddr++;
- hex_buffer[haddr] = HEXCHAR[l & 0x0f];
- haddr++;
- hex_buffer[haddr] = ' ';
- haddr++;
- hex_buffer[haddr] = 0;
- p++;
- i++;
- if (i%8 == 0) {
- printk("%4x %s\n", (i-8)*4, hex_buffer);
- haddr = 0;
- }
- }
- printk("------------------------\n");
-} /* DumpLong */
-
-#endif
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgehwt.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.13 $
- * Date: $Date: 1999/11/22 13:31:12 $
- * Purpose: Hardware Timer.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgehwt.c,v $
- * Revision 1.13 1999/11/22 13:31:12 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.12 1998/10/15 15:11:34 gklug
- * fix: ID_sccs to SysKonnectFileId
- *
- * Revision 1.11 1998/10/08 15:27:51 gklug
- * chg: correction factor is host clock dependent
- *
- * Revision 1.10 1998/09/15 14:18:31 cgoos
- * Changed more BOOLEANs to SK_xxx
- *
- * Revision 1.9 1998/09/15 14:16:06 cgoos
- * Changed line 107: FALSE to SK_FALSE
- *
- * Revision 1.8 1998/08/24 13:04:44 gklug
- * fix: typo
- *
- * Revision 1.7 1998/08/19 09:50:49 gklug
- * fix: remove struct keyword from c-code (see CCC) add typedefs
- *
- * Revision 1.6 1998/08/17 09:59:02 gklug
- * fix: typos
- *
- * Revision 1.5 1998/08/14 07:09:10 gklug
- * fix: chg pAc -> pAC
- *
- * Revision 1.4 1998/08/10 14:14:52 gklug
- * rmv: unneccessary SK_ADDR macro
- *
- * Revision 1.3 1998/08/07 12:53:44 gklug
- * fix: first compiled version
- *
- * Revision 1.2 1998/08/07 09:19:29 gklug
- * adapt functions to the C coding conventions
- * rmv unneccessary functions.
- *
- * Revision 1.1 1998/08/05 11:28:36 gklug
- * first version: adapted from SMT/FDDI
- *
- *
- *
- *
- ******************************************************************************/
-
-
-#include <config.h>
-
-/*
- Event queue and dispatcher
-*/
-static const char SysKonnectFileId[] =
- "$Header: /usr56/projects/ge/schedule/skgehwt.c,v 1.13 1999/11/22 13:31:12 cgoos Exp $" ;
-
-#include "h/skdrv1st.h" /* Driver Specific Definitions */
-#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-
-#ifdef __C2MAN__
-/*
- Hardware Timer function queue management.
-
- General Description:
-
- */
-intro()
-{}
-#endif
-
-/*
- * Prototypes of local functions.
- */
-#define SK_HWT_MAX (65000)
-
-/* correction factor */
-#define SK_HWT_FAC (1000 * (SK_U32)pAC->GIni.GIHstClkFact / 100)
-
-/*
- * Initialize hardware timer.
- *
- * Must be called during init level 1.
- */
-void SkHwtInit(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc) /* IoContext */
-{
- pAC->Hwt.TStart = 0 ;
- pAC->Hwt.TStop = 0 ;
- pAC->Hwt.TActive = SK_FALSE ;
-
- SkHwtStop(pAC,Ioc) ;
-}
-
-/*
- *
- * Start hardware timer (clock ticks are 16us).
- *
- */
-void SkHwtStart(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc, /* IoContext */
-SK_U32 Time) /* Time in units of 16us to load the timer with. */
-{
- SK_U32 Cnt ;
-
- if (Time > SK_HWT_MAX)
- Time = SK_HWT_MAX ;
-
- pAC->Hwt.TStart = Time ;
- pAC->Hwt.TStop = 0L ;
-
- Cnt = Time ;
-
- /*
- * if time < 16 us
- * time = 16 us
- */
- if (!Cnt) {
- Cnt++ ;
- }
-
- SK_OUT32(Ioc, B2_TI_INI, Cnt * SK_HWT_FAC) ;
- SK_OUT16(Ioc, B2_TI_CRTL, TIM_START) ; /* Start timer. */
-
- pAC->Hwt.TActive = SK_TRUE ;
-}
-
-/*
- * Stop hardware timer.
- * and clear the timer IRQ
- */
-void SkHwtStop(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc) /* IoContext */
-{
- SK_OUT16(Ioc, B2_TI_CRTL, TIM_STOP) ;
- SK_OUT16(Ioc, B2_TI_CRTL, TIM_CLR_IRQ) ;
-
- pAC->Hwt.TActive = SK_FALSE ;
-}
-
-
-/*
- * Stop hardware timer and read time elapsed since last start.
- *
- * returns
- * The elapsed time since last start in units of 16us.
- *
- */
-SK_U32 SkHwtRead(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc) /* IoContext */
-{
- SK_U32 TRead ;
- SK_U32 IStatus ;
-
- if (pAC->Hwt.TActive) {
- SkHwtStop(pAC,Ioc) ;
-
- SK_IN32(Ioc, B2_TI_VAL, &TRead);
- TRead /= SK_HWT_FAC;
-
- SK_IN32(Ioc, B0_ISRC, &IStatus);
-
- /* Check if timer expired (or wraparound). */
- if ((TRead > pAC->Hwt.TStart) || (IStatus & IS_TIMINT)) {
- SkHwtStop(pAC,Ioc) ;
- pAC->Hwt.TStop = pAC->Hwt.TStart ;
- } else {
- pAC->Hwt.TStop = pAC->Hwt.TStart - TRead ;
- }
- }
- return (pAC->Hwt.TStop) ;
-}
-
-/*
- * interrupt source= timer
- */
-void SkHwtIsr(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc) /* IoContext */
-{
- SkHwtStop(pAC,Ioc);
- pAC->Hwt.TStop = pAC->Hwt.TStart;
- SkTimerDone(pAC,Ioc) ;
-}
-/* End of file */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgeinit.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.85 $
- * Date: $Date: 2003/02/05 15:30:33 $
- * Purpose: Contains functions to initialize the GE HW
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgeinit.c,v $
- * Revision 1.85 2003/02/05 15:30:33 rschmidt
- * Corrected setting of GIHstClkFact (Host Clock Factor) and
- * GIPollTimerVal (Descr. Poll Timer Init Value) for YUKON.
- * Editorial changes.
- *
- * Revision 1.84 2003/01/28 09:57:25 rschmidt
- * Added detection of YUKON-Lite Rev. A0 (stored in GIYukonLite).
- * Disabled Rx GMAC FIFO Flush for YUKON-Lite Rev. A0.
- * Added support for CLK_RUN (YUKON-Lite).
- * Added additional check of PME from D3cold for setting GIVauxAvail.
- * Editorial changes.
- *
- * Revision 1.83 2002/12/17 16:15:41 rschmidt
- * Added default setting of PhyType (Copper) for YUKON.
- * Added define around check for HW self test results.
- * Editorial changes.
- *
- * Revision 1.82 2002/12/05 13:40:21 rschmidt
- * Added setting of Rx GMAC FIFO Flush Mask register.
- * Corrected PhyType with new define SK_PHY_MARV_FIBER when
- * YUKON Fiber board was found.
- * Editorial changes.
- *
- * Revision 1.81 2002/11/15 12:48:35 rschmidt
- * Replaced message SKERR_HWI_E018 with SKERR_HWI_E024 for Rx queue error
- * in SkGeStopPort().
- * Added init for pAC->GIni.GIGenesis with SK_FALSE in YUKON-branch.
- * Editorial changes.
- *
- * Revision 1.80 2002/11/12 17:28:30 rschmidt
- * Initialized GIPciSlot64 and GIPciClock66 in SkGeInit1().
- * Reduced PCI FIFO watermarks for 32bit/33MHz bus in SkGeInitBmu().
- * Editorial changes.
- *
- * Revision 1.79 2002/10/21 09:31:02 mkarl
- * Changed SkGeInitAssignRamToQueues(), removed call to
- * SkGeInitAssignRamToQueues in SkGeInit1 and fixed compiler warning in
- * SkGeInit1.
- *
- * Revision 1.78 2002/10/16 15:55:07 mkarl
- * Fixed a bug in SkGeInitAssignRamToQueues.
- *
- * Revision 1.77 2002/10/14 15:07:22 rschmidt
- * Corrected timeout handling for Rx queue in SkGeStopPort() (#10748)
- * Editorial changes.
- *
- * Revision 1.76 2002/10/11 09:24:38 mkarl
- * Added check for HW self test results.
- *
- * Revision 1.75 2002/10/09 16:56:44 mkarl
- * Now call SkGeInitAssignRamToQueues() in Init Level 1 in order to assign
- * the adapter memory to the queues. This default assignment is not suitable
- * for dual net mode.
- *
- * Revision 1.74 2002/09/12 08:45:06 rwahl
- * Set defaults for PMSCap, PLinkSpeed & PLinkSpeedCap dependent on PHY.
- *
- * Revision 1.73 2002/08/16 15:19:45 rschmidt
- * Corrected check for Tx queues in SkGeCheckQSize().
- * Added init for new entry GIGenesis and GICopperType
- * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
- * Replaced wrong 1st para pAC with IoC in SK_IN/OUT macros.
- *
- * Revision 1.72 2002/08/12 13:38:55 rschmidt
- * Added check if VAUX is available (stored in GIVauxAvail)
- * Initialized PLinkSpeedCap in Port struct with SK_LSPEED_CAP_1000MBPS
- * Editorial changes.
- *
- * Revision 1.71 2002/08/08 16:32:58 rschmidt
- * Added check for Tx queues in SkGeCheckQSize().
- * Added start of Time Stamp Timer (YUKON) in SkGeInit2().
- * Editorial changes.
- *
- * Revision 1.70 2002/07/23 16:04:26 rschmidt
- * Added init for GIWolOffs (HW-Bug in YUKON 1st rev.)
- * Minor changes
- *
- * Revision 1.69 2002/07/17 17:07:08 rwahl
- * - SkGeInit1(): fixed PHY type debug output; corrected init of GIFunc
- * table & GIMacType.
- * - Editorial changes.
- *
- * Revision 1.68 2002/07/15 18:38:31 rwahl
- * Added initialization for MAC type dependent function table.
- *
- * Revision 1.67 2002/07/15 15:45:39 rschmidt
- * Added Tx Store & Forward for YUKON (GMAC Tx FIFO is only 1 kB)
- * Replaced SK_PHY_MARV by SK_PHY_MARV_COPPER
- * Editorial changes
- *
- * Revision 1.66 2002/06/10 09:35:08 rschmidt
- * Replaced C++ comments (//)
- * Editorial changes
- *
- * Revision 1.65 2002/06/05 08:33:37 rschmidt
- * Changed GIRamSize and Reset sequence for YUKON.
- * SkMacInit() replaced by SkXmInitMac() resp. SkGmInitMac()
- *
- * Revision 1.64 2002/04/25 13:03:20 rschmidt
- * Changes for handling YUKON.
- * Removed reference to xmac_ii.h (not necessary).
- * Moved all defines into header file.
- * Replaced all SkXm...() functions with SkMac...() to handle also
- * YUKON's GMAC.
- * Added handling for GMAC FIFO in SkGeInitMacFifo(), SkGeStopPort().
- * Removed 'goto'-directive from SkGeCfgSync(), SkGeCheckQSize().
- * Replaced all XMAC-access macros by functions: SkMacRxTxDisable(),
- * SkMacFlushTxFifo().
- * Optimized timeout handling in SkGeStopPort().
- * Initialized PLinkSpeed in Port struct with SK_LSPEED_AUTO.
- * Release of GMAC Link Control reset in SkGeInit1().
- * Initialized GIChipId and GIChipRev in GE Init structure.
- * Added GIRamSize and PhyType values for YUKON.
- * Removed use of PRxCmd to setup XMAC.
- * Moved setting of XM_RX_DIS_CEXT to SkXmInitMac().
- * Use of SkGeXmitLED() only for GENESIS.
- * Changes for V-CPU support.
- * Editorial changes.
- *
- * Revision 1.63 2001/04/05 11:02:09 rassmann
- * Stop Port check of the STOP bit did not take 2/18 sec as wanted.
- *
- * Revision 1.62 2001/02/07 07:54:21 rassmann
- * Corrected copyright.
- *
- * Revision 1.61 2001/01/31 15:31:40 gklug
- * fix: problem with autosensing an SR8800 switch
- *
- * Revision 1.60 2000/10/18 12:22:21 cgoos
- * Added workaround for half duplex hangup.
- *
- * Revision 1.59 2000/10/10 11:22:06 gklug
- * add: in manual half duplex mode ignore carrier extension errors
- *
- * Revision 1.58 2000/10/02 14:10:27 rassmann
- * Reading BCOM PHY after releasing reset until it returns a valid value.
- *
- * Revision 1.57 2000/08/03 14:55:28 rassmann
- * Waiting for I2C to be ready before de-initializing adapter
- * (prevents sensors from hanging up).
- *
- * Revision 1.56 2000/07/27 12:16:48 gklug
- * fix: Stop Port check of the STOP bit does now take 2/18 sec as wanted
- *
- * Revision 1.55 1999/11/22 13:32:26 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.54 1999/10/26 07:32:54 malthoff
- * Initialize PHWLinkUp with SK_FALSE. Required for Diagnostics.
- *
- * Revision 1.53 1999/08/12 19:13:50 malthoff
- * Fix for 1000BT. Do not owerwrite XM_MMU_CMD when
- * disabling receiver and transmitter. Other bits
- * may be lost.
- *
- * Revision 1.52 1999/07/01 09:29:54 gklug
- * fix: DoInitRamQueue needs pAC
- *
- * Revision 1.51 1999/07/01 08:42:21 gklug
- * chg: use Store & forward for RAM buffer when Jumbos are used
- *
- * Revision 1.50 1999/05/27 13:19:38 cgoos
- * Added Tx PCI watermark initialization.
- * Removed Tx RAM queue Store & Forward setting.
- *
- * Revision 1.49 1999/05/20 14:32:45 malthoff
- * SkGeLinkLED() is completly removed now.
- *
- * Revision 1.48 1999/05/19 07:28:24 cgoos
- * SkGeLinkLED no more available for drivers.
- * Changes for 1000Base-T.
- *
- * Revision 1.47 1999/04/08 13:57:45 gklug
- * add: Init of new port struct fiels PLinkResCt
- * chg: StopPort Timer check
- *
- * Revision 1.46 1999/03/25 07:42:15 malthoff
- * SkGeStopPort(): Add workaround for cache incoherency.
- * Create error log entry, disable port, and
- * exit loop if it does not terminate.
- * Add XM_RX_LENERR_OK to the default value for the
- * XMAC receive command register.
- *
- * Revision 1.45 1999/03/12 16:24:47 malthoff
- * Remove PPollRxD and PPollTxD.
- * Add check for GIPollTimerVal.
- *
- * Revision 1.44 1999/03/12 13:40:23 malthoff
- * Fix: SkGeXmitLED(), SK_LED_TST mode does not work.
- * Add: Jumbo frame support.
- * Chg: Resolution of parameter IntTime in SkGeCfgSync().
- *
- * Revision 1.43 1999/02/09 10:29:46 malthoff
- * Bugfix: The previous modification again also for the second location.
- *
- * Revision 1.42 1999/02/09 09:35:16 malthoff
- * Bugfix: The bits '66 MHz Capable' and 'NEWCAP are reset while
- * clearing the error bits in the PCI status register.
- *
- * Revision 1.41 1999/01/18 13:07:02 malthoff
- * Bugfix: Do not use CFG cycles after during Init- or Runtime, because
- * they may not be available after Boottime.
- *
- * Revision 1.40 1999/01/11 12:40:49 malthoff
- * Bug fix: PCI_STATUS: clearing error bits sets the UDF bit.
- *
- * Revision 1.39 1998/12/11 15:17:33 gklug
- * chg: Init LipaAutoNeg with Unknown
- *
- * Revision 1.38 1998/12/10 11:02:57 malthoff
- * Disable Error Log Message when calling SkGeInit(level 2)
- * more than once.
- *
- * Revision 1.37 1998/12/07 12:18:25 gklug
- * add: refinement of autosense mode: take into account the autoneg cap of LiPa
- *
- * Revision 1.36 1998/12/07 07:10:39 gklug
- * fix: init values of LinkBroken/ Capabilities for management
- *
- * Revision 1.35 1998/12/02 10:56:20 gklug
- * fix: do NOT init LoinkSync Counter.
- *
- * Revision 1.34 1998/12/01 10:53:21 gklug
- * add: init of additional Counters for workaround
- *
- * Revision 1.33 1998/12/01 10:00:49 gklug
- * add: init PIsave var in Port struct
- *
- * Revision 1.32 1998/11/26 14:50:40 gklug
- * chg: Default is autosensing with AUTOFULL mode
- *
- * Revision 1.31 1998/11/25 15:36:16 gklug
- * fix: do NOT stop LED Timer when port should be stopped
- *
- * Revision 1.30 1998/11/24 13:15:28 gklug
- * add: Init PCkeckPar struct member
- *
- * Revision 1.29 1998/11/18 13:19:27 malthoff
- * Disable packet arbiter timeouts on receive side.
- * Use maximum timeout value for packet arbiter
- * transmit timeouts.
- * Add TestStopBit() function to handle stop RX/TX
- * problem with active descriptor poll timers.
- * Bug Fix: Descriptor Poll Timer not started, because
- * GIPollTimerVal was initialized with 0.
- *
- * Revision 1.28 1998/11/13 14:24:26 malthoff
- * Bug Fix: SkGeStopPort() may hang if a Packet Arbiter Timout
- * is pending or occurs while waiting for TX_STOP and RX_STOP.
- * The PA timeout is cleared now while waiting for TX- or RX_STOP.
- *
- * Revision 1.27 1998/11/02 11:04:36 malthoff
- * fix the last fix
- *
- * Revision 1.26 1998/11/02 10:37:03 malthoff
- * Fix: SkGePollTxD() enables always the synchronounous poll timer.
- *
- * Revision 1.25 1998/10/28 07:12:43 cgoos
- * Fixed "LED_STOP" in SkGeLnkSyncCnt, "== SK_INIT_IO" in SkGeInit.
- * Removed: Reset of RAM Interface in SkGeStopPort.
- *
- * Revision 1.24 1998/10/27 08:13:12 malthoff
- * Remove temporary code.
- *
- * Revision 1.23 1998/10/26 07:45:03 malthoff
- * Add Address Calculation Workaround: If the EPROM byte
- * Id is 3, the address offset is 512 kB.
- * Initialize default values for PLinkMode and PFlowCtrlMode.
- *
- * Revision 1.22 1998/10/22 09:46:47 gklug
- * fix SysKonnectFileId typo
- *
- * Revision 1.21 1998/10/20 12:11:56 malthoff
- * Don't dendy the Queue config if the size of the unused
- * Rx qeueu is zero.
- *
- * Revision 1.20 1998/10/19 07:27:58 malthoff
- * SkGeInitRamIface() is public to be called by diagnostics.
- *
- * Revision 1.19 1998/10/16 13:33:45 malthoff
- * Fix: enabling descriptor polling is not allowed until
- * the descriptor addresses are set. Descriptor polling
- * must be handled by the driver.
- *
- * Revision 1.18 1998/10/16 10:58:27 malthoff
- * Remove temp. code for Diag prototype.
- * Remove lint warning for dummy reads.
- * Call SkGeLoadLnkSyncCnt() during SkGeInitPort().
- *
- * Revision 1.17 1998/10/14 09:16:06 malthoff
- * Change parameter LimCount and programming of
- * the limit counter in SkGeCfgSync().
- *
- * Revision 1.16 1998/10/13 09:21:16 malthoff
- * Don't set XM_RX_SELF_RX in RxCmd Reg, because it's
- * like a Loopback Mode in half duplex.
- *
- * Revision 1.15 1998/10/09 06:47:40 malthoff
- * SkGeInitMacArb(): set recovery counters init value
- * to zero although this counters are not uesd.
- * Bug fix in Rx Upper/Lower Pause Threshold calculation.
- * Add XM_RX_SELF_RX to RxCmd.
- *
- * Revision 1.14 1998/10/06 15:15:53 malthoff
- * Make sure no pending IRQ is cleared in SkGeLoadLnkSyncCnt().
- *
- * Revision 1.13 1998/10/06 14:09:36 malthoff
- * Add SkGeLoadLnkSyncCnt(). Modify
- * the 'port stopped' condition according
- * to the current problem report.
- *
- * Revision 1.12 1998/10/05 08:17:21 malthoff
- * Add functions: SkGePollRxD(), SkGePollTxD(),
- * DoCalcAddr(), SkGeCheckQSize(),
- * DoInitRamQueue(), and SkGeCfgSync().
- * Add coding for SkGeInitMacArb(), SkGeInitPktArb(),
- * SkGeInitMacFifo(), SkGeInitRamBufs(),
- * SkGeInitRamIface(), and SkGeInitBmu().
- *
- * Revision 1.11 1998/09/29 08:26:29 malthoff
- * bug fix: SkGeInit0() 'i' should be increment.
- *
- * Revision 1.10 1998/09/28 13:19:01 malthoff
- * Coding time: Save the done work.
- * Modify SkGeLinkLED(), add SkGeXmitLED(),
- * define SkGeCheckQSize(), SkGeInitMacArb(),
- * SkGeInitPktArb(), SkGeInitMacFifo(),
- * SkGeInitRamBufs(), SkGeInitRamIface(),
- * and SkGeInitBmu(). Do coding for SkGeStopPort(),
- * SkGeInit1(), SkGeInit2(), and SkGeInit3().
- * Do coding for SkGeDinit() and SkGeInitPort().
- *
- * Revision 1.9 1998/09/16 14:29:05 malthoff
- * Some minor changes.
- *
- * Revision 1.8 1998/09/11 05:29:14 gklug
- * add: init state of a port
- *
- * Revision 1.7 1998/09/04 09:26:25 malthoff
- * Short temporary modification.
- *
- * Revision 1.6 1998/09/04 08:27:59 malthoff
- * Remark the do-while in StopPort() because it never ends
- * without a GE adapter.
- *
- * Revision 1.5 1998/09/03 14:05:45 malthoff
- * Change comment for SkGeInitPort(). Do not
- * repair the queue sizes if invalid.
- *
- * Revision 1.4 1998/09/03 10:03:19 malthoff
- * Implement the new interface according to the
- * reviewed interface specification.
- *
- * Revision 1.3 1998/08/19 09:11:25 gklug
- * fix: struct are removed from c-source (see CCC)
- *
- * Revision 1.2 1998/07/28 12:33:58 malthoff
- * Add 'IoC' parameter in function declaration and SK IO macros.
- *
- * Revision 1.1 1998/07/23 09:48:57 malthoff
- * Creation. First dummy 'C' file.
- * SkGeInit(Level 0) is card_start for GE.
- * SkGeDeInit() is card_stop for GE.
- *
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-
-/* global variables ***********************************************************/
-
-/* local variables ************************************************************/
-
-static const char SysKonnectFileId[] =
- "@(#)$Id: skgeinit.c,v 1.85 2003/02/05 15:30:33 rschmidt Exp $ (C) SK ";
-
-struct s_QOffTab {
- int RxQOff; /* Receive Queue Address Offset */
- int XsQOff; /* Sync Tx Queue Address Offset */
- int XaQOff; /* Async Tx Queue Address Offset */
-};
-static struct s_QOffTab QOffTab[] = {
- {Q_R1, Q_XS1, Q_XA1}, {Q_R2, Q_XS2, Q_XA2}
-};
-
-
-/******************************************************************************
- *
- * SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
- *
- * Description:
- * Enable or disable the descriptor polling of the receive descriptor
- * ring (RxD) for port 'Port'.
- * The new configuration is *not* saved over any SkGeStopPort() and
- * SkGeInitPort() calls.
- *
- * Returns:
- * nothing
- */
-void SkGePollRxD(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL PollRxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
- CSR_ENA_POL : CSR_DIS_POL);
-} /* SkGePollRxD */
-
-
-/******************************************************************************
- *
- * SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings
- *
- * Description:
- * Enable or disable the descriptor polling of the transmit descriptor
- * ring(s) (TxD) for port 'Port'.
- * The new configuration is *not* saved over any SkGeStopPort() and
- * SkGeInitPort() calls.
- *
- * Returns:
- * nothing
- */
-void SkGePollTxD(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL PollTxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
-{
- SK_GEPORT *pPrt;
- SK_U32 DWord;
-
- pPrt = &pAC->GIni.GP[Port];
-
- DWord = (PollTxD) ? CSR_ENA_POL : CSR_DIS_POL;
-
- if (pPrt->PXSQSize != 0) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), DWord);
- }
-
- if (pPrt->PXAQSize != 0) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), DWord);
- }
-} /* SkGePollTxD */
-
-
-/******************************************************************************
- *
- * SkGeYellowLED() - Switch the yellow LED on or off.
- *
- * Description:
- * Switch the yellow LED on or off.
- *
- * Note:
- * This function may be called any time after SkGeInit(Level 1).
- *
- * Returns:
- * nothing
- */
-void SkGeYellowLED(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int State) /* yellow LED state, 0 = OFF, 0 != ON */
-{
- if (State == 0) {
- /* Switch yellow LED OFF */
- SK_OUT8(IoC, B0_LED, LED_STAT_OFF);
- }
- else {
- /* Switch yellow LED ON */
- SK_OUT8(IoC, B0_LED, LED_STAT_ON);
- }
-} /* SkGeYellowLED */
-
-
-/******************************************************************************
- *
- * SkGeXmitLED() - Modify the Operational Mode of a transmission LED.
- *
- * Description:
- * The Rx or Tx LED which is specified by 'Led' will be
- * enabled, disabled or switched on in test mode.
- *
- * Note:
- * 'Led' must contain the address offset of the LEDs INI register.
- *
- * Usage:
- * SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_ENA);
- *
- * Returns:
- * nothing
- */
-void SkGeXmitLED(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Led, /* offset to the LED Init Value register */
-int Mode) /* Mode may be SK_LED_DIS, SK_LED_ENA, SK_LED_TST */
-{
- SK_U32 LedIni;
-
- switch (Mode) {
- case SK_LED_ENA:
- LedIni = SK_XMIT_DUR * (SK_U32)pAC->GIni.GIHstClkFact / 100;
- SK_OUT32(IoC, Led + XMIT_LED_INI, LedIni);
- SK_OUT8(IoC, Led + XMIT_LED_CTRL, LED_START);
- break;
- case SK_LED_TST:
- SK_OUT8(IoC, Led + XMIT_LED_TST, LED_T_ON);
- SK_OUT32(IoC, Led + XMIT_LED_CNT, 100);
- SK_OUT8(IoC, Led + XMIT_LED_CTRL, LED_START);
- break;
- case SK_LED_DIS:
- default:
- /*
- * Do NOT stop the LED Timer here. The LED might be
- * in on state. But it needs to go off.
- */
- SK_OUT32(IoC, Led + XMIT_LED_CNT, 0);
- SK_OUT8(IoC, Led + XMIT_LED_TST, LED_T_OFF);
- break;
- }
-
- /*
- * 1000BT: The Transmit LED is driven by the PHY.
- * But the default LED configuration is used for
- * Level One and Broadcom PHYs.
- * (Broadcom: It may be that PHY_B_PEC_EN_LTR has to be set.)
- * (In this case it has to be added here. But we will see. XXX)
- */
-} /* SkGeXmitLED */
-
-
-/******************************************************************************
- *
- * DoCalcAddr() - Calculates the start and the end address of a queue.
- *
- * Description:
- * This function calculates the start and the end address of a queue.
- * Afterwards the 'StartVal' is incremented to the next start position.
- * If the port is already initialized the calculated values
- * will be checked against the configured values and an
- * error will be returned, if they are not equal.
- * If the port is not initialized the values will be written to
- * *StartAdr and *EndAddr.
- *
- * Returns:
- * 0: success
- * 1: configuration error
- */
-static int DoCalcAddr(
-SK_AC *pAC, /* adapter context */
-SK_GEPORT *pPrt, /* port index */
-int QuSize, /* size of the queue to configure in kB */
-SK_U32 *StartVal, /* start value for address calculation */
-SK_U32 *QuStartAddr, /* start addr to calculate */
-SK_U32 *QuEndAddr) /* end address to calculate */
-{
- SK_U32 EndVal;
- SK_U32 NextStart;
- int Rtv;
-
- Rtv = 0;
- if (QuSize == 0) {
- EndVal = *StartVal;
- NextStart = EndVal;
- }
- else {
- EndVal = *StartVal + ((SK_U32)QuSize * 1024) - 1;
- NextStart = EndVal + 1;
- }
-
- if (pPrt->PState >= SK_PRT_INIT) {
- if (*StartVal != *QuStartAddr || EndVal != *QuEndAddr) {
- Rtv = 1;
- }
- }
- else {
- *QuStartAddr = *StartVal;
- *QuEndAddr = EndVal;
- }
-
- *StartVal = NextStart;
- return(Rtv);
-} /* DoCalcAddr */
-
-/******************************************************************************
- *
- * SkGeInitAssignRamToQueues() - allocate default queue sizes
- *
- * Description:
- * This function assigns the memory to the different queues and ports.
- * When DualNet is set to SK_TRUE all ports get the same amount of memory.
- * Otherwise the first port gets most of the memory and all the
- * other ports just the required minimum.
- * This function can only be called when pAC->GIni.GIRamSize and
- * pAC->GIni.GIMacsFound have been initialized, usually this happens
- * at init level 1
- *
- * Returns:
- * 0 - ok
- * 1 - invalid input values
- * 2 - not enough memory
- */
-
-int SkGeInitAssignRamToQueues(
-SK_AC *pAC, /* Adapter context */
-int ActivePort, /* Active Port in RLMT mode */
-SK_BOOL DualNet) /* adapter context */
-{
- int i;
- int UsedKilobytes; /* memory already assigned */
- int ActivePortKilobytes; /* memory available for active port */
- SK_GEPORT *pGePort;
-
- UsedKilobytes = 0;
-
- if (ActivePort >= pAC->GIni.GIMacsFound) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
- ("SkGeInitAssignRamToQueues: ActivePort (%d) invalid\n",
- ActivePort));
- return(1);
- }
- if (((pAC->GIni.GIMacsFound * (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE)) +
- ((RAM_QUOTA_SYNC == 0) ? 0 : SK_MIN_TXQ_SIZE)) > pAC->GIni.GIRamSize) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
- ("SkGeInitAssignRamToQueues: Not enough memory (%d)\n",
- pAC->GIni.GIRamSize));
- return(2);
- }
-
-
- if (DualNet) {
- /* every port gets the same amount of memory */
- ActivePortKilobytes = pAC->GIni.GIRamSize / pAC->GIni.GIMacsFound;
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
-
- pGePort = &pAC->GIni.GP[i];
-
- /* take away the minimum memory for active queues */
- ActivePortKilobytes -= (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE);
-
- /* receive queue gets the minimum + 80% of the rest */
- pGePort->PRxQSize = (int) (ROUND_QUEUE_SIZE_KB((
- ActivePortKilobytes * (unsigned long) RAM_QUOTA_RX) / 100))
- + SK_MIN_RXQ_SIZE;
-
- ActivePortKilobytes -= (pGePort->PRxQSize - SK_MIN_RXQ_SIZE);
-
- /* synchronous transmit queue */
- pGePort->PXSQSize = 0;
-
- /* asynchronous transmit queue */
- pGePort->PXAQSize = (int) ROUND_QUEUE_SIZE_KB(ActivePortKilobytes +
- SK_MIN_TXQ_SIZE);
- }
- }
- else {
- /* Rlmt Mode or single link adapter */
-
- /* Set standby queue size defaults for all standby ports */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
-
- if (i != ActivePort) {
- pGePort = &pAC->GIni.GP[i];
-
- pGePort->PRxQSize = SK_MIN_RXQ_SIZE;
- pGePort->PXAQSize = SK_MIN_TXQ_SIZE;
- pGePort->PXSQSize = 0;
-
- /* Count used RAM */
- UsedKilobytes += pGePort->PRxQSize + pGePort->PXAQSize;
- }
- }
- /* what's left? */
- ActivePortKilobytes = pAC->GIni.GIRamSize - UsedKilobytes;
-
- /* assign it to the active port */
- /* first take away the minimum memory */
- ActivePortKilobytes -= (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE);
- pGePort = &pAC->GIni.GP[ActivePort];
-
- /* receive queue get's the minimum + 80% of the rest */
- pGePort->PRxQSize = (int) (ROUND_QUEUE_SIZE_KB((ActivePortKilobytes *
- (unsigned long) RAM_QUOTA_RX) / 100)) + SK_MIN_RXQ_SIZE;
-
- ActivePortKilobytes -= (pGePort->PRxQSize - SK_MIN_RXQ_SIZE);
-
- /* synchronous transmit queue */
- pGePort->PXSQSize = 0;
-
- /* asynchronous transmit queue */
- pGePort->PXAQSize = (int) ROUND_QUEUE_SIZE_KB(ActivePortKilobytes) +
- SK_MIN_TXQ_SIZE;
- }
-#ifdef VCPU
- VCPUprintf(0, "PRxQSize=%u, PXSQSize=%u, PXAQSize=%u\n",
- pGePort->PRxQSize, pGePort->PXSQSize, pGePort->PXAQSize);
-#endif /* VCPU */
-
- return(0);
-} /* SkGeInitAssignRamToQueues */
-
-/******************************************************************************
- *
- * SkGeCheckQSize() - Checks the Adapters Queue Size Configuration
- *
- * Description:
- * This function verifies the Queue Size Configuration specified
- * in the variables PRxQSize, PXSQSize, and PXAQSize of all
- * used ports.
- * This requirements must be fullfilled to have a valid configuration:
- * - The size of all queues must not exceed GIRamSize.
- * - The queue sizes must be specified in units of 8 kB.
- * - The size of Rx queues of available ports must not be
- * smaller than 16 kB.
- * - The size of at least one Tx queue (synch. or asynch.)
- * of available ports must not be smaller than 16 kB
- * when Jumbo Frames are used.
- * - The RAM start and end addresses must not be changed
- * for ports which are already initialized.
- * Furthermore SkGeCheckQSize() defines the Start and End Addresses
- * of all ports and stores them into the HWAC port structure.
- *
- * Returns:
- * 0: Queue Size Configuration valid
- * 1: Queue Size Configuration invalid
- */
-static int SkGeCheckQSize(
-SK_AC *pAC, /* adapter context */
-int Port) /* port index */
-{
- SK_GEPORT *pPrt;
- int UsedMem; /* total memory used (max. found ports) */
- int i;
- int Rtv;
- int Rtv2;
- SK_U32 StartAddr;
-
- UsedMem = 0;
- Rtv = 0;
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
- pPrt = &pAC->GIni.GP[i];
-
- if ((pPrt->PRxQSize & QZ_UNITS) != 0 ||
- (pPrt->PXSQSize & QZ_UNITS) != 0 ||
- (pPrt->PXAQSize & QZ_UNITS) != 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
- return(1);
- }
-
- if (i == Port && pPrt->PRxQSize < SK_MIN_RXQ_SIZE) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E011, SKERR_HWI_E011MSG);
- return(1);
- }
-
- /*
- * the size of at least one Tx queue (synch. or asynch.) has to be > 0.
- * if Jumbo Frames are used, this size has to be >= 16 kB.
- */
- if ((i == Port && pPrt->PXSQSize == 0 && pPrt->PXAQSize == 0) ||
- (pAC->GIni.GIPortUsage == SK_JUMBO_LINK &&
- ((pPrt->PXSQSize > 0 && pPrt->PXSQSize < SK_MIN_TXQ_SIZE) ||
- (pPrt->PXAQSize > 0 && pPrt->PXAQSize < SK_MIN_TXQ_SIZE)))) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E023, SKERR_HWI_E023MSG);
- return(1);
- }
-
- UsedMem += pPrt->PRxQSize + pPrt->PXSQSize + pPrt->PXAQSize;
- }
-
- if (UsedMem > pAC->GIni.GIRamSize) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
- return(1);
- }
-
- /* Now start address calculation */
- StartAddr = pAC->GIni.GIRamOffs;
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
- pPrt = &pAC->GIni.GP[i];
-
- /* Calculate/Check values for the receive queue */
- Rtv2 = DoCalcAddr(pAC, pPrt, pPrt->PRxQSize, &StartAddr,
- &pPrt->PRxQRamStart, &pPrt->PRxQRamEnd);
- Rtv |= Rtv2;
-
- /* Calculate/Check values for the synchronous Tx queue */
- Rtv2 = DoCalcAddr(pAC, pPrt, pPrt->PXSQSize, &StartAddr,
- &pPrt->PXsQRamStart, &pPrt->PXsQRamEnd);
- Rtv |= Rtv2;
-
- /* Calculate/Check values for the asynchronous Tx queue */
- Rtv2 = DoCalcAddr(pAC, pPrt, pPrt->PXAQSize, &StartAddr,
- &pPrt->PXaQRamStart, &pPrt->PXaQRamEnd);
- Rtv |= Rtv2;
-
- if (Rtv) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E013, SKERR_HWI_E013MSG);
- return(1);
- }
- }
-
- return(0);
-} /* SkGeCheckQSize */
-
-
-/******************************************************************************
- *
- * SkGeInitMacArb() - Initialize the MAC Arbiter
- *
- * Description:
- * This function initializes the MAC Arbiter.
- * It must not be called if there is still an
- * initialized or active port.
- *
- * Returns:
- * nothing
- */
-static void SkGeInitMacArb(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- /* release local reset */
- SK_OUT16(IoC, B3_MA_TO_CTRL, MA_RST_CLR);
-
- /* configure timeout values */
- SK_OUT8(IoC, B3_MA_TOINI_RX1, SK_MAC_TO_53);
- SK_OUT8(IoC, B3_MA_TOINI_RX2, SK_MAC_TO_53);
- SK_OUT8(IoC, B3_MA_TOINI_TX1, SK_MAC_TO_53);
- SK_OUT8(IoC, B3_MA_TOINI_TX2, SK_MAC_TO_53);
-
- SK_OUT8(IoC, B3_MA_RCINI_RX1, 0);
- SK_OUT8(IoC, B3_MA_RCINI_RX2, 0);
- SK_OUT8(IoC, B3_MA_RCINI_TX1, 0);
- SK_OUT8(IoC, B3_MA_RCINI_TX2, 0);
-
- /* recovery values are needed for XMAC II Rev. B2 only */
- /* Fast Output Enable Mode was intended to use with Rev. B2, but now? */
-
- /*
- * There is no start or enable button to push, therefore
- * the MAC arbiter is configured and enabled now.
- */
-} /* SkGeInitMacArb */
-
-
-/******************************************************************************
- *
- * SkGeInitPktArb() - Initialize the Packet Arbiter
- *
- * Description:
- * This function initializes the Packet Arbiter.
- * It must not be called if there is still an
- * initialized or active port.
- *
- * Returns:
- * nothing
- */
-static void SkGeInitPktArb(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- /* release local reset */
- SK_OUT16(IoC, B3_PA_CTRL, PA_RST_CLR);
-
- /* configure timeout values */
- SK_OUT16(IoC, B3_PA_TOINI_RX1, SK_PKT_TO_MAX);
- SK_OUT16(IoC, B3_PA_TOINI_RX2, SK_PKT_TO_MAX);
- SK_OUT16(IoC, B3_PA_TOINI_TX1, SK_PKT_TO_MAX);
- SK_OUT16(IoC, B3_PA_TOINI_TX2, SK_PKT_TO_MAX);
-
- /*
- * enable timeout timers if jumbo frames not used
- * NOTE: the packet arbiter timeout interrupt is needed for
- * half duplex hangup workaround
- */
- if (pAC->GIni.GIPortUsage != SK_JUMBO_LINK) {
- if (pAC->GIni.GIMacsFound == 1) {
- SK_OUT16(IoC, B3_PA_CTRL, PA_ENA_TO_TX1);
- }
- else {
- SK_OUT16(IoC, B3_PA_CTRL, PA_ENA_TO_TX1 | PA_ENA_TO_TX2);
- }
- }
-} /* SkGeInitPktArb */
-
-
-/******************************************************************************
- *
- * SkGeInitMacFifo() - Initialize the MAC FIFOs
- *
- * Description:
- * Initialize all MAC FIFOs of the specified port
- *
- * Returns:
- * nothing
- */
-static void SkGeInitMacFifo(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U16 Word;
-#ifdef VCPU
- SK_U32 DWord;
-#endif /* VCPU */
- /*
- * For each FIFO:
- * - release local reset
- * - use default value for MAC FIFO size
- * - setup defaults for the control register
- * - enable the FIFO
- */
-
- Word = GMF_RX_CTRL_DEF;
-
- if (pAC->GIni.GIGenesis) {
- /* Configure Rx MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_CLR);
- SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_RX_CTRL_DEF);
- SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_ENA_OP_MD);
-
- /* Configure Tx MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_CLR);
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF);
- SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_ENA_OP_MD);
-
- /* Enable frame flushing if jumbo frames used */
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_FLUSH);
- }
- }
- else {
- /* set Rx GMAC FIFO Flush Mask */
- SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_MSK), (SK_U16)RX_FF_FL_DEF_MSK);
-
- if (pAC->GIni.GIYukonLite && pAC->GIni.GIChipId == CHIP_ID_YUKON) {
-
- Word &= ~GMF_RX_F_FL_ON;
- }
-
- /* Configure Rx MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_RST_CLR);
- SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), Word);
-
- /* set Rx GMAC FIFO Flush Threshold (default: 0x0a -> 56 bytes) */
- SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF);
-
- /* Configure Tx MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_CLR);
- SK_OUT16(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U16)GMF_TX_CTRL_DEF);
-
-#ifdef VCPU
- SK_IN32(IoC, MR_ADDR(Port, RX_GMF_AF_THR), &DWord);
- SK_IN32(IoC, MR_ADDR(Port, TX_GMF_AE_THR), &DWord);
-#endif /* VCPU */
-
- /* set Tx GMAC FIFO Almost Empty Threshold */
-/* SK_OUT32(IoC, MR_ADDR(Port, TX_GMF_AE_THR), 0); */
- }
-} /* SkGeInitMacFifo */
-
-
-/******************************************************************************
- *
- * SkGeLoadLnkSyncCnt() - Load the Link Sync Counter and starts counting
- *
- * Description:
- * This function starts the Link Sync Counter of the specified
- * port and enables the generation of an Link Sync IRQ.
- * The Link Sync Counter may be used to detect an active link,
- * if autonegotiation is not used.
- *
- * Note:
- * o To ensure receiving the Link Sync Event the LinkSyncCounter
- * should be initialized BEFORE clearing the XMAC's reset!
- * o Enable IS_LNK_SYNC_M1 and IS_LNK_SYNC_M2 after calling this
- * function.
- *
- * Returns:
- * nothing
- */
-void SkGeLoadLnkSyncCnt(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U32 CntVal) /* Counter value */
-{
- SK_U32 OrgIMsk;
- SK_U32 NewIMsk;
- SK_U32 ISrc;
- SK_BOOL IrqPend;
-
- /* stop counter */
- SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LED_STOP);
-
- /*
- * ASIC problem:
- * Each time starting the Link Sync Counter an IRQ is generated
- * by the adapter. See problem report entry from 21.07.98
- *
- * Workaround: Disable Link Sync IRQ and clear the unexpeced IRQ
- * if no IRQ is already pending.
- */
- IrqPend = SK_FALSE;
- SK_IN32(IoC, B0_ISRC, &ISrc);
- SK_IN32(IoC, B0_IMSK, &OrgIMsk);
- if (Port == MAC_1) {
- NewIMsk = OrgIMsk & ~IS_LNK_SYNC_M1;
- if ((ISrc & IS_LNK_SYNC_M1) != 0) {
- IrqPend = SK_TRUE;
- }
- }
- else {
- NewIMsk = OrgIMsk & ~IS_LNK_SYNC_M2;
- if ((ISrc & IS_LNK_SYNC_M2) != 0) {
- IrqPend = SK_TRUE;
- }
- }
- if (!IrqPend) {
- SK_OUT32(IoC, B0_IMSK, NewIMsk);
- }
-
- /* load counter */
- SK_OUT32(IoC, MR_ADDR(Port, LNK_SYNC_INI), CntVal);
-
- /* start counter */
- SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LED_START);
-
- if (!IrqPend) {
- /* clear the unexpected IRQ, and restore the interrupt mask */
- SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LED_CLR_IRQ);
- SK_OUT32(IoC, B0_IMSK, OrgIMsk);
- }
-} /* SkGeLoadLnkSyncCnt*/
-
-
-/******************************************************************************
- *
- * SkGeCfgSync() - Configure synchronous bandwidth for this port.
- *
- * Description:
- * This function may be used to configure synchronous bandwidth
- * to the specified port. This may be done any time after
- * initializing the port. The configuration values are NOT saved
- * in the HWAC port structure and will be overwritten any
- * time when stopping and starting the port.
- * Any values for the synchronous configuration will be ignored
- * if the size of the synchronous queue is zero!
- *
- * The default configuration for the synchronous service is
- * TXA_ENA_FSYNC. This means if the size of
- * the synchronous queue is unequal zero but no specific
- * synchronous bandwidth is configured, the synchronous queue
- * will always have the 'unlimited' transmit priority!
- *
- * This mode will be restored if the synchronous bandwidth is
- * deallocated ('IntTime' = 0 and 'LimCount' = 0).
- *
- * Returns:
- * 0: success
- * 1: parameter configuration error
- * 2: try to configure quality of service although no
- * synchronous queue is configured
- */
-int SkGeCfgSync(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U32 IntTime, /* Interval Timer Value in units of 8ns */
-SK_U32 LimCount, /* Number of bytes to transfer during IntTime */
-int SyncMode) /* Sync Mode: TXA_ENA_ALLOC | TXA_DIS_ALLOC | 0 */
-{
- int Rtv;
-
- Rtv = 0;
-
- /* check the parameters */
- if (LimCount > IntTime ||
- (LimCount == 0 && IntTime != 0) ||
- (LimCount != 0 && IntTime == 0)) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
- return(1);
- }
-
- if (pAC->GIni.GP[Port].PXSQSize == 0) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E009, SKERR_HWI_E009MSG);
- return(2);
- }
-
- /* calculate register values */
- IntTime = (IntTime / 2) * pAC->GIni.GIHstClkFact / 100;
- LimCount = LimCount / 8;
-
- if (IntTime > TXA_MAX_VAL || LimCount > TXA_MAX_VAL) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
- return(1);
- }
-
- /*
- * - Enable 'Force Sync' to ensure the synchronous queue
- * has the priority while configuring the new values.
- * - Also 'disable alloc' to ensure the settings complies
- * to the SyncMode parameter.
- * - Disable 'Rate Control' to configure the new values.
- * - write IntTime and LimCount
- * - start 'Rate Control' and disable 'Force Sync'
- * if Interval Timer or Limit Counter not zero.
- */
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
- TXA_ENA_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
-
- SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), IntTime);
- SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), LimCount);
-
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
- (SK_U8)(SyncMode & (TXA_ENA_ALLOC | TXA_DIS_ALLOC)));
-
- if (IntTime != 0 || LimCount != 0) {
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL), TXA_DIS_FSYNC | TXA_START_RC);
- }
-
- return(0);
-} /* SkGeCfgSync */
-
-
-/******************************************************************************
- *
- * DoInitRamQueue() - Initialize the RAM Buffer Address of a single Queue
- *
- * Desccription:
- * If the queue is used, enable and initialize it.
- * Make sure the queue is still reset, if it is not used.
- *
- * Returns:
- * nothing
- */
-static void DoInitRamQueue(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int QuIoOffs, /* Queue IO Address Offset */
-SK_U32 QuStartAddr, /* Queue Start Address */
-SK_U32 QuEndAddr, /* Queue End Address */
-int QuType) /* Queue Type (SK_RX_SRAM_Q|SK_RX_BRAM_Q|SK_TX_RAM_Q) */
-{
- SK_U32 RxUpThresVal;
- SK_U32 RxLoThresVal;
-
- if (QuStartAddr != QuEndAddr) {
- /* calculate thresholds, assume we have a big Rx queue */
- RxUpThresVal = (QuEndAddr + 1 - QuStartAddr - SK_RB_ULPP) / 8;
- RxLoThresVal = (QuEndAddr + 1 - QuStartAddr - SK_RB_LLPP_B)/8;
-
- /* build HW address format */
- QuStartAddr = QuStartAddr / 8;
- QuEndAddr = QuEndAddr / 8;
-
- /* release local reset */
- SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_RST_CLR);
-
- /* configure addresses */
- SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_START), QuStartAddr);
- SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_END), QuEndAddr);
- SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_WP), QuStartAddr);
- SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RP), QuStartAddr);
-
- switch (QuType) {
- case SK_RX_SRAM_Q:
- /* configure threshold for small Rx Queue */
- RxLoThresVal += (SK_RB_LLPP_B - SK_RB_LLPP_S) / 8;
-
- /* continue with SK_RX_BRAM_Q */
- case SK_RX_BRAM_Q:
- /* write threshold for Rx Queue */
-
- SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RX_UTPP), RxUpThresVal);
- SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RX_LTPP), RxLoThresVal);
-
- /* the high priority threshold not used */
- break;
- case SK_TX_RAM_Q:
- /*
- * Do NOT use Store & Forward under normal operation due to
- * performance optimization (GENESIS only).
- * But if Jumbo Frames are configured (XMAC Tx FIFO is only 4 kB)
- * or YUKON is used ((GMAC Tx FIFO is only 1 kB)
- * we NEED Store & Forward of the RAM buffer.
- */
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK ||
- !pAC->GIni.GIGenesis) {
- /* enable Store & Forward Mode for the Tx Side */
- SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_ENA_STFWD);
- }
- break;
- }
-
- /* set queue operational */
- SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_ENA_OP_MD);
- }
- else {
- /* ensure the queue is still disabled */
- SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_RST_SET);
- }
-} /* DoInitRamQueue */
-
-
-/******************************************************************************
- *
- * SkGeInitRamBufs() - Initialize the RAM Buffer Queues
- *
- * Description:
- * Initialize all RAM Buffer Queues of the specified port
- *
- * Returns:
- * nothing
- */
-static void SkGeInitRamBufs(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- int RxQType;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PRxQSize == SK_MIN_RXQ_SIZE) {
- RxQType = SK_RX_SRAM_Q; /* small Rx Queue */
- } else {
- RxQType = SK_RX_BRAM_Q; /* big Rx Queue */
- }
-
- DoInitRamQueue(pAC, IoC, pPrt->PRxQOff, pPrt->PRxQRamStart,
- pPrt->PRxQRamEnd, RxQType);
-
- DoInitRamQueue(pAC, IoC, pPrt->PXsQOff, pPrt->PXsQRamStart,
- pPrt->PXsQRamEnd, SK_TX_RAM_Q);
-
- DoInitRamQueue(pAC, IoC, pPrt->PXaQOff, pPrt->PXaQRamStart,
- pPrt->PXaQRamEnd, SK_TX_RAM_Q);
-
-} /* SkGeInitRamBufs */
-
-
-/******************************************************************************
- *
- * SkGeInitRamIface() - Initialize the RAM Interface
- *
- * Description:
- * This function initializes the Adapters RAM Interface.
- *
- * Note:
- * This function is used in the diagnostics.
- *
- * Returns:
- * nothing
- */
-void SkGeInitRamIface(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- /* release local reset */
- SK_OUT16(IoC, B3_RI_CTRL, RI_RST_CLR);
-
- /* configure timeout values */
- SK_OUT8(IoC, B3_RI_WTO_R1, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_WTO_XA1, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_WTO_XS1, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_RTO_R1, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_RTO_XA1, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_RTO_XS1, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_WTO_R2, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_WTO_XA2, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_WTO_XS2, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_RTO_R2, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_RTO_XA2, SK_RI_TO_53);
- SK_OUT8(IoC, B3_RI_RTO_XS2, SK_RI_TO_53);
-
-} /* SkGeInitRamIface */
-
-
-/******************************************************************************
- *
- * SkGeInitBmu() - Initialize the BMU state machines
- *
- * Description:
- * Initialize all BMU state machines of the specified port
- *
- * Returns:
- * nothing
- */
-static void SkGeInitBmu(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U32 RxWm;
- SK_U32 TxWm;
-
- pPrt = &pAC->GIni.GP[Port];
-
- RxWm = SK_BMU_RX_WM;
- TxWm = SK_BMU_TX_WM;
-
- if (!pAC->GIni.GIPciSlot64 && !pAC->GIni.GIPciClock66) {
- /* for better performance */
- RxWm /= 2;
- TxWm /= 2;
- }
-
- /* Rx Queue: Release all local resets and set the watermark */
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_CLR_RESET);
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_F), RxWm);
-
- /*
- * Tx Queue: Release all local resets if the queue is used !
- * set watermark
- */
- if (pPrt->PXSQSize != 0) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_CLR_RESET);
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_F), TxWm);
- }
-
- if (pPrt->PXAQSize != 0) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_CLR_RESET);
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_F), TxWm);
- }
- /*
- * Do NOT enable the descriptor poll timers here, because
- * the descriptor addresses are not specified yet.
- */
-} /* SkGeInitBmu */
-
-
-/******************************************************************************
- *
- * TestStopBit() - Test the stop bit of the queue
- *
- * Description:
- * Stopping a queue is not as simple as it seems to be.
- * If descriptor polling is enabled, it may happen
- * that RX/TX stop is done and SV idle is NOT set.
- * In this case we have to issue another stop command.
- *
- * Returns:
- * The queues control status register
- */
-static SK_U32 TestStopBit(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int QuIoOffs) /* Queue IO Address Offset */
-{
- SK_U32 QuCsr; /* CSR contents */
-
- SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
-
- if ((QuCsr & (CSR_STOP | CSR_SV_IDLE)) == 0) {
- /* Stop Descriptor overridden by start command */
- SK_OUT32(IoC, Q_ADDR(QuIoOffs, Q_CSR), CSR_STOP);
-
- SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
- }
-
- return(QuCsr);
-} /* TestStopBit */
-
-
-/******************************************************************************
- *
- * SkGeStopPort() - Stop the Rx/Tx activity of the port 'Port'.
- *
- * Description:
- * After calling this function the descriptor rings and Rx and Tx
- * queues of this port may be reconfigured.
- *
- * It is possible to stop the receive and transmit path separate or
- * both together.
- *
- * Dir = SK_STOP_TX Stops the transmit path only and resets the MAC.
- * The receive queue is still active and
- * the pending Rx frames may be still transferred
- * into the RxD.
- * SK_STOP_RX Stop the receive path. The tansmit path
- * has to be stopped once before.
- * SK_STOP_ALL SK_STOP_TX + SK_STOP_RX
- *
- * RstMode = SK_SOFT_RST Resets the MAC. The PHY is still alive.
- * SK_HARD_RST Resets the MAC and the PHY.
- *
- * Example:
- * 1) A Link Down event was signaled for a port. Therefore the activity
- * of this port should be stopped and a hardware reset should be issued
- * to enable the workaround of XMAC errata #2. But the received frames
- * should not be discarded.
- * ...
- * SkGeStopPort(pAC, IoC, Port, SK_STOP_TX, SK_HARD_RST);
- * (transfer all pending Rx frames)
- * SkGeStopPort(pAC, IoC, Port, SK_STOP_RX, SK_HARD_RST);
- * ...
- *
- * 2) An event was issued which request the driver to switch
- * the 'virtual active' link to an other already active port
- * as soon as possible. The frames in the receive queue of this
- * port may be lost. But the PHY must not be reset during this
- * event.
- * ...
- * SkGeStopPort(pAC, IoC, Port, SK_STOP_ALL, SK_SOFT_RST);
- * ...
- *
- * Extended Description:
- * If SK_STOP_TX is set,
- * o disable the MAC's receive and transmitter to prevent
- * from sending incomplete frames
- * o stop the port's transmit queues before terminating the
- * BMUs to prevent from performing incomplete PCI cycles
- * on the PCI bus
- * - The network Rx and Tx activity and PCI Tx transfer is
- * disabled now.
- * o reset the MAC depending on the RstMode
- * o Stop Interval Timer and Limit Counter of Tx Arbiter,
- * also disable Force Sync bit and Enable Alloc bit.
- * o perform a local reset of the port's Tx path
- * - reset the PCI FIFO of the async Tx queue
- * - reset the PCI FIFO of the sync Tx queue
- * - reset the RAM Buffer async Tx queue
- * - reset the RAM Buffer sync Tx queue
- * - reset the MAC Tx FIFO
- * o switch Link and Tx LED off, stop the LED counters
- *
- * If SK_STOP_RX is set,
- * o stop the port's receive queue
- * - The path data transfer activity is fully stopped now.
- * o perform a local reset of the port's Rx path
- * - reset the PCI FIFO of the Rx queue
- * - reset the RAM Buffer receive queue
- * - reset the MAC Rx FIFO
- * o switch Rx LED off, stop the LED counter
- *
- * If all ports are stopped,
- * o reset the RAM Interface.
- *
- * Notes:
- * o This function may be called during the driver states RESET_PORT and
- * SWITCH_PORT.
- */
-void SkGeStopPort(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* I/O context */
-int Port, /* port to stop (MAC_1 + n) */
-int Dir, /* Direction to Stop (SK_STOP_RX, SK_STOP_TX, SK_STOP_ALL) */
-int RstMode)/* Reset Mode (SK_SOFT_RST, SK_HARD_RST) */
-{
-#ifndef SK_DIAG
- SK_EVPARA Para;
-#endif /* !SK_DIAG */
- SK_GEPORT *pPrt;
- SK_U32 DWord;
- SK_U32 XsCsr;
- SK_U32 XaCsr;
- SK_U64 ToutStart;
- int i;
- int ToutCnt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if ((Dir & SK_STOP_TX) != 0) {
- /* disable receiver and transmitter */
- SkMacRxTxDisable(pAC, IoC, Port);
-
- /* stop both transmit queues */
- /*
- * If the BMU is in the reset state CSR_STOP will terminate
- * immediately.
- */
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_STOP);
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_STOP);
-
- ToutStart = SkOsGetTime(pAC);
- ToutCnt = 0;
- do {
- /*
- * Clear packet arbiter timeout to make sure
- * this loop will terminate.
- */
- SK_OUT16(IoC, B3_PA_CTRL, (Port == MAC_1) ? PA_CLR_TO_TX1 :
- PA_CLR_TO_TX2);
-
- /*
- * If the transfer stucks at the MAC the STOP command will not
- * terminate if we don't flush the XMAC's transmit FIFO !
- */
- SkMacFlushTxFifo(pAC, IoC, Port);
-
- XsCsr = TestStopBit(pAC, IoC, pPrt->PXsQOff);
- XaCsr = TestStopBit(pAC, IoC, pPrt->PXaQOff);
-
- if (SkOsGetTime(pAC) - ToutStart > (SK_TICKS_PER_SEC / 18)) {
- /*
- * Timeout of 1/18 second reached.
- * This needs to be checked at 1/18 sec only.
- */
- ToutCnt++;
- if (ToutCnt > 1) {
- /* Might be a problem when the driver event handler
- * calls StopPort again. XXX.
- */
-
- /* Fatal Error, Loop aborted */
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E018,
- SKERR_HWI_E018MSG);
-#ifndef SK_DIAG
- Para.Para64 = Port;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
-#endif /* !SK_DIAG */
- return;
- }
- /*
- * Cache incoherency workaround: Assume a start command
- * has been lost while sending the frame.
- */
- ToutStart = SkOsGetTime(pAC);
-
- if ((XsCsr & CSR_STOP) != 0) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_START);
- }
- if ((XaCsr & CSR_STOP) != 0) {
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_START);
- }
- }
-
- /*
- * Because of the ASIC problem report entry from 21.08.1998 it is
- * required to wait until CSR_STOP is reset and CSR_SV_IDLE is set.
- */
- } while ((XsCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE ||
- (XaCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
-
- /* Reset the MAC depending on the RstMode */
- if (RstMode == SK_SOFT_RST) {
- SkMacSoftRst(pAC, IoC, Port);
- }
- else {
- SkMacHardRst(pAC, IoC, Port);
- }
-
- /* Disable Force Sync bit and Enable Alloc bit */
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
- TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
-
- /* Stop Interval Timer and Limit Counter of Tx Arbiter */
- SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), 0L);
- SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), 0L);
-
- /* Perform a local reset of the port's Tx path */
-
- /* Reset the PCI FIFO of the async Tx queue */
- SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_SET_RESET);
- /* Reset the PCI FIFO of the sync Tx queue */
- SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_SET_RESET);
- /* Reset the RAM Buffer async Tx queue */
- SK_OUT8(IoC, RB_ADDR(pPrt->PXaQOff, RB_CTRL), RB_RST_SET);
- /* Reset the RAM Buffer sync Tx queue */
- SK_OUT8(IoC, RB_ADDR(pPrt->PXsQOff, RB_CTRL), RB_RST_SET);
-
- /* Reset Tx MAC FIFO */
- if (pAC->GIni.GIGenesis) {
- /* Note: MFF_RST_SET does NOT reset the XMAC ! */
- SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_SET);
-
- /* switch Link and Tx LED off, stop the LED counters */
- /* Link LED is switched off by the RLMT and the Diag itself */
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_DIS);
- }
- else {
- /* Reset TX MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
- }
- }
-
- if ((Dir & SK_STOP_RX) != 0) {
- /*
- * The RX Stop Command will not terminate if no buffers
- * are queued in the RxD ring. But it will always reach
- * the Idle state. Therefore we can use this feature to
- * stop the transfer of received packets.
- */
- /* stop the port's receive queue */
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_STOP);
-
- i = 100;
- do {
- /*
- * Clear packet arbiter timeout to make sure
- * this loop will terminate
- */
- SK_OUT16(IoC, B3_PA_CTRL, (Port == MAC_1) ? PA_CLR_TO_RX1 :
- PA_CLR_TO_RX2);
-
- DWord = TestStopBit(pAC, IoC, pPrt->PRxQOff);
-
- /* timeout if i==0 (bug fix for #10748) */
- if (--i == 0) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E024,
- SKERR_HWI_E024MSG);
- break;
- }
- /*
- * because of the ASIC problem report entry from 21.08.98
- * it is required to wait until CSR_STOP is reset and
- * CSR_SV_IDLE is set.
- */
- } while ((DWord & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
-
- /* The path data transfer activity is fully stopped now */
-
- /* Perform a local reset of the port's Rx path */
-
- /* Reset the PCI FIFO of the Rx queue */
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_SET_RESET);
- /* Reset the RAM Buffer receive queue */
- SK_OUT8(IoC, RB_ADDR(pPrt->PRxQOff, RB_CTRL), RB_RST_SET);
-
- /* Reset Rx MAC FIFO */
- if (pAC->GIni.GIGenesis) {
-
- SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_SET);
-
- /* switch Rx LED off, stop the LED counter */
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_DIS);
- }
- else {
- /* Reset Rx MAC FIFO */
- SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
- }
- }
-} /* SkGeStopPort */
-
-
-/******************************************************************************
- *
- * SkGeInit0() - Level 0 Initialization
- *
- * Description:
- * - Initialize the BMU address offsets
- *
- * Returns:
- * nothing
- */
-static void SkGeInit0(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- int i;
- SK_GEPORT *pPrt;
-
- for (i = 0; i < SK_MAX_MACS; i++) {
- pPrt = &pAC->GIni.GP[i];
-
- pPrt->PState = SK_PRT_RESET;
- pPrt->PRxQOff = QOffTab[i].RxQOff;
- pPrt->PXsQOff = QOffTab[i].XsQOff;
- pPrt->PXaQOff = QOffTab[i].XaQOff;
- pPrt->PCheckPar = SK_FALSE;
- pPrt->PIsave = 0;
- pPrt->PPrevShorts = 0;
- pPrt->PLinkResCt = 0;
- pPrt->PAutoNegTOCt = 0;
- pPrt->PPrevRx = 0;
- pPrt->PPrevFcs = 0;
- pPrt->PRxLim = SK_DEF_RX_WA_LIM;
- pPrt->PLinkMode = SK_LMODE_AUTOFULL;
- pPrt->PLinkSpeedCap = SK_LSPEED_CAP_1000MBPS;
- pPrt->PLinkSpeed = SK_LSPEED_1000MBPS;
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_UNKNOWN;
- pPrt->PLinkModeConf = SK_LMODE_AUTOSENSE;
- pPrt->PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
- pPrt->PLinkBroken = SK_TRUE; /* See WA code */
- pPrt->PLinkCap = (SK_LMODE_CAP_HALF | SK_LMODE_CAP_FULL |
- SK_LMODE_CAP_AUTOHALF | SK_LMODE_CAP_AUTOFULL);
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
- pPrt->PFlowCtrlCap = SK_FLOW_MODE_SYM_OR_REM;
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- pPrt->PMSCap = 0;
- pPrt->PMSMode = SK_MS_MODE_AUTO;
- pPrt->PMSStatus = SK_MS_STAT_UNSET;
- pPrt->PAutoNegFail = SK_FALSE;
- pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
- pPrt->PHWLinkUp = SK_FALSE;
- }
-
- pAC->GIni.GIPortUsage = SK_RED_LINK;
-
-} /* SkGeInit0*/
-
-#ifdef SK_PCI_RESET
-
-/******************************************************************************
- *
- * SkGePciReset() - Reset PCI interface
- *
- * Description:
- * o Read PCI configuration.
- * o Change power state to 3.
- * o Change power state to 0.
- * o Restore PCI configuration.
- *
- * Returns:
- * 0: Success.
- * 1: Power state could not be changed to 3.
- */
-static int SkGePciReset(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- int i;
- SK_U16 PmCtlSts;
- SK_U32 Bp1;
- SK_U32 Bp2;
- SK_U16 PciCmd;
- SK_U8 Cls;
- SK_U8 Lat;
- SK_U8 ConfigSpace[PCI_CFG_SIZE];
-
- /*
- * Note: Switching to D3 state is like a software reset.
- * Switching from D3 to D0 is a hardware reset.
- * We have to save and restore the configuration space.
- */
- for (i = 0; i < PCI_CFG_SIZE; i++) {
- SkPciReadCfgDWord(pAC, i*4, &ConfigSpace[i]);
- }
-
- /* We know the RAM Interface Arbiter is enabled. */
- SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
- SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
-
- if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
- return(1);
- }
-
- /* Return to D0 state. */
- SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0);
-
- /* Check for D0 state. */
- SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
-
- if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
- return(1);
- }
-
- /* Check PCI Config Registers. */
- SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
- SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
- SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
- SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
- SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
-
- if (PciCmd != 0 || Cls != 0 || (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1 ||
- Lat != 0) {
- return(1);
- }
-
- /* Restore PCI Config Space. */
- for (i = 0; i < PCI_CFG_SIZE; i++) {
- SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]);
- }
-
- return(0);
-} /* SkGePciReset */
-
-#endif /* SK_PCI_RESET */
-
-/******************************************************************************
- *
- * SkGeInit1() - Level 1 Initialization
- *
- * Description:
- * o Do a software reset.
- * o Clear all reset bits.
- * o Verify that the detected hardware is present.
- * Return an error if not.
- * o Get the hardware configuration
- * + Read the number of MACs/Ports.
- * + Read the RAM size.
- * + Read the PCI Revision Id.
- * + Find out the adapters host clock speed
- * + Read and check the PHY type
- *
- * Returns:
- * 0: success
- * 5: Unexpected PHY type detected
- * 6: HW self test failed
- */
-static int SkGeInit1(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- SK_U8 Byte;
- SK_U16 Word;
- SK_U16 CtrlStat;
- SK_U32 FlashAddr;
- int RetVal;
- int i;
-
- RetVal = 0;
-
- /* save CLK_RUN bits (YUKON-Lite) */
- SK_IN16(IoC, B0_CTST, &CtrlStat);
-
-#ifdef SK_PCI_RESET
- (void)SkGePciReset(pAC, IoC);
-#endif /* SK_PCI_RESET */
-
- /* do the SW-reset */
- SK_OUT8(IoC, B0_CTST, CS_RST_SET);
-
- /* release the SW-reset */
- SK_OUT8(IoC, B0_CTST, CS_RST_CLR);
-
- /* reset all error bits in the PCI STATUS register */
- /*
- * Note: PCI Cfg cycles cannot be used, because they are not
- * available on some platforms after 'boot time'.
- */
- SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
- SK_OUT16(IoC, PCI_C(PCI_STATUS), Word | PCI_ERRBITS);
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- /* release Master Reset */
- SK_OUT8(IoC, B0_CTST, CS_MRST_CLR);
-
-#ifdef CLK_RUN
- CtrlStat |= CS_CLK_RUN_ENA;
-#endif /* CLK_RUN */
-
- /* restore CLK_RUN bits */
- SK_OUT16(IoC, B0_CTST, CtrlStat &
- (CS_CLK_RUN_HOT | CS_CLK_RUN_RST | CS_CLK_RUN_ENA));
-
- /* read Chip Identification Number */
- SK_IN8(IoC, B2_CHIP_ID, &Byte);
- pAC->GIni.GIChipId = Byte;
-
- /* read number of MACs */
- SK_IN8(IoC, B2_MAC_CFG, &Byte);
- pAC->GIni.GIMacsFound = (Byte & CONFIG_SYS_SNG_MAC) ? 1 : 2;
-
- /* get Chip Revision Number */
- pAC->GIni.GIChipRev = (SK_U8)((Byte & CONFIG_SYS_CHIP_R_MSK) >> 4);
-
- /* get diff. PCI parameters */
- SK_IN16(IoC, B0_CTST, &CtrlStat);
-
- /* read the adapters RAM size */
- SK_IN8(IoC, B2_E_0, &Byte);
-
- if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
-
- pAC->GIni.GIGenesis = SK_TRUE;
-
- if (Byte == 3) {
- /* special case: 4 x 64k x 36, offset = 0x80000 */
- pAC->GIni.GIRamSize = 1024;
- pAC->GIni.GIRamOffs = (SK_U32)512 * 1024;
- }
- else {
- pAC->GIni.GIRamSize = (int)Byte * 512;
- pAC->GIni.GIRamOffs = 0;
- }
- /* all GE adapters work with 53.125 MHz host clock */
- pAC->GIni.GIHstClkFact = SK_FACT_53;
-
- /* set Descr. Poll Timer Init Value to 250 ms */
- pAC->GIni.GIPollTimerVal =
- SK_DPOLL_DEF * (SK_U32)pAC->GIni.GIHstClkFact / 100;
- }
- else {
- pAC->GIni.GIGenesis = SK_FALSE;
-
-#ifndef VCPU
- pAC->GIni.GIRamSize = (Byte == 0) ? 128 : (int)Byte * 4;
-#else
- pAC->GIni.GIRamSize = 128;
-#endif
- pAC->GIni.GIRamOffs = 0;
-
- /* WA for chip Rev. A */
- pAC->GIni.GIWolOffs = (pAC->GIni.GIChipRev == 0) ? WOL_REG_OFFS : 0;
-
- /* get PM Capabilities of PCI config space */
- SK_IN16(IoC, PCI_C(PCI_PM_CAP_REG), &Word);
-
- /* check if VAUX is available */
- if (((CtrlStat & CS_VAUX_AVAIL) != 0) &&
- /* check also if PME from D3cold is set */
- ((Word & PCI_PME_D3C_SUP) != 0)) {
- /* set entry in GE init struct */
- pAC->GIni.GIVauxAvail = SK_TRUE;
- }
-
- /* save Flash-Address Register */
- SK_IN32(IoC, B2_FAR, &FlashAddr);
-
- /* test Flash-Address Register */
- SK_OUT8(IoC, B2_FAR + 3, 0xff);
- SK_IN8(IoC, B2_FAR + 3, &Byte);
-
- pAC->GIni.GIYukonLite = (SK_BOOL)(Byte != 0);
-
- /* restore Flash-Address Register */
- SK_OUT32(IoC, B2_FAR, FlashAddr);
-
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
- /* set GMAC Link Control reset */
- SK_OUT16(IoC, MR_ADDR(i, GMAC_LINK_CTRL), GMLC_RST_SET);
-
- /* clear GMAC Link Control reset */
- SK_OUT16(IoC, MR_ADDR(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
- }
- /* all YU chips work with 78.125 MHz host clock */
- pAC->GIni.GIHstClkFact = SK_FACT_78;
-
- pAC->GIni.GIPollTimerVal = SK_DPOLL_MAX; /* 215 ms */
- }
-
- /* check if 64-bit PCI Slot is present */
- pAC->GIni.GIPciSlot64 = (SK_BOOL)((CtrlStat & CS_BUS_SLOT_SZ) != 0);
-
- /* check if 66 MHz PCI Clock is active */
- pAC->GIni.GIPciClock66 = (SK_BOOL)((CtrlStat & CS_BUS_CLOCK) != 0);
-
- /* read PCI HW Revision Id. */
- SK_IN8(IoC, PCI_C(PCI_REV_ID), &Byte);
- pAC->GIni.GIPciHwRev = Byte;
-
- /* read the PMD type */
- SK_IN8(IoC, B2_PMD_TYP, &Byte);
- pAC->GIni.GICopperType = (SK_U8)(Byte == 'T');
-
- /* read the PHY type */
- SK_IN8(IoC, B2_E_1, &Byte);
-
- Byte &= 0x0f; /* the PHY type is stored in the lower nibble */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
-
- if (pAC->GIni.GIGenesis) {
- switch (Byte) {
- case SK_PHY_XMAC:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_XMAC;
- break;
- case SK_PHY_BCOM:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_BCOM;
- pAC->GIni.GP[i].PMSCap =
- SK_MS_CAP_AUTO | SK_MS_CAP_MASTER | SK_MS_CAP_SLAVE;
- break;
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_LONE;
- break;
- case SK_PHY_NAT:
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_NAT;
- break;
-#endif /* OTHER_PHY */
- default:
- /* ERROR: unexpected PHY type detected */
- RetVal = 5;
- break;
- }
- }
- else {
- if (Byte == 0) {
- /* if this field is not initialized */
- Byte = SK_PHY_MARV_COPPER;
- pAC->GIni.GICopperType = SK_TRUE;
- }
- pAC->GIni.GP[i].PhyAddr = PHY_ADDR_MARV;
-
- if (pAC->GIni.GICopperType) {
- pAC->GIni.GP[i].PLinkSpeedCap = SK_LSPEED_CAP_AUTO |
- SK_LSPEED_CAP_10MBPS | SK_LSPEED_CAP_100MBPS |
- SK_LSPEED_CAP_1000MBPS;
- pAC->GIni.GP[i].PLinkSpeed = SK_LSPEED_AUTO;
- pAC->GIni.GP[i].PMSCap =
- SK_MS_CAP_AUTO | SK_MS_CAP_MASTER | SK_MS_CAP_SLAVE;
- }
- else {
- Byte = SK_PHY_MARV_FIBER;
- }
- }
-
- pAC->GIni.GP[i].PhyType = Byte;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
- ("PHY type: %d PHY addr: %04x\n", Byte,
- pAC->GIni.GP[i].PhyAddr));
- }
-
- /* get Mac Type & set function pointers dependent on */
- if (pAC->GIni.GIGenesis) {
- pAC->GIni.GIMacType = SK_MAC_XMAC;
-
- pAC->GIni.GIFunc.pFnMacUpdateStats = SkXmUpdateStats;
- pAC->GIni.GIFunc.pFnMacStatistic = SkXmMacStatistic;
- pAC->GIni.GIFunc.pFnMacResetCounter = SkXmResetCounter;
- pAC->GIni.GIFunc.pFnMacOverflow = SkXmOverflowStatus;
- }
- else {
- pAC->GIni.GIMacType = SK_MAC_GMAC;
-
- pAC->GIni.GIFunc.pFnMacUpdateStats = SkGmUpdateStats;
- pAC->GIni.GIFunc.pFnMacStatistic = SkGmMacStatistic;
- pAC->GIni.GIFunc.pFnMacResetCounter = SkGmResetCounter;
- pAC->GIni.GIFunc.pFnMacOverflow = SkGmOverflowStatus;
-
-#ifdef SPECIAL_HANDLING
- if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
- /* check HW self test result */
- SK_IN8(IoC, B2_E_3, &Byte);
- if ((Byte & B2_E3_RES_MASK) != 0) {
- RetVal = 6;
- }
- }
-#endif
- }
- return(RetVal);
-} /* SkGeInit1 */
-
-
-/******************************************************************************
- *
- * SkGeInit2() - Level 2 Initialization
- *
- * Description:
- * - start the Blink Source Counter
- * - start the Descriptor Poll Timer
- * - configure the MAC-Arbiter
- * - configure the Packet-Arbiter
- * - enable the Tx Arbiters
- * - enable the RAM Interface Arbiter
- *
- * Returns:
- * nothing
- */
-static void SkGeInit2(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- SK_U32 DWord;
- int i;
-
- /* start the Descriptor Poll Timer */
- if (pAC->GIni.GIPollTimerVal != 0) {
- if (pAC->GIni.GIPollTimerVal > SK_DPOLL_MAX) {
- pAC->GIni.GIPollTimerVal = SK_DPOLL_MAX;
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E017, SKERR_HWI_E017MSG);
- }
- SK_OUT32(IoC, B28_DPT_INI, pAC->GIni.GIPollTimerVal);
- SK_OUT8(IoC, B28_DPT_CTRL, DPT_START);
- }
-
- if (pAC->GIni.GIGenesis) {
- /* start the Blink Source Counter */
- DWord = SK_BLK_DUR * (SK_U32)pAC->GIni.GIHstClkFact / 100;
-
- SK_OUT32(IoC, B2_BSC_INI, DWord);
- SK_OUT8(IoC, B2_BSC_CTRL, BSC_START);
-
- /*
- * Configure the MAC Arbiter and the Packet Arbiter.
- * They will be started once and never be stopped.
- */
- SkGeInitMacArb(pAC, IoC);
-
- SkGeInitPktArb(pAC, IoC);
- }
- else {
- /* start Time Stamp Timer */
- SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8)GMT_ST_START);
- }
-
- /* enable the Tx Arbiters */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
- SK_OUT8(IoC, MR_ADDR(i, TXA_CTRL), TXA_ENA_ARB);
- }
-
- /* enable the RAM Interface Arbiter */
- SkGeInitRamIface(pAC, IoC);
-
-} /* SkGeInit2 */
-
-/******************************************************************************
- *
- * SkGeInit() - Initialize the GE Adapter with the specified level.
- *
- * Description:
- * Level 0: Initialize the Module structures.
- * Level 1: Generic Hardware Initialization. The IOP/MemBase pointer has
- * to be set before calling this level.
- *
- * o Do a software reset.
- * o Clear all reset bits.
- * o Verify that the detected hardware is present.
- * Return an error if not.
- * o Get the hardware configuration
- * + Set GIMacsFound with the number of MACs.
- * + Store the RAM size in GIRamSize.
- * + Save the PCI Revision ID in GIPciHwRev.
- * o return an error
- * if Number of MACs > SK_MAX_MACS
- *
- * After returning from Level 0 the adapter
- * may be accessed with IO operations.
- *
- * Level 2: start the Blink Source Counter
- *
- * Returns:
- * 0: success
- * 1: Number of MACs exceeds SK_MAX_MACS (after level 1)
- * 2: Adapter not present or not accessible
- * 3: Illegal initialization level
- * 4: Initialization Level 1 Call missing
- * 5: Unexpected PHY type detected
- * 6: HW self test failed
- */
-int SkGeInit(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Level) /* initialization level */
-{
- int RetVal; /* return value */
- SK_U32 DWord;
-
- RetVal = 0;
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
- ("SkGeInit(Level %d)\n", Level));
-
- switch (Level) {
- case SK_INIT_DATA:
- /* Initialization Level 0 */
- SkGeInit0(pAC, IoC);
- pAC->GIni.GILevel = SK_INIT_DATA;
- break;
-
- case SK_INIT_IO:
- /* Initialization Level 1 */
- RetVal = SkGeInit1(pAC, IoC);
- if (RetVal != 0) {
- break;
- }
-
- /* check if the adapter seems to be accessible */
- SK_OUT32(IoC, B2_IRQM_INI, 0x11335577L);
- SK_IN32(IoC, B2_IRQM_INI, &DWord);
- SK_OUT32(IoC, B2_IRQM_INI, 0L);
-
- if (DWord != 0x11335577L) {
- RetVal = 2;
- break;
- }
-
- /* check if the number of GIMacsFound matches SK_MAX_MACS */
- if (pAC->GIni.GIMacsFound > SK_MAX_MACS) {
- RetVal = 1;
- break;
- }
-
- /* Level 1 successfully passed */
- pAC->GIni.GILevel = SK_INIT_IO;
- break;
-
- case SK_INIT_RUN:
- /* Initialization Level 2 */
- if (pAC->GIni.GILevel != SK_INIT_IO) {
-#ifndef SK_DIAG
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E002, SKERR_HWI_E002MSG);
-#endif /* !SK_DIAG */
- RetVal = 4;
- break;
- }
- SkGeInit2(pAC, IoC);
-
- /* Level 2 successfully passed */
- pAC->GIni.GILevel = SK_INIT_RUN;
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E003, SKERR_HWI_E003MSG);
- RetVal = 3;
- break;
- }
-
- return(RetVal);
-} /* SkGeInit */
-
-
-/******************************************************************************
- *
- * SkGeDeInit() - Deinitialize the adapter
- *
- * Description:
- * All ports of the adapter will be stopped if not already done.
- * Do a software reset and switch off all LEDs.
- *
- * Returns:
- * nothing
- */
-void SkGeDeInit(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- int i;
- SK_U16 Word;
-
-#ifndef VCPU
- /* ensure I2C is ready */
- SkI2cWaitIrq(pAC, IoC);
-#endif
-
- /* stop all current transfer activity */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
- if (pAC->GIni.GP[i].PState != SK_PRT_STOP &&
- pAC->GIni.GP[i].PState != SK_PRT_RESET) {
-
- SkGeStopPort(pAC, IoC, i, SK_STOP_ALL, SK_HARD_RST);
- }
- }
-
- /* Reset all bits in the PCI STATUS register */
- /*
- * Note: PCI Cfg cycles cannot be used, because they are not
- * available on some platforms after 'boot time'.
- */
- SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
- SK_OUT16(IoC, PCI_C(PCI_STATUS), Word | PCI_ERRBITS);
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- /* do the reset, all LEDs are switched off now */
- SK_OUT8(IoC, B0_CTST, CS_RST_SET);
-} /* SkGeDeInit */
-
-
-/******************************************************************************
- *
- * SkGeInitPort() Initialize the specified port.
- *
- * Description:
- * PRxQSize, PXSQSize, and PXAQSize has to be
- * configured for the specified port before calling this function.
- * The descriptor rings has to be initialized too.
- *
- * o (Re)configure queues of the specified port.
- * o configure the MAC of the specified port.
- * o put ASIC and MAC(s) in operational mode.
- * o initialize Rx/Tx and Sync LED
- * o initialize RAM Buffers and MAC FIFOs
- *
- * The port is ready to connect when returning.
- *
- * Note:
- * The MAC's Rx and Tx state machine is still disabled when returning.
- *
- * Returns:
- * 0: success
- * 1: Queue size initialization error. The configured values
- * for PRxQSize, PXSQSize, or PXAQSize are invalid for one
- * or more queues. The specified port was NOT initialized.
- * An error log entry was generated.
- * 2: The port has to be stopped before it can be initialized again.
- */
-int SkGeInitPort(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port to configure */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (SkGeCheckQSize(pAC, Port) != 0) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E004, SKERR_HWI_E004MSG);
- return(1);
- }
-
- if (pPrt->PState == SK_PRT_INIT || pPrt->PState == SK_PRT_RUN) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E005, SKERR_HWI_E005MSG);
- return(2);
- }
-
- /* configuration ok, initialize the Port now */
-
- if (pAC->GIni.GIGenesis) {
- /* initialize Rx, Tx and Link LED */
- /*
- * If 1000BT Phy needs LED initialization than swap
- * LED and XMAC initialization order
- */
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_ENA);
- SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_ENA);
- /* The Link LED is initialized by RLMT or Diagnostics itself */
-
- SkXmInitMac(pAC, IoC, Port);
- }
- else {
-
- SkGmInitMac(pAC, IoC, Port);
- }
-
- /* do NOT initialize the Link Sync Counter */
-
- SkGeInitMacFifo(pAC, IoC, Port);
-
- SkGeInitRamBufs(pAC, IoC, Port);
-
- if (pPrt->PXSQSize != 0) {
- /* enable Force Sync bit if synchronous queue available */
- SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL), TXA_ENA_FSYNC);
- }
-
- SkGeInitBmu(pAC, IoC, Port);
-
- /* mark port as initialized */
- pPrt->PState = SK_PRT_INIT;
-
- return(0);
-} /* SkGeInitPort */
+++ /dev/null
-/*****************************************************************************
- *
- * Name: skgemib.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.7 $
- * Date: $Date: 2002/12/16 09:04:34 $
- * Purpose: Private Network Management Interface Management Database
- *
- ****************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/*****************************************************************************
- *
- * History:
- *
- * $Log: skgemib.c,v $
- * Revision 1.7 2002/12/16 09:04:34 tschilli
- * Code for VCT handling added.
- *
- * Revision 1.6 2002/08/09 15:40:21 rwahl
- * Editorial change (renamed ConfSpeedCap).
- *
- * Revision 1.5 2002/08/09 11:05:34 rwahl
- * Added oid handling for link speed cap.
- *
- * Revision 1.4 2002/08/09 09:40:27 rwahl
- * Added support for NDIS OID_PNP_xxx.
- *
- * Revision 1.3 2002/07/17 19:39:54 rwahl
- * Added handler for OID_SKGE_SPEED_MODE & OID_SKGE_SPEED_STATUS.
- *
- * Revision 1.2 2002/05/22 08:59:00 rwahl
- * - static functions only for release build.
- * - Source file must be included.
- *
- * Revision 1.1 2002/05/22 08:12:42 rwahl
- * Initial version.
- *
- ****************************************************************************/
-
-#include <config.h>
-
-/*
- * PRIVATE OID handler function prototypes
- */
-PNMI_STATIC int Addr(SK_AC *pAC, SK_IOC IoC, int action,
- SK_U32 Id, char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int CsumStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int General(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int Mac8023Stat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int MacPrivateConf(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int MacPrivateStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int Monitor(SK_AC *pAC, SK_IOC IoC, int action,
- SK_U32 Id, char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int OidStruct(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int Perform(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int* pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int Rlmt(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int RlmtStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int SensorStat(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int Vpd(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC int Vct(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-
-#ifdef SK_POWER_MGMT
-PNMI_STATIC int PowerManagement(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance,
- unsigned int TableIndex, SK_U32 NetIndex);
-#endif
-
-
-/* defines *******************************************************************/
-#define ID_TABLE_SIZE (sizeof(IdTable)/sizeof(IdTable[0]))
-
-
-/* global variables **********************************************************/
-
-/*
- * Table to correlate OID with handler function and index to
- * hardware register stored in StatAddress if applicable.
- */
-PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
- {OID_GEN_XMIT_OK,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX},
- {OID_GEN_RCV_OK,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX},
- {OID_GEN_XMIT_ERROR,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_GEN_RCV_ERROR,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_GEN_RCV_NO_BUFFER,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_GEN_DIRECTED_FRAMES_XMIT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_UNICAST},
- {OID_GEN_MULTICAST_FRAMES_XMIT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_MULTICAST},
- {OID_GEN_BROADCAST_FRAMES_XMIT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_BROADCAST},
- {OID_GEN_DIRECTED_FRAMES_RCV,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_UNICAST},
- {OID_GEN_MULTICAST_FRAMES_RCV,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_MULTICAST},
- {OID_GEN_BROADCAST_FRAMES_RCV,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_BROADCAST},
- {OID_GEN_RCV_CRC_ERROR,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_FCS},
- {OID_GEN_TRANSMIT_QUEUE_LENGTH,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_802_3_PERMANENT_ADDRESS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, 0},
- {OID_802_3_CURRENT_ADDRESS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, 0},
- {OID_802_3_RCV_ERROR_ALIGNMENT,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_FRAMING},
- {OID_802_3_XMIT_ONE_COLLISION,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_SINGLE_COL},
- {OID_802_3_XMIT_MORE_COLLISIONS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_MULTI_COL},
- {OID_802_3_XMIT_DEFERRED,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_DEFFERAL},
- {OID_802_3_XMIT_MAX_COLLISIONS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_EXCESS_COL},
- {OID_802_3_RCV_OVERRUN,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HRX_OVERFLOW},
- {OID_802_3_XMIT_UNDERRUN,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_UNDERRUN},
- {OID_802_3_XMIT_TIMES_CRS_LOST,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_CARRIER},
- {OID_802_3_XMIT_LATE_COLLISIONS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Mac8023Stat, SK_PNMI_HTX_LATE_COL},
-#ifdef SK_POWER_MGMT
- {OID_PNP_CAPABILITIES,
- 0,
- 0,
- 0,
- SK_PNMI_RO, PowerManagement, 0},
- {OID_PNP_SET_POWER,
- 0,
- 0,
- 0,
- SK_PNMI_WO, PowerManagement, 0},
- {OID_PNP_QUERY_POWER,
- 0,
- 0,
- 0,
- SK_PNMI_RO, PowerManagement, 0},
- {OID_PNP_ADD_WAKE_UP_PATTERN,
- 0,
- 0,
- 0,
- SK_PNMI_WO, PowerManagement, 0},
- {OID_PNP_REMOVE_WAKE_UP_PATTERN,
- 0,
- 0,
- 0,
- SK_PNMI_WO, PowerManagement, 0},
- {OID_PNP_ENABLE_WAKE_UP,
- 0,
- 0,
- 0,
- SK_PNMI_RW, PowerManagement, 0},
-#endif /* SK_POWER_MGMT */
- {OID_SKGE_MDB_VERSION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(MgmtDBVersion),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SUPPORTED_LIST,
- 0,
- 0,
- 0,
- SK_PNMI_RO, General, 0},
- {OID_SKGE_ALL_DATA,
- 0,
- 0,
- 0,
- SK_PNMI_RW, OidStruct, 0},
- {OID_SKGE_VPD_FREE_BYTES,
- 1,
- 0,
- SK_PNMI_MAI_OFF(VpdFreeBytes),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ENTRIES_LIST,
- 1,
- 0,
- SK_PNMI_MAI_OFF(VpdEntriesList),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ENTRIES_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(VpdEntriesNumber),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_KEY,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdKey),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_VALUE,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdValue),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ACCESS,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdAccess),
- SK_PNMI_RO, Vpd, 0},
- {OID_SKGE_VPD_ACTION,
- SK_PNMI_VPD_ENTRIES,
- sizeof(SK_PNMI_VPD),
- SK_PNMI_OFF(Vpd) + SK_PNMI_VPD_OFF(VpdAction),
- SK_PNMI_RW, Vpd, 0},
- {OID_SKGE_PORT_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(PortNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_DEVICE_TYPE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(DeviceType),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_DRIVER_DESCR,
- 1,
- 0,
- SK_PNMI_MAI_OFF(DriverDescr),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_DRIVER_VERSION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(DriverVersion),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_HW_DESCR,
- 1,
- 0,
- SK_PNMI_MAI_OFF(HwDescr),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_HW_VERSION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(HwVersion),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_CHIPSET,
- 1,
- 0,
- SK_PNMI_MAI_OFF(Chipset),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_ACTION,
- 1,
- 0,
- SK_PNMI_MAI_OFF(Action),
- SK_PNMI_RW, Perform, 0},
- {OID_SKGE_RESULT,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TestResult),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_BUS_TYPE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(BusType),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_BUS_SPEED,
- 1,
- 0,
- SK_PNMI_MAI_OFF(BusSpeed),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_BUS_WIDTH,
- 1,
- 0,
- SK_PNMI_MAI_OFF(BusWidth),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_SW_QUEUE_LEN,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxSwQueueLen),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_SW_QUEUE_MAX,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxSwQueueMax),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_RETRY,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxRetryCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_INTR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxIntrCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_INTR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxIntrCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_NO_BUF_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxNoBufCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_NO_BUF_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxNoBufCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_USED_DESCR_NO,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxUsedDescrNo),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_DELIVERED_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxDeliveredCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_OCTETS_DELIV_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxOctetsDeliveredCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RX_HW_ERROR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RxHwErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TX_HW_ERROR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TxHwErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_IN_ERRORS_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(InErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_OUT_ERROR_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(OutErrorsCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_ERR_RECOVERY_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(ErrRecoveryCts),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SYSUPTIME,
- 1,
- 0,
- SK_PNMI_MAI_OFF(SysUpTime),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SENSOR_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(SensorNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_SENSOR_INDEX,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorIndex),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_DESCR,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorDescr),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_TYPE,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorType),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_VALUE,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorValue),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_THRES_LOW,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningThresholdLow),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_THRES_UPP,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningThresholdHigh),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_THRES_LOW,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorThresholdLow),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_THRES_UPP,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorThresholdHigh),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_STATUS,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorStatus),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_CTS,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningCts),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_CTS,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorCts),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_WAR_TIME,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorWarningTimestamp),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_SENSOR_ERR_TIME,
- SK_PNMI_SENSOR_ENTRIES,
- sizeof(SK_PNMI_SENSOR),
- SK_PNMI_OFF(Sensor) + SK_PNMI_SEN_OFF(SensorErrorTimestamp),
- SK_PNMI_RO, SensorStat, 0},
- {OID_SKGE_CHKSM_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(ChecksumNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_CHKSM_RX_OK_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxOkCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_RX_UNABLE_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxUnableCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_RX_ERR_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumRxErrCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_TX_OK_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumTxOkCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_CHKSM_TX_UNABLE_CTS,
- SKCS_NUM_PROTOCOLS,
- sizeof(SK_PNMI_CHECKSUM),
- SK_PNMI_OFF(Checksum) + SK_PNMI_CHK_OFF(ChecksumTxUnableCts),
- SK_PNMI_RO, CsumStat, 0},
- {OID_SKGE_STAT_TX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX},
- {OID_SKGE_STAT_TX_OCTETS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxOctetsOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_OCTET},
- {OID_SKGE_STAT_TX_BROADCAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxBroadcastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_BROADCAST},
- {OID_SKGE_STAT_TX_MULTICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMulticastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MULTICAST},
- {OID_SKGE_STAT_TX_UNICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxUnicastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_UNICAST},
- {OID_SKGE_STAT_TX_LONGFRAMES,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxLongFramesCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_LONGFRAMES},
- {OID_SKGE_STAT_TX_BURST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxBurstCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_BURST},
- {OID_SKGE_STAT_TX_PFLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxPauseMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_PMACC},
- {OID_SKGE_STAT_TX_FLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MACC},
- {OID_SKGE_STAT_TX_SINGLE_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSingleCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SINGLE_COL},
- {OID_SKGE_STAT_TX_MULTI_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMultipleCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MULTI_COL},
- {OID_SKGE_STAT_TX_EXCESS_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxExcessiveCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_EXCESS_COL},
- {OID_SKGE_STAT_TX_LATE_COL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxLateCollisionCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_LATE_COL},
- {OID_SKGE_STAT_TX_DEFFERAL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxDeferralCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_DEFFERAL},
- {OID_SKGE_STAT_TX_EXCESS_DEF,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxExcessiveDeferralCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_EXCESS_DEF},
- {OID_SKGE_STAT_TX_UNDERRUN,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxFifoUnderrunCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_UNDERRUN},
- {OID_SKGE_STAT_TX_CARRIER,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxCarrierCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_CARRIER},
-/* {OID_SKGE_STAT_TX_UTIL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxUtilization),
- SK_PNMI_RO, MacPrivateStat, (SK_U16)(-1)}, */
- {OID_SKGE_STAT_TX_64,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx64Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_64},
- {OID_SKGE_STAT_TX_127,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx127Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_127},
- {OID_SKGE_STAT_TX_255,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx255Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_255},
- {OID_SKGE_STAT_TX_511,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx511Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_511},
- {OID_SKGE_STAT_TX_1023,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTx1023Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_1023},
- {OID_SKGE_STAT_TX_MAX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxMaxCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_MAX},
- {OID_SKGE_STAT_TX_SYNC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSyncCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SYNC},
- {OID_SKGE_STAT_TX_SYNC_OCTETS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatTxSyncOctetsCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HTX_SYNC_OCTET},
- {OID_SKGE_STAT_RX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX},
- {OID_SKGE_STAT_RX_OCTETS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxOctetsOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_OCTET},
- {OID_SKGE_STAT_RX_BROADCAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxBroadcastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_BROADCAST},
- {OID_SKGE_STAT_RX_MULTICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMulticastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MULTICAST},
- {OID_SKGE_STAT_RX_UNICAST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxUnicastOkCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_UNICAST},
- {OID_SKGE_STAT_RX_LONGFRAMES,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxLongFramesCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_LONGFRAMES},
- {OID_SKGE_STAT_RX_PFLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxPauseMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_PMACC},
- {OID_SKGE_STAT_RX_FLOWC,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMacCtrlCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MACC},
- {OID_SKGE_STAT_RX_PFLOWC_ERR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxPauseMacCtrlErrorCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_PMACC_ERR},
- {OID_SKGE_STAT_RX_FLOWC_UNKWN,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMacCtrlUnknownCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MACC_UNKWN},
- {OID_SKGE_STAT_RX_BURST,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxBurstCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_BURST},
- {OID_SKGE_STAT_RX_MISSED,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMissedCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MISSED},
- {OID_SKGE_STAT_RX_FRAMING,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFramingCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_FRAMING},
- {OID_SKGE_STAT_RX_OVERFLOW,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFifoOverflowCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_OVERFLOW},
- {OID_SKGE_STAT_RX_JABBER,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxJabberCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_JABBER},
- {OID_SKGE_STAT_RX_CARRIER,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxCarrierCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_CARRIER},
- {OID_SKGE_STAT_RX_IR_LENGTH,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxIRLengthCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_IRLENGTH},
- {OID_SKGE_STAT_RX_SYMBOL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxSymbolCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_SYMBOL},
- {OID_SKGE_STAT_RX_SHORTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxShortsCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_SHORTS},
- {OID_SKGE_STAT_RX_RUNT,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxRuntCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_RUNT},
- {OID_SKGE_STAT_RX_CEXT,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxCextCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_CEXT},
- {OID_SKGE_STAT_RX_TOO_LONG,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxTooLongCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_TOO_LONG},
- {OID_SKGE_STAT_RX_FCS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxFcsCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_FCS},
-/* {OID_SKGE_STAT_RX_UTIL,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxUtilization),
- SK_PNMI_RO, MacPrivateStat, (SK_U16)(-1)}, */
- {OID_SKGE_STAT_RX_64,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx64Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_64},
- {OID_SKGE_STAT_RX_127,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx127Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_127},
- {OID_SKGE_STAT_RX_255,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx255Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_255},
- {OID_SKGE_STAT_RX_511,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx511Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_511},
- {OID_SKGE_STAT_RX_1023,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRx1023Cts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_1023},
- {OID_SKGE_STAT_RX_MAX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_STAT),
- SK_PNMI_OFF(Stat) + SK_PNMI_STA_OFF(StatRxMaxCts),
- SK_PNMI_RO, MacPrivateStat, SK_PNMI_HRX_MAX},
- {OID_SKGE_PHYS_CUR_ADDR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfMacCurrentAddr),
- SK_PNMI_RW, Addr, 0},
- {OID_SKGE_PHYS_FAC_ADDR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfMacFactoryAddr),
- SK_PNMI_RO, Addr, 0},
- {OID_SKGE_PMD,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPMD),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_CONNECTOR,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfConnector),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_LINK_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_LINK_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_LINK_MODE_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkModeStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_LINK_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfLinkStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_FLOWCTRL_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_FLOWCTRL_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_FLOWCTRL_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfFlowCtrlStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_PHY_OPERATION_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_PHY_OPERATION_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_PHY_OPERATION_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyOperationStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_SPEED_CAP,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfSpeedCapability),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_SPEED_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfSpeedMode),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_SPEED_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfSpeedStatus),
- SK_PNMI_RO, MacPrivateConf, 0},
- {OID_SKGE_TRAP,
- 1,
- 0,
- SK_PNMI_MAI_OFF(Trap),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_TRAP_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(TrapNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RLMT_MODE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtMode),
- SK_PNMI_RW, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtPortNumber),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_ACTIVE,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtPortActive),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_PREFERRED,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtPortPreferred),
- SK_PNMI_RW, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_CTS,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeCts),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_TIME,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeTime),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_ESTIM,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeEstimate),
- SK_PNMI_RO, Rlmt, 0},
- {OID_SKGE_RLMT_CHANGE_THRES,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtChangeThreshold),
- SK_PNMI_RW, Rlmt, 0},
- {OID_SKGE_RLMT_PORT_INDEX,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtIndex),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_STATUS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtStatus),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_TX_HELLO_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtTxHelloCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_RX_HELLO_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtRxHelloCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_TX_SP_REQ_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtTxSpHelloReqCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_RX_SP_CTS,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_RLMT),
- SK_PNMI_OFF(Rlmt) + SK_PNMI_RLM_OFF(RlmtRxSpHelloCts),
- SK_PNMI_RO, RlmtStat, 0},
- {OID_SKGE_RLMT_MONITOR_NUMBER,
- 1,
- 0,
- SK_PNMI_MAI_OFF(RlmtMonitorNumber),
- SK_PNMI_RO, General, 0},
- {OID_SKGE_RLMT_MONITOR_INDEX,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorIndex),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_ADDR,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorAddr),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_ERRS,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorErrorCts),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_TIMESTAMP,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorTimestamp),
- SK_PNMI_RO, Monitor, 0},
- {OID_SKGE_RLMT_MONITOR_ADMIN,
- SK_PNMI_MONITOR_ENTRIES,
- sizeof(SK_PNMI_RLMT_MONITOR),
- SK_PNMI_OFF(RlmtMonitor) + SK_PNMI_MON_OFF(RlmtMonitorAdmin),
- SK_PNMI_RW, Monitor, 0},
- {OID_SKGE_MTU,
- 1,
- 0,
- SK_PNMI_MAI_OFF(MtuSize),
- SK_PNMI_RW, MacPrivateConf, 0},
- {OID_SKGE_VCT_GET,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Vct, 0},
- {OID_SKGE_VCT_SET,
- 0,
- 0,
- 0,
- SK_PNMI_WO, Vct, 0},
- {OID_SKGE_VCT_STATUS,
- 0,
- 0,
- 0,
- SK_PNMI_RO, Vct, 0},
-};
+++ /dev/null
-/*****************************************************************************
- *
- * Name: skgepnmi.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.102 $
- * Date: $Date: 2002/12/16 14:03:24 $
- * Purpose: Private Network Management Interface
- *
- ****************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/*****************************************************************************
- *
- * History:
- *
- * $Log: skgepnmi.c,v $
- * Revision 1.102 2002/12/16 14:03:24 tschilli
- * VCT code in Vct() changed.
- *
- * Revision 1.101 2002/12/16 09:04:10 tschilli
- * Code for VCT handling added.
- *
- * Revision 1.100 2002/09/26 14:28:13 tschilli
- * For XMAC the values in the SK_PNMI_PORT Port struct are copied to
- * the new SK_PNMI_PORT BufPort struct during a MacUpdate() call.
- * These values are used when GetPhysStatVal() is called. With this
- * mechanism you get the best results when software corrections for
- * counters are needed. Example: RX_LONGFRAMES.
- *
- * Revision 1.99 2002/09/17 12:31:19 tschilli
- * OID_SKGE_TX_HW_ERROR_CTS, OID_SKGE_OUT_ERROR_CTS, OID_GEN_XMIT_ERROR:
- * Double count of SK_PNMI_HTX_EXCESS_COL in function General() removed.
- * OID_PNP_CAPABILITIES: sizeof(SK_PM_WAKE_UP_CAPABILITIES) changed to
- * sizeof(SK_PNP_CAPABILITIES) in function PowerManagement().
- *
- * Revision 1.98 2002/09/10 09:00:03 rwahl
- * Adapted boolean definitions according sktypes.
- *
- * Revision 1.97 2002/09/05 15:07:03 rwahl
- * Editorial changes.
- *
- * Revision 1.96 2002/09/05 11:04:14 rwahl
- * - Rx/Tx packets statistics of virtual port were zero on link down (#10750)
- * - For GMAC the overflow IRQ for Rx longframe counter was not counted.
- * - Incorrect calculation for oids OID_SKGE_RX_HW_ERROR_CTS,
- * OID_SKGE_IN_ERRORS_CTS, OID_GEN_RCV_ERROR.
- * - Moved correction for OID_SKGE_STAT_RX_TOO_LONG to GetPhysStatVal().
- * - Editorial changes.
- *
- * Revision 1.95 2002/09/04 08:53:37 rwahl
- * - Incorrect statistics for Rx_too_long counter with jumbo frame (#10751)
- * - StatRxFrameTooLong & StatRxPMaccErr counters were not reset.
- * - Fixed compiler warning for debug msg arg types.
- *
- * Revision 1.94 2002/08/09 15:42:14 rwahl
- * - Fixed StatAddr table for GMAC.
- * - VirtualConf(): returned indeterminated status for speed oids if no
- * active port.
- *
- * Revision 1.93 2002/08/09 11:04:59 rwahl
- * Added handler for link speed caps.
- *
- * Revision 1.92 2002/08/09 09:43:03 rwahl
- * - Added handler for NDIS OID_PNP_xxx ids.
- *
- * Revision 1.91 2002/07/17 19:53:03 rwahl
- * - Added StatOvrflwBit table for XMAC & GMAC.
- * - Extended StatAddr table for GMAC. Added check of number of counters
- * in enumeration and size of StatAddr table on init level.
- * - Added use of GIFunc table.
- * - ChipSet is not static anymore,
- * - Extended SIRQ event handler for both mac types.
- * - Fixed rx short counter bug (#10620)
- * - Added handler for oids SKGE_SPEED_MODE & SKGE_SPEED_STATUS.
- * - Extendet GetPhysStatVal() for GMAC.
- * - Editorial changes.
- *
- * Revision 1.90 2002/05/22 08:56:25 rwahl
- * - Moved OID table to separate source file.
- * - Fix: TX_DEFFERAL counter incremented in full-duplex mode.
- * - Use string definitions for error msgs.
- *
- * Revision 1.89 2001/09/18 10:01:30 mkunz
- * some OID's fixed for dualnetmode
- *
- * Revision 1.88 2001/08/02 07:58:08 rwahl
- * - Fixed NetIndex to csum module at ResetCounter().
- *
- * Revision 1.87 2001/04/06 13:35:09 mkunz
- * -Bugs fixed in handling of OID_SKGE_MTU and the VPD OID's
- *
- * Revision 1.86 2001/03/09 09:18:03 mkunz
- * Changes in SK_DBG_MSG
- *
- * Revision 1.85 2001/03/08 09:37:31 mkunz
- * Bugfix in ResetCounter for Pnmi.Port structure
- *
- * Revision 1.84 2001/03/06 09:04:55 mkunz
- * Made some changes in instance calculation
- *
- * Revision 1.83 2001/02/15 09:15:32 mkunz
- * Necessary changes for dual net mode added
- *
- * Revision 1.82 2001/02/07 08:24:19 mkunz
- * -Made changes in handling of OID_SKGE_MTU
- *
- * Revision 1.81 2001/02/06 09:58:00 mkunz
- * -Vpd bug fixed
- * -OID_SKGE_MTU added
- * -pnmi support for dual net mode. Interface function and macros extended
- *
- * Revision 1.80 2001/01/22 13:41:35 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.79 2000/12/05 14:57:40 cgoos
- * SetStruct failed before first Link Up (link mode of virtual
- * port "INDETERMINATED").
- *
- * Revision 1.78 2000/09/12 10:44:58 cgoos
- * Fixed SK_PNMI_STORE_U32 calls with typecasted argument.
- *
- * Revision 1.77 2000/09/07 08:10:19 rwahl
- * - Modified algorithm for 64bit NDIS statistic counters;
- * returns 64bit or 32bit value depending on passed buffer
- * size. Indicate capability for 64bit NDIS counter, if passed
- * buffer size is zero. OID_GEN_XMIT_ERROR, OID_GEN_RCV_ERROR,
- * and OID_GEN_RCV_NO_BUFFER handled as 64bit counter, too.
- * - corrected OID_SKGE_RLMT_PORT_PREFERRED.
- *
- * Revision 1.76 2000/08/03 15:23:39 rwahl
- * - Correction for FrameTooLong counter has to be moved to OID handling
- * routines (instead of statistic counter routine).
- * - Fix in XMAC Reset Event handling: Only offset counter for hardware
- * statistic registers are updated.
- *
- * Revision 1.75 2000/08/01 16:46:05 rwahl
- * - Added StatRxLongFrames counter and correction of FrameTooLong counter.
- * - Added directive to control width (default = 32bit) of NDIS statistic
- * counters (SK_NDIS_64BIT_CTR).
- *
- * Revision 1.74 2000/07/04 11:41:53 rwahl
- * - Added volition connector type.
- *
- * Revision 1.73 2000/03/15 16:33:10 rwahl
- * Fixed bug 10510; wrong reset of virtual port statistic counters.
- *
- * Revision 1.72 1999/12/06 16:15:53 rwahl
- * Fixed problem of instance range for current and factory MAC address.
- *
- * Revision 1.71 1999/12/06 10:14:20 rwahl
- * Fixed bug 10476; set operation for PHY_OPERATION_MODE.
- *
- * Revision 1.70 1999/11/22 13:33:34 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.69 1999/10/18 11:42:15 rwahl
- * Added typecasts for checking event dependent param (debug only).
- *
- * Revision 1.68 1999/10/06 09:35:59 cgoos
- * Added state check to PHY_READ call (hanged if called during startup).
- *
- * Revision 1.67 1999/09/22 09:53:20 rwahl
- * - Read Broadcom register for updating fcs error counter (1000Base-T).
- *
- * Revision 1.66 1999/08/26 13:47:56 rwahl
- * Added SK_DRIVER_SENDEVENT when queueing RLMT_CHANGE_THRES trap.
- *
- * Revision 1.65 1999/07/26 07:49:35 cgoos
- * Added two typecasts to avoid compiler warnings.
- *
- * Revision 1.64 1999/05/20 09:24:12 cgoos
- * Changes for 1000Base-T (sensors, Master/Slave).
- *
- * Revision 1.63 1999/04/13 15:11:58 mhaveman
- * Moved include of rlmt.h to header skgepnmi.h because some macros
- * are needed there.
- *
- * Revision 1.62 1999/04/13 15:08:07 mhaveman
- * Replaced again SK_RLMT_CHECK_LINK with SK_PNMI_RLMT_MODE_CHK_LINK
- * to grant unified interface by only using the PNMI header file.
- * SK_PNMI_RLMT_MODE_CHK_LINK is defined the same as SK_RLMT_CHECK_LINK.
- *
- * Revision 1.61 1999/04/13 15:02:48 mhaveman
- * Changes caused by review:
- * -Changed some comments
- * -Removed redundant check for OID_SKGE_PHYS_FAC_ADDR
- * -Optimized PRESET check.
- * -Meaning of error SK_ADDR_DUPLICATE_ADDRESS changed. Set of same
- * address will now not cause this error. Removed corresponding check.
- *
- * Revision 1.60 1999/03/23 10:41:23 mhaveman
- * Added comments.
- *
- * Revision 1.59 1999/02/19 08:01:28 mhaveman
- * Fixed bug 10372 that after counter reset all ports were displayed
- * as inactive.
- *
- * Revision 1.58 1999/02/16 18:04:47 mhaveman
- * Fixed problem of twisted OIDs SENSOR_WAR_TIME and SENSOR_ERR_TIME.
- *
- * Revision 1.56 1999/01/27 12:29:11 mhaveman
- * SkTimerStart was called with time value in milli seconds but needs
- * micro seconds.
- *
- * Revision 1.55 1999/01/25 15:00:38 mhaveman
- * Added support to allow multiple ports to be active. If this feature in
- * future will be used, the Management Data Base variables PORT_ACTIVE
- * and PORT_PREFERED should be moved to the port specific part of RLMT.
- * Currently they return the values of the first active physical port
- * found. A set to the virtual port will actually change all active
- * physical ports. A get returns the melted values of all active physical
- * ports. If the port values differ a return value INDETERMINATED will
- * be returned. This effects especially the CONF group.
- *
- * Revision 1.54 1999/01/19 10:10:22 mhaveman
- * -Fixed bug 10354: Counter values of virtual port were wrong after port
- * switches
- * -Added check if a switch to the same port is notified.
- *
- * Revision 1.53 1999/01/07 09:25:21 mhaveman
- * Forgot to initialize a variable.
- *
- * Revision 1.52 1999/01/05 10:34:33 mhaveman
- * Fixed little error in RlmtChangeEstimate calculation.
- *
- * Revision 1.51 1999/01/05 09:59:07 mhaveman
- * -Moved timer start to init level 2
- * -Redesigned port switch average calculation to avoid 64bit
- * arithmetic.
- *
- * Revision 1.50 1998/12/10 15:13:59 mhaveman
- * -Fixed: PHYS_CUR_ADDR returned wrong addresses
- * -Fixed: RLMT_PORT_PREFERED and RLMT_CHANGE_THRES preset returned
- * always BAD_VALUE.
- * -Fixed: TRAP buffer seemed to sometimes suddenly empty
- *
- * Revision 1.49 1998/12/09 16:17:07 mhaveman
- * Fixed: Couldnot delete VPD keys on UNIX.
- *
- * Revision 1.48 1998/12/09 14:11:10 mhaveman
- * -Add: Debugmessage for XMAC_RESET supressed to minimize output.
- * -Fixed: RlmtChangeThreshold will now be initialized.
- * -Fixed: VPD_ENTRIES_LIST extended value with unnecessary space char.
- * -Fixed: On VPD key creation an invalid key name could be created
- * (e.g. A5)
- * -Some minor changes in comments and code.
- *
- * Revision 1.47 1998/12/08 16:00:31 mhaveman
- * -Fixed: For RLMT_PORT_ACTIVE will now be returned a 0 if no port
- * is active.
- * -Fixed: For the RLMT statistics group only the last value was
- * returned and the rest of the buffer was filled with 0xff
- * -Fixed: Mysteriously the preset on RLMT_MODE still returned
- * BAD_VALUE.
- * Revision 1.46 1998/12/08 10:04:56 mhaveman
- * -Fixed: Preset on RLMT_MODE returned always BAD_VALUE error.
- * -Fixed: Alignment error in GetStruct
- * -Fixed: If for Get/Preset/SetStruct the buffer size is equal or
- * larger than SK_PNMI_MIN_STRUCT_SIZE the return value is stored
- * to the buffer. In this case the caller should always return
- * ok to its upper routines. Only if the buffer size is less
- * than SK_PNMI_MIN_STRUCT_SIZE and the return value is unequal
- * to 0, an error should be returned by the caller.
- * -Fixed: Wrong number of instances with RLMT statistic.
- * -Fixed: Return now SK_LMODE_STAT_UNKNOWN if the LinkModeStatus is 0.
- *
- * Revision 1.45 1998/12/03 17:17:24 mhaveman
- * -Removed for VPD create action the buffer size limitation to 4 bytes.
- * -Pass now physical/active physical port to ADDR for CUR_ADDR set
- *
- * Revision 1.44 1998/12/03 15:14:35 mhaveman
- * Another change to Vpd instance evaluation.
- *
- * Revision 1.43 1998/12/03 14:18:10 mhaveman
- * -Fixed problem in PnmiSetStruct. It was impossible to set any value.
- * -Removed VPD key evaluation for VPD_FREE_BYTES and VPD_ACTION.
- *
- * Revision 1.42 1998/12/03 11:31:47 mhaveman
- * Inserted cast to satisfy lint.
- *
- * Revision 1.41 1998/12/03 11:28:16 mhaveman
- * Removed SK_PNMI_CHECKPTR
- *
- * Revision 1.40 1998/12/03 11:19:07 mhaveman
- * Fixed problems
- * -A set to virtual port will now be ignored. A set with broadcast
- * address to any port will be ignored.
- * -GetStruct function made VPD instance calculation wrong.
- * -Prefered port returned -1 instead of 0.
- *
- * Revision 1.39 1998/11/26 15:30:29 mhaveman
- * Added sense mode to link mode.
- *
- * Revision 1.38 1998/11/23 15:34:00 mhaveman
- * -Fixed bug for RX counters. On an RX overflow interrupt the high
- * words of all RX counters were incremented.
- * -SET operations on FLOWCTRL_MODE and LINK_MODE accept now the
- * value 0, which has no effect. It is usefull for multiple instance
- * SETs.
- *
- * Revision 1.37 1998/11/20 08:02:04 mhaveman
- * -Fixed: Ports were compared with MAX_SENSORS
- * -Fixed: Crash in GetTrapEntry with MEMSET macro
- * -Fixed: Conversions between physical, logical port index and instance
- *
- * Revision 1.36 1998/11/16 07:48:53 mhaveman
- * Casted SK_DRIVER_SENDEVENT with (void) to eleminate compiler warnings
- * on Solaris.
- *
- * Revision 1.35 1998/11/16 07:45:34 mhaveman
- * SkAddrOverride now returns value and will be checked.
- *
- * Revision 1.34 1998/11/10 13:40:37 mhaveman
- * Needed to change interface, because NT driver needs a return value
- * of needed buffer space on TOO_SHORT errors. Therefore all
- * SkPnmiGet/Preset/Set functions now have a pointer to the length
- * parameter, where the needed space on error is returned.
- *
- * Revision 1.33 1998/11/03 13:52:46 mhaveman
- * Made file lint conform.
- *
- * Revision 1.32 1998/11/03 13:19:07 mhaveman
- * The events SK_HWEV_SET_LMODE and SK_HWEV_SET_FLOWMODE pass now in
- * Para32[0] the physical MAC index and in Para32[1] the new mode.
- *
- * Revision 1.31 1998/11/03 12:30:40 gklug
- * fix: compiler warning memset
- *
- * Revision 1.30 1998/11/03 12:04:46 mhaveman
- * Fixed problem in SENSOR_VALUE, which wrote beyond the buffer end
- * Fixed alignment problem with CHIPSET.
- *
- * Revision 1.29 1998/11/02 11:23:54 mhaveman
- * Corrected SK_ERROR_LOG to SK_ERR_LOG. Sorry.
- *
- * Revision 1.28 1998/11/02 10:47:16 mhaveman
- * Added syslog messages for internal errors.
- *
- * Revision 1.27 1998/10/30 15:48:06 mhaveman
- * Fixed problems after simulation of SK_PNMI_EVT_CHG_EST_TIMER and
- * RlmtChangeThreshold calculation.
- *
- * Revision 1.26 1998/10/29 15:36:55 mhaveman
- * -Fixed bug in trap buffer handling.
- * -OID_SKGE_DRIVER_DESCR, OID_SKGE_DRIVER_VERSION, OID_SKGE_HW_DESCR,
- * OID_SKGE_HW_VERSION, OID_SKGE_VPD_ENTRIES_LIST, OID_SKGE_VPD_KEY,
- * OID_SKGE_VPD_VALUE, and OID_SKGE_SENSOR_DESCR return values with
- * a leading octet before each string storing the string length.
- * -Perform a RlmtUpdate during SK_PNMI_EVT_XMAC_RESET to minimize
- * RlmtUpdate calls in GetStatVal.
- * -Inserted SK_PNMI_CHECKFLAGS macro increase readability.
- *
- * Revision 1.25 1998/10/29 08:50:36 mhaveman
- * Fixed problems after second event simulation.
- *
- * Revision 1.24 1998/10/28 08:44:37 mhaveman
- * -Fixed alignment problem
- * -Fixed problems during event simulation
- * -Fixed sequence of error return code (INSTANCE -> ACCESS -> SHORT)
- * -Changed type of parameter Instance back to SK_U32 because of VPD
- * -Updated new VPD function calls
- *
- * Revision 1.23 1998/10/23 10:16:37 mhaveman
- * Fixed bugs after buffer test simulation.
- *
- * Revision 1.22 1998/10/21 13:23:52 mhaveman
- * -Call syntax of SkOsGetTime() changed to SkOsGetTime(pAc).
- * -Changed calculation of hundrets of seconds.
- *
- * Revision 1.20 1998/10/20 07:30:45 mhaveman
- * Made type changes to unsigned integer where possible.
- *
- * Revision 1.19 1998/10/19 10:51:30 mhaveman
- * -Made Bug fixes after simulation run
- * -Renamed RlmtMAC... to RlmtPort...
- * -Marked workarounds with Errata comments
- *
- * Revision 1.18 1998/10/14 07:50:08 mhaveman
- * -For OID_SKGE_LINK_STATUS the link down detection has moved from RLMT
- * to HWACCESS.
- * -Provided all MEMCPY/MEMSET macros with (char *) pointers, because
- * Solaris throwed warnings when mapping to bcopy/bset.
- *
- * Revision 1.17 1998/10/13 07:42:01 mhaveman
- * -Added OIDs OID_SKGE_TRAP_NUMBER and OID_SKGE_ALL_DATA
- * -Removed old cvs history entries
- * -Renamed MacNumber to PortNumber
- *
- * Revision 1.16 1998/10/07 10:52:49 mhaveman
- * -Inserted handling of some OID_GEN_ Ids for windows
- * -Fixed problem with 803.2 statistic.
- *
- * Revision 1.15 1998/10/01 09:16:29 mhaveman
- * Added Debug messages for function call and UpdateFlag tracing.
- *
- * Revision 1.14 1998/09/30 13:39:09 mhaveman
- * -Reduced namings of 'MAC' by replacing them with 'PORT'.
- * -Completed counting of OID_SKGE_RX_HW_ERROR_CTS,
- * OID_SKGE_TX_HW_ERROR_CTS,
- * OID_SKGE_IN_ERRORS_CTS, and OID_SKGE_OUT_ERROR_CTS.
- * -SET check for RlmtMode
- *
- * Revision 1.13 1998/09/28 13:13:08 mhaveman
- * Hide strcmp, strlen, and strncpy behind macros SK_STRCMP, SK_STRLEN,
- * and SK_STRNCPY. (Same reasons as for mem.. and MEM..)
- *
- * Revision 1.12 1998/09/16 08:18:36 cgoos
- * Fix: XM_INxx and XM_OUTxx called with different parameter order:
- * sometimes IoC,Mac,... sometimes Mac,IoC,... Now always first variant.
- * Fix: inserted "Pnmi." into some pAC->pDriverDescription / Version.
- * Change: memset, memcpy to makros SK_MEMSET, SK_MEMCPY
- *
- * Revision 1.11 1998/09/04 17:01:45 mhaveman
- * Added SyncCounter as macro and OID_SKGE_.._NO_DESCR_CTS to
- * OID_SKGE_RX_NO_BUF_CTS.
- *
- * Revision 1.10 1998/09/04 14:35:35 mhaveman
- * Added macro counters, that are counted by driver.
- *
- ****************************************************************************/
-
-
-#include <config.h>
-
-static const char SysKonnectFileId[] =
- "@(#) $Id: skgepnmi.c,v 1.102 2002/12/16 14:03:24 tschilli Exp $"
- " (C) SysKonnect.";
-
-#include "h/skdrv1st.h"
-#include "h/sktypes.h"
-#include "h/xmac_ii.h"
-#include "h/skdebug.h"
-#include "h/skqueue.h"
-#include "h/skgepnmi.h"
-#include "h/skgesirq.h"
-#include "h/skcsum.h"
-#include "h/skvpd.h"
-#include "h/skgehw.h"
-#include "h/skgeinit.h"
-#include "h/skdrv2nd.h"
-#include "h/skgepnm2.h"
-#ifdef SK_POWER_MGMT
-#include "h/skgepmgt.h"
-#endif
-/* defines *******************************************************************/
-
-#ifndef DEBUG
-#define PNMI_STATIC static
-#else /* DEBUG */
-#define PNMI_STATIC
-#endif /* DEBUG */
-
-/*
- * Public Function prototypes
- */
-int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level);
-int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-int SkPnmiPreSetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-int SkPnmiSetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-int SkPnmiEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Param);
-
-
-/*
- * Private Function prototypes
- */
-
-PNMI_STATIC SK_U8 CalculateLinkModeStatus(SK_AC *pAC, SK_IOC IoC, unsigned int
- PhysPortIndex);
-PNMI_STATIC SK_U8 CalculateLinkStatus(SK_AC *pAC, SK_IOC IoC, unsigned int
- PhysPortIndex);
-PNMI_STATIC void CopyMac(char *pDst, SK_MAC_ADDR *pMac);
-PNMI_STATIC void CopyTrapQueue(SK_AC *pAC, char *pDstBuf);
-PNMI_STATIC SK_U64 GetPhysStatVal(SK_AC *pAC, SK_IOC IoC,
- unsigned int PhysPortIndex, unsigned int StatIndex);
-PNMI_STATIC SK_U64 GetStatVal(SK_AC *pAC, SK_IOC IoC, unsigned int LogPortIndex,
- unsigned int StatIndex, SK_U32 NetIndex);
-PNMI_STATIC char* GetTrapEntry(SK_AC *pAC, SK_U32 TrapId, unsigned int Size);
-PNMI_STATIC void GetTrapQueueLen(SK_AC *pAC, unsigned int *pLen,
- unsigned int *pEntries);
-PNMI_STATIC int GetVpdKeyArr(SK_AC *pAC, SK_IOC IoC, char *pKeyArr,
- unsigned int KeyArrLen, unsigned int *pKeyNo);
-PNMI_STATIC int LookupId(SK_U32 Id);
-PNMI_STATIC int MacUpdate(SK_AC *pAC, SK_IOC IoC, unsigned int FirstMac,
- unsigned int LastMac);
-PNMI_STATIC int PnmiStruct(SK_AC *pAC, SK_IOC IoC, int Action, char *pBuf,
- unsigned int *pLen, SK_U32 NetIndex);
-PNMI_STATIC int PnmiVar(SK_AC *pAC, SK_IOC IoC, int Action, SK_U32 Id,
- char *pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-PNMI_STATIC void QueueRlmtNewMacTrap(SK_AC *pAC, unsigned int ActiveMac);
-PNMI_STATIC void QueueRlmtPortTrap(SK_AC *pAC, SK_U32 TrapId,
- unsigned int PortIndex);
-PNMI_STATIC void QueueSensorTrap(SK_AC *pAC, SK_U32 TrapId,
- unsigned int SensorIndex);
-PNMI_STATIC void QueueSimpleTrap(SK_AC *pAC, SK_U32 TrapId);
-PNMI_STATIC void ResetCounter(SK_AC *pAC, SK_IOC IoC, SK_U32 NetIndex);
-PNMI_STATIC int RlmtUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 NetIndex);
-PNMI_STATIC int SirqUpdate(SK_AC *pAC, SK_IOC IoC);
-PNMI_STATIC void VirtualConf(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, char *pBuf);
-PNMI_STATIC int Vct(SK_AC *pAC, SK_IOC IoC, int Action, SK_U32 Id, char *pBuf,
- unsigned int *pLen, SK_U32 Instance, unsigned int TableIndex, SK_U32 NetIndex);
-PNMI_STATIC void CheckVctStatus(SK_AC *, SK_IOC, char *, SK_U32, SK_U32);
-
-/*
- * Table to correlate OID with handler function and index to
- * hardware register stored in StatAddress if applicable.
- */
-#include "skgemib.c"
-
-/* global variables **********************************************************/
-
-/*
- * Overflow status register bit table and corresponding counter
- * dependent on MAC type - the number relates to the size of overflow
- * mask returned by the pFnMacOverflow function
- */
-PNMI_STATIC const SK_U16 StatOvrflwBit[][SK_PNMI_MAC_TYPES] = {
-/* Bit0 */ { SK_PNMI_HTX, SK_PNMI_HTX_UNICAST},
-/* Bit1 */ { SK_PNMI_HTX_OCTETHIGH, SK_PNMI_HTX_BROADCAST},
-/* Bit2 */ { SK_PNMI_HTX_OCTETLOW, SK_PNMI_HTX_PMACC},
-/* Bit3 */ { SK_PNMI_HTX_BROADCAST, SK_PNMI_HTX_MULTICAST},
-/* Bit4 */ { SK_PNMI_HTX_MULTICAST, SK_PNMI_HTX_OCTETLOW},
-/* Bit5 */ { SK_PNMI_HTX_UNICAST, SK_PNMI_HTX_OCTETHIGH},
-/* Bit6 */ { SK_PNMI_HTX_LONGFRAMES, SK_PNMI_HTX_64},
-/* Bit7 */ { SK_PNMI_HTX_BURST, SK_PNMI_HTX_127},
-/* Bit8 */ { SK_PNMI_HTX_PMACC, SK_PNMI_HTX_255},
-/* Bit9 */ { SK_PNMI_HTX_MACC, SK_PNMI_HTX_511},
-/* Bit10 */ { SK_PNMI_HTX_SINGLE_COL, SK_PNMI_HTX_1023},
-/* Bit11 */ { SK_PNMI_HTX_MULTI_COL, SK_PNMI_HTX_MAX},
-/* Bit12 */ { SK_PNMI_HTX_EXCESS_COL, SK_PNMI_HTX_LONGFRAMES},
-/* Bit13 */ { SK_PNMI_HTX_LATE_COL, SK_PNMI_HTX_RESERVED},
-/* Bit14 */ { SK_PNMI_HTX_DEFFERAL, SK_PNMI_HTX_COL},
-/* Bit15 */ { SK_PNMI_HTX_EXCESS_DEF, SK_PNMI_HTX_LATE_COL},
-/* Bit16 */ { SK_PNMI_HTX_UNDERRUN, SK_PNMI_HTX_EXCESS_COL},
-/* Bit17 */ { SK_PNMI_HTX_CARRIER, SK_PNMI_HTX_MULTI_COL},
-/* Bit18 */ { SK_PNMI_HTX_UTILUNDER, SK_PNMI_HTX_SINGLE_COL},
-/* Bit19 */ { SK_PNMI_HTX_UTILOVER, SK_PNMI_HTX_UNDERRUN},
-/* Bit20 */ { SK_PNMI_HTX_64, SK_PNMI_HTX_RESERVED},
-/* Bit21 */ { SK_PNMI_HTX_127, SK_PNMI_HTX_RESERVED},
-/* Bit22 */ { SK_PNMI_HTX_255, SK_PNMI_HTX_RESERVED},
-/* Bit23 */ { SK_PNMI_HTX_511, SK_PNMI_HTX_RESERVED},
-/* Bit24 */ { SK_PNMI_HTX_1023, SK_PNMI_HTX_RESERVED},
-/* Bit25 */ { SK_PNMI_HTX_MAX, SK_PNMI_HTX_RESERVED},
-/* Bit26 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
-/* Bit27 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
-/* Bit28 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
-/* Bit29 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
-/* Bit30 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
-/* Bit31 */ { SK_PNMI_HTX_RESERVED, SK_PNMI_HTX_RESERVED},
-/* Bit32 */ { SK_PNMI_HRX, SK_PNMI_HRX_UNICAST},
-/* Bit33 */ { SK_PNMI_HRX_OCTETHIGH, SK_PNMI_HRX_BROADCAST},
-/* Bit34 */ { SK_PNMI_HRX_OCTETLOW, SK_PNMI_HRX_PMACC},
-/* Bit35 */ { SK_PNMI_HRX_BROADCAST, SK_PNMI_HRX_MULTICAST},
-/* Bit36 */ { SK_PNMI_HRX_MULTICAST, SK_PNMI_HRX_FCS},
-/* Bit37 */ { SK_PNMI_HRX_UNICAST, SK_PNMI_HRX_RESERVED},
-/* Bit38 */ { SK_PNMI_HRX_PMACC, SK_PNMI_HRX_OCTETLOW},
-/* Bit39 */ { SK_PNMI_HRX_MACC, SK_PNMI_HRX_OCTETHIGH},
-/* Bit40 */ { SK_PNMI_HRX_PMACC_ERR, SK_PNMI_HRX_BADOCTETLOW},
-/* Bit41 */ { SK_PNMI_HRX_MACC_UNKWN, SK_PNMI_HRX_BADOCTETHIGH},
-/* Bit42 */ { SK_PNMI_HRX_BURST, SK_PNMI_HRX_UNDERSIZE},
-/* Bit43 */ { SK_PNMI_HRX_MISSED, SK_PNMI_HRX_RUNT},
-/* Bit44 */ { SK_PNMI_HRX_FRAMING, SK_PNMI_HRX_64},
-/* Bit45 */ { SK_PNMI_HRX_OVERFLOW, SK_PNMI_HRX_127},
-/* Bit46 */ { SK_PNMI_HRX_JABBER, SK_PNMI_HRX_255},
-/* Bit47 */ { SK_PNMI_HRX_CARRIER, SK_PNMI_HRX_511},
-/* Bit48 */ { SK_PNMI_HRX_IRLENGTH, SK_PNMI_HRX_1023},
-/* Bit49 */ { SK_PNMI_HRX_SYMBOL, SK_PNMI_HRX_MAX},
-/* Bit50 */ { SK_PNMI_HRX_SHORTS, SK_PNMI_HRX_LONGFRAMES},
-/* Bit51 */ { SK_PNMI_HRX_RUNT, SK_PNMI_HRX_TOO_LONG},
-/* Bit52 */ { SK_PNMI_HRX_TOO_LONG, SK_PNMI_HRX_JABBER},
-/* Bit53 */ { SK_PNMI_HRX_FCS, SK_PNMI_HRX_RESERVED},
-/* Bit54 */ { SK_PNMI_HRX_RESERVED, SK_PNMI_HRX_OVERFLOW},
-/* Bit55 */ { SK_PNMI_HRX_CEXT, SK_PNMI_HRX_RESERVED},
-/* Bit56 */ { SK_PNMI_HRX_UTILUNDER, SK_PNMI_HRX_RESERVED},
-/* Bit57 */ { SK_PNMI_HRX_UTILOVER, SK_PNMI_HRX_RESERVED},
-/* Bit58 */ { SK_PNMI_HRX_64, SK_PNMI_HRX_RESERVED},
-/* Bit59 */ { SK_PNMI_HRX_127, SK_PNMI_HRX_RESERVED},
-/* Bit60 */ { SK_PNMI_HRX_255, SK_PNMI_HRX_RESERVED},
-/* Bit61 */ { SK_PNMI_HRX_511, SK_PNMI_HRX_RESERVED},
-/* Bit62 */ { SK_PNMI_HRX_1023, SK_PNMI_HRX_RESERVED},
-/* Bit63 */ { SK_PNMI_HRX_MAX, SK_PNMI_HRX_RESERVED}
-};
-
-/*
- * Table for hardware register saving on resets and port switches
- */
-PNMI_STATIC const SK_PNMI_STATADDR StatAddr[SK_PNMI_MAX_IDX][SK_PNMI_MAC_TYPES] = {
- /* SK_PNMI_HTX */
- {{XM_TXF_OK, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_OCTETHIGH */
- {{XM_TXO_OK_HI, SK_TRUE}, {GM_TXO_OK_HI, SK_TRUE}},
- /* SK_PNMI_HTX_OCTETLOW */
- {{XM_TXO_OK_LO, SK_FALSE}, {GM_TXO_OK_LO, SK_FALSE}},
- /* SK_PNMI_HTX_BROADCAST */
- {{XM_TXF_BC_OK, SK_TRUE}, {GM_TXF_BC_OK, SK_TRUE}},
- /* SK_PNMI_HTX_MULTICAST */
- {{XM_TXF_MC_OK, SK_TRUE}, {GM_TXF_MC_OK, SK_TRUE}},
- /* SK_PNMI_HTX_UNICAST */
- {{XM_TXF_UC_OK, SK_TRUE}, {GM_TXF_UC_OK, SK_TRUE}},
- /* SK_PNMI_HTX_BURST */
- {{XM_TXE_BURST, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_PMACC */
- {{XM_TXF_MPAUSE, SK_TRUE}, {GM_TXF_MPAUSE, SK_TRUE}},
- /* SK_PNMI_HTX_MACC */
- {{XM_TXF_MCTRL, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_COL */
- {{0, SK_FALSE}, {GM_TXF_COL, SK_TRUE}},
- /* SK_PNMI_HTX_SINGLE_COL */
- {{XM_TXF_SNG_COL, SK_TRUE}, {GM_TXF_SNG_COL, SK_TRUE}},
- /* SK_PNMI_HTX_MULTI_COL */
- {{XM_TXF_MUL_COL, SK_TRUE}, {GM_TXF_MUL_COL, SK_TRUE}},
- /* SK_PNMI_HTX_EXCESS_COL */
- {{XM_TXF_ABO_COL, SK_TRUE}, {GM_TXF_ABO_COL, SK_TRUE}},
- /* SK_PNMI_HTX_LATE_COL */
- {{XM_TXF_LAT_COL, SK_TRUE}, {GM_TXF_LAT_COL, SK_TRUE}},
- /* SK_PNMI_HTX_DEFFERAL */
- {{XM_TXF_DEF, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_EXCESS_DEF */
- {{XM_TXF_EX_DEF, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_UNDERRUN */
- {{XM_TXE_FIFO_UR, SK_TRUE}, {GM_TXE_FIFO_UR, SK_TRUE}},
- /* SK_PNMI_HTX_CARRIER */
- {{XM_TXE_CS_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_UTILUNDER */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_UTILOVER */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_64 */
- {{XM_TXF_64B, SK_TRUE}, {GM_TXF_64B, SK_TRUE}},
- /* SK_PNMI_HTX_127 */
- {{XM_TXF_127B, SK_TRUE}, {GM_TXF_127B, SK_TRUE}},
- /* SK_PNMI_HTX_255 */
- {{XM_TXF_255B, SK_TRUE}, {GM_TXF_255B, SK_TRUE}},
- /* SK_PNMI_HTX_511 */
- {{XM_TXF_511B, SK_TRUE}, {GM_TXF_511B, SK_TRUE}},
- /* SK_PNMI_HTX_1023 */
- {{XM_TXF_1023B, SK_TRUE}, {GM_TXF_1023B, SK_TRUE}},
- /* SK_PNMI_HTX_MAX */
- {{XM_TXF_MAX_SZ, SK_TRUE}, {GM_TXF_1518B, SK_TRUE}},
- /* SK_PNMI_HTX_LONGFRAMES */
- {{XM_TXF_LONG, SK_TRUE}, {GM_TXF_MAX_SZ, SK_TRUE}},
- /* SK_PNMI_HTX_SYNC */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_SYNC_OCTET */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HTX_RESERVED */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX */
- {{XM_RXF_OK, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_OCTETHIGH */
- {{XM_RXO_OK_HI, SK_TRUE}, {GM_RXO_OK_HI, SK_TRUE}},
- /* SK_PNMI_HRX_OCTETLOW */
- {{XM_RXO_OK_LO, SK_FALSE}, {GM_RXO_OK_LO, SK_FALSE}},
- /* SK_PNMI_HRX_BADOCTETHIGH */
- {{0, SK_FALSE}, {GM_RXO_ERR_HI, SK_TRUE}},
- /* SK_PNMI_HRX_BADOCTETLOW */
- {{0, SK_FALSE}, {GM_RXO_ERR_LO, SK_TRUE}},
- /* SK_PNMI_HRX_BROADCAST */
- {{XM_RXF_BC_OK, SK_TRUE}, {GM_RXF_BC_OK, SK_TRUE}},
- /* SK_PNMI_HRX_MULTICAST */
- {{XM_RXF_MC_OK, SK_TRUE}, {GM_RXF_MC_OK, SK_TRUE}},
- /* SK_PNMI_HRX_UNICAST */
- {{XM_RXF_UC_OK, SK_TRUE}, {GM_RXF_UC_OK, SK_TRUE}},
- /* SK_PNMI_HRX_PMACC */
- {{XM_RXF_MPAUSE, SK_TRUE}, {GM_RXF_MPAUSE, SK_TRUE}},
- /* SK_PNMI_HRX_MACC */
- {{XM_RXF_MCTRL, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_PMACC_ERR */
- {{XM_RXF_INV_MP, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_MACC_UNKWN */
- {{XM_RXF_INV_MOC, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_BURST */
- {{XM_RXE_BURST, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_MISSED */
- {{XM_RXE_FMISS, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_FRAMING */
- {{XM_RXF_FRA_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_UNDERSIZE */
- {{0, SK_FALSE},{GM_RXF_SHT, SK_TRUE}},
- /* SK_PNMI_HRX_OVERFLOW */
- {{XM_RXE_FIFO_OV, SK_TRUE}, {GM_RXE_FIFO_OV, SK_TRUE}},
- /* SK_PNMI_HRX_JABBER */
- {{XM_RXF_JAB_PKT, SK_TRUE}, {GM_RXF_JAB_PKT, SK_TRUE}},
- /* SK_PNMI_HRX_CARRIER */
- {{XM_RXE_CAR_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_IRLENGTH */
- {{XM_RXF_LEN_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_SYMBOL */
- {{XM_RXE_SYM_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_SHORTS */
- {{XM_RXE_SHT_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_RUNT */
- {{XM_RXE_RUNT, SK_TRUE}, {GM_RXE_FRAG, SK_TRUE}},
- /* SK_PNMI_HRX_TOO_LONG */
- {{XM_RXF_LNG_ERR, SK_TRUE}, {GM_RXF_LNG_ERR, SK_TRUE}},
- /* SK_PNMI_HRX_FCS */
- {{XM_RXF_FCS_ERR, SK_TRUE}, {GM_RXF_FCS_ERR, SK_TRUE}},
- /* SK_PNMI_HRX_CEXT */
- {{XM_RXF_CEX_ERR, SK_TRUE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_UTILUNDER */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_UTILOVER */
- {{0, SK_FALSE}, {0, SK_FALSE}},
- /* SK_PNMI_HRX_64 */
- {{XM_RXF_64B, SK_TRUE}, {GM_RXF_64B, SK_TRUE}},
- /* SK_PNMI_HRX_127 */
- {{XM_RXF_127B, SK_TRUE}, {GM_RXF_127B, SK_TRUE}},
- /* SK_PNMI_HRX_255 */
- {{XM_RXF_255B, SK_TRUE}, {GM_RXF_255B, SK_TRUE}},
- /* SK_PNMI_HRX_511 */
- {{XM_RXF_511B, SK_TRUE}, {GM_RXF_511B, SK_TRUE}},
- /* SK_PNMI_HRX_1023 */
- {{XM_RXF_1023B, SK_TRUE}, {GM_RXF_1023B, SK_TRUE}},
- /* SK_PNMI_HRX_MAX */
- {{XM_RXF_MAX_SZ, SK_TRUE}, {GM_RXF_1518B, SK_TRUE}},
- /* SK_PNMI_HRX_LONGFRAMES */
- {{0, SK_FALSE}, {GM_RXF_MAX_SZ, SK_TRUE}},
- /* SK_PNMI_HRX_RESERVED */
- {{0, SK_FALSE}, {0, SK_FALSE}}
-};
-
-
-/*****************************************************************************
- *
- * Public functions
- *
- */
-
-/*****************************************************************************
- *
- * SkPnmiInit - Init function of PNMI
- *
- * Description:
- * SK_INIT_DATA: Initialises the data structures
- * SK_INIT_IO: Resets the XMAC statistics, determines the device and
- * connector type.
- * SK_INIT_RUN: Starts a timer event for port switch per hour
- * calculation.
- *
- * Returns:
- * Always 0
- */
-int SkPnmiInit(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Level) /* Initialization level */
-{
- unsigned int PortMax; /* Number of ports */
- unsigned int PortIndex; /* Current port index in loop */
- SK_U16 Val16; /* Multiple purpose 16 bit variable */
- SK_U8 Val8; /* Mulitple purpose 8 bit variable */
- SK_EVPARA EventParam; /* Event struct for timer event */
- SK_GEPORT *pPrt;
- SK_PNMI_VCT *pVctBackupData;
-
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiInit: Called, level=%d\n", Level));
-
- switch (Level) {
-
- case SK_INIT_DATA:
- SK_MEMSET((char *)&pAC->Pnmi, 0, sizeof(pAC->Pnmi));
- pAC->Pnmi.TrapBufFree = SK_PNMI_TRAP_QUEUE_LEN;
- pAC->Pnmi.StartUpTime = SK_PNMI_HUNDREDS_SEC(SkOsGetTime(pAC));
- pAC->Pnmi.RlmtChangeThreshold = SK_PNMI_DEF_RLMT_CHG_THRES;
- for (PortIndex = 0; PortIndex < SK_MAX_MACS; PortIndex ++) {
-
- pAC->Pnmi.Port[PortIndex].ActiveFlag = SK_FALSE;
- pAC->Pnmi.DualNetActiveFlag = SK_FALSE;
- }
-
-#ifdef SK_PNMI_CHECK
- if (SK_PNMI_MAX_IDX != SK_PNMI_CNT_NO) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR049, SK_PNMI_ERR049MSG);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_INIT | SK_DBGCAT_FATAL,
- ("CounterOffset struct size (%d) differs from"
- "SK_PNMI_MAX_IDX (%d)\n",
- SK_PNMI_CNT_NO, SK_PNMI_MAX_IDX));
- BRK;
- }
-
- if (SK_PNMI_MAX_IDX !=
- (sizeof(StatAddr) / (sizeof(SK_PNMI_STATADDR) * SK_PNMI_MAC_TYPES))) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR050, SK_PNMI_ERR050MSG);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_INIT | SK_DBGCAT_FATAL,
- ("StatAddr table size (%d) differs from "
- "SK_PNMI_MAX_IDX (%d)\n",
- (sizeof(StatAddr) /
- (sizeof(SK_PNMI_STATADDR) * SK_PNMI_MAC_TYPES)),
- SK_PNMI_MAX_IDX));
- BRK;
- }
-#endif /* SK_PNMI_CHECK */
- break;
-
- case SK_INIT_IO:
- /*
- * Reset MAC counters
- */
- PortMax = pAC->GIni.GIMacsFound;
-
- for (PortIndex = 0; PortIndex < PortMax; PortIndex ++) {
-
- pAC->GIni.GIFunc.pFnMacResetCounter(pAC, IoC, PortIndex);
- }
-
- /* Initialize DSP variables for Vct() to 0xff => Never written! */
- for (PortIndex = 0; PortIndex < PortMax; PortIndex ++) {
- pPrt = &pAC->GIni.GP[PortIndex];
- pPrt->PCableLen =0xff;
- pVctBackupData = &pAC->Pnmi.VctBackup[PortIndex];
- pVctBackupData->PCableLen = 0xff;
- }
-
- /*
- * Get pci bus speed
- */
- SK_IN16(IoC, B0_CTST, &Val16);
- if ((Val16 & CS_BUS_CLOCK) == 0) {
-
- pAC->Pnmi.PciBusSpeed = 33;
- }
- else {
- pAC->Pnmi.PciBusSpeed = 66;
- }
-
- /*
- * Get pci bus width
- */
- SK_IN16(IoC, B0_CTST, &Val16);
- if ((Val16 & CS_BUS_SLOT_SZ) == 0) {
-
- pAC->Pnmi.PciBusWidth = 32;
- }
- else {
- pAC->Pnmi.PciBusWidth = 64;
- }
-
- /*
- * Get chipset
- */
- switch (pAC->GIni.GIChipId) {
- case CHIP_ID_GENESIS:
- pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_XMAC;
- break;
-
- case CHIP_ID_YUKON:
- pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON;
- break;
-
- default:
- break;
- }
-
- /*
- * Get PMD and DeviceType
- */
- SK_IN8(IoC, B2_PMD_TYP, &Val8);
- switch (Val8) {
- case 'S':
- pAC->Pnmi.PMD = 3;
- if (pAC->GIni.GIMacsFound > 1) {
-
- pAC->Pnmi.DeviceType = 0x00020002;
- }
- else {
- pAC->Pnmi.DeviceType = 0x00020001;
- }
- break;
-
- case 'L':
- pAC->Pnmi.PMD = 2;
- if (pAC->GIni.GIMacsFound > 1) {
-
- pAC->Pnmi.DeviceType = 0x00020004;
- }
- else {
- pAC->Pnmi.DeviceType = 0x00020003;
- }
- break;
-
- case 'C':
- pAC->Pnmi.PMD = 4;
- if (pAC->GIni.GIMacsFound > 1) {
-
- pAC->Pnmi.DeviceType = 0x00020006;
- }
- else {
- pAC->Pnmi.DeviceType = 0x00020005;
- }
- break;
-
- case 'T':
- pAC->Pnmi.PMD = 5;
- if (pAC->GIni.GIMacsFound > 1) {
-
- pAC->Pnmi.DeviceType = 0x00020008;
- }
- else {
- pAC->Pnmi.DeviceType = 0x00020007;
- }
- break;
-
- default :
- pAC->Pnmi.PMD = 1;
- pAC->Pnmi.DeviceType = 0;
- break;
- }
-
- /*
- * Get connector
- */
- SK_IN8(IoC, B2_CONN_TYP, &Val8);
- switch (Val8) {
- case 'C':
- pAC->Pnmi.Connector = 2;
- break;
-
- case 'D':
- pAC->Pnmi.Connector = 3;
- break;
-
- case 'F':
- pAC->Pnmi.Connector = 4;
- break;
-
- case 'J':
- pAC->Pnmi.Connector = 5;
- break;
-
- case 'V':
- pAC->Pnmi.Connector = 6;
- break;
-
- default:
- pAC->Pnmi.Connector = 1;
- break;
- }
- break;
-
- case SK_INIT_RUN:
- /*
- * Start timer for RLMT change counter
- */
- SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
- SkTimerStart(pAC, IoC, &pAC->Pnmi.RlmtChangeEstimate.EstTimer,
- 28125000, SKGE_PNMI, SK_PNMI_EVT_CHG_EST_TIMER,
- EventParam);
- break;
-
- default:
- break; /* Nothing todo */
- }
-
- return (0);
-}
-
-/*****************************************************************************
- *
- * SkPnmiGetVar - Retrieves the value of a single OID
- *
- * Description:
- * Calls a general sub-function for all this stuff. If the instance
- * -1 is passed, the values of all instances are returned in an
- * array of values.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed
- * SK_PNMI_ERR_GENERAL A general severe internal error occured
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to take
- * the data.
- * SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-int SkPnmiGetVar(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 Id, /* Object ID that is to be processed */
-void *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiGetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
- Id, *pLen, Instance, NetIndex));
-
- return (PnmiVar(pAC, IoC, SK_PNMI_GET, Id, (char *)pBuf, pLen,
- Instance, NetIndex));
-}
-
-/*****************************************************************************
- *
- * SkPnmiPreSetVar - Presets the value of a single OID
- *
- * Description:
- * Calls a general sub-function for all this stuff. The preset does
- * the same as a set, but returns just before finally setting the
- * new value. This is usefull to check if a set might be successfull.
- * If as instance a -1 is passed, an array of values is supposed and
- * all instance of the OID will be set.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-int SkPnmiPreSetVar(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 Id, /* Object ID that is to be processed */
-void *pBuf, /* Buffer which stores the mgmt data to be set */
-unsigned int *pLen, /* Total length of mgmt data */
-SK_U32 Instance, /* Instance (1..n) that is to be set or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiPreSetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
- Id, *pLen, Instance, NetIndex));
-
-
- return (PnmiVar(pAC, IoC, SK_PNMI_PRESET, Id, (char *)pBuf, pLen,
- Instance, NetIndex));
-}
-
-/*****************************************************************************
- *
- * SkPnmiSetVar - Sets the value of a single OID
- *
- * Description:
- * Calls a general sub-function for all this stuff. The preset does
- * the same as a set, but returns just before finally setting the
- * new value. This is usefull to check if a set might be successfull.
- * If as instance a -1 is passed, an array of values is supposed and
- * all instance of the OID will be set.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_OID The requested OID is unknown.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-int SkPnmiSetVar(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 Id, /* Object ID that is to be processed */
-void *pBuf, /* Buffer which stores the mgmt data to be set */
-unsigned int *pLen, /* Total length of mgmt data */
-SK_U32 Instance, /* Instance (1..n) that is to be set or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiSetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
- Id, *pLen, Instance, NetIndex));
-
- return (PnmiVar(pAC, IoC, SK_PNMI_SET, Id, (char *)pBuf, pLen,
- Instance, NetIndex));
-}
-
-/*****************************************************************************
- *
- * SkPnmiGetStruct - Retrieves the management database in SK_PNMI_STRUCT_DATA
- *
- * Description:
- * Runs through the IdTable, queries the single OIDs and stores the
- * returned data into the management database structure
- * SK_PNMI_STRUCT_DATA. The offset of the OID in the structure
- * is stored in the IdTable. The return value of the function will also
- * be stored in SK_PNMI_STRUCT_DATA if the passed buffer has the
- * minimum size of SK_PNMI_MIN_STRUCT_SIZE.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed
- * SK_PNMI_ERR_GENERAL A general severe internal error occured
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to take
- * the data.
- * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
- */
-int SkPnmiGetStruct(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-void *pBuf, /* Buffer which will store the retrieved data */
-unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- unsigned int TableIndex;
- unsigned int DstOffset;
- unsigned int InstanceNo;
- unsigned int InstanceCnt;
- SK_U32 Instance;
- unsigned int TmpLen;
- char KeyArr[SK_PNMI_VPD_ENTRIES][SK_PNMI_VPD_KEY_SIZE];
-
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiGetStruct: Called, BufLen=%d, NetIndex=%d\n",
- *pLen, NetIndex));
-
- if (*pLen < SK_PNMI_STRUCT_SIZE) {
-
- if (*pLen >= SK_PNMI_MIN_STRUCT_SIZE) {
-
- SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_TOO_SHORT,
- (SK_U32)(-1));
- }
-
- *pLen = SK_PNMI_STRUCT_SIZE;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Check NetIndex
- */
- if (NetIndex >= pAC->Rlmt.NumNets) {
- return (SK_PNMI_ERR_UNKNOWN_NET);
- }
-
- /* Update statistic */
- SK_PNMI_CHECKFLAGS("SkPnmiGetStruct: On call");
-
- if ((Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1)) !=
- SK_PNMI_ERR_OK) {
-
- SK_PNMI_SET_STAT(pBuf, Ret, (SK_U32)(-1));
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (Ret);
- }
-
- if ((Ret = RlmtUpdate(pAC, IoC, NetIndex)) != SK_PNMI_ERR_OK) {
-
- SK_PNMI_SET_STAT(pBuf, Ret, (SK_U32)(-1));
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (Ret);
- }
-
- if ((Ret = SirqUpdate(pAC, IoC)) != SK_PNMI_ERR_OK) {
-
- SK_PNMI_SET_STAT(pBuf, Ret, (SK_U32)(-1));
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (Ret);
- }
-
- /*
- * Increment semaphores to indicate that an update was
- * already done
- */
- pAC->Pnmi.MacUpdatedFlag ++;
- pAC->Pnmi.RlmtUpdatedFlag ++;
- pAC->Pnmi.SirqUpdatedFlag ++;
-
- /* Get vpd keys for instance calculation */
- Ret = GetVpdKeyArr(pAC, IoC, &KeyArr[0][0], sizeof(KeyArr), &TmpLen);
- if (Ret != SK_PNMI_ERR_OK) {
-
- pAC->Pnmi.MacUpdatedFlag --;
- pAC->Pnmi.RlmtUpdatedFlag --;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- SK_PNMI_CHECKFLAGS("SkPnmiGetStruct: On return");
- SK_PNMI_SET_STAT(pBuf, Ret, (SK_U32)(-1));
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /* Retrieve values */
- SK_MEMSET((char *)pBuf, 0, SK_PNMI_STRUCT_SIZE);
- for (TableIndex = 0; TableIndex < ID_TABLE_SIZE; TableIndex ++) {
-
- InstanceNo = IdTable[TableIndex].InstanceNo;
- for (InstanceCnt = 1; InstanceCnt <= InstanceNo;
- InstanceCnt ++) {
-
- DstOffset = IdTable[TableIndex].Offset +
- (InstanceCnt - 1) *
- IdTable[TableIndex].StructSize;
-
- /*
- * For the VPD the instance is not an index number
- * but the key itself. Determin with the instance
- * counter the VPD key to be used.
- */
- if (IdTable[TableIndex].Id == OID_SKGE_VPD_KEY ||
- IdTable[TableIndex].Id == OID_SKGE_VPD_VALUE ||
- IdTable[TableIndex].Id == OID_SKGE_VPD_ACCESS ||
- IdTable[TableIndex].Id == OID_SKGE_VPD_ACTION) {
-
- SK_STRNCPY((char *)&Instance, KeyArr[InstanceCnt - 1], 4);
- }
- else {
- Instance = (SK_U32)InstanceCnt;
- }
-
- TmpLen = *pLen - DstOffset;
- Ret = IdTable[TableIndex].Func(pAC, IoC, SK_PNMI_GET,
- IdTable[TableIndex].Id, (char *)pBuf +
- DstOffset, &TmpLen, Instance, TableIndex, NetIndex);
-
- /*
- * An unknown instance error means that we reached
- * the last instance of that variable. Proceed with
- * the next OID in the table and ignore the return
- * code.
- */
- if (Ret == SK_PNMI_ERR_UNKNOWN_INST) {
-
- break;
- }
-
- if (Ret != SK_PNMI_ERR_OK) {
-
- pAC->Pnmi.MacUpdatedFlag --;
- pAC->Pnmi.RlmtUpdatedFlag --;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- SK_PNMI_CHECKFLAGS("SkPnmiGetStruct: On return");
- SK_PNMI_SET_STAT(pBuf, Ret, DstOffset);
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (Ret);
- }
- }
- }
-
- pAC->Pnmi.MacUpdatedFlag --;
- pAC->Pnmi.RlmtUpdatedFlag --;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- *pLen = SK_PNMI_STRUCT_SIZE;
- SK_PNMI_CHECKFLAGS("SkPnmiGetStruct: On return");
- SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_OK, (SK_U32)(-1));
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * SkPnmiPreSetStruct - Presets the management database in SK_PNMI_STRUCT_DATA
- *
- * Description:
- * Calls a general sub-function for all this set stuff. The preset does
- * the same as a set, but returns just before finally setting the
- * new value. This is usefull to check if a set might be successfull.
- * The sub-function runs through the IdTable, checks which OIDs are able
- * to set, and calls the handler function of the OID to perform the
- * preset. The return value of the function will also be stored in
- * SK_PNMI_STRUCT_DATA if the passed buffer has the minimum size of
- * SK_PNMI_MIN_STRUCT_SIZE.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- */
-int SkPnmiPreSetStruct(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-void *pBuf, /* Buffer which contains the data to be set */
-unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiPreSetStruct: Called, BufLen=%d, NetIndex=%d\n",
- *pLen, NetIndex));
-
- return (PnmiStruct(pAC, IoC, SK_PNMI_PRESET, (char *)pBuf,
- pLen, NetIndex));
-}
-
-/*****************************************************************************
- *
- * SkPnmiSetStruct - Sets the management database in SK_PNMI_STRUCT_DATA
- *
- * Description:
- * Calls a general sub-function for all this set stuff. The return value
- * of the function will also be stored in SK_PNMI_STRUCT_DATA if the
- * passed buffer has the minimum size of SK_PNMI_MIN_STRUCT_SIZE.
- * The sub-function runs through the IdTable, checks which OIDs are able
- * to set, and calls the handler function of the OID to perform the
- * set. The return value of the function will also be stored in
- * SK_PNMI_STRUCT_DATA if the passed buffer has the minimum size of
- * SK_PNMI_MIN_STRUCT_SIZE.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- */
-int SkPnmiSetStruct(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-void *pBuf, /* Buffer which contains the data to be set */
-unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiSetStruct: Called, BufLen=%d, NetIndex=%d\n",
- *pLen, NetIndex));
-
- return (PnmiStruct(pAC, IoC, SK_PNMI_SET, (char *)pBuf,
- pLen, NetIndex));
-}
-
-/*****************************************************************************
- *
- * SkPnmiEvent - Event handler
- *
- * Description:
- * Handles the following events:
- * SK_PNMI_EVT_SIRQ_OVERFLOW When a hardware counter overflows an
- * interrupt will be generated which is
- * first handled by SIRQ which generates a
- * this event. The event increments the
- * upper 32 bit of the 64 bit counter.
- * SK_PNMI_EVT_SEN_XXX The event is generated by the I2C module
- * when a sensor reports a warning or
- * error. The event will store a trap
- * message in the trap buffer.
- * SK_PNMI_EVT_CHG_EST_TIMER The timer event was initiated by this
- * module and is used to calculate the
- * port switches per hour.
- * SK_PNMI_EVT_CLEAR_COUNTER The event clears all counters and
- * timestamps.
- * SK_PNMI_EVT_XMAC_RESET The event is generated by the driver
- * before a hard reset of the XMAC is
- * performed. All counters will be saved
- * and added to the hardware counter
- * values after reset to grant continuous
- * counter values.
- * SK_PNMI_EVT_RLMT_PORT_UP Generated by RLMT to notify that a port
- * went logically up. A trap message will
- * be stored to the trap buffer.
- * SK_PNMI_EVT_RLMT_PORT_DOWN Generated by RLMT to notify that a port
- * went logically down. A trap message will
- * be stored to the trap buffer.
- * SK_PNMI_EVT_RLMT_SEGMENTATION Generated by RLMT to notify that two
- * spanning tree root bridges were
- * detected. A trap message will be stored
- * to the trap buffer.
- * SK_PNMI_EVT_RLMT_ACTIVE_DOWN Notifies PNMI that an active port went
- * down. PNMI will not further add the
- * statistic values to the virtual port.
- * SK_PNMI_EVT_RLMT_ACTIVE_UP Notifies PNMI that a port went up and
- * is now an active port. PNMI will now
- * add the statistic data of this port to
- * the virtual port.
- * SK_PNMI_EVT_RLMT_SET_NETS Notifies PNMI about the net mode. The first Parameter
- * contains the number of nets. 1 means single net, 2 means
- * dual net. The second Parameter is -1
- *
- * Returns:
- * Always 0
- */
-int SkPnmiEvent(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 Event, /* Event-Id */
-SK_EVPARA Param) /* Event dependent parameter */
-{
- unsigned int PhysPortIndex;
- unsigned int MaxNetNumber;
- int CounterIndex;
- int Ret;
- SK_U16 MacStatus;
- SK_U64 OverflowStatus;
- SK_U64 Mask;
- int MacType;
- SK_U64 Value;
- SK_U32 Val32;
- SK_U16 Register;
- SK_EVPARA EventParam;
- SK_U64 NewestValue;
- SK_U64 OldestValue;
- SK_U64 Delta;
- SK_PNMI_ESTIMATE *pEst;
- SK_U32 NetIndex;
- SK_GEPORT *pPrt;
- SK_PNMI_VCT *pVctBackupData;
- SK_U32 RetCode;
- int i;
- SK_U32 CableLength;
-
-
-#ifdef DEBUG
- if (Event != SK_PNMI_EVT_XMAC_RESET) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: SkPnmiEvent: Called, Event=0x%x, Param=0x%x\n",
- (unsigned int)Event, (unsigned int)Param.Para64));
- }
-#endif
- SK_PNMI_CHECKFLAGS("SkPnmiEvent: On call");
-
- MacType = pAC->GIni.GIMacType;
-
- switch (Event) {
-
- case SK_PNMI_EVT_SIRQ_OVERFLOW:
- PhysPortIndex = (int)Param.Para32[0];
- MacStatus = (SK_U16)Param.Para32[1];
-#ifdef DEBUG
- if (PhysPortIndex >= SK_MAX_MACS) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SIRQ_OVERFLOW parameter"
- " wrong, PhysPortIndex=0x%x\n",
- PhysPortIndex));
- return (0);
- }
-#endif
- OverflowStatus = 0;
-
- /*
- * Check which source caused an overflow interrupt.
- */
- if ((pAC->GIni.GIFunc.pFnMacOverflow(
- pAC, IoC, PhysPortIndex, MacStatus, &OverflowStatus) != 0) ||
- (OverflowStatus == 0)) {
-
- SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
- return (0);
- }
-
- /*
- * Check the overflow status register and increment
- * the upper dword of corresponding counter.
- */
- for (CounterIndex = 0; CounterIndex < sizeof(Mask) * 8;
- CounterIndex ++) {
-
- Mask = (SK_U64)1 << CounterIndex;
- if ((OverflowStatus & Mask) == 0) {
-
- continue;
- }
-
- switch (StatOvrflwBit[CounterIndex][MacType]) {
-
- case SK_PNMI_HTX_UTILUNDER:
- case SK_PNMI_HTX_UTILOVER:
- XM_IN16(IoC, PhysPortIndex, XM_TX_CMD,
- &Register);
- Register |= XM_TX_SAM_LINE;
- XM_OUT16(IoC, PhysPortIndex, XM_TX_CMD,
- Register);
- break;
-
- case SK_PNMI_HRX_UTILUNDER:
- case SK_PNMI_HRX_UTILOVER:
- XM_IN16(IoC, PhysPortIndex, XM_RX_CMD,
- &Register);
- Register |= XM_RX_SAM_LINE;
- XM_OUT16(IoC, PhysPortIndex, XM_RX_CMD,
- Register);
- break;
-
- case SK_PNMI_HTX_OCTETHIGH:
- case SK_PNMI_HTX_OCTETLOW:
- case SK_PNMI_HTX_RESERVED:
- case SK_PNMI_HRX_OCTETHIGH:
- case SK_PNMI_HRX_OCTETLOW:
- case SK_PNMI_HRX_IRLENGTH:
- case SK_PNMI_HRX_RESERVED:
-
- /*
- * the following counters aren't be handled (id > 63)
- */
- case SK_PNMI_HTX_SYNC:
- case SK_PNMI_HTX_SYNC_OCTET:
- break;
-
- case SK_PNMI_HRX_LONGFRAMES:
- if (MacType == SK_MAC_GMAC) {
- pAC->Pnmi.Port[PhysPortIndex].
- CounterHigh[CounterIndex] ++;
- }
- break;
-
- default:
- pAC->Pnmi.Port[PhysPortIndex].
- CounterHigh[CounterIndex] ++;
- }
- }
- break;
-
- case SK_PNMI_EVT_SEN_WAR_LOW:
-#ifdef DEBUG
- if ((unsigned int)Param.Para64 >= (unsigned int)pAC->I2c.MaxSens) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SEN_WAR_LOW parameter wrong, SensorIndex=%d\n",
- (unsigned int)Param.Para64));
- return (0);
- }
-#endif
- /*
- * Store a trap message in the trap buffer and generate
- * an event for user space applications with the
- * SK_DRIVER_SENDEVENT macro.
- */
- QueueSensorTrap(pAC, OID_SKGE_TRAP_SEN_WAR_LOW,
- (unsigned int)Param.Para64);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
- break;
-
- case SK_PNMI_EVT_SEN_WAR_UPP:
-#ifdef DEBUG
- if ((unsigned int)Param.Para64 >= (unsigned int)pAC->I2c.MaxSens) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR:SkPnmiEvent: SK_PNMI_EVT_SEN_WAR_UPP parameter wrong, SensorIndex=%d\n",
- (unsigned int)Param.Para64));
- return (0);
- }
-#endif
- /*
- * Store a trap message in the trap buffer and generate
- * an event for user space applications with the
- * SK_DRIVER_SENDEVENT macro.
- */
- QueueSensorTrap(pAC, OID_SKGE_TRAP_SEN_WAR_UPP,
- (unsigned int)Param.Para64);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
- break;
-
- case SK_PNMI_EVT_SEN_ERR_LOW:
-#ifdef DEBUG
- if ((unsigned int)Param.Para64 >= (unsigned int)pAC->I2c.MaxSens) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SEN_ERR_LOW parameter wrong, SensorIndex=%d\n",
- (unsigned int)Param.Para64));
- return (0);
- }
-#endif
- /*
- * Store a trap message in the trap buffer and generate
- * an event for user space applications with the
- * SK_DRIVER_SENDEVENT macro.
- */
- QueueSensorTrap(pAC, OID_SKGE_TRAP_SEN_ERR_LOW,
- (unsigned int)Param.Para64);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
- break;
-
- case SK_PNMI_EVT_SEN_ERR_UPP:
-#ifdef DEBUG
- if ((unsigned int)Param.Para64 >= (unsigned int)pAC->I2c.MaxSens) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SEN_ERR_UPP parameter wrong, SensorIndex=%d\n",
- (unsigned int)Param.Para64));
- return (0);
- }
-#endif
- /*
- * Store a trap message in the trap buffer and generate
- * an event for user space applications with the
- * SK_DRIVER_SENDEVENT macro.
- */
- QueueSensorTrap(pAC, OID_SKGE_TRAP_SEN_ERR_UPP,
- (unsigned int)Param.Para64);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
- break;
-
- case SK_PNMI_EVT_CHG_EST_TIMER:
- /*
- * Calculate port switch average on a per hour basis
- * Time interval for check : 28125 ms
- * Number of values for average : 8
- *
- * Be careful in changing these values, on change check
- * - typedef of SK_PNMI_ESTIMATE (Size of EstValue
- * array one less than value number)
- * - Timer initilization SkTimerStart() in SkPnmiInit
- * - Delta value below must be multiplicated with
- * power of 2
- *
- */
- pEst = &pAC->Pnmi.RlmtChangeEstimate;
- CounterIndex = pEst->EstValueIndex + 1;
- if (CounterIndex == 7) {
-
- CounterIndex = 0;
- }
- pEst->EstValueIndex = CounterIndex;
-
- NewestValue = pAC->Pnmi.RlmtChangeCts;
- OldestValue = pEst->EstValue[CounterIndex];
- pEst->EstValue[CounterIndex] = NewestValue;
-
- /*
- * Calculate average. Delta stores the number of
- * port switches per 28125 * 8 = 225000 ms
- */
- if (NewestValue >= OldestValue) {
-
- Delta = NewestValue - OldestValue;
- }
- else {
- /* Overflow situation */
- Delta = (SK_U64)(0 - OldestValue) + NewestValue;
- }
-
- /*
- * Extrapolate delta to port switches per hour.
- * Estimate = Delta * (3600000 / 225000)
- * = Delta * 16
- * = Delta << 4
- */
- pAC->Pnmi.RlmtChangeEstimate.Estimate = Delta << 4;
-
- /*
- * Check if threshold is exceeded. If the threshold is
- * permanently exceeded every 28125 ms an event will be
- * generated to remind the user of this condition.
- */
- if ((pAC->Pnmi.RlmtChangeThreshold != 0) &&
- (pAC->Pnmi.RlmtChangeEstimate.Estimate >=
- pAC->Pnmi.RlmtChangeThreshold)) {
-
- QueueSimpleTrap(pAC, OID_SKGE_TRAP_RLMT_CHANGE_THRES);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
- }
-
- SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
- SkTimerStart(pAC, IoC, &pAC->Pnmi.RlmtChangeEstimate.EstTimer,
- 28125000, SKGE_PNMI, SK_PNMI_EVT_CHG_EST_TIMER,
- EventParam);
- break;
-
- case SK_PNMI_EVT_CLEAR_COUNTER:
- /*
- * Param.Para32[0] contains the NetIndex (0 ..1).
- * Param.Para32[1] is reserved, contains -1.
- */
- NetIndex = (SK_U32)Param.Para32[0];
-
-#ifdef DEBUG
- if (NetIndex >= pAC->Rlmt.NumNets) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_CLEAR_COUNTER parameter wrong, NetIndex=%d\n",
- NetIndex));
-
- return (0);
- }
-#endif
-
- /*
- * Set all counters and timestamps to zero
- */
- ResetCounter(pAC, IoC, NetIndex); /* the according NetIndex is required
- as a Parameter of the Event */
- break;
-
- case SK_PNMI_EVT_XMAC_RESET:
- /*
- * To grant continuous counter values store the current
- * XMAC statistic values to the entries 1..n of the
- * CounterOffset array. XMAC Errata #2
- */
-#ifdef DEBUG
- if ((unsigned int)Param.Para64 >= SK_MAX_MACS) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_XMAC_RESET parameter wrong, PhysPortIndex=%d\n",
- (unsigned int)Param.Para64));
- return (0);
- }
-#endif
- PhysPortIndex = (unsigned int)Param.Para64;
-
- /*
- * Update XMAC statistic to get fresh values
- */
- Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
- if (Ret != SK_PNMI_ERR_OK) {
-
- SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
- return (0);
- }
- /*
- * Increment semaphore to indicate that an update was
- * already done
- */
- pAC->Pnmi.MacUpdatedFlag ++;
-
- for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
- CounterIndex ++) {
-
- if (!StatAddr[CounterIndex][MacType].GetOffset) {
-
- continue;
- }
-
- pAC->Pnmi.Port[PhysPortIndex].
- CounterOffset[CounterIndex] = GetPhysStatVal(
- pAC, IoC, PhysPortIndex, CounterIndex);
- pAC->Pnmi.Port[PhysPortIndex].
- CounterHigh[CounterIndex] = 0;
- }
-
- pAC->Pnmi.MacUpdatedFlag --;
- break;
-
- case SK_PNMI_EVT_RLMT_PORT_UP:
- PhysPortIndex = (unsigned int)Param.Para32[0];
-#ifdef DEBUG
- if (PhysPortIndex >= SK_MAX_MACS) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_PORT_UP parameter"
- " wrong, PhysPortIndex=%d\n", PhysPortIndex));
-
- return (0);
- }
-#endif
- /*
- * Store a trap message in the trap buffer and generate an event for
- * user space applications with the SK_DRIVER_SENDEVENT macro.
- */
- QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_UP, PhysPortIndex);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
-
- /* Bugfix for XMAC errata (#10620)*/
- if (pAC->GIni.GIMacType == SK_MAC_XMAC){
-
- /* Add incremental difference to offset (#10620)*/
- (void)pAC->GIni.GIFunc.pFnMacStatistic(pAC, IoC, PhysPortIndex,
- XM_RXE_SHT_ERR, &Val32);
-
- Value = (((SK_U64)pAC->Pnmi.Port[PhysPortIndex].
- CounterHigh[SK_PNMI_HRX_SHORTS] << 32) | (SK_U64)Val32);
- pAC->Pnmi.Port[PhysPortIndex].CounterOffset[SK_PNMI_HRX_SHORTS] +=
- Value - pAC->Pnmi.Port[PhysPortIndex].RxShortZeroMark;
- }
-
- /* Tell VctStatus() that a link was up meanwhile. */
- pAC->Pnmi.VctStatus[PhysPortIndex] |= SK_PNMI_VCT_LINK;
- break;
-
- case SK_PNMI_EVT_RLMT_PORT_DOWN:
- PhysPortIndex = (unsigned int)Param.Para32[0];
-
-#ifdef DEBUG
- if (PhysPortIndex >= SK_MAX_MACS) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_PORT_DOWN parameter"
- " wrong, PhysPortIndex=%d\n", PhysPortIndex));
-
- return (0);
- }
-#endif
- /*
- * Store a trap message in the trap buffer and generate an event for
- * user space applications with the SK_DRIVER_SENDEVENT macro.
- */
- QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_DOWN, PhysPortIndex);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
-
- /* Bugfix #10620 - get zero level for incremental difference */
- if ((pAC->GIni.GIMacType == SK_MAC_XMAC)) {
-
- (void)pAC->GIni.GIFunc.pFnMacStatistic(pAC, IoC, PhysPortIndex,
- XM_RXE_SHT_ERR, &Val32);
- pAC->Pnmi.Port[PhysPortIndex].RxShortZeroMark =
- (((SK_U64)pAC->Pnmi.Port[PhysPortIndex].
- CounterHigh[SK_PNMI_HRX_SHORTS] << 32) | (SK_U64)Val32);
- }
- break;
-
- case SK_PNMI_EVT_RLMT_ACTIVE_DOWN:
- PhysPortIndex = (unsigned int)Param.Para32[0];
- NetIndex = (SK_U32)Param.Para32[1];
-
-#ifdef DEBUG
- if (PhysPortIndex >= SK_MAX_MACS) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_ACTIVE_DOWN parameter too high, PhysPort=%d\n",
- PhysPortIndex));
- }
-
- if (NetIndex >= pAC->Rlmt.NumNets) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_ACTIVE_DOWN parameter too high, NetIndex=%d\n",
- NetIndex));
- }
-#endif
- /*
- * For now, ignore event if NetIndex != 0.
- */
- if (Param.Para32[1] != 0) {
-
- return (0);
- }
-
- /*
- * Nothing to do if port is already inactive
- */
- if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- return (0);
- }
-
- /*
- * Update statistic counters to calculate new offset for the virtual
- * port and increment semaphore to indicate that an update was already
- * done.
- */
- if (MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1) !=
- SK_PNMI_ERR_OK) {
-
- SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
- return (0);
- }
- pAC->Pnmi.MacUpdatedFlag ++;
-
- /*
- * Calculate new counter offset for virtual port to grant continous
- * counting on port switches. The virtual port consists of all currently
- * active ports. The port down event indicates that a port is removed
- * from the virtual port. Therefore add the counter value of the removed
- * port to the CounterOffset for the virtual port to grant the same
- * counter value.
- */
- for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
- CounterIndex ++) {
-
- if (!StatAddr[CounterIndex][MacType].GetOffset) {
-
- continue;
- }
-
- Value = GetPhysStatVal(pAC, IoC, PhysPortIndex, CounterIndex);
-
- pAC->Pnmi.VirtualCounterOffset[CounterIndex] += Value;
- }
-
- /*
- * Set port to inactive
- */
- pAC->Pnmi.Port[PhysPortIndex].ActiveFlag = SK_FALSE;
-
- pAC->Pnmi.MacUpdatedFlag --;
- break;
-
- case SK_PNMI_EVT_RLMT_ACTIVE_UP:
- PhysPortIndex = (unsigned int)Param.Para32[0];
- NetIndex = (SK_U32)Param.Para32[1];
-
-#ifdef DEBUG
- if (PhysPortIndex >= SK_MAX_MACS) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_ACTIVE_UP parameter too high, PhysPort=%d\n",
- PhysPortIndex));
- }
-
- if (NetIndex >= pAC->Rlmt.NumNets) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
- ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_RLMT_ACTIVE_UP parameter too high, NetIndex=%d\n",
- NetIndex));
- }
-#endif
- /*
- * For now, ignore event if NetIndex != 0.
- */
- if (Param.Para32[1] != 0) {
-
- return (0);
- }
-
- /*
- * Nothing to do if port is already active
- */
- if (pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- return (0);
- }
-
- /*
- * Statistic maintenance
- */
- pAC->Pnmi.RlmtChangeCts ++;
- pAC->Pnmi.RlmtChangeTime = SK_PNMI_HUNDREDS_SEC(SkOsGetTime(pAC));
-
- /*
- * Store a trap message in the trap buffer and generate an event for
- * user space applications with the SK_DRIVER_SENDEVENT macro.
- */
- QueueRlmtNewMacTrap(pAC, PhysPortIndex);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
-
- /*
- * Update statistic counters to calculate new offset for the virtual
- * port and increment semaphore to indicate that an update was
- * already done.
- */
- if (MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1) !=
- SK_PNMI_ERR_OK) {
-
- SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
- return (0);
- }
- pAC->Pnmi.MacUpdatedFlag ++;
-
- /*
- * Calculate new counter offset for virtual port to grant continous
- * counting on port switches. A new port is added to the virtual port.
- * Therefore substract the counter value of the new port from the
- * CounterOffset for the virtual port to grant the same value.
- */
- for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
- CounterIndex ++) {
-
- if (!StatAddr[CounterIndex][MacType].GetOffset) {
-
- continue;
- }
-
- Value = GetPhysStatVal(pAC, IoC, PhysPortIndex, CounterIndex);
-
- pAC->Pnmi.VirtualCounterOffset[CounterIndex] -= Value;
- }
-
- /*
- * Set port to active
- */
- pAC->Pnmi.Port[PhysPortIndex].ActiveFlag = SK_TRUE;
-
- pAC->Pnmi.MacUpdatedFlag --;
- break;
-
- case SK_PNMI_EVT_RLMT_SEGMENTATION:
- /*
- * Para.Para32[0] contains the NetIndex.
- */
-
- /*
- * Store a trap message in the trap buffer and generate an event for
- * user space applications with the SK_DRIVER_SENDEVENT macro.
- */
- QueueSimpleTrap(pAC, OID_SKGE_TRAP_RLMT_SEGMENTATION);
- (void)SK_DRIVER_SENDEVENT(pAC, IoC);
- break;
-
- case SK_PNMI_EVT_RLMT_SET_NETS:
- /*
- * Param.Para32[0] contains the number of Nets.
- * Param.Para32[1] is reserved, contains -1.
- */
- /*
- * Check number of nets
- */
- MaxNetNumber = pAC->GIni.GIMacsFound;
- if (((unsigned int)Param.Para32[0] < 1)
- || ((unsigned int)Param.Para32[0] > MaxNetNumber)) {
- return (SK_PNMI_ERR_UNKNOWN_NET);
- }
-
- if ((unsigned int)Param.Para32[0] == 1) { /* single net mode */
- pAC->Pnmi.DualNetActiveFlag = SK_FALSE;
- }
- else { /* dual net mode */
- pAC->Pnmi.DualNetActiveFlag = SK_TRUE;
- }
- break;
-
- case SK_PNMI_EVT_VCT_RESET:
- PhysPortIndex = Param.Para32[0];
- pPrt = &pAC->GIni.GP[PhysPortIndex];
- pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
-
- if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING) {
- RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_FALSE);
- if (RetCode == 2) {
- /*
- * VCT test is still running.
- * Start VCT timer counter again.
- */
- SK_MEMSET((char *) &Param, 0, sizeof(Param));
- Param.Para32[0] = PhysPortIndex;
- Param.Para32[1] = -1;
- SkTimerStart(pAC, IoC, &pAC->Pnmi.VctTimeout[PhysPortIndex].VctTimer,
- 4000000, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Param);
- break;
- }
- pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_PENDING;
- pAC->Pnmi.VctStatus[PhysPortIndex] |=
- (SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_TEST_DONE);
-
- /* Copy results for later use to PNMI struct. */
- for (i = 0; i < 4; i++) {
- if (pPrt->PMdiPairLen[i] > 35) {
- CableLength = 1000 * (((175 * pPrt->PMdiPairLen[i]) / 210) - 28);
- }
- else {
- CableLength = 0;
- }
- pVctBackupData->PMdiPairLen[i] = CableLength;
- pVctBackupData->PMdiPairSts[i] = pPrt->PMdiPairSts[i];
- }
-
- Param.Para32[0] = PhysPortIndex;
- Param.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Param);
- SkEventDispatcher(pAC, IoC);
- }
-
- break;
-
- default:
- break;
- }
-
- SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
- return (0);
-}
-
-
-/******************************************************************************
- *
- * Private functions
- *
- */
-
-/*****************************************************************************
- *
- * PnmiVar - Gets, presets, and sets single OIDs
- *
- * Description:
- * Looks up the requested OID, calls the corresponding handler
- * function, and passes the parameters with the get, preset, or
- * set command. The function is called by SkGePnmiGetVar,
- * SkGePnmiPreSetVar, or SkGePnmiSetVar.
- *
- * Returns:
- * SK_PNMI_ERR_XXX. For details have a look to the description of the
- * calling functions.
- * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
- */
-PNMI_STATIC int PnmiVar(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer which stores the mgmt data to be set */
-unsigned int *pLen, /* Total length of mgmt data */
-SK_U32 Instance, /* Instance (1..n) that is to be set or -1 */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int TableIndex;
- int Ret;
-
-
- if ((TableIndex = LookupId(Id)) == (unsigned int)(-1)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_OID);
- }
-
- /*
- * Check NetIndex
- */
- if (NetIndex >= pAC->Rlmt.NumNets) {
- return (SK_PNMI_ERR_UNKNOWN_NET);
- }
-
- SK_PNMI_CHECKFLAGS("PnmiVar: On call");
-
- Ret = IdTable[TableIndex].Func(pAC, IoC, Action, Id, pBuf, pLen,
- Instance, TableIndex, NetIndex);
-
- SK_PNMI_CHECKFLAGS("PnmiVar: On return");
-
- return (Ret);
-}
-
-/*****************************************************************************
- *
- * PnmiStruct - Presets and Sets data in structure SK_PNMI_STRUCT_DATA
- *
- * Description:
- * The return value of the function will also be stored in
- * SK_PNMI_STRUCT_DATA if the passed buffer has the minimum size of
- * SK_PNMI_MIN_STRUCT_SIZE. The sub-function runs through the IdTable,
- * checks which OIDs are able to set, and calls the handler function of
- * the OID to perform the set. The return value of the function will
- * also be stored in SK_PNMI_STRUCT_DATA if the passed buffer has the
- * minimum size of SK_PNMI_MIN_STRUCT_SIZE. The function is called
- * by SkGePnmiPreSetStruct and SkGePnmiSetStruct.
- *
- * Returns:
- * SK_PNMI_ERR_XXX. The codes are described in the calling functions.
- * SK_PNMI_ERR_UNKNOWN_NET The requested NetIndex doesn't exist
- */
-PNMI_STATIC int PnmiStruct(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Set action to be performed */
-char *pBuf, /* Buffer which contains the data to be set */
-unsigned int *pLen, /* Length of buffer */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- unsigned int TableIndex;
- unsigned int DstOffset;
- unsigned int Len;
- unsigned int InstanceNo;
- unsigned int InstanceCnt;
- SK_U32 Instance;
- SK_U32 Id;
-
-
- /* Check if the passed buffer has the right size */
- if (*pLen < SK_PNMI_STRUCT_SIZE) {
-
- /* Check if we can return the error within the buffer */
- if (*pLen >= SK_PNMI_MIN_STRUCT_SIZE) {
-
- SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_TOO_SHORT,
- (SK_U32)(-1));
- }
-
- *pLen = SK_PNMI_STRUCT_SIZE;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Check NetIndex
- */
- if (NetIndex >= pAC->Rlmt.NumNets) {
- return (SK_PNMI_ERR_UNKNOWN_NET);
- }
-
- SK_PNMI_CHECKFLAGS("PnmiStruct: On call");
-
- /*
- * Update the values of RLMT and SIRQ and increment semaphores to
- * indicate that an update was already done.
- */
- if ((Ret = RlmtUpdate(pAC, IoC, NetIndex)) != SK_PNMI_ERR_OK) {
-
- SK_PNMI_SET_STAT(pBuf, Ret, (SK_U32)(-1));
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (Ret);
- }
-
- if ((Ret = SirqUpdate(pAC, IoC)) != SK_PNMI_ERR_OK) {
-
- SK_PNMI_SET_STAT(pBuf, Ret, (SK_U32)(-1));
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (Ret);
- }
-
- pAC->Pnmi.RlmtUpdatedFlag ++;
- pAC->Pnmi.SirqUpdatedFlag ++;
-
- /* Preset/Set values */
- for (TableIndex = 0; TableIndex < ID_TABLE_SIZE; TableIndex ++) {
-
- if ((IdTable[TableIndex].Access != SK_PNMI_RW) &&
- (IdTable[TableIndex].Access != SK_PNMI_WO)) {
-
- continue;
- }
-
- InstanceNo = IdTable[TableIndex].InstanceNo;
- Id = IdTable[TableIndex].Id;
-
- for (InstanceCnt = 1; InstanceCnt <= InstanceNo;
- InstanceCnt ++) {
-
- DstOffset = IdTable[TableIndex].Offset +
- (InstanceCnt - 1) *
- IdTable[TableIndex].StructSize;
-
- /*
- * Because VPD multiple instance variables are
- * not setable we do not need to evaluate VPD
- * instances. Have a look to VPD instance
- * calculation in SkPnmiGetStruct().
- */
- Instance = (SK_U32)InstanceCnt;
-
- /*
- * Evaluate needed buffer length
- */
- Len = 0;
- Ret = IdTable[TableIndex].Func(pAC, IoC,
- SK_PNMI_GET, IdTable[TableIndex].Id,
- NULL, &Len, Instance, TableIndex, NetIndex);
-
- if (Ret == SK_PNMI_ERR_UNKNOWN_INST) {
-
- break;
- }
- if (Ret != SK_PNMI_ERR_TOO_SHORT) {
-
- pAC->Pnmi.RlmtUpdatedFlag --;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- SK_PNMI_CHECKFLAGS("PnmiStruct: On return");
- SK_PNMI_SET_STAT(pBuf,
- SK_PNMI_ERR_GENERAL, DstOffset);
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (SK_PNMI_ERR_GENERAL);
- }
- if (Id == OID_SKGE_VPD_ACTION) {
-
- switch (*(pBuf + DstOffset)) {
-
- case SK_PNMI_VPD_CREATE:
- Len = 3 + *(pBuf + DstOffset + 3);
- break;
-
- case SK_PNMI_VPD_DELETE:
- Len = 3;
- break;
-
- default:
- Len = 1;
- break;
- }
- }
-
- /* Call the OID handler function */
- Ret = IdTable[TableIndex].Func(pAC, IoC, Action,
- IdTable[TableIndex].Id, pBuf + DstOffset,
- &Len, Instance, TableIndex, NetIndex);
-
- if (Ret != SK_PNMI_ERR_OK) {
-
- pAC->Pnmi.RlmtUpdatedFlag --;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- SK_PNMI_CHECKFLAGS("PnmiStruct: On return");
- SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_BAD_VALUE,
- DstOffset);
- *pLen = SK_PNMI_MIN_STRUCT_SIZE;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- }
- }
-
- pAC->Pnmi.RlmtUpdatedFlag --;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- SK_PNMI_CHECKFLAGS("PnmiStruct: On return");
- SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_OK, (SK_U32)(-1));
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * LookupId - Lookup an OID in the IdTable
- *
- * Description:
- * Scans the IdTable to find the table entry of an OID.
- *
- * Returns:
- * The table index or -1 if not found.
- */
-PNMI_STATIC int LookupId(
-SK_U32 Id) /* Object identifier to be searched */
-{
- int i;
-
- for (i = 0; i < ID_TABLE_SIZE; i++) {
-
- if (IdTable[i].Id == Id) {
-
- return i;
- }
- }
-
- return (-1);
-}
-
-/*****************************************************************************
- *
- * OidStruct - Handler of OID_SKGE_ALL_DATA
- *
- * Description:
- * This OID performs a Get/Preset/SetStruct call and returns all data
- * in a SK_PNMI_STRUCT_DATA structure.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int OidStruct(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- if (Id != OID_SKGE_ALL_DATA) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR003,
- SK_PNMI_ERR003MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Check instance. We only handle single instance variables
- */
- if (Instance != (SK_U32)(-1) && Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- switch (Action) {
-
- case SK_PNMI_GET:
- return (SkPnmiGetStruct(pAC, IoC, pBuf, pLen, NetIndex));
-
- case SK_PNMI_PRESET:
- return (SkPnmiPreSetStruct(pAC, IoC, pBuf, pLen, NetIndex));
-
- case SK_PNMI_SET:
- return (SkPnmiSetStruct(pAC, IoC, pBuf, pLen, NetIndex));
- }
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR004, SK_PNMI_ERR004MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
-}
-
-/*****************************************************************************
- *
- * Perform - OID handler of OID_SKGE_ACTION
- *
- * Description:
- * None.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int Perform(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- SK_U32 ActionOp;
-
-
- /*
- * Check instance. We only handle single instance variables
- */
- if (Instance != (SK_U32)(-1) && Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /* Check if a get should be performed */
- if (Action == SK_PNMI_GET) {
-
- /* A get is easy. We always return the same value */
- ActionOp = (SK_U32)SK_PNMI_ACT_IDLE;
- SK_PNMI_STORE_U32(pBuf, ActionOp);
- *pLen = sizeof(SK_U32);
-
- return (SK_PNMI_ERR_OK);
- }
-
- /* Continue with PRESET/SET action */
- if (*pLen > sizeof(SK_U32)) {
-
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* Check if the command is a known one */
- SK_PNMI_READ_U32(pBuf, ActionOp);
- if (*pLen > sizeof(SK_U32) ||
- (ActionOp != SK_PNMI_ACT_IDLE &&
- ActionOp != SK_PNMI_ACT_RESET &&
- ActionOp != SK_PNMI_ACT_SELFTEST &&
- ActionOp != SK_PNMI_ACT_RESETCNT)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* A preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- switch (ActionOp) {
-
- case SK_PNMI_ACT_IDLE:
- /* Nothing to do */
- break;
-
- case SK_PNMI_ACT_RESET:
- /*
- * Perform a driver reset or something that comes near
- * to this.
- */
- Ret = SK_DRIVER_RESET(pAC, IoC);
- if (Ret != 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR005,
- SK_PNMI_ERR005MSG);
-
- return (SK_PNMI_ERR_GENERAL);
- }
- break;
-
- case SK_PNMI_ACT_SELFTEST:
- /*
- * Perform a driver selftest or something similar to this.
- * Currently this feature is not used and will probably
- * implemented in another way.
- */
- Ret = SK_DRIVER_SELFTEST(pAC, IoC);
- pAC->Pnmi.TestResult = Ret;
- break;
-
- case SK_PNMI_ACT_RESETCNT:
- /* Set all counters and timestamps to zero */
- ResetCounter(pAC, IoC, NetIndex);
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR006,
- SK_PNMI_ERR006MSG);
-
- return (SK_PNMI_ERR_GENERAL);
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * Mac8023Stat - OID handler of OID_GEN_XXX and OID_802_3_XXX
- *
- * Description:
- * Retrieves the statistic values of the virtual port (logical
- * index 0). Only special OIDs of NDIS are handled which consist
- * of a 32 bit instead of a 64 bit value. The OIDs are public
- * because perhaps some other platform can use them too.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int Mac8023Stat(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- SK_U64 StatVal;
- SK_U32 StatVal32;
- SK_BOOL Is64BitReq = SK_FALSE;
-
- /*
- * Only the active Mac is returned
- */
- if (Instance != (SK_U32)(-1) && Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- /*
- * Check action type
- */
- if (Action != SK_PNMI_GET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Check length
- */
- switch (Id) {
-
- case OID_802_3_PERMANENT_ADDRESS:
- case OID_802_3_CURRENT_ADDRESS:
- if (*pLen < sizeof(SK_MAC_ADDR)) {
-
- *pLen = sizeof(SK_MAC_ADDR);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
-#ifndef SK_NDIS_64BIT_CTR
- if (*pLen < sizeof(SK_U32)) {
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
-#else /* SK_NDIS_64BIT_CTR */
-
- /*
- * for compatibility, at least 32bit are required for oid
- */
- if (*pLen < sizeof(SK_U32)) {
- /*
- * but indicate handling for 64bit values,
- * if insufficient space is provided
- */
- *pLen = sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- Is64BitReq = (*pLen < sizeof(SK_U64)) ? SK_FALSE : SK_TRUE;
-#endif /* SK_NDIS_64BIT_CTR */
- break;
- }
-
- /*
- * Update all statistics, because we retrieve virtual MAC, which
- * consists of multiple physical statistics and increment semaphore
- * to indicate that an update was already done.
- */
- Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
- if ( Ret != SK_PNMI_ERR_OK) {
-
- *pLen = 0;
- return (Ret);
- }
- pAC->Pnmi.MacUpdatedFlag ++;
-
- /*
- * Get value (MAC Index 0 identifies the virtual MAC)
- */
- switch (Id) {
-
- case OID_802_3_PERMANENT_ADDRESS:
- CopyMac(pBuf, &pAC->Addr.Net[NetIndex].PermanentMacAddress);
- *pLen = sizeof(SK_MAC_ADDR);
- break;
-
- case OID_802_3_CURRENT_ADDRESS:
- CopyMac(pBuf, &pAC->Addr.Net[NetIndex].CurrentMacAddress);
- *pLen = sizeof(SK_MAC_ADDR);
- break;
-
- default:
- StatVal = GetStatVal(pAC, IoC, 0, IdTable[TableIndex].Param, NetIndex);
-
- /*
- * by default 32bit values are evaluated
- */
- if (!Is64BitReq) {
- StatVal32 = (SK_U32)StatVal;
- SK_PNMI_STORE_U32(pBuf, StatVal32);
- *pLen = sizeof(SK_U32);
- }
- else {
- SK_PNMI_STORE_U64(pBuf, StatVal);
- *pLen = sizeof(SK_U64);
- }
- break;
- }
-
- pAC->Pnmi.MacUpdatedFlag --;
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * MacPrivateStat - OID handler function of OID_SKGE_STAT_XXX
- *
- * Description:
- * Retrieves the XMAC statistic data.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int MacPrivateStat(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int LogPortMax;
- unsigned int LogPortIndex;
- unsigned int PhysPortMax;
- unsigned int Limit;
- unsigned int Offset;
- int Ret;
- SK_U64 StatVal;
-
-
- /*
- * Calculate instance if wished. MAC index 0 is the virtual
- * MAC.
- */
- PhysPortMax = pAC->GIni.GIMacsFound;
- LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
-
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
- LogPortMax--;
- }
-
- if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried */
- /* Check instance range */
- if ((Instance < 1) || (Instance > LogPortMax)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
- LogPortIndex = SK_PNMI_PORT_INST2LOG(Instance);
- Limit = LogPortIndex + 1;
- }
-
- else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
-
- LogPortIndex = 0;
- Limit = LogPortMax;
- }
-
-
- /*
- * Check action
- */
- if (Action != SK_PNMI_GET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Check length
- */
- if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U64)) {
-
- *pLen = (Limit - LogPortIndex) * sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Update XMAC statistic and increment semaphore to indicate that
- * an update was already done.
- */
- Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
- if (Ret != SK_PNMI_ERR_OK) {
-
- *pLen = 0;
- return (Ret);
- }
- pAC->Pnmi.MacUpdatedFlag ++;
-
- /*
- * Get value
- */
- Offset = 0;
- for (; LogPortIndex < Limit; LogPortIndex ++) {
-
- switch (Id) {
-
-/* XXX not yet implemented due to XMAC problems
- case OID_SKGE_STAT_TX_UTIL:
- return (SK_PNMI_ERR_GENERAL);
-*/
-/* XXX not yet implemented due to XMAC problems
- case OID_SKGE_STAT_RX_UTIL:
- return (SK_PNMI_ERR_GENERAL);
-*/
- case OID_SKGE_STAT_RX:
- case OID_SKGE_STAT_TX:
- switch (pAC->GIni.GIMacType) {
- case SK_MAC_XMAC:
- StatVal = GetStatVal(pAC, IoC, LogPortIndex,
- IdTable[TableIndex].Param, NetIndex);
- break;
-
- case SK_MAC_GMAC:
- if (Id == OID_SKGE_STAT_TX) {
-
- StatVal =
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HTX_BROADCAST, NetIndex) +
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HTX_MULTICAST, NetIndex) +
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HTX_UNICAST, NetIndex);
- }
- else {
- StatVal =
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HRX_BROADCAST, NetIndex) +
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HRX_MULTICAST, NetIndex) +
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HRX_UNICAST, NetIndex) +
- GetStatVal(pAC, IoC, LogPortIndex,
- SK_PNMI_HRX_UNDERSIZE, NetIndex);
- }
- break;
-
- default:
- StatVal = 0;
- break;
- }
-
- SK_PNMI_STORE_U64(pBuf + Offset, StatVal);
- break;
-
- default:
- StatVal = GetStatVal(pAC, IoC, LogPortIndex,
- IdTable[TableIndex].Param, NetIndex);
- SK_PNMI_STORE_U64(pBuf + Offset, StatVal);
- break;
- }
-
- Offset += sizeof(SK_U64);
- }
- *pLen = Offset;
-
- pAC->Pnmi.MacUpdatedFlag --;
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * Addr - OID handler function of OID_SKGE_PHYS_CUR_ADDR and _FAC_ADDR
- *
- * Description:
- * Get/Presets/Sets the current and factory MAC address. The MAC
- * address of the virtual port, which is reported to the OS, may
- * not be changed, but the physical ones. A set to the virtual port
- * will be ignored. No error should be reported because otherwise
- * a multiple instance set (-1) would always fail.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int Addr(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- unsigned int LogPortMax;
- unsigned int PhysPortMax;
- unsigned int LogPortIndex;
- unsigned int PhysPortIndex;
- unsigned int Limit;
- unsigned int Offset = 0;
-
- /*
- * Calculate instance if wished. MAC index 0 is the virtual
- * MAC.
- */
- PhysPortMax = pAC->GIni.GIMacsFound;
- LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
-
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
- LogPortMax--;
- }
-
- if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried */
- /* Check instance range */
- if ((Instance < 1) || (Instance > LogPortMax)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
- LogPortIndex = SK_PNMI_PORT_INST2LOG(Instance);
- Limit = LogPortIndex + 1;
- }
-
- else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
-
- LogPortIndex = 0;
- Limit = LogPortMax;
- }
-
- /*
- * Perform Action
- */
- if (Action == SK_PNMI_GET) {
-
- /*
- * Check length
- */
- if (*pLen < (Limit - LogPortIndex) * 6) {
-
- *pLen = (Limit - LogPortIndex) * 6;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Get value
- */
- for (; LogPortIndex < Limit; LogPortIndex ++) {
-
- switch (Id) {
-
- case OID_SKGE_PHYS_CUR_ADDR:
- if (LogPortIndex == 0) {
- CopyMac(pBuf + Offset, &pAC->Addr.Net[NetIndex].CurrentMacAddress);
- }
- else {
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
-
- CopyMac(pBuf + Offset,
- &pAC->Addr.Port[PhysPortIndex].CurrentMacAddress);
- }
- Offset += 6;
- break;
-
- case OID_SKGE_PHYS_FAC_ADDR:
- if (LogPortIndex == 0) {
- CopyMac(pBuf + Offset,
- &pAC->Addr.Net[NetIndex].PermanentMacAddress);
- }
- else {
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- CopyMac(pBuf + Offset,
- &pAC->Addr.Port[PhysPortIndex].PermanentMacAddress);
- }
- Offset += 6;
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR008,
- SK_PNMI_ERR008MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
-
- *pLen = Offset;
- }
- else {
- /*
- * The logical MAC address may not be changed only
- * the physical ones
- */
- if (Id == OID_SKGE_PHYS_FAC_ADDR) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Only the current address may be changed
- */
- if (Id != OID_SKGE_PHYS_CUR_ADDR) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR009,
- SK_PNMI_ERR009MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Check length
- */
- if (*pLen < (Limit - LogPortIndex) * 6) {
-
- *pLen = (Limit - LogPortIndex) * 6;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- if (*pLen > (Limit - LogPortIndex) * 6) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /*
- * Check Action
- */
- if (Action == SK_PNMI_PRESET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_OK);
- }
-
- /*
- * Set OID_SKGE_MAC_CUR_ADDR
- */
- for (; LogPortIndex < Limit; LogPortIndex ++, Offset += 6) {
-
- /*
- * A set to virtual port and set of broadcast
- * address will be ignored
- */
- if (LogPortIndex == 0 || SK_MEMCMP(pBuf + Offset,
- "\xff\xff\xff\xff\xff\xff", 6) == 0) {
-
- continue;
- }
-
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC,
- LogPortIndex);
-
- Ret = SkAddrOverride(pAC, IoC, PhysPortIndex,
- (SK_MAC_ADDR *)(pBuf + Offset),
- (LogPortIndex == 0 ? SK_ADDR_VIRTUAL_ADDRESS :
- SK_ADDR_PHYSICAL_ADDRESS));
- if (Ret != SK_ADDR_OVERRIDE_SUCCESS) {
-
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- *pLen = Offset;
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * CsumStat - OID handler function of OID_SKGE_CHKSM_XXX
- *
- * Description:
- * Retrieves the statistic values of the CSUM module. The CSUM data
- * structure must be available in the SK_AC even if the CSUM module
- * is not included, because PNMI reads the statistic data from the
- * CSUM part of SK_AC directly.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int CsumStat(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int Index;
- unsigned int Limit;
- unsigned int Offset = 0;
- SK_U64 StatVal;
-
-
- /*
- * Calculate instance if wished
- */
- if (Instance != (SK_U32)(-1)) {
-
- if ((Instance < 1) || (Instance > SKCS_NUM_PROTOCOLS)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
- Index = (unsigned int)Instance - 1;
- Limit = Index + 1;
- }
- else {
- Index = 0;
- Limit = SKCS_NUM_PROTOCOLS;
- }
-
- /*
- * Check action
- */
- if (Action != SK_PNMI_GET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Check length
- */
- if (*pLen < (Limit - Index) * sizeof(SK_U64)) {
-
- *pLen = (Limit - Index) * sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Get value
- */
- for (; Index < Limit; Index ++) {
-
- switch (Id) {
-
- case OID_SKGE_CHKSM_RX_OK_CTS:
- StatVal = pAC->Csum.ProtoStats[NetIndex][Index].RxOkCts;
- break;
-
- case OID_SKGE_CHKSM_RX_UNABLE_CTS:
- StatVal = pAC->Csum.ProtoStats[NetIndex][Index].RxUnableCts;
- break;
-
- case OID_SKGE_CHKSM_RX_ERR_CTS:
- StatVal = pAC->Csum.ProtoStats[NetIndex][Index].RxErrCts;
- break;
-
- case OID_SKGE_CHKSM_TX_OK_CTS:
- StatVal = pAC->Csum.ProtoStats[NetIndex][Index].TxOkCts;
- break;
-
- case OID_SKGE_CHKSM_TX_UNABLE_CTS:
- StatVal = pAC->Csum.ProtoStats[NetIndex][Index].TxUnableCts;
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR010,
- SK_PNMI_ERR010MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- SK_PNMI_STORE_U64(pBuf + Offset, StatVal);
- Offset += sizeof(SK_U64);
- }
-
- /*
- * Store used buffer space
- */
- *pLen = Offset;
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * SensorStat - OID handler function of OID_SKGE_SENSOR_XXX
- *
- * Description:
- * Retrieves the statistic values of the I2C module, which handles
- * the temperature and voltage sensors.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int SensorStat(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int i;
- unsigned int Index;
- unsigned int Limit;
- unsigned int Offset;
- unsigned int Len;
- SK_U32 Val32;
- SK_U64 Val64;
-
-
- /*
- * Calculate instance if wished
- */
- if ((Instance != (SK_U32)(-1))) {
-
- if ((Instance < 1) || (Instance > (SK_U32)pAC->I2c.MaxSens)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- Index = (unsigned int)Instance -1;
- Limit = (unsigned int)Instance;
- }
- else {
- Index = 0;
- Limit = (unsigned int) pAC->I2c.MaxSens;
- }
-
- /*
- * Check action
- */
- if (Action != SK_PNMI_GET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Check length
- */
- switch (Id) {
-
- case OID_SKGE_SENSOR_VALUE:
- case OID_SKGE_SENSOR_WAR_THRES_LOW:
- case OID_SKGE_SENSOR_WAR_THRES_UPP:
- case OID_SKGE_SENSOR_ERR_THRES_LOW:
- case OID_SKGE_SENSOR_ERR_THRES_UPP:
- if (*pLen < (Limit - Index) * sizeof(SK_U32)) {
-
- *pLen = (Limit - Index) * sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_SENSOR_DESCR:
- for (Offset = 0, i = Index; i < Limit; i ++) {
-
- Len = (unsigned int)
- SK_STRLEN(pAC->I2c.SenTable[i].SenDesc) + 1;
- if (Len >= SK_PNMI_STRINGLEN2) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR011,
- SK_PNMI_ERR011MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- Offset += Len;
- }
- if (*pLen < Offset) {
-
- *pLen = Offset;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_SENSOR_INDEX:
- case OID_SKGE_SENSOR_TYPE:
- case OID_SKGE_SENSOR_STATUS:
- if (*pLen < Limit - Index) {
-
- *pLen = Limit - Index;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_SENSOR_WAR_CTS:
- case OID_SKGE_SENSOR_WAR_TIME:
- case OID_SKGE_SENSOR_ERR_CTS:
- case OID_SKGE_SENSOR_ERR_TIME:
- if (*pLen < (Limit - Index) * sizeof(SK_U64)) {
-
- *pLen = (Limit - Index) * sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR012,
- SK_PNMI_ERR012MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
-
- }
-
- /*
- * Get value
- */
- for (Offset = 0; Index < Limit; Index ++) {
-
- switch (Id) {
-
- case OID_SKGE_SENSOR_INDEX:
- *(pBuf + Offset) = (char)Index;
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_SENSOR_DESCR:
- Len = SK_STRLEN(pAC->I2c.SenTable[Index].SenDesc);
- SK_MEMCPY(pBuf + Offset + 1,
- pAC->I2c.SenTable[Index].SenDesc, Len);
- *(pBuf + Offset) = (char)Len;
- Offset += Len + 1;
- break;
-
- case OID_SKGE_SENSOR_TYPE:
- *(pBuf + Offset) =
- (char)pAC->I2c.SenTable[Index].SenType;
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_SENSOR_VALUE:
- Val32 = (SK_U32)pAC->I2c.SenTable[Index].SenValue;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_SENSOR_WAR_THRES_LOW:
- Val32 = (SK_U32)pAC->I2c.SenTable[Index].
- SenThreWarnLow;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_SENSOR_WAR_THRES_UPP:
- Val32 = (SK_U32)pAC->I2c.SenTable[Index].
- SenThreWarnHigh;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_SENSOR_ERR_THRES_LOW:
- Val32 = (SK_U32)pAC->I2c.SenTable[Index].
- SenThreErrLow;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_SENSOR_ERR_THRES_UPP:
- Val32 = pAC->I2c.SenTable[Index].SenThreErrHigh;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_SENSOR_STATUS:
- *(pBuf + Offset) =
- (char)pAC->I2c.SenTable[Index].SenErrFlag;
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_SENSOR_WAR_CTS:
- Val64 = pAC->I2c.SenTable[Index].SenWarnCts;
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- case OID_SKGE_SENSOR_ERR_CTS:
- Val64 = pAC->I2c.SenTable[Index].SenErrCts;
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- case OID_SKGE_SENSOR_WAR_TIME:
- Val64 = SK_PNMI_HUNDREDS_SEC(pAC->I2c.SenTable[Index].
- SenBegWarnTS);
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- case OID_SKGE_SENSOR_ERR_TIME:
- Val64 = SK_PNMI_HUNDREDS_SEC(pAC->I2c.SenTable[Index].
- SenBegErrTS);
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- default:
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
- ("SensorStat: Unknown OID should be handled before"));
-
- return (SK_PNMI_ERR_GENERAL);
- }
- }
-
- /*
- * Store used buffer space
- */
- *pLen = Offset;
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * Vpd - OID handler function of OID_SKGE_VPD_XXX
- *
- * Description:
- * Get/preset/set of VPD data. As instance the name of a VPD key
- * can be passed. The Instance parameter is a SK_U32 and can be
- * used as a string buffer for the VPD key, because their maximum
- * length is 4 byte.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int Vpd(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_VPD_STATUS *pVpdStatus;
- unsigned int BufLen;
- char Buf[256];
- char KeyArr[SK_PNMI_VPD_ENTRIES][SK_PNMI_VPD_KEY_SIZE];
- char KeyStr[SK_PNMI_VPD_KEY_SIZE];
- unsigned int KeyNo;
- unsigned int Offset;
- unsigned int Index;
- unsigned int FirstIndex;
- unsigned int LastIndex;
- unsigned int Len;
- int Ret;
- SK_U32 Val32;
-
- /*
- * Get array of all currently stored VPD keys
- */
- Ret = GetVpdKeyArr(pAC, IoC, &KeyArr[0][0], sizeof(KeyArr),
- &KeyNo);
- if (Ret != SK_PNMI_ERR_OK) {
- *pLen = 0;
- return (Ret);
- }
-
- /*
- * If instance is not -1, try to find the requested VPD key for
- * the multiple instance variables. The other OIDs as for example
- * OID VPD_ACTION are single instance variables and must be
- * handled separatly.
- */
- FirstIndex = 0;
- LastIndex = KeyNo;
-
- if ((Instance != (SK_U32)(-1))) {
-
- if (Id == OID_SKGE_VPD_KEY || Id == OID_SKGE_VPD_VALUE ||
- Id == OID_SKGE_VPD_ACCESS) {
-
- SK_STRNCPY(KeyStr, (char *)&Instance, 4);
- KeyStr[4] = 0;
-
- for (Index = 0; Index < KeyNo; Index ++) {
-
- if (SK_STRCMP(KeyStr, KeyArr[Index]) == 0) {
- FirstIndex = Index;
- LastIndex = Index+1;
- break;
- }
- }
- if (Index == KeyNo) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
- }
- else if (Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
- }
-
- /*
- * Get value, if a query should be performed
- */
- if (Action == SK_PNMI_GET) {
-
- switch (Id) {
-
- case OID_SKGE_VPD_FREE_BYTES:
- /* Check length of buffer */
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- /* Get number of free bytes */
- pVpdStatus = VpdStat(pAC, IoC);
- if (pVpdStatus == NULL) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR017,
- SK_PNMI_ERR017MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- if ((pVpdStatus->vpd_status & VPD_VALID) == 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR018,
- SK_PNMI_ERR018MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- Val32 = (SK_U32)pVpdStatus->vpd_free_rw;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_VPD_ENTRIES_LIST:
- /* Check length */
- for (Len = 0, Index = 0; Index < KeyNo; Index ++) {
-
- Len += SK_STRLEN(KeyArr[Index]) + 1;
- }
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /* Get value */
- *(pBuf) = (char)Len - 1;
- for (Offset = 1, Index = 0; Index < KeyNo; Index ++) {
-
- Len = SK_STRLEN(KeyArr[Index]);
- SK_MEMCPY(pBuf + Offset, KeyArr[Index], Len);
-
- Offset += Len;
-
- if (Index < KeyNo - 1) {
-
- *(pBuf + Offset) = ' ';
- Offset ++;
- }
- }
- *pLen = Offset;
- break;
-
- case OID_SKGE_VPD_ENTRIES_NUMBER:
- /* Check length */
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- Val32 = (SK_U32)KeyNo;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_VPD_KEY:
- /* Check buffer length, if it is large enough */
- for (Len = 0, Index = FirstIndex;
- Index < LastIndex; Index ++) {
-
- Len += SK_STRLEN(KeyArr[Index]) + 1;
- }
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Get the key to an intermediate buffer, because
- * we have to prepend a length byte.
- */
- for (Offset = 0, Index = FirstIndex;
- Index < LastIndex; Index ++) {
-
- Len = SK_STRLEN(KeyArr[Index]);
-
- *(pBuf + Offset) = (char)Len;
- SK_MEMCPY(pBuf + Offset + 1, KeyArr[Index],
- Len);
- Offset += Len + 1;
- }
- *pLen = Offset;
- break;
-
- case OID_SKGE_VPD_VALUE:
- /* Check the buffer length if it is large enough */
- for (Offset = 0, Index = FirstIndex;
- Index < LastIndex; Index ++) {
-
- BufLen = 256;
- if (VpdRead(pAC, IoC, KeyArr[Index], Buf,
- (int *)&BufLen) > 0 ||
- BufLen >= SK_PNMI_VPD_DATALEN) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR021,
- SK_PNMI_ERR021MSG);
-
- return (SK_PNMI_ERR_GENERAL);
- }
- Offset += BufLen + 1;
- }
- if (*pLen < Offset) {
-
- *pLen = Offset;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * Get the value to an intermediate buffer, because
- * we have to prepend a length byte.
- */
- for (Offset = 0, Index = FirstIndex;
- Index < LastIndex; Index ++) {
-
- BufLen = 256;
- if (VpdRead(pAC, IoC, KeyArr[Index], Buf,
- (int *)&BufLen) > 0 ||
- BufLen >= SK_PNMI_VPD_DATALEN) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR022,
- SK_PNMI_ERR022MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- *(pBuf + Offset) = (char)BufLen;
- SK_MEMCPY(pBuf + Offset + 1, Buf, BufLen);
- Offset += BufLen + 1;
- }
- *pLen = Offset;
- break;
-
- case OID_SKGE_VPD_ACCESS:
- if (*pLen < LastIndex - FirstIndex) {
-
- *pLen = LastIndex - FirstIndex;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- for (Offset = 0, Index = FirstIndex;
- Index < LastIndex; Index ++) {
-
- if (VpdMayWrite(KeyArr[Index])) {
-
- *(pBuf + Offset) = SK_PNMI_VPD_RW;
- }
- else {
- *(pBuf + Offset) = SK_PNMI_VPD_RO;
- }
- Offset ++;
- }
- *pLen = Offset;
- break;
-
- case OID_SKGE_VPD_ACTION:
- Offset = LastIndex - FirstIndex;
- if (*pLen < Offset) {
-
- *pLen = Offset;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- SK_MEMSET(pBuf, 0, Offset);
- *pLen = Offset;
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR023,
- SK_PNMI_ERR023MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- else {
- /* The only OID which can be set is VPD_ACTION */
- if (Id != OID_SKGE_VPD_ACTION) {
-
- if (Id == OID_SKGE_VPD_FREE_BYTES ||
- Id == OID_SKGE_VPD_ENTRIES_LIST ||
- Id == OID_SKGE_VPD_ENTRIES_NUMBER ||
- Id == OID_SKGE_VPD_KEY ||
- Id == OID_SKGE_VPD_VALUE ||
- Id == OID_SKGE_VPD_ACCESS) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR024,
- SK_PNMI_ERR024MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * From this point we handle VPD_ACTION. Check the buffer
- * length. It should at least have the size of one byte.
- */
- if (*pLen < 1) {
-
- *pLen = 1;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- /*
- * The first byte contains the VPD action type we should
- * perform.
- */
- switch (*pBuf) {
-
- case SK_PNMI_VPD_IGNORE:
- /* Nothing to do */
- break;
-
- case SK_PNMI_VPD_CREATE:
- /*
- * We have to create a new VPD entry or we modify
- * an existing one. Check first the buffer length.
- */
- if (*pLen < 4) {
-
- *pLen = 4;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- KeyStr[0] = pBuf[1];
- KeyStr[1] = pBuf[2];
- KeyStr[2] = 0;
-
- /*
- * Is the entry writable or does it belong to the
- * read-only area?
- */
- if (!VpdMayWrite(KeyStr)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- Offset = (int)pBuf[3] & 0xFF;
-
- SK_MEMCPY(Buf, pBuf + 4, Offset);
- Buf[Offset] = 0;
-
- /* A preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- /* Write the new entry or modify an existing one */
- Ret = VpdWrite(pAC, IoC, KeyStr, Buf);
- if (Ret == SK_PNMI_VPD_NOWRITE ) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- else if (Ret != SK_PNMI_VPD_OK) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR025,
- SK_PNMI_ERR025MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Perform an update of the VPD data. This is
- * not mandantory, but just to be sure.
- */
- Ret = VpdUpdate(pAC, IoC);
- if (Ret != SK_PNMI_VPD_OK) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR026,
- SK_PNMI_ERR026MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- break;
-
- case SK_PNMI_VPD_DELETE:
- /* Check if the buffer size is plausible */
- if (*pLen < 3) {
-
- *pLen = 3;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- if (*pLen > 3) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- KeyStr[0] = pBuf[1];
- KeyStr[1] = pBuf[2];
- KeyStr[2] = 0;
-
- /* Find the passed key in the array */
- for (Index = 0; Index < KeyNo; Index ++) {
-
- if (SK_STRCMP(KeyStr, KeyArr[Index]) == 0) {
-
- break;
- }
- }
- /*
- * If we cannot find the key it is wrong, so we
- * return an appropriate error value.
- */
- if (Index == KeyNo) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- /* Ok, you wanted it and you will get it */
- Ret = VpdDelete(pAC, IoC, KeyStr);
- if (Ret != SK_PNMI_VPD_OK) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR027,
- SK_PNMI_ERR027MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Perform an update of the VPD data. This is
- * not mandantory, but just to be sure.
- */
- Ret = VpdUpdate(pAC, IoC);
- if (Ret != SK_PNMI_VPD_OK) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR028,
- SK_PNMI_ERR028MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * General - OID handler function of various single instance OIDs
- *
- * Description:
- * The code is simple. No description necessary.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int General(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- unsigned int Index;
- unsigned int Len;
- unsigned int Offset;
- unsigned int Val;
- SK_U8 Val8;
- SK_U16 Val16;
- SK_U32 Val32;
- SK_U64 Val64;
- SK_U64 Val64RxHwErrs = 0;
- SK_U64 Val64TxHwErrs = 0;
- SK_BOOL Is64BitReq = SK_FALSE;
- char Buf[256];
- int MacType;
-
- /*
- * Check instance. We only handle single instance variables
- */
- if (Instance != (SK_U32)(-1) && Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- /*
- * Check action. We only allow get requests.
- */
- if (Action != SK_PNMI_GET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- MacType = pAC->GIni.GIMacType;
-
- /*
- * Check length for the various supported OIDs
- */
- switch (Id) {
-
- case OID_GEN_XMIT_ERROR:
- case OID_GEN_RCV_ERROR:
- case OID_GEN_RCV_NO_BUFFER:
-#ifndef SK_NDIS_64BIT_CTR
- if (*pLen < sizeof(SK_U32)) {
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
-#else /* SK_NDIS_64BIT_CTR */
-
- /*
- * for compatibility, at least 32bit are required for oid
- */
- if (*pLen < sizeof(SK_U32)) {
- /*
- * but indicate handling for 64bit values,
- * if insufficient space is provided
- */
- *pLen = sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
-
- Is64BitReq = (*pLen < sizeof(SK_U64)) ? SK_FALSE : SK_TRUE;
-#endif /* SK_NDIS_64BIT_CTR */
- break;
-
- case OID_SKGE_PORT_NUMBER:
- case OID_SKGE_DEVICE_TYPE:
- case OID_SKGE_RESULT:
- case OID_SKGE_RLMT_MONITOR_NUMBER:
- case OID_GEN_TRANSMIT_QUEUE_LENGTH:
- case OID_SKGE_TRAP_NUMBER:
- case OID_SKGE_MDB_VERSION:
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_CHIPSET:
- if (*pLen < sizeof(SK_U16)) {
-
- *pLen = sizeof(SK_U16);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_BUS_TYPE:
- case OID_SKGE_BUS_SPEED:
- case OID_SKGE_BUS_WIDTH:
- case OID_SKGE_SENSOR_NUMBER:
- case OID_SKGE_CHKSM_NUMBER:
- if (*pLen < sizeof(SK_U8)) {
-
- *pLen = sizeof(SK_U8);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_TX_SW_QUEUE_LEN:
- case OID_SKGE_TX_SW_QUEUE_MAX:
- case OID_SKGE_TX_RETRY:
- case OID_SKGE_RX_INTR_CTS:
- case OID_SKGE_TX_INTR_CTS:
- case OID_SKGE_RX_NO_BUF_CTS:
- case OID_SKGE_TX_NO_BUF_CTS:
- case OID_SKGE_TX_USED_DESCR_NO:
- case OID_SKGE_RX_DELIVERED_CTS:
- case OID_SKGE_RX_OCTETS_DELIV_CTS:
- case OID_SKGE_RX_HW_ERROR_CTS:
- case OID_SKGE_TX_HW_ERROR_CTS:
- case OID_SKGE_IN_ERRORS_CTS:
- case OID_SKGE_OUT_ERROR_CTS:
- case OID_SKGE_ERR_RECOVERY_CTS:
- case OID_SKGE_SYSUPTIME:
- if (*pLen < sizeof(SK_U64)) {
-
- *pLen = sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- /* Checked later */
- break;
- }
-
- /* Update statistic */
- if (Id == OID_SKGE_RX_HW_ERROR_CTS ||
- Id == OID_SKGE_TX_HW_ERROR_CTS ||
- Id == OID_SKGE_IN_ERRORS_CTS ||
- Id == OID_SKGE_OUT_ERROR_CTS ||
- Id == OID_GEN_XMIT_ERROR ||
- Id == OID_GEN_RCV_ERROR) {
-
- /* Force the XMAC to update its statistic counters and
- * Increment semaphore to indicate that an update was
- * already done.
- */
- Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
- if (Ret != SK_PNMI_ERR_OK) {
-
- *pLen = 0;
- return (Ret);
- }
- pAC->Pnmi.MacUpdatedFlag ++;
-
- /*
- * Some OIDs consist of multiple hardware counters. Those
- * values which are contained in all of them will be added
- * now.
- */
- switch (Id) {
-
- case OID_SKGE_RX_HW_ERROR_CTS:
- case OID_SKGE_IN_ERRORS_CTS:
- case OID_GEN_RCV_ERROR:
- Val64RxHwErrs =
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_MISSED, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_FRAMING, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_OVERFLOW, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_JABBER, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_CARRIER, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_IRLENGTH, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_SYMBOL, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_SHORTS, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_RUNT, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_TOO_LONG, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_FCS, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_CEXT, NetIndex);
- break;
-
- case OID_SKGE_TX_HW_ERROR_CTS:
- case OID_SKGE_OUT_ERROR_CTS:
- case OID_GEN_XMIT_ERROR:
- Val64TxHwErrs =
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_EXCESS_COL, NetIndex) +
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_LATE_COL, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_UNDERRUN, NetIndex)+
- GetStatVal(pAC, IoC, 0, SK_PNMI_HTX_CARRIER, NetIndex);
- break;
- }
- }
-
- /*
- * Retrieve value
- */
- switch (Id) {
-
- case OID_SKGE_SUPPORTED_LIST:
- Len = ID_TABLE_SIZE * sizeof(SK_U32);
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- for (Offset = 0, Index = 0; Offset < Len;
- Offset += sizeof(SK_U32), Index ++) {
-
- Val32 = (SK_U32)IdTable[Index].Id;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- }
- *pLen = Len;
- break;
-
- case OID_SKGE_PORT_NUMBER:
- Val32 = (SK_U32)pAC->GIni.GIMacsFound;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_DEVICE_TYPE:
- Val32 = (SK_U32)pAC->Pnmi.DeviceType;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_DRIVER_DESCR:
- if (pAC->Pnmi.pDriverDescription == NULL) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR007,
- SK_PNMI_ERR007MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- Len = SK_STRLEN(pAC->Pnmi.pDriverDescription) + 1;
- if (Len > SK_PNMI_STRINGLEN1) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR029,
- SK_PNMI_ERR029MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- *pBuf = (char)(Len - 1);
- SK_MEMCPY(pBuf + 1, pAC->Pnmi.pDriverDescription, Len - 1);
- *pLen = Len;
- break;
-
- case OID_SKGE_DRIVER_VERSION:
- if (pAC->Pnmi.pDriverVersion == NULL) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030,
- SK_PNMI_ERR030MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- Len = SK_STRLEN(pAC->Pnmi.pDriverVersion) + 1;
- if (Len > SK_PNMI_STRINGLEN1) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031,
- SK_PNMI_ERR031MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- *pBuf = (char)(Len - 1);
- SK_MEMCPY(pBuf + 1, pAC->Pnmi.pDriverVersion, Len - 1);
- *pLen = Len;
- break;
-
- case OID_SKGE_HW_DESCR:
- /*
- * The hardware description is located in the VPD. This
- * query may move to the initialisation routine. But
- * the VPD data is cached and therefore a call here
- * will not make much difference.
- */
- Len = 256;
- if (VpdRead(pAC, IoC, VPD_NAME, Buf, (int *)&Len) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR032,
- SK_PNMI_ERR032MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- Len ++;
- if (Len > SK_PNMI_STRINGLEN1) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR033,
- SK_PNMI_ERR033MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- *pBuf = (char)(Len - 1);
- SK_MEMCPY(pBuf + 1, Buf, Len - 1);
- *pLen = Len;
- break;
-
- case OID_SKGE_HW_VERSION:
- /* Oh, I love to do some string manipulation */
- if (*pLen < 5) {
-
- *pLen = 5;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- Val8 = (SK_U8)pAC->GIni.GIPciHwRev;
- pBuf[0] = 4;
- pBuf[1] = 'v';
- pBuf[2] = (char)(0x30 | ((Val8 >> 4) & 0x0F));
- pBuf[3] = '.';
- pBuf[4] = (char)(0x30 | (Val8 & 0x0F));
- *pLen = 5;
- break;
-
- case OID_SKGE_CHIPSET:
- Val16 = pAC->Pnmi.Chipset;
- SK_PNMI_STORE_U16(pBuf, Val16);
- *pLen = sizeof(SK_U16);
- break;
-
- case OID_SKGE_BUS_TYPE:
- *pBuf = (char)SK_PNMI_BUS_PCI;
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_BUS_SPEED:
- *pBuf = pAC->Pnmi.PciBusSpeed;
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_BUS_WIDTH:
- *pBuf = pAC->Pnmi.PciBusWidth;
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_RESULT:
- Val32 = pAC->Pnmi.TestResult;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_SENSOR_NUMBER:
- *pBuf = (char)pAC->I2c.MaxSens;
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_CHKSM_NUMBER:
- *pBuf = SKCS_NUM_PROTOCOLS;
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_TRAP_NUMBER:
- GetTrapQueueLen(pAC, &Len, &Val);
- Val32 = (SK_U32)Val;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_TRAP:
- GetTrapQueueLen(pAC, &Len, &Val);
- if (*pLen < Len) {
-
- *pLen = Len;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- CopyTrapQueue(pAC, pBuf);
- *pLen = Len;
- break;
-
- case OID_SKGE_RLMT_MONITOR_NUMBER:
-/* XXX Not yet implemented by RLMT therefore we return zero elements */
- Val32 = 0;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_TX_SW_QUEUE_LEN:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].TxSwQueueLen;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].TxSwQueueLen +
- pAC->Pnmi.BufPort[1].TxSwQueueLen;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueLen;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].TxSwQueueLen +
- pAC->Pnmi.Port[1].TxSwQueueLen;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
-
- case OID_SKGE_TX_SW_QUEUE_MAX:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].TxSwQueueMax;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].TxSwQueueMax +
- pAC->Pnmi.BufPort[1].TxSwQueueMax;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueMax;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].TxSwQueueMax +
- pAC->Pnmi.Port[1].TxSwQueueMax;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_TX_RETRY:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].TxRetryCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].TxRetryCts +
- pAC->Pnmi.BufPort[1].TxRetryCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].TxRetryCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].TxRetryCts +
- pAC->Pnmi.Port[1].TxRetryCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RX_INTR_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].RxIntrCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].RxIntrCts +
- pAC->Pnmi.BufPort[1].RxIntrCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].RxIntrCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].RxIntrCts +
- pAC->Pnmi.Port[1].RxIntrCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_TX_INTR_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].TxIntrCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].TxIntrCts +
- pAC->Pnmi.BufPort[1].TxIntrCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].TxIntrCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].TxIntrCts +
- pAC->Pnmi.Port[1].TxIntrCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RX_NO_BUF_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].RxNoBufCts +
- pAC->Pnmi.BufPort[1].RxNoBufCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].RxNoBufCts +
- pAC->Pnmi.Port[1].RxNoBufCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_TX_NO_BUF_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].TxNoBufCts +
- pAC->Pnmi.BufPort[1].TxNoBufCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].TxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].TxNoBufCts +
- pAC->Pnmi.Port[1].TxNoBufCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_TX_USED_DESCR_NO:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].TxUsedDescrNo;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].TxUsedDescrNo +
- pAC->Pnmi.BufPort[1].TxUsedDescrNo;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].TxUsedDescrNo;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].TxUsedDescrNo +
- pAC->Pnmi.Port[1].TxUsedDescrNo;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RX_DELIVERED_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].RxDeliveredCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].RxDeliveredCts +
- pAC->Pnmi.BufPort[1].RxDeliveredCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].RxDeliveredCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].RxDeliveredCts +
- pAC->Pnmi.Port[1].RxDeliveredCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RX_OCTETS_DELIV_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].RxOctetsDeliveredCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].RxOctetsDeliveredCts +
- pAC->Pnmi.BufPort[1].RxOctetsDeliveredCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].RxOctetsDeliveredCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].RxOctetsDeliveredCts +
- pAC->Pnmi.Port[1].RxOctetsDeliveredCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RX_HW_ERROR_CTS:
- SK_PNMI_STORE_U64(pBuf, Val64RxHwErrs);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_TX_HW_ERROR_CTS:
- SK_PNMI_STORE_U64(pBuf, Val64TxHwErrs);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_IN_ERRORS_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = Val64RxHwErrs + pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = Val64RxHwErrs +
- pAC->Pnmi.BufPort[0].RxNoBufCts +
- pAC->Pnmi.BufPort[1].RxNoBufCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = Val64RxHwErrs +
- pAC->Pnmi.Port[0].RxNoBufCts +
- pAC->Pnmi.Port[1].RxNoBufCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_OUT_ERROR_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = Val64TxHwErrs + pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = Val64TxHwErrs +
- pAC->Pnmi.BufPort[0].TxNoBufCts +
- pAC->Pnmi.BufPort[1].TxNoBufCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
- }
- /* Single net mode */
- else {
- Val64 = Val64TxHwErrs +
- pAC->Pnmi.Port[0].TxNoBufCts +
- pAC->Pnmi.Port[1].TxNoBufCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_ERR_RECOVERY_CTS:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].ErrRecoveryCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.BufPort[0].ErrRecoveryCts +
- pAC->Pnmi.BufPort[1].ErrRecoveryCts;
- }
- }
- else {
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- Val64 = pAC->Pnmi.Port[NetIndex].ErrRecoveryCts;
- }
- /* Single net mode */
- else {
- Val64 = pAC->Pnmi.Port[0].ErrRecoveryCts +
- pAC->Pnmi.Port[1].ErrRecoveryCts;
- }
- }
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_SYSUPTIME:
- Val64 = SK_PNMI_HUNDREDS_SEC(SkOsGetTime(pAC));
- Val64 -= pAC->Pnmi.StartUpTime;
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_MDB_VERSION:
- Val32 = SK_PNMI_MDB_VERSION;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_GEN_RCV_ERROR:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- Val64 = Val64RxHwErrs + pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
- }
- else {
- Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
- }
-
- /*
- * by default 32bit values are evaluated
- */
- if (!Is64BitReq) {
- Val32 = (SK_U32)Val64;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- }
- else {
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- }
- break;
-
- case OID_GEN_XMIT_ERROR:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- Val64 = Val64TxHwErrs + pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
- }
- else {
- Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
- }
-
- /*
- * by default 32bit values are evaluated
- */
- if (!Is64BitReq) {
- Val32 = (SK_U32)Val64;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- }
- else {
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- }
- break;
-
- case OID_GEN_RCV_NO_BUFFER:
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (MacType == SK_MAC_XMAC) {
- Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
- }
- else {
- Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
- }
-
- /*
- * by default 32bit values are evaluated
- */
- if (!Is64BitReq) {
- Val32 = (SK_U32)Val64;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- }
- else {
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- }
- break;
-
- case OID_GEN_TRANSMIT_QUEUE_LENGTH:
- Val32 = (SK_U32)pAC->Pnmi.Port[NetIndex].TxSwQueueLen;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR034,
- SK_PNMI_ERR034MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- if (Id == OID_SKGE_RX_HW_ERROR_CTS ||
- Id == OID_SKGE_TX_HW_ERROR_CTS ||
- Id == OID_SKGE_IN_ERRORS_CTS ||
- Id == OID_SKGE_OUT_ERROR_CTS ||
- Id == OID_GEN_XMIT_ERROR ||
- Id == OID_GEN_RCV_ERROR) {
-
- pAC->Pnmi.MacUpdatedFlag --;
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * Rlmt - OID handler function of OID_SKGE_RLMT_XXX single instance.
- *
- * Description:
- * Get/Presets/Sets the RLMT OIDs.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int Rlmt(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- int Ret;
- unsigned int PhysPortIndex;
- unsigned int PhysPortMax;
- SK_EVPARA EventParam;
- SK_U32 Val32;
- SK_U64 Val64;
-
-
- /*
- * Check instance. Only single instance OIDs are allowed here.
- */
- if (Instance != (SK_U32)(-1) && Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- /*
- * Perform the requested action
- */
- if (Action == SK_PNMI_GET) {
-
- /*
- * Check if the buffer length is large enough.
- */
-
- switch (Id) {
-
- case OID_SKGE_RLMT_MODE:
- case OID_SKGE_RLMT_PORT_ACTIVE:
- case OID_SKGE_RLMT_PORT_PREFERRED:
- if (*pLen < sizeof(SK_U8)) {
-
- *pLen = sizeof(SK_U8);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_RLMT_PORT_NUMBER:
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_RLMT_CHANGE_CTS:
- case OID_SKGE_RLMT_CHANGE_TIME:
- case OID_SKGE_RLMT_CHANGE_ESTIM:
- case OID_SKGE_RLMT_CHANGE_THRES:
- if (*pLen < sizeof(SK_U64)) {
-
- *pLen = sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR035,
- SK_PNMI_ERR035MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Update RLMT statistic and increment semaphores to indicate
- * that an update was already done. Maybe RLMT will hold its
- * statistic always up to date some time. Then we can
- * remove this type of call.
- */
- if ((Ret = RlmtUpdate(pAC, IoC, NetIndex)) != SK_PNMI_ERR_OK) {
-
- *pLen = 0;
- return (Ret);
- }
- pAC->Pnmi.RlmtUpdatedFlag ++;
-
- /*
- * Retrieve Value
- */
- switch (Id) {
-
- case OID_SKGE_RLMT_MODE:
- *pBuf = (char)pAC->Rlmt.Net[0].RlmtMode;
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_RLMT_PORT_NUMBER:
- Val32 = (SK_U32)pAC->GIni.GIMacsFound;
- SK_PNMI_STORE_U32(pBuf, Val32);
- *pLen = sizeof(SK_U32);
- break;
-
- case OID_SKGE_RLMT_PORT_ACTIVE:
- *pBuf = 0;
- /*
- * If multiple ports may become active this OID
- * doesn't make sense any more. A new variable in
- * the port structure should be created. However,
- * for this variable the first active port is
- * returned.
- */
- PhysPortMax = pAC->GIni.GIMacsFound;
-
- for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- if (pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- *pBuf = (char)SK_PNMI_PORT_PHYS2LOG(PhysPortIndex);
- break;
- }
- }
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_RLMT_PORT_PREFERRED:
- *pBuf = (char)SK_PNMI_PORT_PHYS2LOG(pAC->Rlmt.Net[NetIndex].Preference);
- *pLen = sizeof(char);
- break;
-
- case OID_SKGE_RLMT_CHANGE_CTS:
- Val64 = pAC->Pnmi.RlmtChangeCts;
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RLMT_CHANGE_TIME:
- Val64 = pAC->Pnmi.RlmtChangeTime;
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RLMT_CHANGE_ESTIM:
- Val64 = pAC->Pnmi.RlmtChangeEstimate.Estimate;
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- case OID_SKGE_RLMT_CHANGE_THRES:
- Val64 = pAC->Pnmi.RlmtChangeThreshold;
- SK_PNMI_STORE_U64(pBuf, Val64);
- *pLen = sizeof(SK_U64);
- break;
-
- default:
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
- ("Rlmt: Unknown OID should be handled before"));
-
- pAC->Pnmi.RlmtUpdatedFlag --;
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- pAC->Pnmi.RlmtUpdatedFlag --;
- }
- else {
- /* Perform a preset or set */
- switch (Id) {
-
- case OID_SKGE_RLMT_MODE:
- /* Check if the buffer length is plausible */
- if (*pLen < sizeof(char)) {
-
- *pLen = sizeof(char);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- /* Check if the value range is correct */
- if (*pLen != sizeof(char) ||
- (*pBuf & SK_PNMI_RLMT_MODE_CHK_LINK) == 0 ||
- *(SK_U8 *)pBuf > 15) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_OK);
- }
- /* Send an event to RLMT to change the mode */
- SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
- EventParam.Para32[0] |= (SK_U32)(*pBuf);
- EventParam.Para32[1] = 0;
- if (SkRlmtEvent(pAC, IoC, SK_RLMT_MODE_CHANGE,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR037,
- SK_PNMI_ERR037MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- break;
-
- case OID_SKGE_RLMT_PORT_PREFERRED:
- /* Check if the buffer length is plausible */
- if (*pLen < sizeof(char)) {
-
- *pLen = sizeof(char);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- /* Check if the value range is correct */
- if (*pLen != sizeof(char) || *(SK_U8 *)pBuf >
- (SK_U8)pAC->GIni.GIMacsFound) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_OK);
- }
-
- /*
- * Send an event to RLMT change the preferred port.
- * A param of -1 means automatic mode. RLMT will
- * make the decision which is the preferred port.
- */
- SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
- EventParam.Para32[0] = (SK_U32)(*pBuf) - 1;
- EventParam.Para32[1] = NetIndex;
- if (SkRlmtEvent(pAC, IoC, SK_RLMT_PREFPORT_CHANGE,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR038,
- SK_PNMI_ERR038MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- break;
-
- case OID_SKGE_RLMT_CHANGE_THRES:
- /* Check if the buffer length is plausible */
- if (*pLen < sizeof(SK_U64)) {
-
- *pLen = sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- /*
- * There are not many restrictions to the
- * value range.
- */
- if (*pLen != sizeof(SK_U64)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- /* A preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_OK);
- }
- /*
- * Store the new threshold, which will be taken
- * on the next timer event.
- */
- SK_PNMI_READ_U64(pBuf, Val64);
- pAC->Pnmi.RlmtChangeThreshold = Val64;
- break;
-
- default:
- /* The other OIDs are not be able for set */
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * RlmtStat - OID handler function of OID_SKGE_RLMT_XXX multiple instance.
- *
- * Description:
- * Performs get requests on multiple instance variables.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int RlmtStat(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int PhysPortMax;
- unsigned int PhysPortIndex;
- unsigned int Limit;
- unsigned int Offset;
- int Ret;
- SK_U32 Val32;
- SK_U64 Val64;
-
- /*
- * Calculate the port indexes from the instance
- */
- PhysPortMax = pAC->GIni.GIMacsFound;
-
- if ((Instance != (SK_U32)(-1))) {
- /* Check instance range */
- if ((Instance < 1) || (Instance > PhysPortMax)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- /* Single net mode */
- PhysPortIndex = Instance - 1;
-
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- PhysPortIndex = NetIndex;
- }
-
- /* Both net modes */
- Limit = PhysPortIndex + 1;
- }
- else {
- /* Single net mode */
- PhysPortIndex = 0;
- Limit = PhysPortMax;
-
- /* Dual net mode */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- PhysPortIndex = NetIndex;
- Limit = PhysPortIndex + 1;
- }
- }
-
- /*
- * Currently only get requests are allowed.
- */
- if (Action != SK_PNMI_GET) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Check if the buffer length is large enough.
- */
- switch (Id) {
-
- case OID_SKGE_RLMT_PORT_INDEX:
- case OID_SKGE_RLMT_STATUS:
- if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U32)) {
-
- *pLen = (Limit - PhysPortIndex) * sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_RLMT_TX_HELLO_CTS:
- case OID_SKGE_RLMT_RX_HELLO_CTS:
- case OID_SKGE_RLMT_TX_SP_REQ_CTS:
- case OID_SKGE_RLMT_RX_SP_CTS:
- if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U64)) {
-
- *pLen = (Limit - PhysPortIndex) * sizeof(SK_U64);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR039,
- SK_PNMI_ERR039MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
-
- }
-
- /*
- * Update statistic and increment semaphores to indicate that
- * an update was already done.
- */
- if ((Ret = RlmtUpdate(pAC, IoC, NetIndex)) != SK_PNMI_ERR_OK) {
-
- *pLen = 0;
- return (Ret);
- }
- pAC->Pnmi.RlmtUpdatedFlag ++;
-
- /*
- * Get value
- */
- Offset = 0;
- for (; PhysPortIndex < Limit; PhysPortIndex ++) {
-
- switch (Id) {
-
- case OID_SKGE_RLMT_PORT_INDEX:
- Val32 = PhysPortIndex;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_RLMT_STATUS:
- if (pAC->Rlmt.Port[PhysPortIndex].PortState ==
- SK_RLMT_PS_INIT ||
- pAC->Rlmt.Port[PhysPortIndex].PortState ==
- SK_RLMT_PS_DOWN) {
-
- Val32 = SK_PNMI_RLMT_STATUS_ERROR;
- }
- else if (pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- Val32 = SK_PNMI_RLMT_STATUS_ACTIVE;
- }
- else {
- Val32 = SK_PNMI_RLMT_STATUS_STANDBY;
- }
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- case OID_SKGE_RLMT_TX_HELLO_CTS:
- Val64 = pAC->Rlmt.Port[PhysPortIndex].TxHelloCts;
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- case OID_SKGE_RLMT_RX_HELLO_CTS:
- Val64 = pAC->Rlmt.Port[PhysPortIndex].RxHelloCts;
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- case OID_SKGE_RLMT_TX_SP_REQ_CTS:
- Val64 = pAC->Rlmt.Port[PhysPortIndex].TxSpHelloReqCts;
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- case OID_SKGE_RLMT_RX_SP_CTS:
- Val64 = pAC->Rlmt.Port[PhysPortIndex].RxSpHelloCts;
- SK_PNMI_STORE_U64(pBuf + Offset, Val64);
- Offset += sizeof(SK_U64);
- break;
-
- default:
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
- ("RlmtStat: Unknown OID should be errored before"));
-
- pAC->Pnmi.RlmtUpdatedFlag --;
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- *pLen = Offset;
-
- pAC->Pnmi.RlmtUpdatedFlag --;
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * MacPrivateConf - OID handler function of OIDs concerning the configuration
- *
- * Description:
- * Get/Presets/Sets the OIDs concerning the configuration.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int MacPrivateConf(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int PhysPortMax;
- unsigned int PhysPortIndex;
- unsigned int LogPortMax;
- unsigned int LogPortIndex;
- unsigned int Limit;
- unsigned int Offset;
- char Val8;
- int Ret;
- SK_EVPARA EventParam;
- SK_U32 Val32;
-
-
- /*
- * Calculate instance if wished. MAC index 0 is the virtual
- * MAC.
- */
- PhysPortMax = pAC->GIni.GIMacsFound;
- LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
-
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
- LogPortMax--;
- }
-
- if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried */
- /* Check instance range */
- if ((Instance < 1) || (Instance > LogPortMax)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
- LogPortIndex = SK_PNMI_PORT_INST2LOG(Instance);
- Limit = LogPortIndex + 1;
- }
-
- else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
-
- LogPortIndex = 0;
- Limit = LogPortMax;
- }
-
- /*
- * Perform action
- */
- if (Action == SK_PNMI_GET) {
-
- /*
- * Check length
- */
- switch (Id) {
-
- case OID_SKGE_PMD:
- case OID_SKGE_CONNECTOR:
- case OID_SKGE_LINK_CAP:
- case OID_SKGE_LINK_MODE:
- case OID_SKGE_LINK_MODE_STATUS:
- case OID_SKGE_LINK_STATUS:
- case OID_SKGE_FLOWCTRL_CAP:
- case OID_SKGE_FLOWCTRL_MODE:
- case OID_SKGE_FLOWCTRL_STATUS:
- case OID_SKGE_PHY_OPERATION_CAP:
- case OID_SKGE_PHY_OPERATION_MODE:
- case OID_SKGE_PHY_OPERATION_STATUS:
- case OID_SKGE_SPEED_CAP:
- case OID_SKGE_SPEED_MODE:
- case OID_SKGE_SPEED_STATUS:
- if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
-
- *pLen = (Limit - LogPortIndex) *
- sizeof(SK_U8);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_MTU:
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR041,
- SK_PNMI_ERR041MSG);
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Update statistic and increment semaphore to indicate
- * that an update was already done.
- */
- if ((Ret = SirqUpdate(pAC, IoC)) != SK_PNMI_ERR_OK) {
-
- *pLen = 0;
- return (Ret);
- }
- pAC->Pnmi.SirqUpdatedFlag ++;
-
- /*
- * Get value
- */
- Offset = 0;
- for (; LogPortIndex < Limit; LogPortIndex ++) {
-
- switch (Id) {
-
- case OID_SKGE_PMD:
- *(pBuf + Offset) = pAC->Pnmi.PMD;
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_CONNECTOR:
- *(pBuf + Offset) = pAC->Pnmi.Connector;
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_LINK_CAP:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkCap;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PLinkCap;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_LINK_MODE:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkModeConf;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PLinkModeConf;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_LINK_MODE_STATUS:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) =
- CalculateLinkModeStatus(pAC,
- IoC, PhysPortIndex);
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
- *(pBuf + Offset) = CalculateLinkModeStatus(pAC, IoC, NetIndex);
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_LINK_STATUS:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) =
- CalculateLinkStatus(pAC,
- IoC, PhysPortIndex);
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = CalculateLinkStatus(pAC, IoC, NetIndex);
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_FLOWCTRL_CAP:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PFlowCtrlCap;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PFlowCtrlCap;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_FLOWCTRL_MODE:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PFlowCtrlMode;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PFlowCtrlMode;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_FLOWCTRL_STATUS:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PFlowCtrlStatus;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PFlowCtrlStatus;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_PHY_OPERATION_CAP:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PMSCap;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PMSCap;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_PHY_OPERATION_MODE:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf + Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PMSMode;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PMSMode;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_PHY_OPERATION_STATUS:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf + Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PMSStatus;
- }
- Offset += sizeof(char);
- }
- else {
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PMSStatus;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_SPEED_CAP:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf +
- Offset);
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkSpeedCap;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PLinkSpeedCap;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_SPEED_MODE:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf + Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkSpeed;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PLinkSpeed;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_SPEED_STATUS:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
-
- /* Get value for virtual port */
- VirtualConf(pAC, IoC, Id, pBuf + Offset);
- }
- else {
- /* Get value for physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
-
- *(pBuf + Offset) = pAC->GIni.GP[
- PhysPortIndex].PLinkSpeedUsed;
- }
- Offset += sizeof(char);
- }
- else { /* DualNetMode */
-
- *(pBuf + Offset) = pAC->GIni.GP[NetIndex].PLinkSpeedUsed;
- Offset += sizeof(char);
- }
- break;
-
- case OID_SKGE_MTU:
- Val32 = SK_DRIVER_GET_MTU(pAC, IoC, NetIndex);
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- Offset += sizeof(SK_U32);
- break;
-
- default:
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
- ("MacPrivateConf: Unknown OID should be handled before"));
-
- pAC->Pnmi.SirqUpdatedFlag --;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- *pLen = Offset;
- pAC->Pnmi.SirqUpdatedFlag --;
-
- return (SK_PNMI_ERR_OK);
- }
-
- /*
- * From here SET or PRESET action. Check if the passed
- * buffer length is plausible.
- */
- switch (Id) {
-
- case OID_SKGE_LINK_MODE:
- case OID_SKGE_FLOWCTRL_MODE:
- case OID_SKGE_PHY_OPERATION_MODE:
- case OID_SKGE_SPEED_MODE:
- if (*pLen < Limit - LogPortIndex) {
-
- *pLen = Limit - LogPortIndex;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- if (*pLen != Limit - LogPortIndex) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- break;
-
- case OID_SKGE_MTU:
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- if (*pLen != sizeof(SK_U32)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Perform preset or set
- */
- Offset = 0;
- for (; LogPortIndex < Limit; LogPortIndex ++) {
-
- switch (Id) {
-
- case OID_SKGE_LINK_MODE:
- /* Check the value range */
- Val8 = *(pBuf + Offset);
- if (Val8 == 0) {
-
- Offset += sizeof(char);
- break;
- }
- if (Val8 < SK_LMODE_HALF ||
- (LogPortIndex != 0 && Val8 > SK_LMODE_AUTOSENSE) ||
- (LogPortIndex == 0 && Val8 > SK_LMODE_INDETERMINATED)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- if (LogPortIndex == 0) {
-
- /*
- * The virtual port consists of all currently
- * active ports. Find them and send an event
- * with the new link mode to SIRQ.
- */
- for (PhysPortIndex = 0;
- PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- if (!pAC->Pnmi.Port[PhysPortIndex].
- ActiveFlag) {
-
- continue;
- }
-
- EventParam.Para32[0] = PhysPortIndex;
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_LMODE,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR043,
- SK_PNMI_ERR043MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- }
- else {
- /*
- * Send an event with the new link mode to
- * the SIRQ module.
- */
- EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC, SK_HWEV_SET_LMODE,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR043,
- SK_PNMI_ERR043MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_FLOWCTRL_MODE:
- /* Check the value range */
- Val8 = *(pBuf + Offset);
- if (Val8 == 0) {
-
- Offset += sizeof(char);
- break;
- }
- if (Val8 < SK_FLOW_MODE_NONE ||
- (LogPortIndex != 0 && Val8 > SK_FLOW_MODE_SYM_OR_REM) ||
- (LogPortIndex == 0 && Val8 > SK_FLOW_MODE_INDETERMINATED)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- if (LogPortIndex == 0) {
-
- /*
- * The virtual port consists of all currently
- * active ports. Find them and send an event
- * with the new flow control mode to SIRQ.
- */
- for (PhysPortIndex = 0;
- PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- if (!pAC->Pnmi.Port[PhysPortIndex].
- ActiveFlag) {
-
- continue;
- }
-
- EventParam.Para32[0] = PhysPortIndex;
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_FLOWMODE,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR044,
- SK_PNMI_ERR044MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- }
- else {
- /*
- * Send an event with the new flow control
- * mode to the SIRQ module.
- */
- EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_FLOWMODE, EventParam)
- > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR044,
- SK_PNMI_ERR044MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_PHY_OPERATION_MODE :
- /* Check the value range */
- Val8 = *(pBuf + Offset);
- if (Val8 == 0) {
- /* mode of this port remains unchanged */
- Offset += sizeof(char);
- break;
- }
- if (Val8 < SK_MS_MODE_AUTO ||
- (LogPortIndex != 0 && Val8 > SK_MS_MODE_SLAVE) ||
- (LogPortIndex == 0 && Val8 > SK_MS_MODE_INDETERMINATED)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- if (LogPortIndex == 0) {
-
- /*
- * The virtual port consists of all currently
- * active ports. Find them and send an event
- * with new master/slave (role) mode to SIRQ.
- */
- for (PhysPortIndex = 0;
- PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- if (!pAC->Pnmi.Port[PhysPortIndex].
- ActiveFlag) {
-
- continue;
- }
-
- EventParam.Para32[0] = PhysPortIndex;
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_ROLE,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR042,
- SK_PNMI_ERR042MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- }
- else {
- /*
- * Send an event with the new master/slave
- * (role) mode to the SIRQ module.
- */
- EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_ROLE, EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR042,
- SK_PNMI_ERR042MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
-
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_SPEED_MODE:
- /* Check the value range */
- Val8 = *(pBuf + Offset);
- if (Val8 == 0) {
-
- Offset += sizeof(char);
- break;
- }
- if (Val8 < (SK_LSPEED_AUTO) ||
- (LogPortIndex != 0 && Val8 > (SK_LSPEED_1000MBPS)) ||
- (LogPortIndex == 0 && Val8 > (SK_LSPEED_INDETERMINATED))) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- if (LogPortIndex == 0) {
-
- /*
- * The virtual port consists of all currently
- * active ports. Find them and send an event
- * with the new flow control mode to SIRQ.
- */
- for (PhysPortIndex = 0;
- PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- continue;
- }
-
- EventParam.Para32[0] = PhysPortIndex;
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_SPEED,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR045,
- SK_PNMI_ERR045MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- }
- else {
- /*
- * Send an event with the new flow control
- * mode to the SIRQ module.
- */
- EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
- pAC, LogPortIndex);
- EventParam.Para32[1] = (SK_U32)Val8;
- if (SkGeSirqEvent(pAC, IoC,
- SK_HWEV_SET_SPEED,
- EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW,
- SK_PNMI_ERR045,
- SK_PNMI_ERR045MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- Offset += sizeof(char);
- break;
-
- case OID_SKGE_MTU :
- /* Check the value range */
- Val32 = *(SK_U32*)(pBuf + Offset);
- if (Val32 == 0) {
- /* mtu of this port remains unchanged */
- Offset += sizeof(SK_U32);
- break;
- }
- if (SK_DRIVER_PRESET_MTU(pAC, IoC, NetIndex, Val32) != 0) {
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
- return (SK_PNMI_ERR_OK);
- }
-
- if (SK_DRIVER_SET_MTU(pAC, IoC, NetIndex, Val32) != 0) {
- return (SK_PNMI_ERR_GENERAL);
- }
-
- Offset += sizeof(SK_U32);
- break;
-
- default:
- SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
- ("MacPrivateConf: Unknown OID should be handled before set"));
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * Monitor - OID handler function for RLMT_MONITOR_XXX
- *
- * Description:
- * Because RLMT currently does not support the monitoring of
- * remote adapter cards, we return always an empty table.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_BAD_VALUE The passed value is not in the valid
- * value range.
- * SK_PNMI_ERR_READ_ONLY The OID is read-only and cannot be set.
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-PNMI_STATIC int Monitor(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int Index;
- unsigned int Limit;
- unsigned int Offset;
- unsigned int Entries;
-
-
- /*
- * Calculate instance if wished.
- */
-/* XXX Not yet implemented. Return always an empty table. */
- Entries = 0;
-
- if ((Instance != (SK_U32)(-1))) {
-
- if ((Instance < 1) || (Instance > Entries)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- Index = (unsigned int)Instance - 1;
- Limit = (unsigned int)Instance;
- }
- else {
- Index = 0;
- Limit = Entries;
- }
-
- /*
- * Get/Set value
- */
- if (Action == SK_PNMI_GET) {
-
- for (Offset=0; Index < Limit; Index ++) {
-
- switch (Id) {
-
- case OID_SKGE_RLMT_MONITOR_INDEX:
- case OID_SKGE_RLMT_MONITOR_ADDR:
- case OID_SKGE_RLMT_MONITOR_ERRS:
- case OID_SKGE_RLMT_MONITOR_TIMESTAMP:
- case OID_SKGE_RLMT_MONITOR_ADMIN:
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR046,
- SK_PNMI_ERR046MSG);
-
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- }
- *pLen = Offset;
- }
- else {
- /* Only MONITOR_ADMIN can be set */
- if (Id != OID_SKGE_RLMT_MONITOR_ADMIN) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /* Check if the length is plausible */
- if (*pLen < (Limit - Index)) {
-
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- /* Okay, we have a wide value range */
- if (*pLen != (Limit - Index)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-/*
- for (Offset=0; Index < Limit; Index ++) {
- }
-*/
-/*
- * XXX Not yet implemented. Return always BAD_VALUE, because the table
- * is empty.
- */
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * VirtualConf - Calculates the values of configuration OIDs for virtual port
- *
- * Description:
- * We handle here the get of the configuration group OIDs, which are
- * a little bit complicated. The virtual port consists of all currently
- * active physical ports. If multiple ports are active and configured
- * differently we get in some trouble to return a single value. So we
- * get the value of the first active port and compare it with that of
- * the other active ports. If they are not the same, we return a value
- * that indicates that the state is indeterminated.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void VirtualConf(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf) /* Buffer to which to mgmt data will be retrieved */
-{
- unsigned int PhysPortMax;
- unsigned int PhysPortIndex;
- SK_U8 Val8;
- SK_BOOL PortActiveFlag;
-
-
- *pBuf = 0;
- PortActiveFlag = SK_FALSE;
- PhysPortMax = pAC->GIni.GIMacsFound;
-
- for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- /* Check if the physical port is active */
- if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- continue;
- }
-
- PortActiveFlag = SK_TRUE;
-
- switch (Id) {
-
- case OID_SKGE_LINK_CAP:
-
- /*
- * Different capabilities should not happen, but
- * in the case of the cases OR them all together.
- * From a curious point of view the virtual port
- * is capable of all found capabilities.
- */
- *pBuf |= pAC->GIni.GP[PhysPortIndex].PLinkCap;
- break;
-
- case OID_SKGE_LINK_MODE:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PLinkModeConf;
- continue;
- }
-
- /*
- * If we find an active port with a different link
- * mode than the first one we return a value that
- * indicates that the link mode is indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PLinkModeConf
- ) {
-
- *pBuf = SK_LMODE_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_LINK_MODE_STATUS:
- /* Get the link mode of the physical port */
- Val8 = CalculateLinkModeStatus(pAC, IoC, PhysPortIndex);
-
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = Val8;
- continue;
- }
-
- /*
- * If we find an active port with a different link
- * mode status than the first one we return a value
- * that indicates that the link mode status is
- * indeterminated.
- */
- if (*pBuf != Val8) {
-
- *pBuf = SK_LMODE_STAT_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_LINK_STATUS:
- /* Get the link status of the physical port */
- Val8 = CalculateLinkStatus(pAC, IoC, PhysPortIndex);
-
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = Val8;
- continue;
- }
-
- /*
- * If we find an active port with a different link
- * status than the first one, we return a value
- * that indicates that the link status is
- * indeterminated.
- */
- if (*pBuf != Val8) {
-
- *pBuf = SK_PNMI_RLMT_LSTAT_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_FLOWCTRL_CAP:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PFlowCtrlCap;
- continue;
- }
-
- /*
- * From a curious point of view the virtual port
- * is capable of all found capabilities.
- */
- *pBuf |= pAC->GIni.GP[PhysPortIndex].PFlowCtrlCap;
- break;
-
- case OID_SKGE_FLOWCTRL_MODE:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PFlowCtrlMode;
- continue;
- }
-
- /*
- * If we find an active port with a different flow
- * control mode than the first one, we return a value
- * that indicates that the mode is indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PFlowCtrlMode) {
-
- *pBuf = SK_FLOW_MODE_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_FLOWCTRL_STATUS:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PFlowCtrlStatus;
- continue;
- }
-
- /*
- * If we find an active port with a different flow
- * control status than the first one, we return a
- * value that indicates that the status is
- * indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PFlowCtrlStatus) {
-
- *pBuf = SK_FLOW_STAT_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_PHY_OPERATION_CAP:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PMSCap;
- continue;
- }
-
- /*
- * From a curious point of view the virtual port
- * is capable of all found capabilities.
- */
- *pBuf |= pAC->GIni.GP[PhysPortIndex].PMSCap;
- break;
-
- case OID_SKGE_PHY_OPERATION_MODE:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PMSMode;
- continue;
- }
-
- /*
- * If we find an active port with a different master/
- * slave mode than the first one, we return a value
- * that indicates that the mode is indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PMSMode) {
-
- *pBuf = SK_MS_MODE_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_PHY_OPERATION_STATUS:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PMSStatus;
- continue;
- }
-
- /*
- * If we find an active port with a different master/
- * slave status than the first one, we return a
- * value that indicates that the status is
- * indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PMSStatus) {
-
- *pBuf = SK_MS_STAT_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_SPEED_MODE:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PLinkSpeed;
- continue;
- }
-
- /*
- * If we find an active port with a different flow
- * control mode than the first one, we return a value
- * that indicates that the mode is indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PLinkSpeed) {
-
- *pBuf = SK_LSPEED_INDETERMINATED;
- }
- break;
-
- case OID_SKGE_SPEED_STATUS:
- /* Check if it is the first active port */
- if (*pBuf == 0) {
-
- *pBuf = pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed;
- continue;
- }
-
- /*
- * If we find an active port with a different flow
- * control status than the first one, we return a
- * value that indicates that the status is
- * indeterminated.
- */
- if (*pBuf != pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed) {
-
- *pBuf = SK_LSPEED_STAT_INDETERMINATED;
- }
- break;
- }
- }
-
- /*
- * If no port is active return an indeterminated answer
- */
- if (!PortActiveFlag) {
-
- switch (Id) {
-
- case OID_SKGE_LINK_CAP:
- *pBuf = SK_LMODE_CAP_INDETERMINATED;
- break;
-
- case OID_SKGE_LINK_MODE:
- *pBuf = SK_LMODE_INDETERMINATED;
- break;
-
- case OID_SKGE_LINK_MODE_STATUS:
- *pBuf = SK_LMODE_STAT_INDETERMINATED;
- break;
-
- case OID_SKGE_LINK_STATUS:
- *pBuf = SK_PNMI_RLMT_LSTAT_INDETERMINATED;
- break;
-
- case OID_SKGE_FLOWCTRL_CAP:
- case OID_SKGE_FLOWCTRL_MODE:
- *pBuf = SK_FLOW_MODE_INDETERMINATED;
- break;
-
- case OID_SKGE_FLOWCTRL_STATUS:
- *pBuf = SK_FLOW_STAT_INDETERMINATED;
- break;
-
- case OID_SKGE_PHY_OPERATION_CAP:
- *pBuf = SK_MS_CAP_INDETERMINATED;
- break;
-
- case OID_SKGE_PHY_OPERATION_MODE:
- *pBuf = SK_MS_MODE_INDETERMINATED;
- break;
-
- case OID_SKGE_PHY_OPERATION_STATUS:
- *pBuf = SK_MS_STAT_INDETERMINATED;
- break;
- case OID_SKGE_SPEED_CAP:
- *pBuf = SK_LSPEED_CAP_INDETERMINATED;
- break;
-
- case OID_SKGE_SPEED_MODE:
- *pBuf = SK_LSPEED_INDETERMINATED;
- break;
-
- case OID_SKGE_SPEED_STATUS:
- *pBuf = SK_LSPEED_STAT_INDETERMINATED;
- break;
- }
- }
-}
-
-/*****************************************************************************
- *
- * CalculateLinkStatus - Determins the link status of a physical port
- *
- * Description:
- * Determins the link status the following way:
- * LSTAT_PHY_DOWN: Link is down
- * LSTAT_AUTONEG: Auto-negotiation failed
- * LSTAT_LOG_DOWN: Link is up but RLMT did not yet put the port
- * logically up.
- * LSTAT_LOG_UP: RLMT marked the port as up
- *
- * Returns:
- * Link status of physical port
- */
-PNMI_STATIC SK_U8 CalculateLinkStatus(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-unsigned int PhysPortIndex) /* Physical port index */
-{
- SK_U8 Result;
-
-
- if (!pAC->GIni.GP[PhysPortIndex].PHWLinkUp) {
-
- Result = SK_PNMI_RLMT_LSTAT_PHY_DOWN;
- }
- else if (pAC->GIni.GP[PhysPortIndex].PAutoNegFail > 0) {
-
- Result = SK_PNMI_RLMT_LSTAT_AUTONEG;
- }
- else if (!pAC->Rlmt.Port[PhysPortIndex].PortDown) {
-
- Result = SK_PNMI_RLMT_LSTAT_LOG_UP;
- }
- else {
- Result = SK_PNMI_RLMT_LSTAT_LOG_DOWN;
- }
-
- return (Result);
-}
-
-/*****************************************************************************
- *
- * CalculateLinkModeStatus - Determins the link mode status of a phys. port
- *
- * Description:
- * The COMMON module only tells us if the mode is half or full duplex.
- * But in the decade of auto sensing it is usefull for the user to
- * know if the mode was negotiated or forced. Therefore we have a
- * look to the mode, which was last used by the negotiation process.
- *
- * Returns:
- * The link mode status
- */
-PNMI_STATIC SK_U8 CalculateLinkModeStatus(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-unsigned int PhysPortIndex) /* Physical port index */
-{
- SK_U8 Result;
-
-
- /* Get the current mode, which can be full or half duplex */
- Result = pAC->GIni.GP[PhysPortIndex].PLinkModeStatus;
-
- /* Check if no valid mode could be found (link is down) */
- if (Result < SK_LMODE_STAT_HALF) {
-
- Result = SK_LMODE_STAT_UNKNOWN;
- }
- else if (pAC->GIni.GP[PhysPortIndex].PLinkMode >= SK_LMODE_AUTOHALF) {
-
- /*
- * Auto-negotiation was used to bring up the link. Change
- * the already found duplex status that it indicates
- * auto-negotiation was involved.
- */
- if (Result == SK_LMODE_STAT_HALF) {
-
- Result = SK_LMODE_STAT_AUTOHALF;
- }
- else if (Result == SK_LMODE_STAT_FULL) {
-
- Result = SK_LMODE_STAT_AUTOFULL;
- }
- }
-
- return (Result);
-}
-
-/*****************************************************************************
- *
- * GetVpdKeyArr - Obtain an array of VPD keys
- *
- * Description:
- * Read the VPD keys and build an array of VPD keys, which are
- * easy to access.
- *
- * Returns:
- * SK_PNMI_ERR_OK Task successfully performed.
- * SK_PNMI_ERR_GENERAL Something went wrong.
- */
-PNMI_STATIC int GetVpdKeyArr(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-char *pKeyArr, /* Ptr KeyArray */
-unsigned int KeyArrLen, /* Length of array in bytes */
-unsigned int *pKeyNo) /* Number of keys */
-{
- unsigned int BufKeysLen = SK_PNMI_VPD_BUFSIZE;
- char BufKeys[SK_PNMI_VPD_BUFSIZE];
- unsigned int StartOffset;
- unsigned int Offset;
- int Index;
- int Ret;
-
-
- SK_MEMSET(pKeyArr, 0, KeyArrLen);
-
- /*
- * Get VPD key list
- */
- Ret = VpdKeys(pAC, IoC, (char *)&BufKeys, (int *)&BufKeysLen,
- (int *)pKeyNo);
- if (Ret > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR014,
- SK_PNMI_ERR014MSG);
-
- return (SK_PNMI_ERR_GENERAL);
- }
- /* If no keys are available return now */
- if (*pKeyNo == 0 || BufKeysLen == 0) {
-
- return (SK_PNMI_ERR_OK);
- }
- /*
- * If the key list is too long for us trunc it and give a
- * errorlog notification. This case should not happen because
- * the maximum number of keys is limited due to RAM limitations
- */
- if (*pKeyNo > SK_PNMI_VPD_ENTRIES) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR015,
- SK_PNMI_ERR015MSG);
-
- *pKeyNo = SK_PNMI_VPD_ENTRIES;
- }
-
- /*
- * Now build an array of fixed string length size and copy
- * the keys together.
- */
- for (Index = 0, StartOffset = 0, Offset = 0; Offset < BufKeysLen;
- Offset ++) {
-
- if (BufKeys[Offset] != 0) {
-
- continue;
- }
-
- if (Offset - StartOffset > SK_PNMI_VPD_KEY_SIZE) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR016,
- SK_PNMI_ERR016MSG);
- return (SK_PNMI_ERR_GENERAL);
- }
-
- SK_STRNCPY(pKeyArr + Index * SK_PNMI_VPD_KEY_SIZE,
- &BufKeys[StartOffset], SK_PNMI_VPD_KEY_SIZE);
-
- Index ++;
- StartOffset = Offset + 1;
- }
-
- /* Last key not zero terminated? Get it anyway */
- if (StartOffset < Offset) {
-
- SK_STRNCPY(pKeyArr + Index * SK_PNMI_VPD_KEY_SIZE,
- &BufKeys[StartOffset], SK_PNMI_VPD_KEY_SIZE);
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * SirqUpdate - Let the SIRQ update its internal values
- *
- * Description:
- * Just to be sure that the SIRQ module holds its internal data
- * structures up to date, we send an update event before we make
- * any access.
- *
- * Returns:
- * SK_PNMI_ERR_OK Task successfully performed.
- * SK_PNMI_ERR_GENERAL Something went wrong.
- */
-PNMI_STATIC int SirqUpdate(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC) /* IO context handle */
-{
- SK_EVPARA EventParam;
-
-
- /* Was the module already updated during the current PNMI call? */
- if (pAC->Pnmi.SirqUpdatedFlag > 0) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- /* Send an synchronuous update event to the module */
- SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
- if (SkGeSirqEvent(pAC, IoC, SK_HWEV_UPDATE_STAT, EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR047,
- SK_PNMI_ERR047MSG);
-
- return (SK_PNMI_ERR_GENERAL);
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * RlmtUpdate - Let the RLMT update its internal values
- *
- * Description:
- * Just to be sure that the RLMT module holds its internal data
- * structures up to date, we send an update event before we make
- * any access.
- *
- * Returns:
- * SK_PNMI_ERR_OK Task successfully performed.
- * SK_PNMI_ERR_GENERAL Something went wrong.
- */
-PNMI_STATIC int RlmtUpdate(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- SK_EVPARA EventParam;
-
-
- /* Was the module already updated during the current PNMI call? */
- if (pAC->Pnmi.RlmtUpdatedFlag > 0) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- /* Send an synchronuous update event to the module */
- SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
- EventParam.Para32[0] = NetIndex;
- EventParam.Para32[1] = (SK_U32)-1;
- if (SkRlmtEvent(pAC, IoC, SK_RLMT_STATS_UPDATE, EventParam) > 0) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR048,
- SK_PNMI_ERR048MSG);
-
- return (SK_PNMI_ERR_GENERAL);
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * MacUpdate - Force the XMAC to output the current statistic
- *
- * Description:
- * The XMAC holds its statistic internally. To obtain the current
- * values we send a command so that the statistic data will
- * be written to apredefined memory area on the adapter.
- *
- * Returns:
- * SK_PNMI_ERR_OK Task successfully performed.
- * SK_PNMI_ERR_GENERAL Something went wrong.
- */
-PNMI_STATIC int MacUpdate(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-unsigned int FirstMac, /* Index of the first Mac to be updated */
-unsigned int LastMac) /* Index of the last Mac to be updated */
-{
- unsigned int MacIndex;
-
- /*
- * Were the statistics already updated during the
- * current PNMI call?
- */
- if (pAC->Pnmi.MacUpdatedFlag > 0) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- /* Send an update command to all MACs specified */
- for (MacIndex = FirstMac; MacIndex <= LastMac; MacIndex ++) {
-
- /*
- * 2002-09-13 pweber: Freeze the current sw counters.
- * (That should be done as close as
- * possible to the update of the
- * hw counters)
- */
- if (pAC->GIni.GIMacType == SK_MAC_XMAC) {
- pAC->Pnmi.BufPort[MacIndex] = pAC->Pnmi.Port[MacIndex];
- }
-
- /* 2002-09-13 pweber: Update the hw counter */
- if (pAC->GIni.GIFunc.pFnMacUpdateStats(pAC, IoC, MacIndex) != 0) {
-
- return (SK_PNMI_ERR_GENERAL);
- }
- }
-
- return (SK_PNMI_ERR_OK);
-}
-
-/*****************************************************************************
- *
- * GetStatVal - Retrieve an XMAC statistic counter
- *
- * Description:
- * Retrieves the statistic counter of a virtual or physical port. The
- * virtual port is identified by the index 0. It consists of all
- * currently active ports. To obtain the counter value for this port
- * we must add the statistic counter of all active ports. To grant
- * continuous counter values for the virtual port even when port
- * switches occur we must additionally add a delta value, which was
- * calculated during a SK_PNMI_EVT_RLMT_ACTIVE_UP event.
- *
- * Returns:
- * Requested statistic value
- */
-PNMI_STATIC SK_U64 GetStatVal(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-unsigned int LogPortIndex, /* Index of the logical Port to be processed */
-unsigned int StatIndex, /* Index to statistic value */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
- unsigned int PhysPortIndex;
- unsigned int PhysPortMax;
- SK_U64 Val = 0;
-
-
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
-
- PhysPortIndex = NetIndex;
- Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
- }
- else { /* Single Net mode */
-
- if (LogPortIndex == 0) {
-
- PhysPortMax = pAC->GIni.GIMacsFound;
-
- /* Add counter of all active ports */
- for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
- PhysPortIndex ++) {
-
- if (pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
-
- Val += GetPhysStatVal(pAC, IoC, PhysPortIndex,
- StatIndex);
- }
- }
-
- /* Correct value because of port switches */
- Val += pAC->Pnmi.VirtualCounterOffset[StatIndex];
- }
- else {
- /* Get counter value of physical port */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
- Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
- }
- }
- return (Val);
-}
-
-/*****************************************************************************
- *
- * GetPhysStatVal - Get counter value for physical port
- *
- * Description:
- * Builds a 64bit counter value. Except for the octet counters
- * the lower 32bit are counted in hardware and the upper 32bit
- * in software by monitoring counter overflow interrupts in the
- * event handler. To grant continous counter values during XMAC
- * resets (caused by a workaround) we must add a delta value.
- * The delta was calculated in the event handler when a
- * SK_PNMI_EVT_XMAC_RESET was received.
- *
- * Returns:
- * Counter value
- */
-PNMI_STATIC SK_U64 GetPhysStatVal(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-unsigned int PhysPortIndex, /* Index of the logical Port to be processed */
-unsigned int StatIndex) /* Index to statistic value */
-{
- SK_U64 Val = 0;
- SK_U32 LowVal = 0;
- SK_U32 HighVal = 0;
- SK_U16 Word;
- int MacType;
-
- SK_PNMI_PORT *pPnmiPrt;
- SK_GEMACFUNC *pFnMac;
-
- MacType = pAC->GIni.GIMacType;
-
- /* 2002-09-17 pweber: For XMAC, use the frozen sw counters (BufPort) */
- if (pAC->GIni.GIMacType == SK_MAC_XMAC) {
- pPnmiPrt = &pAC->Pnmi.BufPort[PhysPortIndex];
- }
- else {
- pPnmiPrt = &pAC->Pnmi.Port[PhysPortIndex];
- }
-
- pFnMac = &pAC->GIni.GIFunc;
-
- switch (StatIndex) {
- case SK_PNMI_HTX:
- case SK_PNMI_HRX:
- /* Not supported by GMAC */
- if (MacType == SK_MAC_GMAC) {
- return (Val);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
- case SK_PNMI_HTX_OCTET:
- case SK_PNMI_HRX_OCTET:
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &HighVal);
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex + 1][MacType].Reg,
- &LowVal);
- break;
-
- case SK_PNMI_HTX_BURST:
- case SK_PNMI_HTX_EXCESS_DEF:
- case SK_PNMI_HTX_CARRIER:
- /* Not supported by GMAC */
- if (MacType == SK_MAC_GMAC) {
- return (Val);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
- case SK_PNMI_HTX_MACC:
- /* GMAC only supports PAUSE MAC control frames */
- if (MacType == SK_MAC_GMAC) {
- Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, SK_PNMI_HTX_PMACC);
-
- return (Val);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
- case SK_PNMI_HTX_COL:
- case SK_PNMI_HRX_UNDERSIZE:
- /* Not supported by XMAC */
- if (MacType == SK_MAC_XMAC) {
- return (Val);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
-
- case SK_PNMI_HTX_DEFFERAL:
- /* Not supported by GMAC */
- if (MacType == SK_MAC_GMAC) {
- return (Val);
- }
-
- /*
- * XMAC counts frames with deferred transmission
- * even in full-duplex mode.
- *
- * In full-duplex mode the counter remains constant!
- */
- if ((pAC->GIni.GP[PhysPortIndex].PLinkModeStatus == SK_LMODE_STAT_AUTOFULL) ||
- (pAC->GIni.GP[PhysPortIndex].PLinkModeStatus == SK_LMODE_STAT_FULL)) {
-
- LowVal = 0;
- HighVal = 0;
- }
- else {
- /* Otherwise get contents of hardware register. */
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[SK_PNMI_HTX_DEFFERAL][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- }
- break;
-
- case SK_PNMI_HRX_BADOCTET:
- /* Not supported by XMAC */
- if (MacType == SK_MAC_XMAC) {
- return (Val);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &HighVal);
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex + 1][MacType].Reg,
- &LowVal);
- break;
-
- case SK_PNMI_HTX_OCTETLOW:
- case SK_PNMI_HRX_OCTETLOW:
- case SK_PNMI_HRX_BADOCTETLOW:
- return (Val);
-
- case SK_PNMI_HRX_LONGFRAMES:
- /* For XMAC the SW counter is managed by PNMI */
- if (MacType == SK_MAC_XMAC) {
- return (pPnmiPrt->StatRxLongFrameCts);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
- case SK_PNMI_HRX_TOO_LONG:
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
-
- Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
-
- switch (MacType) {
- case SK_MAC_GMAC:
- /* For GMAC the SW counter is additionally managed by PNMI */
- Val += pPnmiPrt->StatRxFrameTooLongCts;
- break;
-
- case SK_MAC_XMAC:
- /*
- * Frames longer than IEEE 802.3 frame max size are counted
- * by XMAC in frame_too_long counter even reception of long
- * frames was enabled and the frame was correct.
- * So correct the value by subtracting RxLongFrame counter.
- */
- Val -= pPnmiPrt->StatRxLongFrameCts;
- break;
-
- default:
- break;
- }
-
- LowVal = (SK_U32)Val;
- HighVal = (SK_U32)(Val >> 32);
- break;
-
- case SK_PNMI_HRX_SHORTS:
- /* Not supported by GMAC */
- if (MacType == SK_MAC_GMAC) {
- /* GM_RXE_FRAG?? */
- return (Val);
- }
-
- /*
- * XMAC counts short frame errors even if link down (#10620)
- *
- * If link-down the counter remains constant
- */
- if (pAC->GIni.GP[PhysPortIndex].PLinkModeStatus != SK_LMODE_STAT_UNKNOWN) {
-
- /* Otherwise get incremental difference */
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
-
- Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
- Val -= pPnmiPrt->RxShortZeroMark;
-
- LowVal = (SK_U32)Val;
- HighVal = (SK_U32)(Val >> 32);
- }
- break;
-
- case SK_PNMI_HRX_MACC:
- case SK_PNMI_HRX_MACC_UNKWN:
- case SK_PNMI_HRX_BURST:
- case SK_PNMI_HRX_MISSED:
- case SK_PNMI_HRX_FRAMING:
- case SK_PNMI_HRX_CARRIER:
- case SK_PNMI_HRX_IRLENGTH:
- case SK_PNMI_HRX_SYMBOL:
- case SK_PNMI_HRX_CEXT:
- /* Not supported by GMAC */
- if (MacType == SK_MAC_GMAC) {
- /* GM_RXE_FRAG?? */
- return (Val);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
- case SK_PNMI_HRX_PMACC_ERR:
- /* For GMAC the SW counter is managed by PNMI */
- if (MacType == SK_MAC_GMAC) {
- return (pPnmiPrt->StatRxPMaccErr);
- }
-
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
-
- /* SW counter managed by PNMI */
- case SK_PNMI_HTX_SYNC:
- LowVal = (SK_U32)pPnmiPrt->StatSyncCts;
- HighVal = (SK_U32)(pPnmiPrt->StatSyncCts >> 32);
- break;
-
- /* SW counter managed by PNMI */
- case SK_PNMI_HTX_SYNC_OCTET:
- LowVal = (SK_U32)pPnmiPrt->StatSyncOctetsCts;
- HighVal = (SK_U32)(pPnmiPrt->StatSyncOctetsCts >> 32);
- break;
-
- case SK_PNMI_HRX_FCS:
- /*
- * Broadcom filters fcs errors and counts it in
- * Receive Error Counter register
- */
- if (pAC->GIni.GP[PhysPortIndex].PhyType == SK_PHY_BCOM) {
- /* do not read while not initialized (PHY_READ hangs!)*/
- if (pAC->GIni.GP[PhysPortIndex].PState) {
- PHY_READ(IoC, &pAC->GIni.GP[PhysPortIndex],
- PhysPortIndex, PHY_BCOM_RE_CTR,
- &Word);
-
- LowVal = Word;
- }
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- }
- else {
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- }
- break;
-
- default:
- (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
- StatAddr[StatIndex][MacType].Reg,
- &LowVal);
- HighVal = pPnmiPrt->CounterHigh[StatIndex];
- break;
- }
-
- Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
-
- /* Correct value because of possible XMAC reset. XMAC Errata #2 */
- Val += pPnmiPrt->CounterOffset[StatIndex];
-
- return (Val);
-}
-
-/*****************************************************************************
- *
- * ResetCounter - Set all counters and timestamps to zero
- *
- * Description:
- * Notifies other common modules which store statistic data to
- * reset their counters and finally reset our own counters.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void ResetCounter(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-SK_U32 NetIndex)
-{
- unsigned int PhysPortIndex;
- SK_EVPARA EventParam;
-
-
- SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
-
- /* Notify sensor module */
- SkEventQueue(pAC, SKGE_I2C, SK_I2CEV_CLEAR, EventParam);
-
- /* Notify RLMT module */
- EventParam.Para32[0] = NetIndex;
- EventParam.Para32[1] = (SK_U32)-1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STATS_CLEAR, EventParam);
- EventParam.Para32[1] = 0;
-
- /* Notify SIRQ module */
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_CLEAR_STAT, EventParam);
-
- /* Notify CSUM module */
-#ifdef SK_USE_CSUM
- EventParam.Para32[0] = NetIndex;
- EventParam.Para32[1] = (SK_U32)-1;
- SkEventQueue(pAC, SKGE_CSUM, SK_CSUM_EVENT_CLEAR_PROTO_STATS,
- EventParam);
-#endif
-
- /* Clear XMAC statistic */
- for (PhysPortIndex = 0; PhysPortIndex <
- (unsigned int)pAC->GIni.GIMacsFound; PhysPortIndex ++) {
-
- (void)pAC->GIni.GIFunc.pFnMacResetCounter(pAC, IoC, PhysPortIndex);
-
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].CounterHigh,
- 0, sizeof(pAC->Pnmi.Port[PhysPortIndex].CounterHigh));
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
- CounterOffset, 0, sizeof(pAC->Pnmi.Port[
- PhysPortIndex].CounterOffset));
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].StatSyncCts,
- 0, sizeof(pAC->Pnmi.Port[PhysPortIndex].StatSyncCts));
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
- StatSyncOctetsCts, 0, sizeof(pAC->Pnmi.Port[
- PhysPortIndex].StatSyncOctetsCts));
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
- StatRxLongFrameCts, 0, sizeof(pAC->Pnmi.Port[
- PhysPortIndex].StatRxLongFrameCts));
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
- StatRxFrameTooLongCts, 0, sizeof(pAC->Pnmi.Port[
- PhysPortIndex].StatRxFrameTooLongCts));
- SK_MEMSET((char *)&pAC->Pnmi.Port[PhysPortIndex].
- StatRxPMaccErr, 0, sizeof(pAC->Pnmi.Port[
- PhysPortIndex].StatRxPMaccErr));
- }
-
- /*
- * Clear local statistics
- */
- SK_MEMSET((char *)&pAC->Pnmi.VirtualCounterOffset, 0,
- sizeof(pAC->Pnmi.VirtualCounterOffset));
- pAC->Pnmi.RlmtChangeCts = 0;
- pAC->Pnmi.RlmtChangeTime = 0;
- SK_MEMSET((char *)&pAC->Pnmi.RlmtChangeEstimate.EstValue[0], 0,
- sizeof(pAC->Pnmi.RlmtChangeEstimate.EstValue));
- pAC->Pnmi.RlmtChangeEstimate.EstValueIndex = 0;
- pAC->Pnmi.RlmtChangeEstimate.Estimate = 0;
- pAC->Pnmi.Port[NetIndex].TxSwQueueMax = 0;
- pAC->Pnmi.Port[NetIndex].TxRetryCts = 0;
- pAC->Pnmi.Port[NetIndex].RxIntrCts = 0;
- pAC->Pnmi.Port[NetIndex].TxIntrCts = 0;
- pAC->Pnmi.Port[NetIndex].RxNoBufCts = 0;
- pAC->Pnmi.Port[NetIndex].TxNoBufCts = 0;
- pAC->Pnmi.Port[NetIndex].TxUsedDescrNo = 0;
- pAC->Pnmi.Port[NetIndex].RxDeliveredCts = 0;
- pAC->Pnmi.Port[NetIndex].RxOctetsDeliveredCts = 0;
- pAC->Pnmi.Port[NetIndex].ErrRecoveryCts = 0;
-}
-
-/*****************************************************************************
- *
- * GetTrapEntry - Get an entry in the trap buffer
- *
- * Description:
- * The trap buffer stores various events. A user application somehow
- * gets notified that an event occured and retrieves the trap buffer
- * contens (or simply polls the buffer). The buffer is organized as
- * a ring which stores the newest traps at the beginning. The oldest
- * traps are overwritten by the newest ones. Each trap entry has a
- * unique number, so that applications may detect new trap entries.
- *
- * Returns:
- * A pointer to the trap entry
- */
-PNMI_STATIC char* GetTrapEntry(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_U32 TrapId, /* SNMP ID of the trap */
-unsigned int Size) /* Space needed for trap entry */
-{
- unsigned int BufPad = pAC->Pnmi.TrapBufPad;
- unsigned int BufFree = pAC->Pnmi.TrapBufFree;
- unsigned int Beg = pAC->Pnmi.TrapQueueBeg;
- unsigned int End = pAC->Pnmi.TrapQueueEnd;
- char *pBuf = &pAC->Pnmi.TrapBuf[0];
- int Wrap;
- unsigned int NeededSpace;
- unsigned int EntrySize;
- SK_U32 Val32;
- SK_U64 Val64;
-
-
- /* Last byte of entry will get a copy of the entry length */
- Size ++;
-
- /*
- * Calculate needed buffer space */
- if (Beg >= Size) {
-
- NeededSpace = Size;
- Wrap = SK_FALSE;
- }
- else {
- NeededSpace = Beg + Size;
- Wrap = SK_TRUE;
- }
-
- /*
- * Check if enough buffer space is provided. Otherwise
- * free some entries. Leave one byte space between begin
- * and end of buffer to make it possible to detect whether
- * the buffer is full or empty
- */
- while (BufFree < NeededSpace + 1) {
-
- if (End == 0) {
-
- End = SK_PNMI_TRAP_QUEUE_LEN;
- }
-
- EntrySize = (unsigned int)*((unsigned char *)pBuf + End - 1);
- BufFree += EntrySize;
- End -= EntrySize;
-#ifdef DEBUG
- SK_MEMSET(pBuf + End, (char)(-1), EntrySize);
-#endif
- if (End == BufPad) {
-#ifdef DEBUG
- SK_MEMSET(pBuf, (char)(-1), End);
-#endif
- BufFree += End;
- End = 0;
- BufPad = 0;
- }
- }
-
- /*
- * Insert new entry as first entry. Newest entries are
- * stored at the beginning of the queue.
- */
- if (Wrap) {
-
- BufPad = Beg;
- Beg = SK_PNMI_TRAP_QUEUE_LEN - Size;
- }
- else {
- Beg = Beg - Size;
- }
- BufFree -= NeededSpace;
-
- /* Save the current offsets */
- pAC->Pnmi.TrapQueueBeg = Beg;
- pAC->Pnmi.TrapQueueEnd = End;
- pAC->Pnmi.TrapBufPad = BufPad;
- pAC->Pnmi.TrapBufFree = BufFree;
-
- /* Initialize the trap entry */
- *(pBuf + Beg + Size - 1) = (char)Size;
- *(pBuf + Beg) = (char)Size;
- Val32 = (pAC->Pnmi.TrapUnique) ++;
- SK_PNMI_STORE_U32(pBuf + Beg + 1, Val32);
- SK_PNMI_STORE_U32(pBuf + Beg + 1 + sizeof(SK_U32), TrapId);
- Val64 = SK_PNMI_HUNDREDS_SEC(SkOsGetTime(pAC));
- SK_PNMI_STORE_U64(pBuf + Beg + 1 + 2 * sizeof(SK_U32), Val64);
-
- return (pBuf + Beg);
-}
-
-/*****************************************************************************
- *
- * CopyTrapQueue - Copies the trap buffer for the TRAP OID
- *
- * Description:
- * On a query of the TRAP OID the trap buffer contents will be
- * copied continuously to the request buffer, which must be large
- * enough. No length check is performed.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void CopyTrapQueue(
-SK_AC *pAC, /* Pointer to adapter context */
-char *pDstBuf) /* Buffer to which the queued traps will be copied */
-{
- unsigned int BufPad = pAC->Pnmi.TrapBufPad;
- unsigned int Trap = pAC->Pnmi.TrapQueueBeg;
- unsigned int End = pAC->Pnmi.TrapQueueEnd;
- char *pBuf = &pAC->Pnmi.TrapBuf[0];
- unsigned int Len;
- unsigned int DstOff = 0;
-
-
- while (Trap != End) {
-
- Len = (unsigned int)*(pBuf + Trap);
-
- /*
- * Last byte containing a copy of the length will
- * not be copied.
- */
- *(pDstBuf + DstOff) = (char)(Len - 1);
- SK_MEMCPY(pDstBuf + DstOff + 1, pBuf + Trap + 1, Len - 2);
- DstOff += Len - 1;
-
- Trap += Len;
- if (Trap == SK_PNMI_TRAP_QUEUE_LEN) {
-
- Trap = BufPad;
- }
- }
-}
-
-/*****************************************************************************
- *
- * GetTrapQueueLen - Get the length of the trap buffer
- *
- * Description:
- * Evaluates the number of currently stored traps and the needed
- * buffer size to retrieve them.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void GetTrapQueueLen(
-SK_AC *pAC, /* Pointer to adapter context */
-unsigned int *pLen, /* Length in Bytes of all queued traps */
-unsigned int *pEntries) /* Returns number of trapes stored in queue */
-{
- unsigned int BufPad = pAC->Pnmi.TrapBufPad;
- unsigned int Trap = pAC->Pnmi.TrapQueueBeg;
- unsigned int End = pAC->Pnmi.TrapQueueEnd;
- char *pBuf = &pAC->Pnmi.TrapBuf[0];
- unsigned int Len;
- unsigned int Entries = 0;
- unsigned int TotalLen = 0;
-
-
- while (Trap != End) {
-
- Len = (unsigned int)*(pBuf + Trap);
- TotalLen += Len - 1;
- Entries ++;
-
- Trap += Len;
- if (Trap == SK_PNMI_TRAP_QUEUE_LEN) {
-
- Trap = BufPad;
- }
- }
-
- *pEntries = Entries;
- *pLen = TotalLen;
-}
-
-/*****************************************************************************
- *
- * QueueSimpleTrap - Store a simple trap to the trap buffer
- *
- * Description:
- * A simple trap is a trap with now additional data. It consists
- * simply of a trap code.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void QueueSimpleTrap(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_U32 TrapId) /* Type of sensor trap */
-{
- GetTrapEntry(pAC, TrapId, SK_PNMI_TRAP_SIMPLE_LEN);
-}
-
-/*****************************************************************************
- *
- * QueueSensorTrap - Stores a sensor trap in the trap buffer
- *
- * Description:
- * Gets an entry in the trap buffer and fills it with sensor related
- * data.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void QueueSensorTrap(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_U32 TrapId, /* Type of sensor trap */
-unsigned int SensorIndex) /* Index of sensor which caused the trap */
-{
- char *pBuf;
- unsigned int Offset;
- unsigned int DescrLen;
- SK_U32 Val32;
-
-
- /* Get trap buffer entry */
- DescrLen = SK_STRLEN(pAC->I2c.SenTable[SensorIndex].SenDesc);
- pBuf = GetTrapEntry(pAC, TrapId,
- SK_PNMI_TRAP_SENSOR_LEN_BASE + DescrLen);
- Offset = SK_PNMI_TRAP_SIMPLE_LEN;
-
- /* Store additionally sensor trap related data */
- Val32 = OID_SKGE_SENSOR_INDEX;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- *(pBuf + Offset + 4) = 4;
- Val32 = (SK_U32)SensorIndex;
- SK_PNMI_STORE_U32(pBuf + Offset + 5, Val32);
- Offset += 9;
-
- Val32 = (SK_U32)OID_SKGE_SENSOR_DESCR;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- *(pBuf + Offset + 4) = (char)DescrLen;
- SK_MEMCPY(pBuf + Offset + 5, pAC->I2c.SenTable[SensorIndex].SenDesc,
- DescrLen);
- Offset += DescrLen + 5;
-
- Val32 = OID_SKGE_SENSOR_TYPE;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- *(pBuf + Offset + 4) = 1;
- *(pBuf + Offset + 5) = (char)pAC->I2c.SenTable[SensorIndex].SenType;
- Offset += 6;
-
- Val32 = OID_SKGE_SENSOR_VALUE;
- SK_PNMI_STORE_U32(pBuf + Offset, Val32);
- *(pBuf + Offset + 4) = 4;
- Val32 = (SK_U32)pAC->I2c.SenTable[SensorIndex].SenValue;
- SK_PNMI_STORE_U32(pBuf + Offset + 5, Val32);
-}
-
-/*****************************************************************************
- *
- * QueueRlmtNewMacTrap - Store a port switch trap in the trap buffer
- *
- * Description:
- * Nothing further to explain.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void QueueRlmtNewMacTrap(
-SK_AC *pAC, /* Pointer to adapter context */
-unsigned int ActiveMac) /* Index (0..n) of the currently active port */
-{
- char *pBuf;
- SK_U32 Val32;
-
-
- pBuf = GetTrapEntry(pAC, OID_SKGE_TRAP_RLMT_CHANGE_PORT,
- SK_PNMI_TRAP_RLMT_CHANGE_LEN);
-
- Val32 = OID_SKGE_RLMT_PORT_ACTIVE;
- SK_PNMI_STORE_U32(pBuf + SK_PNMI_TRAP_SIMPLE_LEN, Val32);
- *(pBuf + SK_PNMI_TRAP_SIMPLE_LEN + 4) = 1;
- *(pBuf + SK_PNMI_TRAP_SIMPLE_LEN + 5) = (char)ActiveMac;
-}
-
-/*****************************************************************************
- *
- * QueueRlmtPortTrap - Store port related RLMT trap to trap buffer
- *
- * Description:
- * Nothing further to explain.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void QueueRlmtPortTrap(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_U32 TrapId, /* Type of RLMT port trap */
-unsigned int PortIndex) /* Index of the port, which changed its state */
-{
- char *pBuf;
- SK_U32 Val32;
-
-
- pBuf = GetTrapEntry(pAC, TrapId, SK_PNMI_TRAP_RLMT_PORT_LEN);
-
- Val32 = OID_SKGE_RLMT_PORT_INDEX;
- SK_PNMI_STORE_U32(pBuf + SK_PNMI_TRAP_SIMPLE_LEN, Val32);
- *(pBuf + SK_PNMI_TRAP_SIMPLE_LEN + 4) = 1;
- *(pBuf + SK_PNMI_TRAP_SIMPLE_LEN + 5) = (char)PortIndex;
-}
-
-/*****************************************************************************
- *
- * CopyMac - Copies a MAC address
- *
- * Description:
- * Nothing further to explain.
- *
- * Returns:
- * Nothing
- */
-PNMI_STATIC void CopyMac(
-char *pDst, /* Pointer to destination buffer */
-SK_MAC_ADDR *pMac) /* Pointer of Source */
-{
- int i;
-
-
- for (i = 0; i < sizeof(SK_MAC_ADDR); i ++) {
-
- *(pDst + i) = pMac->a[i];
- }
-}
-
-
-#ifdef SK_POWER_MGMT
-/*****************************************************************************
- *
- * PowerManagement - OID handler function of PowerManagement OIDs
- *
- * Description:
- * The code is simple. No description necessary.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was successfully performed.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter.
- */
-
-PNMI_STATIC int PowerManagement(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which to mgmt data will be retrieved */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (1..n) that is to be queried or -1 */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode allways zero */
-{
-
- SK_U32 RetCode = SK_PNMI_ERR_GENERAL;
-
- /*
- * Check instance. We only handle single instance variables
- */
- if (Instance != (SK_U32)(-1) && Instance != 1) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- /*
- * Perform action
- */
- if (Action == SK_PNMI_GET) {
-
- /*
- * Check length
- */
- switch (Id) {
-
- case OID_PNP_CAPABILITIES:
- if (*pLen < sizeof(SK_PNP_CAPABILITIES)) {
-
- *pLen = sizeof(SK_PNP_CAPABILITIES);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_PNP_QUERY_POWER:
- case OID_PNP_ENABLE_WAKE_UP:
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_PNP_SET_POWER:
- case OID_PNP_ADD_WAKE_UP_PATTERN:
- case OID_PNP_REMOVE_WAKE_UP_PATTERN:
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR040,
- SK_PNMI_ERR040MSG);
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Get value
- */
- switch (Id) {
-
- case OID_PNP_CAPABILITIES:
- RetCode = SkPowerQueryPnPCapabilities(pAC, IoC, pBuf, pLen);
- break;
-
- case OID_PNP_QUERY_POWER:
- /* The Windows DDK describes: An OID_PNP_QUERY_POWER requests
- the miniport to indicate whether it can transition its NIC
- to the low-power state.
- A miniport driver must always return NDIS_STATUS_SUCCESS
- to a query of OID_PNP_QUERY_POWER. */
- RetCode = SK_PNMI_ERR_OK;
- break;
-
- /* NDIS handles these OIDs as write-only.
- * So in case of get action the buffer with written length = 0
- * is returned
- */
- case OID_PNP_SET_POWER:
- case OID_PNP_ADD_WAKE_UP_PATTERN:
- case OID_PNP_REMOVE_WAKE_UP_PATTERN:
- *pLen = 0;
- RetCode = SK_PNMI_ERR_OK;
- break;
-
- case OID_PNP_ENABLE_WAKE_UP:
- RetCode = SkPowerGetEnableWakeUp(pAC, IoC, pBuf, pLen);
- break;
-
- default:
- RetCode = SK_PNMI_ERR_GENERAL;
- break;
- }
-
- return (RetCode);
- }
-
- /*
- * From here SET or PRESET action. Check if the passed
- * buffer length is plausible.
- */
- switch (Id) {
- case OID_PNP_SET_POWER:
- case OID_PNP_ENABLE_WAKE_UP:
- if (*pLen < sizeof(SK_U32)) {
-
- *pLen = sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- if (*pLen != sizeof(SK_U32)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- break;
-
- case OID_PNP_ADD_WAKE_UP_PATTERN:
- case OID_PNP_REMOVE_WAKE_UP_PATTERN:
- if (*pLen < sizeof(SK_PM_PACKET_PATTERN)) {
-
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_READ_ONLY);
- }
-
- /*
- * Perform preset or set
- */
-
- /* POWER module does not support PRESET action */
- if (Action == SK_PNMI_PRESET) {
- return (SK_PNMI_ERR_OK);
- }
-
- switch (Id) {
- case OID_PNP_SET_POWER:
- RetCode = SkPowerSetPower(pAC, IoC, pBuf, pLen);
- break;
-
- case OID_PNP_ADD_WAKE_UP_PATTERN:
- RetCode = SkPowerAddWakeUpPattern(pAC, IoC, pBuf, pLen);
- break;
-
- case OID_PNP_REMOVE_WAKE_UP_PATTERN:
- RetCode = SkPowerRemoveWakeUpPattern(pAC, IoC, pBuf, pLen);
- break;
-
- case OID_PNP_ENABLE_WAKE_UP:
- RetCode = SkPowerSetEnableWakeUp(pAC, IoC, pBuf, pLen);
- break;
-
- default:
- RetCode = SK_PNMI_ERR_GENERAL;
- }
-
- return (RetCode);
-}
-#endif /* SK_POWER_MGMT */
-
-
-/*****************************************************************************
- *
- * Vct - OID handler function of OIDs
- *
- * Description:
- * The code is simple. No description necessary.
- *
- * Returns:
- * SK_PNMI_ERR_OK The request was performed successfully.
- * SK_PNMI_ERR_GENERAL A general severe internal error occured.
- * SK_PNMI_ERR_TOO_SHORT The passed buffer is too short to contain
- * the correct data (e.g. a 32bit value is
- * needed, but a 16 bit value was passed).
- * SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
- * exist (e.g. port instance 3 on a two port
- * adapter).
- * SK_PNMI_ERR_READ_ONLY Only the Get action is allowed.
- *
- */
-
-PNMI_STATIC int Vct(
-SK_AC *pAC, /* Pointer to adapter context */
-SK_IOC IoC, /* IO context handle */
-int Action, /* Get/PreSet/Set action */
-SK_U32 Id, /* Object ID that is to be processed */
-char *pBuf, /* Buffer to which the mgmt data will be copied */
-unsigned int *pLen, /* On call: buffer length. On return: used buffer */
-SK_U32 Instance, /* Instance (-1,2..n) that is to be queried */
-unsigned int TableIndex, /* Index to the Id table */
-SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
-{
- SK_GEPORT *pPrt;
- SK_PNMI_VCT *pVctBackupData;
- SK_U32 LogPortMax;
- SK_U32 PhysPortMax;
- SK_U32 PhysPortIndex;
- SK_U32 Limit;
- SK_U32 Offset;
- SK_BOOL Link;
- SK_U32 RetCode = SK_PNMI_ERR_GENERAL;
- int i;
- SK_EVPARA Para;
- SK_U32 CableLength;
-
- /*
- * Calculate the port indexes from the instance.
- */
- PhysPortMax = pAC->GIni.GIMacsFound;
- LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
-
- /* Dual net mode? */
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- LogPortMax--;
- }
-
- if ((Instance != (SK_U32) (-1))) {
- /* Check instance range. */
- if ((Instance < 2) || (Instance > LogPortMax)) {
- *pLen = 0;
- return (SK_PNMI_ERR_UNKNOWN_INST);
- }
-
- if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
- PhysPortIndex = NetIndex;
- }
- else {
- PhysPortIndex = Instance - 2;
- }
- Limit = PhysPortIndex + 1;
- }
- else { /*
- * Instance == (SK_U32) (-1), get all Instances of that OID.
- *
- * Not implemented yet. May be used in future releases.
- */
- PhysPortIndex = 0;
- Limit = PhysPortMax;
- }
-
- pPrt = &pAC->GIni.GP[PhysPortIndex];
- if (pPrt->PHWLinkUp) {
- Link = SK_TRUE;
- }
- else {
- Link = SK_FALSE;
- }
-
- /*
- * Check MAC type.
- */
- if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /* Initialize backup data pointer. */
- pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
-
- /*
- * Check action type.
- */
- if (Action == SK_PNMI_GET) {
- /*
- * Check length.
- */
- switch (Id) {
-
- case OID_SKGE_VCT_GET:
- if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_PNMI_VCT)) {
- *pLen = (Limit - PhysPortIndex) * sizeof(SK_PNMI_VCT);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- case OID_SKGE_VCT_STATUS:
- if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U8)) {
- *pLen = (Limit - PhysPortIndex) * sizeof(SK_U8);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Get value.
- */
- Offset = 0;
- for (; PhysPortIndex < Limit; PhysPortIndex++) {
- switch (Id) {
-
- case OID_SKGE_VCT_GET:
- if ((Link == SK_FALSE) &&
- (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING)) {
- RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_FALSE);
- if (RetCode == 0) {
- pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_PENDING;
- pAC->Pnmi.VctStatus[PhysPortIndex] |=
- (SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_TEST_DONE);
-
- /* Copy results for later use to PNMI struct. */
- for (i = 0; i < 4; i++) {
- if (pPrt->PMdiPairSts[i] == SK_PNMI_VCT_NORMAL_CABLE) {
- if ((pPrt->PMdiPairLen[i] > 35) && (pPrt->PMdiPairLen[i] < 0xff)) {
- pPrt->PMdiPairSts[i] = SK_PNMI_VCT_IMPEDANCE_MISMATCH;
- }
- }
- if ((pPrt->PMdiPairLen[i] > 35) && (pPrt->PMdiPairLen[i] != 0xff)) {
- CableLength = 1000 * (((175 * pPrt->PMdiPairLen[i]) / 210) - 28);
- }
- else {
- CableLength = 0;
- }
- pVctBackupData->PMdiPairLen[i] = CableLength;
- pVctBackupData->PMdiPairSts[i] = pPrt->PMdiPairSts[i];
- }
-
- Para.Para32[0] = PhysPortIndex;
- Para.Para32[1] = -1;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
- SkEventDispatcher(pAC, IoC);
- }
- else {
- ; /* VCT test is running. */
- }
- }
-
- /* Get all results. */
- CheckVctStatus(pAC, IoC, pBuf, Offset, PhysPortIndex);
- Offset += sizeof(SK_U8);
- *(pBuf + Offset) = pPrt->PCableLen;
- Offset += sizeof(SK_U8);
- for (i = 0; i < 4; i++) {
- SK_PNMI_STORE_U32((pBuf + Offset), pVctBackupData->PMdiPairLen[i]);
- Offset += sizeof(SK_U32);
- }
- for (i = 0; i < 4; i++) {
- *(pBuf + Offset) = pVctBackupData->PMdiPairSts[i];
- Offset += sizeof(SK_U8);
- }
-
- RetCode = SK_PNMI_ERR_OK;
- break;
-
- case OID_SKGE_VCT_STATUS:
- CheckVctStatus(pAC, IoC, pBuf, Offset, PhysPortIndex);
- Offset += sizeof(SK_U8);
- RetCode = SK_PNMI_ERR_OK;
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- } /* for */
- *pLen = Offset;
- return (RetCode);
-
- } /* if SK_PNMI_GET */
-
- /*
- * From here SET or PRESET action. Check if the passed
- * buffer length is plausible.
- */
-
- /*
- * Check length.
- */
- switch (Id) {
- case OID_SKGE_VCT_SET:
- if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U32)) {
- *pLen = (Limit - PhysPortIndex) * sizeof(SK_U32);
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- /*
- * Perform preset or set.
- */
-
- /* VCT does not support PRESET action. */
- if (Action == SK_PNMI_PRESET) {
- return (SK_PNMI_ERR_OK);
- }
-
- Offset = 0;
- for (; PhysPortIndex < Limit; PhysPortIndex++) {
- switch (Id) {
- case OID_SKGE_VCT_SET: /* Start VCT test. */
- if (Link == SK_FALSE) {
- SkGeStopPort(pAC, IoC, PhysPortIndex, SK_STOP_ALL, SK_SOFT_RST);
-
- RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_TRUE);
- if (RetCode == 0) { /* RetCode: 0 => Start! */
- pAC->Pnmi.VctStatus[PhysPortIndex] |= SK_PNMI_VCT_PENDING;
- pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_NEW_VCT_DATA;
- pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_LINK;
-
- /*
- * Start VCT timer counter.
- */
- SK_MEMSET((char *) &Para, 0, sizeof(Para));
- Para.Para32[0] = PhysPortIndex;
- Para.Para32[1] = -1;
- SkTimerStart(pAC, IoC, &pAC->Pnmi.VctTimeout[PhysPortIndex].VctTimer,
- 4000000, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Para);
- SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
- RetCode = SK_PNMI_ERR_OK;
- }
- else { /* RetCode: 2 => Running! */
- SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
- RetCode = SK_PNMI_ERR_OK;
- }
- }
- else { /* RetCode: 4 => Link! */
- RetCode = 4;
- SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
- RetCode = SK_PNMI_ERR_OK;
- }
- Offset += sizeof(SK_U32);
- break;
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- } /* for */
- *pLen = Offset;
- return (RetCode);
-
-} /* Vct */
-
-
-PNMI_STATIC void CheckVctStatus(
-SK_AC *pAC,
-SK_IOC IoC,
-char *pBuf,
-SK_U32 Offset,
-SK_U32 PhysPortIndex)
-{
- SK_GEPORT *pPrt;
- SK_PNMI_VCT *pVctData;
- SK_U32 RetCode;
- SK_U8 LinkSpeedUsed;
-
- pPrt = &pAC->GIni.GP[PhysPortIndex];
-
- pVctData = (SK_PNMI_VCT *) (pBuf + Offset);
- pVctData->VctStatus = SK_PNMI_VCT_NONE;
-
- if (!pPrt->PHWLinkUp) {
-
- /* Was a VCT test ever made before? */
- if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_TEST_DONE) {
- if ((pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_LINK)) {
- pVctData->VctStatus |= SK_PNMI_VCT_OLD_VCT_DATA;
- }
- else {
- pVctData->VctStatus |= SK_PNMI_VCT_NEW_VCT_DATA;
- }
- }
-
- /* Check VCT test status. */
- RetCode = SkGmCableDiagStatus(pAC,IoC, PhysPortIndex, SK_FALSE);
- if (RetCode == 2) { /* VCT test is running. */
- pVctData->VctStatus |= SK_PNMI_VCT_RUNNING;
- }
- else { /* VCT data was copied to pAC here. Check PENDING state. */
- if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING) {
- pVctData->VctStatus |= SK_PNMI_VCT_NEW_VCT_DATA;
- }
- }
-
- if (pPrt->PCableLen != 0xff) { /* Old DSP value. */
- pVctData->VctStatus |= SK_PNMI_VCT_OLD_DSP_DATA;
- }
- }
- else {
-
- /* Was a VCT test ever made before? */
- if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_TEST_DONE) {
- pVctData->VctStatus &= ~SK_PNMI_VCT_NEW_VCT_DATA;
- pVctData->VctStatus |= SK_PNMI_VCT_OLD_VCT_DATA;
- }
-
- /* DSP only valid in 100/1000 modes. */
- LinkSpeedUsed = pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed;
- if (LinkSpeedUsed != SK_LSPEED_STAT_10MBPS) {
- pVctData->VctStatus |= SK_PNMI_VCT_NEW_DSP_DATA;
- }
- }
-
-} /* CheckVctStatus */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skgesirq.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.83 $
- * Date: $Date: 2003/02/05 15:10:59 $
- * Purpose: Special IRQ module
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skgesirq.c,v $
- * Revision 1.83 2003/02/05 15:10:59 rschmidt
- * Fixed setting of PLinkSpeedUsed in SkHWLinkUp() when
- * auto-negotiation is disabled.
- * Editorial changes.
- *
- * Revision 1.82 2003/01/29 13:34:33 rschmidt
- * Added some typecasts to avoid compiler warnings.
- *
- * Revision 1.81 2002/12/05 10:49:51 rschmidt
- * Fixed missing Link Down Event for fiber (Bug Id #10768)
- * Added reading of cable length when link is up
- * Removed testing of unused error bits in PHY ISR
- * Editorial changes.
- *
- * Revision 1.80 2002/11/12 17:15:21 rschmidt
- * Replaced SkPnmiGetVar() by ...MacStatistic() in SkMacParity().
- * Editorial changes.
- *
- * Revision 1.79 2002/10/14 15:14:51 rschmidt
- * Changed clearing of IS_M1_PAR_ERR (MAC 1 Parity Error) in
- * SkMacParity() depending on GIChipRev (HW-Bug #8).
- * Added error messages for GPHY Auto-Negotiation Error and
- * FIFO Overflow/Underrun in SkPhyIsrGmac().
- * Editorial changes.
- *
- * Revision 1.78 2002/10/10 15:54:29 mkarl
- * changes for PLinkSpeedUsed
- *
- * Revision 1.77 2002/09/12 08:58:51 rwahl
- * Retrieve counters needed for XMAC errata workarounds directly because
- * PNMI returns corrected counter values (e.g. #10620).
- *
- * Revision 1.76 2002/08/16 15:21:54 rschmidt
- * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
- * Replaced wrong 1st para pAC with IoC in SK_IN/OUT macros.
- * Editorial changes.
- *
- * Revision 1.75 2002/08/12 13:50:47 rschmidt
- * Changed clearing of IS_M1_PAR_ERR (MAC 1 Parity Error) in
- * SkMacParity() by GMF_CLI_TX_FC instead of GMF_CLI_TX_PE (HW-Bug #8).
- * Added clearing of IS_IRQ_TIST_OV and IS_IRQ_SENSOR in SkGeHwErr().
- * Corrected handling of Link Up and Auto-Negotiation Over for GPHY.
- * in SkGePortCheckUpGmac().
- * Editorial changes.
- *
- * Revision 1.74 2002/08/08 16:17:04 rschmidt
- * Added PhyType check for SK_HWEV_SET_ROLE event (copper only)
- * Changed Link Up check reading PHY Specific Status (YUKON)
- * Editorial changes
- *
- * Revision 1.73 2002/07/15 18:36:53 rwahl
- * Editorial changes.
- *
- * Revision 1.72 2002/07/15 15:46:26 rschmidt
- * Added new event: SK_HWEV_SET_SPEED
- * Editorial changes
- *
- * Revision 1.71 2002/06/10 09:34:19 rschmidt
- * Editorial changes
- *
- * Revision 1.70 2002/06/05 08:29:18 rschmidt
- * SkXmRxTxEnable() replaced by SkMacRxTxEnable().
- * Editorial changes.
- *
- * Revision 1.69 2002/04/25 13:03:49 rschmidt
- * Changes for handling YUKON.
- * Use of #ifdef OTHER_PHY to eliminate code for unused Phy types.
- * Replaced all XMAC-access macros by functions: SkMacRxTxDisable(),
- * SkMacIrqDisable().
- * Added handling for GMAC FIFO in SkMacParity().
- * Replaced all SkXm...() functions with SkMac...() to handle also
- * YUKON's GMAC.
- * Macros for XMAC PHY access PHY_READ(), PHY_WRITE() replaced
- * by functions SkXmPhyRead(), SkXmPhyWrite().
- * Disabling all PHY interrupts moved to SkMacIrqDisable().
- * Added handling for GPHY IRQ in SkGeSirqIsr().
- * Removed status parameter from MAC IRQ handler SkMacIrq().
- * Added SkGePortCheckUpGmac(), SkPhyIsrGmac() for GMAC.
- * Editorial changes
- *
- * Revision 1.68 2002/02/26 15:24:53 rwahl
- * Fix: no link with manual configuration (#10673). The previous fix for
- * #10639 was removed. So for RLMT mode = CLS the RLMT may switch to
- * misconfigured port. It should not occur for the other RLMT modes.
- *
- * Revision 1.67 2001/11/20 09:19:58 rwahl
- * Reworked bugfix #10639 (no dependency to RLMT mode).
- *
- * Revision 1.66 2001/10/26 07:52:53 afischer
- * Port switching bug in `check local link` mode
- *
- * Revision 1.65 2001/02/23 13:41:51 gklug
- * fix: PHYS2INST should be used correctly for Dual Net operation
- * chg: do no longer work with older PNMI
- *
- * Revision 1.64 2001/02/15 11:27:04 rassmann
- * Working with RLMT v1 if SK_MAX_NETS undefined.
- *
- * Revision 1.63 2001/02/06 10:44:23 mkunz
- * - NetIndex added to interface functions of pnmi V4 with dual net support
- *
- * Revision 1.62 2001/01/31 15:31:41 gklug
- * fix: problem with autosensing an SR8800 switch
- *
- * Revision 1.61 2000/11/09 11:30:09 rassmann
- * WA: Waiting after releasing reset until BCom chip is accessible.
- *
- * Revision 1.60 2000/10/18 12:37:48 cgoos
- * Reinserted the comment for version 1.56.
- *
- * Revision 1.59 2000/10/18 12:22:20 cgoos
- * Added workaround for half duplex hangup.
- *
- * Revision 1.58 2000/09/28 13:06:04 gklug
- * fix: BCom may NOT be touched if XMAC is in RESET state
- *
- * Revision 1.57 2000/09/08 12:38:39 cgoos
- * Added forgotten variable declaration.
- *
- * Revision 1.56 2000/09/08 08:12:13 cgoos
- * Changed handling of parity errors in SkGeHwErr (correct reset of error).
- *
- * Revision 1.55 2000/06/19 08:36:25 cgoos
- * Changed comment.
- *
- * Revision 1.54 2000/05/22 08:45:57 malthoff
- * Fix: #10523 is valid for all BCom PHYs.
- *
- * Revision 1.53 2000/05/19 10:20:30 cgoos
- * Removed Solaris debug output code.
- *
- * Revision 1.52 2000/05/19 10:19:37 cgoos
- * Added PHY state check in HWLinkDown.
- * Move PHY interrupt code to IS_EXT_REG case in SkGeSirqIsr.
- *
- * Revision 1.51 2000/05/18 05:56:20 cgoos
- * Fixed typo.
- *
- * Revision 1.50 2000/05/17 12:49:49 malthoff
- * Fixes BCom link bugs (#10523).
- *
- * Revision 1.49 1999/12/17 11:02:50 gklug
- * fix: read PHY_STAT of Broadcom chip more often to assure good status
- *
- * Revision 1.48 1999/12/06 10:01:17 cgoos
- * Added SET function for Role.
- *
- * Revision 1.47 1999/11/22 13:34:24 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.46 1999/09/16 10:30:07 cgoos
- * Removed debugging output statement from Linux.
- *
- * Revision 1.45 1999/09/16 07:32:55 cgoos
- * Fixed dual-port copperfield bug (PHY_READ from resetted port).
- * Removed some unused variables.
- *
- * Revision 1.44 1999/08/03 15:25:04 cgoos
- * Removed workaround for disabled interrupts in half duplex mode.
- *
- * Revision 1.43 1999/08/03 14:27:58 cgoos
- * Removed SENSE mode code from SkGePortCheckUpBcom.
- *
- * Revision 1.42 1999/07/26 09:16:54 cgoos
- * Added some typecasts to avoid compiler warnings.
- *
- * Revision 1.41 1999/05/19 07:28:59 cgoos
- * Changes for 1000Base-T.
- *
- * Revision 1.40 1999/04/08 13:59:39 gklug
- * fix: problem with 3Com switches endless RESTARTs
- *
- * Revision 1.39 1999/03/08 10:10:52 gklug
- * fix: AutoSensing did switch to next mode even if LiPa indicated offline
- *
- * Revision 1.38 1999/03/08 09:49:03 gklug
- * fix: Bug using pAC instead of IoC, causing AIX problems
- * fix: change compare for Linux compiler bug workaround
- *
- * Revision 1.37 1999/01/28 14:51:33 gklug
- * fix: monitor for autosensing and extra RESETS the RX on wire counters
- *
- * Revision 1.36 1999/01/22 09:19:55 gklug
- * fix: Init DupMode and InitPauseMd are now called in RxTxEnable
- *
- * Revision 1.35 1998/12/11 15:22:59 gklug
- * chg: autosensing: check for receive if manual mode was guessed
- * chg: simplified workaround for XMAC errata
- * chg: wait additional 100 ms before link goes up.
- * chg: autoneg timeout to 600 ms
- * chg: restart autoneg even if configured to autonegotiation
- *
- * Revision 1.34 1998/12/10 10:33:14 gklug
- * add: more debug messages
- * fix: do a new InitPhy if link went down (AutoSensing problem)
- * chg: Check for zero shorts if link is NOT up
- * chg: reset Port if link goes down
- * chg: wait additional 100 ms when link comes up to check shorts
- * fix: dummy read extended autoneg status to prevent link going down immediately
- *
- * Revision 1.33 1998/12/07 12:18:29 gklug
- * add: refinement of autosense mode: take into account the autoneg cap of LiPa
- *
- * Revision 1.32 1998/12/07 07:11:21 gklug
- * fix: compiler warning
- *
- * Revision 1.31 1998/12/02 09:29:05 gklug
- * fix: WA XMAC Errata: FCSCt check was not correct.
- * fix: WA XMAC Errata: Prec Counter were NOT updated in case of short checks.
- * fix: Clear Stat : now clears the Prev counters of all known Ports
- *
- * Revision 1.30 1998/12/01 10:54:15 gklug
- * dd: workaround for XMAC errata changed. Check RX count and CRC err Count, too.
- *
- * Revision 1.29 1998/12/01 10:01:53 gklug
- * fix: if MAC IRQ occurs during port down, this will be handled correctly
- *
- * Revision 1.28 1998/11/26 16:22:11 gklug
- * fix: bug in autosense if manual modes are used
- *
- * Revision 1.27 1998/11/26 15:50:06 gklug
- * fix: PNMI needs to set PLinkModeConf
- *
- * Revision 1.26 1998/11/26 14:51:58 gklug
- * add: AutoSensing functionalty
- *
- * Revision 1.25 1998/11/26 07:34:37 gklug
- * fix: Init PrevShorts when restarting port due to Link connection
- *
- * Revision 1.24 1998/11/25 10:57:32 gklug
- * fix: remove unreferenced local vars
- *
- * Revision 1.23 1998/11/25 08:26:40 gklug
- * fix: don't do a RESET on a starting or stopping port
- *
- * Revision 1.22 1998/11/24 13:29:44 gklug
- * add: Workaround for MAC parity errata
- *
- * Revision 1.21 1998/11/18 15:31:06 gklug
- * fix: lint bugs
- *
- * Revision 1.20 1998/11/18 12:58:54 gklug
- * fix: use PNMI query instead of hardware access
- *
- * Revision 1.19 1998/11/18 12:54:55 gklug
- * chg: add new workaround for XMAC Errata
- * add: short event counter monitoring on active link too
- *
- * Revision 1.18 1998/11/13 14:27:41 malthoff
- * Bug Fix: Packet Arbiter Timeout was not cleared correctly
- * for timeout on TX1 and TX2.
- *
- * Revision 1.17 1998/11/04 07:01:59 cgoos
- * Moved HW link poll sequence.
- * Added call to SkXmRxTxEnable.
- *
- * Revision 1.16 1998/11/03 13:46:03 gklug
- * add: functionality of SET_LMODE and SET_FLOW_MODE
- * fix: send RLMT LinkDown event when Port stop is given with LinkUp
- *
- * Revision 1.15 1998/11/03 12:56:47 gklug
- * fix: Needs more events
- *
- * Revision 1.14 1998/10/30 07:36:35 gklug
- * rmv: unnecessary code
- *
- * Revision 1.13 1998/10/29 15:21:57 gklug
- * add: Poll link feature for activating HW link
- * fix: Deactivate HWLink when Port STOP is given
- *
- * Revision 1.12 1998/10/28 07:38:57 cgoos
- * Checking link status at begin of SkHWLinkUp.
- *
- * Revision 1.11 1998/10/22 09:46:50 gklug
- * fix SysKonnectFileId typo
- *
- * Revision 1.10 1998/10/14 13:57:47 gklug
- * add: Port start/stop event
- *
- * Revision 1.9 1998/10/14 05:48:29 cgoos
- * Added definition for Para.
- *
- * Revision 1.8 1998/10/14 05:40:09 gklug
- * add: Hardware Linkup signal used
- *
- * Revision 1.7 1998/10/09 06:50:20 malthoff
- * Remove ID_sccs by SysKonnectFileId.
- *
- * Revision 1.6 1998/10/08 09:11:49 gklug
- * add: clear IRQ commands
- *
- * Revision 1.5 1998/10/02 14:27:35 cgoos
- * Fixed some typos and wrong event names.
- *
- * Revision 1.4 1998/10/02 06:24:17 gklug
- * add: HW error function
- * fix: OUT macros
- *
- * Revision 1.3 1998/10/01 07:03:00 gklug
- * add: ISR for the usual interrupt source register
- *
- * Revision 1.2 1998/09/03 13:50:33 gklug
- * add: function prototypes
- *
- * Revision 1.1 1998/08/27 11:50:21 gklug
- * initial revision
- *
- *
- *
- ******************************************************************************/
-
-#include <config.h>
-
-/*
- * Special Interrupt handler
- *
- * The following abstract should show how this module is included
- * in the driver path:
- *
- * In the ISR of the driver the bits for frame transmission complete and
- * for receive complete are checked and handled by the driver itself.
- * The bits of the slow path mask are checked after that and then the
- * entry into the so-called "slow path" is prepared. It is an implementors
- * decision whether this is executed directly or just scheduled by
- * disabling the mask. In the interrupt service routine some events may be
- * generated, so it would be a good idea to call the EventDispatcher
- * right after this ISR.
- *
- * The Interrupt source register of the adapter is NOT read by this module.
- * SO if the drivers implementor needs a while loop around the
- * slow data paths interrupt bits, he needs to call the SkGeSirqIsr() for
- * each loop entered.
- *
- * However, the MAC Interrupt status registers are read in a while loop.
- *
- */
-
-static const char SysKonnectFileId[] =
- "$Id: skgesirq.c,v 1.83 2003/02/05 15:10:59 rschmidt Exp $" ;
-
-#include "h/skdrv1st.h" /* Driver Specific Definitions */
-#include "h/skgepnmi.h" /* PNMI Definitions */
-#include "h/skrlmt.h" /* RLMT Definitions */
-#include "h/skdrv2nd.h" /* Adapter Control and Driver specific Def. */
-
-/* local function prototypes */
-static int SkGePortCheckUpXmac(SK_AC*, SK_IOC, int);
-static int SkGePortCheckUpBcom(SK_AC*, SK_IOC, int);
-static int SkGePortCheckUpGmac(SK_AC*, SK_IOC, int);
-static void SkPhyIsrBcom(SK_AC*, SK_IOC, int, SK_U16);
-static void SkPhyIsrGmac(SK_AC*, SK_IOC, int, SK_U16);
-#ifdef OTHER_PHY
-static int SkGePortCheckUpLone(SK_AC*, SK_IOC, int);
-static int SkGePortCheckUpNat(SK_AC*, SK_IOC, int);
-static void SkPhyIsrLone(SK_AC*, SK_IOC, int, SK_U16);
-#endif /* OTHER_PHY */
-
-/*
- * array of Rx counter from XMAC which are checked
- * in AutoSense mode to check whether a link is not able to auto-negotiate.
- */
-static const SK_U16 SkGeRxRegs[]= {
- XM_RXF_64B,
- XM_RXF_127B,
- XM_RXF_255B,
- XM_RXF_511B,
- XM_RXF_1023B,
- XM_RXF_MAX_SZ
-} ;
-
-#ifdef __C2MAN__
-/*
- * Special IRQ function
- *
- * General Description:
- *
- */
-intro()
-{}
-#endif
-
-/* Define return codes of SkGePortCheckUp and CheckShort */
-#define SK_HW_PS_NONE 0 /* No action needed */
-#define SK_HW_PS_RESTART 1 /* Restart needed */
-#define SK_HW_PS_LINK 2 /* Link Up actions needed */
-
-/******************************************************************************
- *
- * SkHWInitDefSense() - Default Autosensing mode initialization
- *
- * Description: sets the PLinkMode for HWInit
- *
- * Returns: N/A
- */
-static void SkHWInitDefSense(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- pPrt = &pAC->GIni.GP[Port];
-
- pPrt->PAutoNegTimeOut = 0;
-
- if (pPrt->PLinkModeConf != SK_LMODE_AUTOSENSE) {
- pPrt->PLinkMode = pPrt->PLinkModeConf;
- return;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("AutoSensing: First mode %d on Port %d\n",
- (int)SK_LMODE_AUTOFULL, Port));
-
- pPrt->PLinkMode = SK_LMODE_AUTOFULL;
-
- return;
-} /* SkHWInitDefSense */
-
-
-/******************************************************************************
- *
- * SkHWSenseGetNext() - Get Next Autosensing Mode
- *
- * Description: gets the appropriate next mode
- *
- * Note:
- *
- */
-SK_U8 SkHWSenseGetNext(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- pPrt = &pAC->GIni.GP[Port];
-
- pPrt->PAutoNegTimeOut = 0;
-
- if (pPrt->PLinkModeConf != SK_LMODE_AUTOSENSE) {
- /* Leave all as configured */
- return(pPrt->PLinkModeConf);
- }
-
- if (pPrt->PLinkMode == SK_LMODE_AUTOFULL) {
- /* Return next mode AUTOBOTH */
- return(SK_LMODE_AUTOBOTH);
- }
-
- /* Return default autofull */
- return(SK_LMODE_AUTOFULL);
-} /* SkHWSenseGetNext */
-
-
-/******************************************************************************
- *
- * SkHWSenseSetNext() - Autosensing Set next mode
- *
- * Description: sets the appropriate next mode
- *
- * Returns: N/A
- */
-void SkHWSenseSetNext(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U8 NewMode) /* New Mode to be written in sense mode */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- pPrt = &pAC->GIni.GP[Port];
-
- pPrt->PAutoNegTimeOut = 0;
-
- if (pPrt->PLinkModeConf != SK_LMODE_AUTOSENSE) {
- return;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("AutoSensing: next mode %d on Port %d\n",
- (int)NewMode, Port));
-
- pPrt->PLinkMode = NewMode;
-
- return;
-} /* SkHWSenseSetNext */
-
-
-/******************************************************************************
- *
- * SkHWLinkDown() - Link Down handling
- *
- * Description: handles the hardware link down signal
- *
- * Returns: N/A
- */
-void SkHWLinkDown(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Disable all MAC interrupts */
- SkMacIrqDisable(pAC, IoC, Port);
-
- /* Disable Receiver and Transmitter */
- SkMacRxTxDisable(pAC, IoC, Port);
-
- /* Init default sense mode */
- SkHWInitDefSense(pAC, IoC, Port);
-
- if (!pPrt->PHWLinkUp) {
- return;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link down Port %d\n", Port));
-
- /* Set Link to DOWN */
- pPrt->PHWLinkUp = SK_FALSE;
-
- /* Reset Port stati */
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_INDETERMINATED;
-
- /* Re-init Phy especially when the AutoSense default is set now */
- SkMacInitPhy(pAC, IoC, Port, SK_FALSE);
-
- /* GP0: used for workaround of Rev. C Errata 2 */
-
- /* Do NOT signal to RLMT */
-
- /* Do NOT start the timer here */
-} /* SkHWLinkDown */
-
-
-/******************************************************************************
- *
- * SkHWLinkUp() - Link Up handling
- *
- * Description: handles the hardware link up signal
- *
- * Returns: N/A
- */
-void SkHWLinkUp(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PHWLinkUp) {
- /* We do NOT need to proceed on active link */
- return;
- }
-
- pPrt->PHWLinkUp = SK_TRUE;
- pPrt->PAutoNegFail = SK_FALSE;
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
-
- if (pPrt->PLinkMode != SK_LMODE_AUTOHALF &&
- pPrt->PLinkMode != SK_LMODE_AUTOFULL &&
- pPrt->PLinkMode != SK_LMODE_AUTOBOTH) {
- /* Link is up and no Auto-negotiation should be done */
-
- /* Link speed should be the configured one */
- switch (pPrt->PLinkSpeed) {
- case SK_LSPEED_AUTO:
- /* default is 1000 Mbps */
- case SK_LSPEED_1000MBPS:
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
- break;
- case SK_LSPEED_100MBPS:
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_100MBPS;
- break;
- case SK_LSPEED_10MBPS:
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_10MBPS;
- break;
- }
-
- /* Set Link Mode Status */
- if (pPrt->PLinkMode == SK_LMODE_FULL) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_FULL;
- }
- else {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_HALF;
- }
-
- /* No flow control without auto-negotiation */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
-
- /* enable Rx/Tx */
- SkMacRxTxEnable(pAC, IoC, Port);
- }
-} /* SkHWLinkUp */
-
-
-/******************************************************************************
- *
- * SkMacParity() - MAC parity workaround
- *
- * Description: handles MAC parity errors correctly
- *
- * Returns: N/A
- */
-static void SkMacParity(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index of the port failed */
-{
- SK_EVPARA Para;
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- SK_U32 TxMax; /* TxMax Counter */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Clear IRQ Tx Parity Error */
- if (pAC->GIni.GIGenesis) {
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_PERR);
- }
- else {
- /* HW-Bug #8: cleared by GMF_CLI_TX_FC instead of GMF_CLI_TX_PE */
- SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T),
- (SK_U8)((pAC->GIni.GIChipRev == 0) ? GMF_CLI_TX_FC : GMF_CLI_TX_PE));
- }
-
- if (pPrt->PCheckPar) {
- if (Port == MAC_1) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E016, SKERR_SIRQ_E016MSG);
- }
- else {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E017, SKERR_SIRQ_E017MSG);
- }
- Para.Para64 = Port;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = Port;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
-
- return;
- }
-
- /* Check whether frames with a size of 1k were sent */
- if (pAC->GIni.GIGenesis) {
- /* Snap statistic counters */
- (void)SkXmUpdateStats(pAC, IoC, Port);
-
- (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXF_MAX_SZ, &TxMax);
- }
- else {
- (void)SkGmMacStatistic(pAC, IoC, Port, GM_TXF_1518B, &TxMax);
- }
-
- if (TxMax > 0) {
- /* From now on check the parity */
- pPrt->PCheckPar = SK_TRUE;
- }
-} /* SkMacParity */
-
-
-/******************************************************************************
- *
- * SkGeHwErr() - Hardware Error service routine
- *
- * Description: handles all HW Error interrupts
- *
- * Returns: N/A
- */
-static void SkGeHwErr(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-SK_U32 HwStatus) /* Interrupt status word */
-{
- SK_EVPARA Para;
- SK_U16 Word;
-
- if ((HwStatus & (IS_IRQ_MST_ERR | IS_IRQ_STAT)) != 0) {
- /* PCI Errors occured */
- if ((HwStatus & IS_IRQ_STAT) != 0) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E013, SKERR_SIRQ_E013MSG);
- }
- else {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E012, SKERR_SIRQ_E012MSG);
- }
-
- /* Reset all bits in the PCI STATUS register */
- SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
- SK_OUT16(IoC, PCI_C(PCI_STATUS), Word | PCI_ERRBITS);
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- Para.Para64 = 0;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
- }
-
- if (pAC->GIni.GIGenesis) {
- if ((HwStatus & IS_NO_STAT_M1) != 0) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_1, RX_MFF_CTRL1), MFF_CLR_INSTAT);
- }
-
- if ((HwStatus & IS_NO_STAT_M2) != 0) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_2, RX_MFF_CTRL1), MFF_CLR_INSTAT);
- }
-
- if ((HwStatus & IS_NO_TIST_M1) != 0) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_1, RX_MFF_CTRL1), MFF_CLR_INTIST);
- }
-
- if ((HwStatus & IS_NO_TIST_M2) != 0) {
- /* Ignore it */
- /* This situation is also indicated in the descriptor */
- SK_OUT16(IoC, MR_ADDR(MAC_2, RX_MFF_CTRL1), MFF_CLR_INTIST);
- }
- }
- else { /* YUKON */
- /* This is necessary only for Rx timing measurements */
- if ((HwStatus & IS_IRQ_TIST_OV) != 0) {
- /* Clear Time Stamp Timer IRQ */
- SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8)GMT_ST_CLR_IRQ);
- }
-
- if ((HwStatus & IS_IRQ_SENSOR) != 0) {
- /* Clear I2C IRQ */
- SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
- }
- }
-
- if ((HwStatus & IS_RAM_RD_PAR) != 0) {
- SK_OUT16(IoC, B3_RI_CTRL, RI_CLR_RD_PERR);
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E014, SKERR_SIRQ_E014MSG);
- Para.Para64 = 0;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
- }
-
- if ((HwStatus & IS_RAM_WR_PAR) != 0) {
- SK_OUT16(IoC, B3_RI_CTRL, RI_CLR_WR_PERR);
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E015, SKERR_SIRQ_E015MSG);
- Para.Para64 = 0;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
- }
-
- if ((HwStatus & IS_M1_PAR_ERR) != 0) {
- SkMacParity(pAC, IoC, MAC_1);
- }
-
- if ((HwStatus & IS_M2_PAR_ERR) != 0) {
- SkMacParity(pAC, IoC, MAC_2);
- }
-
- if ((HwStatus & IS_R1_PAR_ERR) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_R1_CSR, CSR_IRQ_CL_P);
-
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E018, SKERR_SIRQ_E018MSG);
- Para.Para64 = MAC_1;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((HwStatus & IS_R2_PAR_ERR) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_R2_CSR, CSR_IRQ_CL_P);
-
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E019, SKERR_SIRQ_E019MSG);
- Para.Para64 = MAC_2;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_2;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-} /* SkGeHwErr */
-
-
-/******************************************************************************
- *
- * SkGeSirqIsr() - Special Interrupt Service Routine
- *
- * Description: handles all non data transfer specific interrupts (slow path)
- *
- * Returns: N/A
- */
-void SkGeSirqIsr(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-SK_U32 Istatus) /* Interrupt status word */
-{
- SK_EVPARA Para;
- SK_U32 RegVal32; /* Read register value */
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- unsigned Len;
- SK_U64 Octets;
- SK_U16 PhyInt;
- SK_U16 PhyIMsk;
- int i;
-
- if ((Istatus & IS_HW_ERR) != 0) {
- /* read the HW Error Interrupt source */
- SK_IN32(IoC, B0_HWE_ISRC, &RegVal32);
-
- SkGeHwErr(pAC, IoC, RegVal32);
- }
-
- /*
- * Packet Timeout interrupts
- */
- /* Check whether MACs are correctly initialized */
- if (((Istatus & (IS_PA_TO_RX1 | IS_PA_TO_TX1)) != 0) &&
- pAC->GIni.GP[MAC_1].PState == SK_PRT_RESET) {
- /* MAC 1 was not initialized but Packet timeout occured */
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E004,
- SKERR_SIRQ_E004MSG);
- }
-
- if (((Istatus & (IS_PA_TO_RX2 | IS_PA_TO_TX2)) != 0) &&
- pAC->GIni.GP[MAC_2].PState == SK_PRT_RESET) {
- /* MAC 2 was not initialized but Packet timeout occured */
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E005,
- SKERR_SIRQ_E005MSG);
- }
-
- if ((Istatus & IS_PA_TO_RX1) != 0) {
- /* Means network is filling us up */
- SK_ERR_LOG(pAC, SK_ERRCL_HW | SK_ERRCL_INIT, SKERR_SIRQ_E002,
- SKERR_SIRQ_E002MSG);
- SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_RX1);
- }
-
- if ((Istatus & IS_PA_TO_RX2) != 0) {
- /* Means network is filling us up */
- SK_ERR_LOG(pAC, SK_ERRCL_HW | SK_ERRCL_INIT, SKERR_SIRQ_E003,
- SKERR_SIRQ_E003MSG);
- SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_RX2);
- }
-
- if ((Istatus & IS_PA_TO_TX1) != 0) {
-
- pPrt = &pAC->GIni.GP[0];
-
- /* May be a normal situation in a server with a slow network */
- SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_TX1);
-
- /*
- * workaround: if in half duplex mode, check for Tx hangup.
- * Read number of TX'ed bytes, wait for 10 ms, then compare
- * the number with current value. If nothing changed, we assume
- * that Tx is hanging and do a FIFO flush (see event routine).
- */
- if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
- !pPrt->HalfDupTimerActive) {
- /*
- * many more pack. arb. timeouts may come in between,
- * we ignore those
- */
- pPrt->HalfDupTimerActive = SK_TRUE;
-
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32) SK_PNMI_PORT_PHYS2INST(pAC, 0),
- pAC->Rlmt.Port[0].Net->NetNumber);
-
- pPrt->LastOctets = Octets;
-
- Para.Para32[0] = 0;
- SkTimerStart(pAC, IoC, &pPrt->HalfDupChkTimer, SK_HALFDUP_CHK_TIME,
- SKGE_HWAC, SK_HWEV_HALFDUP_CHK, Para);
- }
- }
-
- if ((Istatus & IS_PA_TO_TX2) != 0) {
-
- pPrt = &pAC->GIni.GP[1];
-
- /* May be a normal situation in a server with a slow network */
- SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_TX2);
-
- /* workaround: see above */
- if ((pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
- !pPrt->HalfDupTimerActive) {
- pPrt->HalfDupTimerActive = SK_TRUE;
-
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32) SK_PNMI_PORT_PHYS2INST(pAC, 1),
- pAC->Rlmt.Port[1].Net->NetNumber);
-
- pPrt->LastOctets = Octets;
-
- Para.Para32[0] = 1;
- SkTimerStart(pAC, IoC, &pPrt->HalfDupChkTimer, SK_HALFDUP_CHK_TIME,
- SKGE_HWAC, SK_HWEV_HALFDUP_CHK, Para);
- }
- }
-
- /* Check interrupts of the particular queues */
- if ((Istatus & IS_R1_C) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_R1_CSR, CSR_IRQ_CL_C);
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E006,
- SKERR_SIRQ_E006MSG);
- Para.Para64 = MAC_1;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((Istatus & IS_R2_C) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_R2_CSR, CSR_IRQ_CL_C);
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E007,
- SKERR_SIRQ_E007MSG);
- Para.Para64 = MAC_2;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_2;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((Istatus & IS_XS1_C) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_XS1_CSR, CSR_IRQ_CL_C);
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E008,
- SKERR_SIRQ_E008MSG);
- Para.Para64 = MAC_1;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((Istatus & IS_XA1_C) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_XA1_CSR, CSR_IRQ_CL_C);
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E009,
- SKERR_SIRQ_E009MSG);
- Para.Para64 = MAC_1;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_1;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((Istatus & IS_XS2_C) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_XS2_CSR, CSR_IRQ_CL_C);
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E010,
- SKERR_SIRQ_E010MSG);
- Para.Para64 = MAC_2;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_2;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((Istatus & IS_XA2_C) != 0) {
- /* Clear IRQ */
- SK_OUT32(IoC, B0_XA2_CSR, CSR_IRQ_CL_C);
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E011,
- SKERR_SIRQ_E011MSG);
- Para.Para64 = MAC_2;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
- Para.Para32[0] = MAC_2;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- /* External reg interrupt */
- if ((Istatus & IS_EXT_REG) != 0) {
- /* Test IRQs from PHY */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
-
- pPrt = &pAC->GIni.GP[i];
-
- if (pPrt->PState == SK_PRT_RESET) {
- continue;
- }
-
- switch (pPrt->PhyType) {
-
- case SK_PHY_XMAC:
- break;
-
- case SK_PHY_BCOM:
- SkXmPhyRead(pAC, IoC, i, PHY_BCOM_INT_STAT, &PhyInt);
- SkXmPhyRead(pAC, IoC, i, PHY_BCOM_INT_MASK, &PhyIMsk);
-
- if ((PhyInt & ~PhyIMsk) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Port %d Bcom Int: 0x%04X Mask: 0x%04X\n",
- i, PhyInt, PhyIMsk));
- SkPhyIsrBcom(pAC, IoC, i, PhyInt);
- }
- break;
-
- case SK_PHY_MARV_COPPER:
- case SK_PHY_MARV_FIBER:
- SkGmPhyRead(pAC, IoC, i, PHY_MARV_INT_STAT, &PhyInt);
- SkGmPhyRead(pAC, IoC, i, PHY_MARV_INT_MASK, &PhyIMsk);
-
- if ((PhyInt & PhyIMsk) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Port %d Marv Int: 0x%04X Mask: 0x%04X\n",
- i, PhyInt, PhyIMsk));
- SkPhyIsrGmac(pAC, IoC, i, PhyInt);
- }
- break;
-
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- SkXmPhyRead(pAC, IoC, i, PHY_LONE_INT_STAT, &PhyInt);
- SkXmPhyRead(pAC, IoC, i, PHY_LONE_INT_ENAB, &PhyIMsk);
-
- if ((PhyInt & PhyIMsk) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Port %d Lone Int: %x Mask: %x\n",
- i, PhyInt, PhyIMsk));
- SkPhyIsrLone(pAC, IoC, i, PhyInt);
- }
- break;
- case SK_PHY_NAT:
- /* todo: National */
- break;
-#endif /* OTHER_PHY */
- }
- }
- }
-
- /* I2C Ready interrupt */
- if ((Istatus & IS_I2C_READY) != 0) {
- SkI2cIsr(pAC, IoC);
- }
-
- if ((Istatus & IS_LNK_SYNC_M1) != 0) {
- /*
- * We do NOT need the Link Sync interrupt, because it shows
- * us only a link going down.
- */
- /* clear interrupt */
- SK_OUT8(IoC, MR_ADDR(MAC_1, LNK_SYNC_CTRL), LED_CLR_IRQ);
- }
-
- /* Check MAC after link sync counter */
- if ((Istatus & IS_MAC1) != 0) {
- /* IRQ from MAC 1 */
- SkMacIrq(pAC, IoC, MAC_1);
- }
-
- if ((Istatus & IS_LNK_SYNC_M2) != 0) {
- /*
- * We do NOT need the Link Sync interrupt, because it shows
- * us only a link going down.
- */
- /* clear interrupt */
- SK_OUT8(IoC, MR_ADDR(MAC_2, LNK_SYNC_CTRL), LED_CLR_IRQ);
- }
-
- /* Check MAC after link sync counter */
- if ((Istatus & IS_MAC2) != 0) {
- /* IRQ from MAC 2 */
- SkMacIrq(pAC, IoC, MAC_2);
- }
-
- /* Timer interrupt (served last) */
- if ((Istatus & IS_TIMINT) != 0) {
- SkHwtIsr(pAC, IoC);
- }
-} /* SkGeSirqIsr */
-
-
-/******************************************************************************
- *
- * SkGePortCheckShorts() - Implementing XMAC Workaround Errata # 2
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- */
-static int SkGePortCheckShorts(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- SK_U32 Shorts; /* Short Event Counter */
- SK_U32 CheckShorts; /* Check value for Short Event Counter */
- SK_U64 RxCts; /* Rx Counter (packets on network) */
- SK_U32 RxTmp; /* Rx temp. Counter */
- SK_U32 FcsErrCts; /* FCS Error Counter */
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- int Rtv; /* Return value */
- int i;
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Default: no action */
- Rtv = SK_HW_PS_NONE;
-
- (void)SkXmUpdateStats(pAC, IoC, Port);
-
- /* Extra precaution: check for short Event counter */
- (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXE_SHT_ERR, &Shorts);
-
- /*
- * Read Rx counter (packets seen on the network and not necessarily
- * really received.
- */
- RxCts = 0;
-
- for (i = 0; i < sizeof(SkGeRxRegs)/sizeof(SkGeRxRegs[0]); i++) {
- (void)SkXmMacStatistic(pAC, IoC, Port, SkGeRxRegs[i], &RxTmp);
- RxCts += (SK_U64)RxTmp;
- }
-
- /* On default: check shorts against zero */
- CheckShorts = 0;
-
- /* Extra precaution on active links */
- if (pPrt->PHWLinkUp) {
- /* Reset Link Restart counter */
- pPrt->PLinkResCt = 0;
- pPrt->PAutoNegTOCt = 0;
-
- /* If link is up check for 2 */
- CheckShorts = 2;
-
- (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXF_FCS_ERR, &FcsErrCts);
-
- if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
- pPrt->PLipaAutoNeg == SK_LIPA_UNKNOWN &&
- (pPrt->PLinkMode == SK_LMODE_HALF ||
- pPrt->PLinkMode == SK_LMODE_FULL)) {
- /*
- * This is autosensing and we are in the fallback
- * manual full/half duplex mode.
- */
- if (RxCts == pPrt->PPrevRx) {
- /* Nothing received, restart link */
- pPrt->PPrevFcs = FcsErrCts;
- pPrt->PPrevShorts = Shorts;
-
- return(SK_HW_PS_RESTART);
- }
- else {
- pPrt->PLipaAutoNeg = SK_LIPA_MANUAL;
- }
- }
-
- if (((RxCts - pPrt->PPrevRx) > pPrt->PRxLim) ||
- (!(FcsErrCts - pPrt->PPrevFcs))) {
- /*
- * Note: The compare with zero above has to be done the way shown,
- * otherwise the Linux driver will have a problem.
- */
- /*
- * We received a bunch of frames or no CRC error occured on the
- * network -> ok.
- */
- pPrt->PPrevRx = RxCts;
- pPrt->PPrevFcs = FcsErrCts;
- pPrt->PPrevShorts = Shorts;
-
- return(SK_HW_PS_NONE);
- }
-
- pPrt->PPrevFcs = FcsErrCts;
- }
-
-
- if ((Shorts - pPrt->PPrevShorts) > CheckShorts) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Short Event Count Restart Port %d \n", Port));
- Rtv = SK_HW_PS_RESTART;
- }
-
- pPrt->PPrevShorts = Shorts;
- pPrt->PPrevRx = RxCts;
-
- return(Rtv);
-} /* SkGePortCheckShorts */
-
-
-/******************************************************************************
- *
- * SkGePortCheckUp() - Check if the link is up
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- * 2 Link came up
- */
-static int SkGePortCheckUp(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- switch (pAC->GIni.GP[Port].PhyType) {
- case SK_PHY_XMAC:
- return(SkGePortCheckUpXmac(pAC, IoC, Port));
- case SK_PHY_BCOM:
- return(SkGePortCheckUpBcom(pAC, IoC, Port));
- case SK_PHY_MARV_COPPER:
- case SK_PHY_MARV_FIBER:
- return(SkGePortCheckUpGmac(pAC, IoC, Port));
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- return(SkGePortCheckUpLone(pAC, IoC, Port));
- case SK_PHY_NAT:
- return(SkGePortCheckUpNat(pAC, IoC, Port));
-#endif /* OTHER_PHY */
- }
- return(SK_HW_PS_NONE);
-} /* SkGePortCheckUp */
-
-
-/******************************************************************************
- *
- * SkGePortCheckUpXmac() - Implementing of the Workaround Errata # 2
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- * 2 Link came up
- */
-static int SkGePortCheckUpXmac(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- SK_U32 Shorts; /* Short Event Counter */
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- int Done;
- SK_U32 GpReg; /* General Purpose register value */
- SK_U32 *pGpReg; /* Pointer to -- " -- */
- SK_U16 Isrc; /* Interrupt source register */
- SK_U16 IsrcSum; /* Interrupt source register sum */
- SK_U16 LpAb; /* Link Partner Ability */
- SK_U16 ResAb; /* Resolved Ability */
- SK_U16 ExtStat; /* Extended Status Register */
- SK_BOOL AutoNeg; /* Is Auto-negotiation used ? */
- SK_U8 NextMode; /* Next AutoSensing Mode */
-
- pGpReg = &GpReg;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PHWLinkUp) {
- if (pPrt->PhyType != SK_PHY_XMAC) {
- return(SK_HW_PS_NONE);
- }
- else {
- return(SkGePortCheckShorts(pAC, IoC, Port));
- }
- }
-
- IsrcSum = pPrt->PIsave;
- pPrt->PIsave = 0;
-
- /* Now wait for each port's link */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
- if (pPrt->PLinkBroken) {
- /* Link was broken */
- XM_IN32(IoC, Port, XM_GP_PORT, pGpReg);
-
- if ((GpReg & XM_GP_INP_ASS) == 0) {
- /* The Link is in sync */
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
- IsrcSum |= Isrc;
- SkXmAutoNegLipaXmac(pAC, IoC, Port, IsrcSum);
-
- if ((Isrc & XM_IS_INP_ASS) == 0) {
- /* It has been in sync since last time */
- /* Restart the PORT */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link in sync Restart Port %d\n", Port));
-
- (void)SkXmUpdateStats(pAC, IoC, Port);
-
- /* We now need to reinitialize the PrevShorts counter */
- (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXE_SHT_ERR, &Shorts);
- pPrt->PPrevShorts = Shorts;
-
- pPrt->PLinkBroken = SK_FALSE;
-
- /*
- * Link Restart Workaround:
- * it may be possible that the other Link side
- * restarts its link as well an we detect
- * another LinkBroken. To prevent this
- * happening we check for a maximum number
- * of consecutive restart. If those happens,
- * we do NOT restart the active link and
- * check whether the link is now o.k.
- */
- pPrt->PLinkResCt++;
-
- pPrt->PAutoNegTimeOut = 0;
-
- if (pPrt->PLinkResCt < SK_MAX_LRESTART) {
- return(SK_HW_PS_RESTART);
- }
-
- pPrt->PLinkResCt = 0;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Do NOT restart on Port %d %x %x\n", Port, Isrc, IsrcSum));
- }
- else {
- pPrt->PIsave = (SK_U16)(IsrcSum & XM_IS_AND);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Save Sync/nosync Port %d %x %x\n", Port, Isrc, IsrcSum));
-
- /* Do nothing more if link is broken */
- return(SK_HW_PS_NONE);
- }
- }
- else {
- /* Do nothing more if link is broken */
- return(SK_HW_PS_NONE);
- }
-
- }
- else {
- /* Link was not broken, check if it is */
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
- IsrcSum |= Isrc;
- if ((Isrc & XM_IS_INP_ASS) != 0) {
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
- IsrcSum |= Isrc;
- if ((Isrc & XM_IS_INP_ASS) != 0) {
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
- IsrcSum |= Isrc;
- if ((Isrc & XM_IS_INP_ASS) != 0) {
- pPrt->PLinkBroken = SK_TRUE;
- /* Re-Init Link partner Autoneg flag */
- pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link broken Port %d\n", Port));
-
- /* Cable removed-> reinit sense mode */
- SkHWInitDefSense(pAC, IoC, Port);
-
- return(SK_HW_PS_RESTART);
- }
- }
- }
- else {
- SkXmAutoNegLipaXmac(pAC, IoC, Port, Isrc);
- if (SkGePortCheckShorts(pAC, IoC, Port) == SK_HW_PS_RESTART) {
- return(SK_HW_PS_RESTART);
- }
- }
- }
-
- /*
- * here we usually can check whether the link is in sync and
- * auto-negotiation is done.
- */
- XM_IN32(IoC, Port, XM_GP_PORT, pGpReg);
- XM_IN16(IoC, Port, XM_ISRC, &Isrc);
- IsrcSum |= Isrc;
-
- SkXmAutoNegLipaXmac(pAC, IoC, Port, IsrcSum);
-
- if ((GpReg & XM_GP_INP_ASS) != 0 || (IsrcSum & XM_IS_INP_ASS) != 0) {
- if ((GpReg & XM_GP_INP_ASS) == 0) {
- /* Save Auto-negotiation Done interrupt only if link is in sync */
- pPrt->PIsave = (SK_U16)(IsrcSum & XM_IS_AND);
- }
-#ifdef DEBUG
- if ((pPrt->PIsave & XM_IS_AND) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg done rescheduled Port %d\n", Port));
- }
-#endif /* DEBUG */
- return(SK_HW_PS_NONE);
- }
-
- if (AutoNeg) {
- if ((IsrcSum & XM_IS_AND) != 0) {
- SkHWLinkUp(pAC, IoC, Port);
- Done = SkMacAutoNegDone(pAC, IoC, Port);
- if (Done != SK_AND_OK) {
- /* Get PHY parameters, for debugging only */
- SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_LP, &LpAb);
- SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_RES_ABI, &ResAb);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg FAIL Port %d (LpAb %x, ResAb %x)\n",
- Port, LpAb, ResAb));
-
- /* Try next possible mode */
- NextMode = SkHWSenseGetNext(pAC, IoC, Port);
- SkHWLinkDown(pAC, IoC, Port);
- if (Done == SK_AND_DUP_CAP) {
- /* GoTo next mode */
- SkHWSenseSetNext(pAC, IoC, Port, NextMode);
- }
-
- return(SK_HW_PS_RESTART);
- }
- /*
- * Dummy Read extended status to prevent extra link down/ups
- * (clear Page Received bit if set)
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_EXP, &ExtStat);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg done Port %d\n", Port));
- return(SK_HW_PS_LINK);
- }
-
- /* AutoNeg not done, but HW link is up. Check for timeouts */
- pPrt->PAutoNegTimeOut++;
- if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
- /* Increase the Timeout counter */
- pPrt->PAutoNegTOCt++;
-
- /* Timeout occured */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("AutoNeg timeout Port %d\n", Port));
- if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
- pPrt->PLipaAutoNeg != SK_LIPA_AUTO) {
- /* Set Link manually up */
- SkHWSenseSetNext(pAC, IoC, Port, SK_LMODE_FULL);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Set manual full duplex Port %d\n", Port));
- }
-
- if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
- pPrt->PLipaAutoNeg == SK_LIPA_AUTO &&
- pPrt->PAutoNegTOCt >= SK_MAX_ANEG_TO) {
- /*
- * This is rather complicated.
- * we need to check here whether the LIPA_AUTO
- * we saw before is false alert. We saw at one
- * switch ( SR8800) that on boot time it sends
- * just one auto-neg packet and does no further
- * auto-negotiation.
- * Solution: we restart the autosensing after
- * a few timeouts.
- */
- pPrt->PAutoNegTOCt = 0;
- pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
- SkHWInitDefSense(pAC, IoC, Port);
- }
-
- /* Do the restart */
- return(SK_HW_PS_RESTART);
- }
- }
- else {
- /* Link is up and we don't need more */
-#ifdef DEBUG
- if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("ERROR: Lipa auto detected on port %d\n", Port));
- }
-#endif /* DEBUG */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link sync(GP), Port %d\n", Port));
- SkHWLinkUp(pAC, IoC, Port);
-
- /*
- * Link sync (GP) and so assume a good connection. But if not received
- * a bunch of frames received in a time slot (maybe broken tx cable)
- * the port is restart.
- */
- return(SK_HW_PS_LINK);
- }
-
- return(SK_HW_PS_NONE);
-} /* SkGePortCheckUpXmac */
-
-
-/******************************************************************************
- *
- * SkGePortCheckUpBcom() - Check if the link is up on Bcom PHY
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- * 2 Link came up
- */
-static int SkGePortCheckUpBcom(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- int Done;
- SK_U16 Isrc; /* Interrupt source register */
- SK_U16 PhyStat; /* Phy Status Register */
- SK_U16 ResAb; /* Master/Slave resolution */
- SK_U16 Ctrl; /* Broadcom control flags */
-#ifdef DEBUG
- SK_U16 LpAb;
- SK_U16 ExtStat;
-#endif /* DEBUG */
- SK_BOOL AutoNeg; /* Is Auto-negotiation used ? */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Check for No HCD Link events (#10523) */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &Isrc);
-
-#ifdef xDEBUG
- if ((Isrc & ~(PHY_B_IS_HCT | PHY_B_IS_LCT) ==
- (PHY_B_IS_SCR_S_ER | PHY_B_IS_RRS_CHANGE | PHY_B_IS_LRS_CHANGE)) {
-
- SK_U32 Stat1, Stat2, Stat3;
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_MASK, &Stat1);
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "CheckUp1 - Stat: %x, Mask: %x",
- (void *)Isrc,
- (void *)Stat1);
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Stat1);
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &Stat2);
- Stat1 = Stat1 << 16 | Stat2;
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, &Stat2);
- Stat3 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &Stat3);
- Stat2 = Stat2 << 16 | Stat3;
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "Ctrl/Stat: %x, AN Adv/LP: %x",
- (void *)Stat1,
- (void *)Stat2);
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_EXP, &Stat1);
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_EXT_STAT, &Stat2);
- Stat1 = Stat1 << 16 | Stat2;
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, &Stat2);
- Stat3 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &Stat3);
- Stat2 = Stat2 << 16 | Stat3;
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "AN Exp/IEEE Ext: %x, 1000T Ctrl/Stat: %x",
- (void *)Stat1,
- (void *)Stat2);
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
- Stat1 = Stat1 << 16 | Stat2;
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Stat2);
- Stat3 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &Stat3);
- Stat2 = Stat2 << 16 | Stat3;
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "PHY Ext Ctrl/Stat: %x, Aux Ctrl/Stat: %x",
- (void *)Stat1,
- (void *)Stat2);
- }
-#endif /* DEBUG */
-
- if ((Isrc & (PHY_B_IS_NO_HDCL /* | PHY_B_IS_NO_HDC */)) != 0) {
- /*
- * Workaround BCom Errata:
- * enable and disable loopback mode if "NO HCD" occurs.
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Ctrl);
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL,
- (SK_U16)(Ctrl | PHY_CT_LOOP));
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL,
- (SK_U16)(Ctrl & ~PHY_CT_LOOP));
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("No HCD Link event, Port %d\n", Port));
-#ifdef xDEBUG
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "No HCD link event, port %d.",
- (void *)Port,
- (void *)NULL);
-#endif /* DEBUG */
- }
-
- /* Not obsolete: link status bit is latched to 0 and autoclearing! */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
-
- if (pPrt->PHWLinkUp) {
- return(SK_HW_PS_NONE);
- }
-
-#ifdef xDEBUG
- {
- SK_U32 Stat1, Stat2, Stat3;
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_MASK, &Stat1);
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "CheckUp1a - Stat: %x, Mask: %x",
- (void *)Isrc,
- (void *)Stat1);
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Stat1);
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
- Stat1 = Stat1 << 16 | PhyStat;
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, &Stat2);
- Stat3 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &Stat3);
- Stat2 = Stat2 << 16 | Stat3;
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "Ctrl/Stat: %x, AN Adv/LP: %x",
- (void *)Stat1,
- (void *)Stat2);
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_EXP, &Stat1);
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_EXT_STAT, &Stat2);
- Stat1 = Stat1 << 16 | Stat2;
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, &Stat2);
- Stat3 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
- Stat2 = Stat2 << 16 | ResAb;
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "AN Exp/IEEE Ext: %x, 1000T Ctrl/Stat: %x",
- (void *)Stat1,
- (void *)Stat2);
-
- Stat1 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
- Stat1 = Stat1 << 16 | Stat2;
- Stat2 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Stat2);
- Stat3 = 0;
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &Stat3);
- Stat2 = Stat2 << 16 | Stat3;
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "PHY Ext Ctrl/Stat: %x, Aux Ctrl/Stat: %x",
- (void *)Stat1,
- (void *)Stat2);
- }
-#endif /* DEBUG */
-
- /* Now wait for each port's link */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
- /*
- * Here we usually can check whether the link is in sync and
- * auto-negotiation is done.
- */
-
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
-
- SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg: %d, PhyStat: 0x%04x\n", AutoNeg, PhyStat));
-
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
-
- if ((ResAb & PHY_B_1000S_MSF) != 0) {
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Master/Slave Fault port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- pPrt->PMSStatus = SK_MS_STAT_FAULT;
-
- return(SK_HW_PS_RESTART);
- }
-
- if ((PhyStat & PHY_ST_LSYNC) == 0) {
- return(SK_HW_PS_NONE);
- }
-
- pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
- SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg: %d, PhyStat: 0x%04x\n", AutoNeg, PhyStat));
-
- if (AutoNeg) {
- if ((PhyStat & PHY_ST_AN_OVER) != 0) {
- SkHWLinkUp(pAC, IoC, Port);
- Done = SkMacAutoNegDone(pAC, IoC, Port);
- if (Done != SK_AND_OK) {
-#ifdef DEBUG
- /* Get PHY parameters, for debugging only */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &LpAb);
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ExtStat);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg FAIL Port %d (LpAb %x, 1000TStat %x)\n",
- Port, LpAb, ExtStat));
-#endif /* DEBUG */
- return(SK_HW_PS_RESTART);
- }
- else {
-#ifdef xDEBUG
- /* Dummy read ISR to prevent extra link downs/ups */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &ExtStat);
-
- if ((ExtStat & ~(PHY_B_IS_HCT | PHY_B_IS_LCT)) != 0) {
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "CheckUp2 - Stat: %x",
- (void *)ExtStat,
- (void *)NULL);
- }
-#endif /* DEBUG */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg done Port %d\n", Port));
- return(SK_HW_PS_LINK);
- }
- }
- }
- else { /* !AutoNeg */
- /* Link is up and we don't need more. */
-#ifdef DEBUG
- if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("ERROR: Lipa auto detected on port %d\n", Port));
- }
-#endif /* DEBUG */
-
-#ifdef xDEBUG
- /* Dummy read ISR to prevent extra link downs/ups */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &ExtStat);
-
- if ((ExtStat & ~(PHY_B_IS_HCT | PHY_B_IS_LCT)) != 0) {
- CMSMPrintString(
- pAC->pConfigTable,
- MSG_TYPE_RUNTIME_INFO,
- "CheckUp3 - Stat: %x",
- (void *)ExtStat,
- (void *)NULL);
- }
-#endif /* DEBUG */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link sync(GP), Port %d\n", Port));
- SkHWLinkUp(pAC, IoC, Port);
- return(SK_HW_PS_LINK);
- }
-
- return(SK_HW_PS_NONE);
-} /* SkGePortCheckUpBcom */
-
-
-/******************************************************************************
- *
- * SkGePortCheckUpGmac() - Check if the link is up on Marvell PHY
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- * 2 Link came up
- */
-static int SkGePortCheckUpGmac(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- int Done;
- SK_U16 Isrc; /* Interrupt source */
- SK_U16 PhyStat; /* Phy Status */
- SK_U16 PhySpecStat;/* Phy Specific Status */
- SK_U16 ResAb; /* Master/Slave resolution */
- SK_BOOL AutoNeg; /* Is Auto-negotiation used ? */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Read PHY Interrupt Status */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &Isrc);
-
- if ((Isrc & PHY_M_IS_AN_COMPL) != 0) {
- /* TBD */
- }
-
- if ((Isrc & PHY_M_IS_DOWNSH_DET) != 0) {
- /* TBD */
- }
-
- if (pPrt->PHWLinkUp) {
- return(SK_HW_PS_NONE);
- }
-
- /* Now wait for each port's link */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
- /* Read PHY Status */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg: %d, PhyStat: 0x%04x\n", AutoNeg, PhyStat));
-
- SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
-
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
-
- if ((ResAb & PHY_B_1000S_MSF) != 0) {
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Master/Slave Fault port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- pPrt->PMSStatus = SK_MS_STAT_FAULT;
-
- return(SK_HW_PS_RESTART);
- }
-
- /* Read PHY Specific Status */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg: %d, PhySpecStat: 0x%04x\n", AutoNeg, PhySpecStat));
-
- if ((PhySpecStat & PHY_M_PS_LINK_UP) == 0) {
- return(SK_HW_PS_NONE);
- }
-
- pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
- SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
-
- pPrt->PCableLen = (SK_U8)((PhySpecStat & PHY_M_PS_CABLE_MSK) >> 7);
-
- if (AutoNeg) {
- /* Auto-Negotiation Over ? */
- if ((PhyStat & PHY_ST_AN_OVER) != 0) {
-
- SkHWLinkUp(pAC, IoC, Port);
-
- Done = SkMacAutoNegDone(pAC, IoC, Port);
-
- if (Done != SK_AND_OK) {
- return(SK_HW_PS_RESTART);
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg done Port %d\n", Port));
- return(SK_HW_PS_LINK);
- }
- }
- else { /* !AutoNeg */
- /* Link is up and we don't need more */
-#ifdef DEBUG
- if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("ERROR: Lipa auto detected on port %d\n", Port));
- }
-#endif /* DEBUG */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link sync, Port %d\n", Port));
- SkHWLinkUp(pAC, IoC, Port);
-
- return(SK_HW_PS_LINK);
- }
-
- return(SK_HW_PS_NONE);
-} /* SkGePortCheckUpGmac */
-
-
-#ifdef OTHER_PHY
-/******************************************************************************
- *
- * SkGePortCheckUpLone() - Check if the link is up on Level One PHY
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- * 2 Link came up
- */
-static int SkGePortCheckUpLone(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- int Done;
- SK_U16 Isrc; /* Interrupt source register */
- SK_U16 LpAb; /* Link Partner Ability */
- SK_U16 ExtStat; /* Extended Status Register */
- SK_U16 PhyStat; /* Phy Status Register */
- SK_U16 StatSum;
- SK_BOOL AutoNeg; /* Is Auto-negotiation used ? */
- SK_U8 NextMode; /* Next AutoSensing Mode */
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PHWLinkUp) {
- return(SK_HW_PS_NONE);
- }
-
- StatSum = pPrt->PIsave;
- pPrt->PIsave = 0;
-
- /* Now wait for each ports link */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
- /*
- * here we usually can check whether the link is in sync and
- * auto-negotiation is done.
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_STAT, &PhyStat);
- StatSum |= PhyStat;
-
- SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
-
- if ((PhyStat & PHY_ST_LSYNC) == 0) {
- /* Save Auto-negotiation Done bit */
- pPrt->PIsave = (SK_U16)(StatSum & PHY_ST_AN_OVER);
-#ifdef DEBUG
- if ((pPrt->PIsave & PHY_ST_AN_OVER) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg done rescheduled Port %d\n", Port));
- }
-#endif /* DEBUG */
- return(SK_HW_PS_NONE);
- }
-
- if (AutoNeg) {
- if ((StatSum & PHY_ST_AN_OVER) != 0) {
- SkHWLinkUp(pAC, IoC, Port);
- Done = SkMacAutoNegDone(pAC, IoC, Port);
- if (Done != SK_AND_OK) {
- /* Get PHY parameters, for debugging only */
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_AUNE_LP, &LpAb);
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_1000T_STAT, &ExtStat);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg FAIL Port %d (LpAb %x, 1000TStat %x)\n",
- Port, LpAb, ExtStat));
-
- /* Try next possible mode */
- NextMode = SkHWSenseGetNext(pAC, IoC, Port);
- SkHWLinkDown(pAC, IoC, Port);
- if (Done == SK_AND_DUP_CAP) {
- /* GoTo next mode */
- SkHWSenseSetNext(pAC, IoC, Port, NextMode);
- }
-
- return(SK_HW_PS_RESTART);
-
- }
- else {
- /*
- * Dummy Read interrupt status to prevent
- * extra link down/ups
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_INT_STAT, &ExtStat);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNeg done Port %d\n", Port));
- return(SK_HW_PS_LINK);
- }
- }
-
- /* AutoNeg not done, but HW link is up. Check for timeouts */
- pPrt->PAutoNegTimeOut++;
- if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
- /* Timeout occured */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("AutoNeg timeout Port %d\n", Port));
- if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
- pPrt->PLipaAutoNeg != SK_LIPA_AUTO) {
- /* Set Link manually up */
- SkHWSenseSetNext(pAC, IoC, Port, SK_LMODE_FULL);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Set manual full duplex Port %d\n", Port));
- }
-
- /* Do the restart */
- return(SK_HW_PS_RESTART);
- }
- }
- else {
- /* Link is up and we don't need more */
-#ifdef DEBUG
- if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("ERROR: Lipa auto detected on port %d\n", Port));
- }
-#endif /* DEBUG */
-
- /*
- * Dummy Read interrupt status to prevent
- * extra link down/ups
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_INT_STAT, &ExtStat);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("Link sync(GP), Port %d\n", Port));
- SkHWLinkUp(pAC, IoC, Port);
- return(SK_HW_PS_LINK);
- }
-
- return(SK_HW_PS_NONE);
-} /* SkGePortCheckUpLone */
-
-
-/******************************************************************************
- *
- * SkGePortCheckUpNat() - Check if the link is up on National PHY
- *
- * return:
- * 0 o.k. nothing needed
- * 1 Restart needed on this port
- * 2 Link came up
- */
-static int SkGePortCheckUpNat(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO Context */
-int Port) /* Which port should be checked */
-{
- /* todo: National */
- return(SK_HW_PS_NONE);
-} /* SkGePortCheckUpNat */
-#endif /* OTHER_PHY */
-
-
-/******************************************************************************
- *
- * SkGeSirqEvent() - Event Service Routine
- *
- * Description:
- *
- * Notes:
- */
-int SkGeSirqEvent(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* Io Context */
-SK_U32 Event, /* Module specific Event */
-SK_EVPARA Para) /* Event specific Parameter */
-{
- SK_U64 Octets;
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- SK_U32 Port;
- SK_U32 Time;
- unsigned Len;
- int PortStat;
- SK_U8 Val8;
-
- Port = Para.Para32[0];
- pPrt = &pAC->GIni.GP[Port];
-
- switch (Event) {
- case SK_HWEV_WATIM:
- /* Check whether port came up */
- PortStat = SkGePortCheckUp(pAC, IoC, Port);
-
- switch (PortStat) {
- case SK_HW_PS_RESTART:
- if (pPrt->PHWLinkUp) {
- /*
- * Set Link to down.
- */
- SkHWLinkDown(pAC, IoC, Port);
-
- /*
- * Signal directly to RLMT to ensure correct
- * sequence of SWITCH and RESET event.
- */
- SkRlmtEvent(pAC, IoC, SK_RLMT_LINK_DOWN, Para);
- }
-
- /* Restart needed */
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
- break;
-
- case SK_HW_PS_LINK:
- /* Signal to RLMT */
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_UP, Para);
- break;
-
- }
-
- /* Start again the check Timer */
- if (pPrt->PHWLinkUp) {
- Time = SK_WA_ACT_TIME;
- }
- else {
- Time = SK_WA_INA_TIME;
- }
-
- /* Todo: still needed for non-XMAC PHYs??? */
- /* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pPrt->PWaTimer, Time,
- SKGE_HWAC, SK_HWEV_WATIM, Para);
- break;
-
- case SK_HWEV_PORT_START:
- if (pPrt->PHWLinkUp) {
- /*
- * Signal directly to RLMT to ensure correct
- * sequence of SWITCH and RESET event.
- */
- SkRlmtEvent(pAC, IoC, SK_RLMT_LINK_DOWN, Para);
- }
-
- SkHWLinkDown(pAC, IoC, Port);
-
- /* Schedule Port RESET */
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
-
- /* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pPrt->PWaTimer, SK_WA_INA_TIME,
- SKGE_HWAC, SK_HWEV_WATIM, Para);
- break;
-
- case SK_HWEV_PORT_STOP:
- if (pPrt->PHWLinkUp) {
- /*
- * Signal directly to RLMT to ensure correct
- * sequence of SWITCH and RESET event.
- */
- SkRlmtEvent(pAC, IoC, SK_RLMT_LINK_DOWN, Para);
- }
-
- /* Stop Workaround Timer */
- SkTimerStop(pAC, IoC, &pPrt->PWaTimer);
-
- SkHWLinkDown(pAC, IoC, Port);
- break;
-
- case SK_HWEV_UPDATE_STAT:
- /* We do NOT need to update any statistics */
- break;
-
- case SK_HWEV_CLEAR_STAT:
- /* We do NOT need to clear any statistics */
- for (Port = 0; Port < (SK_U32)pAC->GIni.GIMacsFound; Port++) {
- pPrt->PPrevRx = 0;
- pPrt->PPrevFcs = 0;
- pPrt->PPrevShorts = 0;
- }
- break;
-
- case SK_HWEV_SET_LMODE:
- Val8 = (SK_U8)Para.Para32[1];
- if (pPrt->PLinkModeConf != Val8) {
- /* Set New link mode */
- pPrt->PLinkModeConf = Val8;
-
- /* Restart Port */
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_STOP, Para);
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_START, Para);
- }
- break;
-
- case SK_HWEV_SET_FLOWMODE:
- Val8 = (SK_U8)Para.Para32[1];
- if (pPrt->PFlowCtrlMode != Val8) {
- /* Set New Flow Control mode */
- pPrt->PFlowCtrlMode = Val8;
-
- /* Restart Port */
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_STOP, Para);
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_START, Para);
- }
- break;
-
- case SK_HWEV_SET_ROLE:
- /* not possible for fiber */
- if (!pAC->GIni.GICopperType) {
- break;
- }
- Val8 = (SK_U8)Para.Para32[1];
- if (pPrt->PMSMode != Val8) {
- /* Set New link mode */
- pPrt->PMSMode = Val8;
-
- /* Restart Port */
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_STOP, Para);
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_START, Para);
- }
- break;
-
- case SK_HWEV_SET_SPEED:
- if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
- break;
- }
- Val8 = (SK_U8)Para.Para32[1];
- if (pPrt->PLinkSpeed != Val8) {
- /* Set New Speed parameter */
- pPrt->PLinkSpeed = Val8;
-
- /* Restart Port */
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_STOP, Para);
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_START, Para);
- }
- break;
-
- case SK_HWEV_HALFDUP_CHK:
- /*
- * half duplex hangup workaround.
- * See packet arbiter timeout interrupt for description
- */
- pPrt->HalfDupTimerActive = SK_FALSE;
- if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
-
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
-
- if (pPrt->LastOctets == Octets) {
- /* Tx hanging, a FIFO flush restarts it */
- SkMacFlushTxFifo(pAC, IoC, Port);
- }
- }
- break;
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_SIRQ_E001, SKERR_SIRQ_E001MSG);
- break;
- }
-
- return(0);
-} /* SkGeSirqEvent */
-
-
-/******************************************************************************
- *
- * SkPhyIsrBcom() - PHY interrupt service routine
- *
- * Description: handles all interrupts from BCom PHY
- *
- * Returns: N/A
- */
-static void SkPhyIsrBcom(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* Io Context */
-int Port, /* Port Num = PHY Num */
-SK_U16 IStatus) /* Interrupt Status */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- SK_EVPARA Para;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if ((IStatus & PHY_B_IS_PSE) != 0) {
- /* Incorrectable pair swap error */
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E022,
- SKERR_SIRQ_E022MSG);
- }
-
- if ((IStatus & (PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE)) != 0) {
- Para.Para32[0] = (SK_U32)Port;
-
- SkHWLinkDown(pAC, IoC, Port);
-
- /* Signal to RLMT */
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
-
- /* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pPrt->PWaTimer, SK_WA_INA_TIME,
- SKGE_HWAC, SK_HWEV_WATIM, Para);
- }
-
-} /* SkPhyIsrBcom */
-
-
-/******************************************************************************
- *
- * SkPhyIsrGmac() - PHY interrupt service routine
- *
- * Description: handles all interrupts from Marvell PHY
- *
- * Returns: N/A
- */
-static void SkPhyIsrGmac(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* Io Context */
-int Port, /* Port Num = PHY Num */
-SK_U16 IStatus) /* Interrupt Status */
-{
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
- SK_EVPARA Para;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if ((IStatus & (PHY_M_IS_AN_PR | PHY_M_IS_LST_CHANGE)) != 0) {
- Para.Para32[0] = (SK_U32)Port;
-
- SkHWLinkDown(pAC, IoC, Port);
-
- /* Signal to RLMT */
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
- if ((IStatus & PHY_M_IS_AN_ERROR) != 0) {
- /* Auto-Negotiation Error */
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E023, SKERR_SIRQ_E023MSG);
- }
-
- if ((IStatus & PHY_M_IS_LSP_CHANGE) != 0) {
- /* TBD */
- }
-
- if ((IStatus & PHY_M_IS_FIFO_ERROR) != 0) {
- /* FIFO Overflow/Underrun Error */
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E024, SKERR_SIRQ_E024MSG);
- }
-} /* SkPhyIsrGmac */
-
-
-#ifdef OTHER_PHY
-/******************************************************************************
- *
- * SkPhyIsrLone() - PHY interrupt service routine
- *
- * Description: handles all interrupts from LONE PHY
- *
- * Returns: N/A
- */
-static void SkPhyIsrLone(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* Io Context */
-int Port, /* Port Num = PHY Num */
-SK_U16 IStatus) /* Interrupt Status */
-{
- SK_EVPARA Para;
-
- if (IStatus & (PHY_L_IS_DUP | PHY_L_IS_ISOL)) {
- SkHWLinkDown(pAC, IoC, Port);
-
- /* Signal to RLMT */
- Para.Para32[0] = (SK_U32)Port;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
- }
-
-} /* SkPhyIsrLone */
-#endif /* OTHER_PHY */
-
-/* End of File */
+++ /dev/null
-/******************************************************************************
- *
- * Name: ski2c.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.57 $
- * Date: $Date: 2003/01/28 09:17:38 $
- * Purpose: Functions to access Voltage and Temperature Sensor
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: ski2c.c,v $
- * Revision 1.57 2003/01/28 09:17:38 rschmidt
- * Fixed handling for sensors on YUKON Fiber.
- * Editorial changes.
- *
- * Revision 1.56 2002/12/19 14:20:41 rschmidt
- * Added debugging code in SkI2cWait().
- * Replaced all I2C-write operations with function SkI2cWrite().
- * Fixed compiler warning because of uninitialized 'Time' in SkI2cEvent().
- * Editorial changes.
- *
- * Revision 1.55 2002/10/15 07:23:55 rschmidt
- * Added setting of the GIYukon32Bit bool variable to distinguish
- * 32-bit adapters.
- * Editorial changes (TWSI).
- *
- * Revision 1.54 2002/08/13 09:05:06 rschmidt
- * Added new thresholds if VAUX is not available (GIVauxAvail).
- * Merged defines for PHY PLL 3V3 voltage (A and B).
- * Editorial changes.
- *
- * Revision 1.53 2002/08/08 11:04:53 rwahl
- * Added missing comment for revision 1.51
- *
- * Revision 1.52 2002/08/08 10:09:02 jschmalz
- * Sensor init state caused wrong error log entry
- *
- * Revision 1.51 2002/08/06 09:43:03 jschmalz
- * Extensions and changes for Yukon
- *
- * Revision 1.50 2002/08/02 12:09:22 rschmidt
- * Added support for YUKON sensors.
- * Editorial changes.
- *
- * Revision 1.49 2002/07/30 11:07:52 rschmidt
- * Replaced MaxSens init by update for Copper in SkI2cInit1(),
- * because it was already initialized in SkI2cInit0().
- * Editorial changes.
- *
- * Revision 1.48 2001/08/16 12:44:33 afischer
- * LM80 sensor init values corrected
- *
- * Revision 1.47 2001/04/05 11:38:09 rassmann
- * Set SenState to idle in SkI2cWaitIrq().
- * Changed error message in SkI2cWaitIrq().
- *
- * Revision 1.46 2001/04/02 14:03:35 rassmann
- * Changed pAC to IoC in SK_IN32().
- *
- * Revision 1.45 2001/03/21 12:12:49 rassmann
- * Resetting I2C_READY interrupt in SkI2cInit1().
- *
- * Revision 1.44 2000/08/07 15:49:03 gklug
- * Fix: SK_INFAST only in NetWare driver.
- *
- * Revision 1.43 2000/08/03 14:28:17 rassmann
- * Added function to wait for I2C being ready before resetting the board.
- * Replaced one duplicate "out of range" message with correct one.
- *
- * Revision 1.42 1999/11/22 13:35:12 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.41 1999/09/14 14:11:30 malthoff
- * The 1000BT Dual Link adapter has got only one Fan.
- * The second Fan has been removed.
- *
- * Revision 1.40 1999/05/27 13:37:27 malthoff
- * Set divisor of 1 for fan count calculation.
- *
- * Revision 1.39 1999/05/20 14:54:43 malthoff
- * I2c.DummyReads is not used in Diagnostics.
- *
- * Revision 1.38 1999/05/20 09:20:56 cgoos
- * Changes for 1000Base-T (up to 9 sensors and fans).
- *
- * Revision 1.37 1999/03/25 15:11:36 gklug
- * fix: reset error flag if sensor reads correct value
- *
- * Revision 1.36 1999/01/07 14:11:16 gklug
- * fix: break added
- *
- * Revision 1.35 1999/01/05 15:31:49 gklug
- * fix: CLEAR STAT command is now added correctly
- *
- * Revision 1.34 1998/12/01 13:45:16 gklug
- * fix: introduced Init level, because we don't need reinits
- *
- * Revision 1.33 1998/11/09 14:54:25 malthoff
- * Modify I2C Transfer Timeout handling for Diagnostics.
- *
- * Revision 1.32 1998/11/03 06:54:35 gklug
- * fix: Need dummy reads at the beginning to init sensors
- *
- * Revision 1.31 1998/11/03 06:42:42 gklug
- * fix: select correctVIO range only if between warning levels
- *
- * Revision 1.30 1998/11/02 07:36:53 gklug
- * fix: Error should not include WARNING message
- *
- * Revision 1.29 1998/10/30 15:07:43 malthoff
- * Disable 'I2C does not compelete' error log for diagnostics.
- *
- * Revision 1.28 1998/10/22 09:48:11 gklug
- * fix: SysKonnectFileId typo
- *
- * Revision 1.27 1998/10/20 09:59:46 gklug
- * add: parameter to SkOsGetTime
- *
- * Revision 1.26 1998/10/09 06:10:59 malthoff
- * Remove ID_sccs by SysKonnectFileId.
- *
- * Revision 1.25 1998/09/08 12:40:26 gklug
- * fix: syntax error in if clause
- *
- * Revision 1.24 1998/09/08 12:19:42 gklug
- * chg: INIT Level checking
- *
- * Revision 1.23 1998/09/08 07:37:20 gklug
- * fix: log error if PCI_IO voltage sensor could not be initialized
- *
- * Revision 1.22 1998/09/04 08:30:03 malthoff
- * Bugfixes during SK_DIAG testing:
- * - correct NS2BCLK() macro
- * - correct SkI2cSndDev()
- * - correct SkI2cWait() loop waiting for an event
- *
- * Revision 1.21 1998/08/27 14:46:01 gklug
- * chg: if-then-else replaced by switch
- *
- * Revision 1.20 1998/08/27 14:40:07 gklug
- * test: integral types
- *
- * Revision 1.19 1998/08/25 07:51:54 gklug
- * fix: typos for compiling
- *
- * Revision 1.18 1998/08/25 06:12:24 gklug
- * add: count errors and warnings
- * fix: check not the sensor state but the ErrFlag!
- *
- * Revision 1.17 1998/08/25 05:56:48 gklug
- * add: CheckSensor function
- *
- * Revision 1.16 1998/08/20 11:41:10 gklug
- * chg: omit STRCPY macro by using char * as Sensor Description
- *
- * Revision 1.15 1998/08/20 11:37:35 gklug
- * chg: change Ioc to IoC
- *
- * Revision 1.14 1998/08/20 11:32:52 gklug
- * fix: Para compile error
- *
- * Revision 1.13 1998/08/20 11:27:41 gklug
- * fix: Compile bugs with new awrning constants
- *
- * Revision 1.12 1998/08/20 08:53:05 gklug
- * fix: compiler errors
- * add: Threshold values
- *
- * Revision 1.11 1998/08/19 12:39:22 malthoff
- * Compiler Fix: Some names have changed.
- *
- * Revision 1.10 1998/08/19 12:20:56 gklug
- * fix: remove struct from C files (see CCC)
- *
- * Revision 1.9 1998/08/19 06:28:46 malthoff
- * SkOsGetTime returns SK_U64 now.
- *
- * Revision 1.8 1998/08/17 13:53:33 gklug
- * fix: Parameter of event function and its result
- *
- * Revision 1.7 1998/08/17 07:02:15 malthoff
- * Modify the functions for accessing the I2C SW Registers.
- * Modify SkI2cWait().
- * Put Lm80RcvReg into sklm80.c
- * Remove Compiler Errors.
- *
- * Revision 1.6 1998/08/14 07:13:20 malthoff
- * remove pAc with pAC
- * remove smc with pAC
- * change names to new convention
- *
- * Revision 1.5 1998/08/14 06:24:49 gklug
- * add: init level 1 and 2
- *
- * Revision 1.4 1998/08/12 14:31:12 gklug
- * add: error log for unknown event
- *
- * Revision 1.3 1998/08/12 13:37:04 gklug
- * add: Init 0 function
- *
- * Revision 1.2 1998/08/11 07:27:15 gklug
- * add: functions of the interface
- * adapt rest of source to C coding Conventions
- * rmv: unnecessary code taken from Mona Lisa
- *
- * Revision 1.1 1998/06/19 14:28:43 malthoff
- * Created. Sources taken from ML Projekt.
- * Sources have to be reworked for GE.
- *
- *
- ******************************************************************************/
-
-
-#include <config.h>
-
-/*
- * I2C Protocol
- */
-static const char SysKonnectFileId[] =
- "$Id: ski2c.c,v 1.57 2003/01/28 09:17:38 rschmidt Exp $";
-
-#include "h/skdrv1st.h" /* Driver Specific Definitions */
-#include "h/lm80.h"
-#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-
-#ifdef __C2MAN__
-/*
- I2C protocol implementation.
-
- General Description:
-
- The I2C protocol is used for the temperature sensors and for
- the serial EEPROM which hold the configuration.
-
- This file covers functions that allow to read write and do
- some bulk requests a specified I2C address.
-
- The Genesis has 2 I2C buses. One for the EEPROM which holds
- the VPD Data and one for temperature and voltage sensor.
- The following picture shows the I2C buses, I2C devices and
- their control registers.
-
- Note: The VPD functions are in skvpd.c
-.
-. PCI Config I2C Bus for VPD Data:
-.
-. +------------+
-. | VPD EEPROM |
-. +------------+
-. |
-. | <-- I2C
-. |
-. +-----------+-----------+
-. | |
-. +-----------------+ +-----------------+
-. | PCI_VPD_ADR_REG | | PCI_VPD_DAT_REG |
-. +-----------------+ +-----------------+
-.
-.
-. I2C Bus for LM80 sensor:
-.
-. +-----------------+
-. | Temperature and |
-. | Voltage Sensor |
-. | LM80 |
-. +-----------------+
-. |
-. |
-. I2C --> |
-. |
-. +----+
-. +-------------->| OR |<--+
-. | +----+ |
-. +------+------+ |
-. | | |
-. +--------+ +--------+ +----------+
-. | B2_I2C | | B2_I2C | | B2_I2C |
-. | _CTRL | | _DATA | | _SW |
-. +--------+ +--------+ +----------+
-.
- The I2C bus may be driven by the B2_I2C_SW or by the B2_I2C_CTRL
- and B2_I2C_DATA registers.
- For driver software it is recommended to use the I2C control and
- data register, because I2C bus timing is done by the ASIC and
- an interrupt may be received when the I2C request is completed.
-
- Clock Rate Timing: MIN MAX generated by
- VPD EEPROM: 50 kHz 100 kHz HW
- LM80 over I2C Ctrl/Data reg. 50 kHz 100 kHz HW
- LM80 over B2_I2C_SW register 0 400 kHz SW
-
- Note: The clock generated by the hardware is dependend on the
- PCI clock. If the PCI bus clock is 33 MHz, the I2C/VPD
- clock is 50 kHz.
- */
-intro()
-{}
-#endif
-
-#ifdef SK_DIAG
-/*
- * I2C Fast Mode timing values used by the LM80.
- * If new devices are added to the I2C bus the timing values have to be checked.
- */
-#ifndef I2C_SLOW_TIMING
-#define T_CLK_LOW 1300L /* clock low time in ns */
-#define T_CLK_HIGH 600L /* clock high time in ns */
-#define T_DATA_IN_SETUP 100L /* data in Set-up Time */
-#define T_START_HOLD 600L /* start condition hold time */
-#define T_START_SETUP 600L /* start condition Set-up time */
-#define T_STOP_SETUP 600L /* stop condition Set-up time */
-#define T_BUS_IDLE 1300L /* time the bus must free after Tx */
-#define T_CLK_2_DATA_OUT 900L /* max. clock low to data output valid */
-#else /* I2C_SLOW_TIMING */
-/* I2C Standard Mode Timing */
-#define T_CLK_LOW 4700L /* clock low time in ns */
-#define T_CLK_HIGH 4000L /* clock high time in ns */
-#define T_DATA_IN_SETUP 250L /* data in Set-up Time */
-#define T_START_HOLD 4000L /* start condition hold time */
-#define T_START_SETUP 4700L /* start condition Set-up time */
-#define T_STOP_SETUP 4000L /* stop condition Set-up time */
-#define T_BUS_IDLE 4700L /* time the bus must free after Tx */
-#endif /* !I2C_SLOW_TIMING */
-
-#define NS2BCLK(x) (((x)*125)/10000)
-
-/*
- * I2C Wire Operations
- *
- * About I2C_CLK_LOW():
- *
- * The Data Direction bit (I2C_DATA_DIR) has to be set to input when setting
- * clock to low, to prevent the ASIC and the I2C data client from driving the
- * serial data line simultaneously (ASIC: last bit of a byte = '1', I2C client
- * send an 'ACK'). See also Concentrator Bugreport No. 10192.
- */
-#define I2C_DATA_HIGH(IoC) SK_I2C_SET_BIT(IoC, I2C_DATA)
-#define I2C_DATA_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA)
-#define I2C_DATA_OUT(IoC) SK_I2C_SET_BIT(IoC, I2C_DATA_DIR)
-#define I2C_DATA_IN(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA)
-#define I2C_CLK_HIGH(IoC) SK_I2C_SET_BIT(IoC, I2C_CLK)
-#define I2C_CLK_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK | I2C_DATA_DIR)
-#define I2C_START_COND(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK)
-
-#define NS2CLKT(x) ((x*125L)/10000)
-
-/*--------------- I2C Interface Register Functions --------------- */
-
-/*
- * sending one bit
- */
-void SkI2cSndBit(
-SK_IOC IoC, /* I/O Context */
-SK_U8 Bit) /* Bit to send */
-{
- I2C_DATA_OUT(IoC);
- if (Bit) {
- I2C_DATA_HIGH(IoC);
- }
- else {
- I2C_DATA_LOW(IoC);
- }
- SkDgWaitTime(IoC, NS2BCLK(T_DATA_IN_SETUP));
- I2C_CLK_HIGH(IoC);
- SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
- I2C_CLK_LOW(IoC);
-} /* SkI2cSndBit*/
-
-
-/*
- * Signal a start to the I2C Bus.
- *
- * A start is signaled when data goes to low in a high clock cycle.
- *
- * Ends with Clock Low.
- *
- * Status: not tested
- */
-void SkI2cStart(
-SK_IOC IoC) /* I/O Context */
-{
- /* Init data and Clock to output lines */
- /* Set Data high */
- I2C_DATA_OUT(IoC);
- I2C_DATA_HIGH(IoC);
- /* Set Clock high */
- I2C_CLK_HIGH(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_START_SETUP));
-
- /* Set Data Low */
- I2C_DATA_LOW(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_START_HOLD));
-
- /* Clock low without Data to Input */
- I2C_START_COND(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW));
-} /* SkI2cStart */
-
-
-void SkI2cStop(
-SK_IOC IoC) /* I/O Context */
-{
- /* Init data and Clock to output lines */
- /* Set Data low */
- I2C_DATA_OUT(IoC);
- I2C_DATA_LOW(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));
-
- /* Set Clock high */
- I2C_CLK_HIGH(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_STOP_SETUP));
-
- /*
- * Set Data High: Do it by setting the Data Line to Input.
- * Because of a pull up resistor the Data Line
- * floods to high.
- */
- I2C_DATA_IN(IoC);
-
- /*
- * When I2C activity is stopped
- * o DATA should be set to input and
- * o CLOCK should be set to high!
- */
- SkDgWaitTime(IoC, NS2BCLK(T_BUS_IDLE));
-} /* SkI2cStop */
-
-
-/*
- * Receive just one bit via the I2C bus.
- *
- * Note: Clock must be set to LOW before calling this function.
- *
- * Returns The received bit.
- */
-int SkI2cRcvBit(
-SK_IOC IoC) /* I/O Context */
-{
- int Bit;
- SK_U8 I2cSwCtrl;
-
- /* Init data as input line */
- I2C_DATA_IN(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));
-
- I2C_CLK_HIGH(IoC);
-
- SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
-
- SK_I2C_GET_SW(IoC, &I2cSwCtrl);
-
- Bit = (I2cSwCtrl & I2C_DATA) ? 1 : 0;
-
- I2C_CLK_LOW(IoC);
- SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW-T_CLK_2_DATA_OUT));
-
- return(Bit);
-} /* SkI2cRcvBit */
-
-
-/*
- * Receive an ACK.
- *
- * returns 0 If acknowledged
- * 1 in case of an error
- */
-int SkI2cRcvAck(
-SK_IOC IoC) /* I/O Context */
-{
- /*
- * Received bit must be zero.
- */
- return(SkI2cRcvBit(IoC) != 0);
-} /* SkI2cRcvAck */
-
-
-/*
- * Send an NACK.
- */
-void SkI2cSndNAck(
-SK_IOC IoC) /* I/O Context */
-{
- /*
- * Received bit must be zero.
- */
- SkI2cSndBit(IoC, 1);
-} /* SkI2cSndNAck */
-
-
-/*
- * Send an ACK.
- */
-void SkI2cSndAck(
-SK_IOC IoC) /* I/O Context */
-{
- /*
- * Received bit must be zero.
- *
- */
- SkI2cSndBit(IoC, 0);
-} /* SkI2cSndAck */
-
-
-/*
- * Send one byte to the I2C device and wait for ACK.
- *
- * Return acknowleged status.
- */
-int SkI2cSndByte(
-SK_IOC IoC, /* I/O Context */
-int Byte) /* byte to send */
-{
- int i;
-
- for (i = 0; i < 8; i++) {
- if (Byte & (1<<(7-i))) {
- SkI2cSndBit(IoC, 1);
- }
- else {
- SkI2cSndBit(IoC, 0);
- }
- }
-
- return(SkI2cRcvAck(IoC));
-} /* SkI2cSndByte */
-
-
-/*
- * Receive one byte and ack it.
- *
- * Return byte.
- */
-int SkI2cRcvByte(
-SK_IOC IoC, /* I/O Context */
-int Last) /* Last Byte Flag */
-{
- int i;
- int Byte = 0;
-
- for (i = 0; i < 8; i++) {
- Byte <<= 1;
- Byte |= SkI2cRcvBit(IoC);
- }
-
- if (Last) {
- SkI2cSndNAck(IoC);
- }
- else {
- SkI2cSndAck(IoC);
- }
-
- return(Byte);
-} /* SkI2cRcvByte */
-
-
-/*
- * Start dialog and send device address
- *
- * Return 0 if acknowleged, 1 in case of an error
- */
-int SkI2cSndDev(
-SK_IOC IoC, /* I/O Context */
-int Addr, /* Device Address */
-int Rw) /* Read / Write Flag */
-{
- SkI2cStart(IoC);
- Rw = ~Rw;
- Rw &= I2C_WRITE;
- return(SkI2cSndByte(IoC, (Addr<<1) | Rw));
-} /* SkI2cSndDev */
-
-#endif /* SK_DIAG */
-
-/*----------------- I2C CTRL Register Functions ----------*/
-
-/*
- * waits for a completion of an I2C transfer
- *
- * returns 0: success, transfer completes
- * 1: error, transfer does not complete, I2C transfer
- * killed, wait loop terminated.
- */
-int SkI2cWait(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
-{
- SK_U64 StartTime;
- SK_U64 CurrentTime;
- SK_U32 I2cCtrl;
-
- StartTime = SkOsGetTime(pAC);
-
- do {
- CurrentTime = SkOsGetTime(pAC);
-
- if (CurrentTime - StartTime > SK_TICKS_PER_SEC / 8) {
-
- SK_I2C_STOP(IoC);
-#ifndef SK_DIAG
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG);
-#endif /* !SK_DIAG */
- return(1);
- }
-
- SK_I2C_GET_CTL(IoC, &I2cCtrl);
-
-#ifdef xYUKON_DBG
- printf("StartTime=%lu, CurrentTime=%lu\n",
- StartTime, CurrentTime);
- if (kbhit()) {
- return(1);
- }
-#endif /* YUKON_DBG */
-
- } while ((I2cCtrl & I2C_FLAG) == (SK_U32)Event << 31);
-
- return(0);
-} /* SkI2cWait */
-
-
-/*
- * waits for a completion of an I2C transfer
- *
- * Returns
- * Nothing
- */
-void SkI2cWaitIrq(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC) /* I/O Context */
-{
- SK_SENSOR *pSen;
- SK_U64 StartTime;
- SK_U32 IrqSrc;
-
- pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
-
- if (pSen->SenState == SK_SEN_IDLE) {
- return;
- }
-
- StartTime = SkOsGetTime(pAC);
- do {
- if (SkOsGetTime(pAC) - StartTime > SK_TICKS_PER_SEC / 8) {
- SK_I2C_STOP(IoC);
-#ifndef SK_DIAG
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E016, SKERR_I2C_E016MSG);
-#endif /* !SK_DIAG */
- return;
- }
- SK_IN32(IoC, B0_ISRC, &IrqSrc);
- } while ((IrqSrc & IS_I2C_READY) == 0);
-
- pSen->SenState = SK_SEN_IDLE;
- return;
-} /* SkI2cWaitIrq */
-
-/*
- * writes a single byte or 4 bytes into the I2C device
- *
- * returns 0: success
- * 1: error
- */
-int SkI2cWrite(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 I2cData, /* I2C Data to write */
-int I2cDev, /* I2C Device Address */
-int I2cReg, /* I2C Device Register Address */
-int I2cBurst) /* I2C Burst Flag */
-{
- SK_OUT32(IoC, B2_I2C_DATA, I2cData);
- SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cReg, I2cBurst);
-
- return(SkI2cWait(pAC, IoC, I2C_WRITE));
-} /* SkI2cWrite*/
-
-
-#ifdef SK_DIAG
-
-/*
- * reads a single byte or 4 bytes from the I2C device
- *
- * returns the word read
- */
-SK_U32 SkI2cRead(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int I2cDev, /* I2C Device Address */
-int I2cReg, /* I2C Device Register Address */
-int I2cBurst) /* I2C Burst Flag */
-{
- SK_U32 Data;
-
- SK_OUT32(IoC, B2_I2C_DATA, 0);
- SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cReg, I2cBurst);
-
- if (SkI2cWait(pAC, IoC, I2C_READ) != 0) {
- w_print("%s\n", SKERR_I2C_E002MSG);
- }
-
- SK_IN32(IoC, B2_I2C_DATA, &Data);
- return(Data);
-} /* SkI2cRead */
-
-#endif /* SK_DIAG */
-
-
-/*
- * read a sensor's value
- *
- * This function reads a sensor's value from the I2C sensor chip. The sensor
- * is defined by its index into the sensors database in the struct pAC points
- * to.
- * Returns
- * 1 if the read is completed
- * 0 if the read must be continued (I2C Bus still allocated)
- */
-int SkI2cReadSensor(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_SENSOR *pSen) /* Sensor to be read */
-{
- if (pSen->SenRead != NULL) {
- return((*pSen->SenRead)(pAC, IoC, pSen));
- }
- else
- return(0); /* no success */
-} /* SkI2cReadSensor*/
-
-/*
- * Do the Init state 0 initialization
- */
-static int SkI2cInit0(
-SK_AC *pAC) /* Adapter Context */
-{
- int i;
-
- /* Begin with first sensor */
- pAC->I2c.CurrSens = 0;
-
- /* Begin with timeout control for state machine */
- pAC->I2c.TimerMode = SK_TIMER_WATCH_STATEMACHINE;
-
- /* Set sensor number to zero */
- pAC->I2c.MaxSens = 0;
-
-#ifndef SK_DIAG
- /* Initialize Number of Dummy Reads */
- pAC->I2c.DummyReads = SK_MAX_SENSORS;
-#endif
-
- for (i = 0; i < SK_MAX_SENSORS; i++) {
- pAC->I2c.SenTable[i].SenDesc = "unknown";
- pAC->I2c.SenTable[i].SenType = SK_SEN_UNKNOWN;
- pAC->I2c.SenTable[i].SenThreErrHigh = 0;
- pAC->I2c.SenTable[i].SenThreErrLow = 0;
- pAC->I2c.SenTable[i].SenThreWarnHigh = 0;
- pAC->I2c.SenTable[i].SenThreWarnLow = 0;
- pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
- pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_NONE;
- pAC->I2c.SenTable[i].SenValue = 0;
- pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_NOT_PRESENT;
- pAC->I2c.SenTable[i].SenErrCts = 0;
- pAC->I2c.SenTable[i].SenBegErrTS = 0;
- pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE;
- pAC->I2c.SenTable[i].SenRead = NULL;
- pAC->I2c.SenTable[i].SenDev = 0;
- }
-
- /* Now we are "INIT data"ed */
- pAC->I2c.InitLevel = SK_INIT_DATA;
- return(0);
-} /* SkI2cInit0*/
-
-
-/*
- * Do the init state 1 initialization
- *
- * initialize the following register of the LM80:
- * Configuration register:
- * - START, noINT, activeLOW, noINT#Clear, noRESET, noCI, noGPO#, noINIT
- *
- * Interrupt Mask Register 1:
- * - all interrupts are Disabled (0xff)
- *
- * Interrupt Mask Register 2:
- * - all interrupts are Disabled (0xff) Interrupt modi doesn't matter.
- *
- * Fan Divisor/RST_OUT register:
- * - Divisors set to 1 (bits 00), all others 0s.
- *
- * OS# Configuration/Temperature resolution Register:
- * - all 0s
- *
- */
-static int SkI2cInit1(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC) /* I/O Context */
-{
- int i;
- SK_U8 I2cSwCtrl;
- SK_GEPORT *pPrt; /* GIni Port struct pointer */
-
- if (pAC->I2c.InitLevel != SK_INIT_DATA) {
- /* ReInit not needed in I2C module */
- return(0);
- }
-
- /* Set the Direction of I2C-Data Pin to IN */
- SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA);
- /* Check for 32-Bit Yukon with Low at I2C-Data Pin */
- SK_I2C_GET_SW(IoC, &I2cSwCtrl);
-
- if ((I2cSwCtrl & I2C_DATA) == 0) {
- /* this is a 32-Bit board */
- pAC->GIni.GIYukon32Bit = SK_TRUE;
- return(0);
- }
-
- /* Check for 64 Bit Yukon without sensors */
- if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_CFG, 0) != 0) {
- return(0);
- }
-
- (void)SkI2cWrite(pAC, IoC, 0xff, LM80_ADDR, LM80_IMSK_1, 0);
-
- (void)SkI2cWrite(pAC, IoC, 0xff, LM80_ADDR, LM80_IMSK_2, 0);
-
- (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_FAN_CTRL, 0);
-
- (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, LM80_TEMP_CTRL, 0);
-
- (void)SkI2cWrite(pAC, IoC, LM80_CFG_START, LM80_ADDR, LM80_CFG, 0);
-
- /*
- * MaxSens has to be updated here, because PhyType is not
- * set when performing Init Level 0
- */
- pAC->I2c.MaxSens = 5;
-
- pPrt = &pAC->GIni.GP[0];
-
- if (pAC->GIni.GIGenesis) {
- if (pPrt->PhyType == SK_PHY_BCOM) {
- if (pAC->GIni.GIMacsFound == 1) {
- pAC->I2c.MaxSens += 1;
- }
- else {
- pAC->I2c.MaxSens += 3;
- }
- }
- }
- else {
- pAC->I2c.MaxSens += 3;
- }
-
- for (i = 0; i < pAC->I2c.MaxSens; i++) {
- switch (i) {
- case 0:
- pAC->I2c.SenTable[i].SenDesc = "Temperature";
- pAC->I2c.SenTable[i].SenType = SK_SEN_TEMP;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_TEMP_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_TEMP_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_TEMP_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_TEMP_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_TEMP_IN;
- break;
- case 1:
- pAC->I2c.SenTable[i].SenDesc = "Voltage PCI";
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_5V_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_5V_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_5V_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_5V_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_VT0_IN;
- break;
- case 2:
- pAC->I2c.SenTable[i].SenDesc = "Voltage PCI-IO";
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_IO_5V_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_IO_5V_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_IO_3V3_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_IO_3V3_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_VT1_IN;
- pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_PCI_IO;
- break;
- case 3:
- pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC";
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VDD_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VDD_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VDD_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VDD_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_VT2_IN;
- break;
- case 4:
- if (pAC->GIni.GIGenesis) {
- if (pPrt->PhyType == SK_PHY_BCOM) {
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY A PLL";
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
- }
- else {
- pAC->I2c.SenTable[i].SenDesc = "Voltage PMA";
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
- }
- }
- else {
- pAC->I2c.SenTable[i].SenDesc = "Voltage VAUX";
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VAUX_3V3_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VAUX_3V3_HIGH_WARN;
- if (pAC->GIni.GIVauxAvail) {
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
- }
- else {
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_0V_WARN_ERR;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_0V_WARN_ERR;
- }
- }
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenReg = LM80_VT3_IN;
- break;
- case 5:
- if (pAC->GIni.GIGenesis) {
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
- }
- else {
- pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC-Co 1V5";
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_CORE_1V5_LOW_ERR;
- }
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenReg = LM80_VT4_IN;
- break;
- case 6:
- if (pAC->GIni.GIGenesis) {
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY B PLL";
- }
- else {
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 3V3";
- }
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_VT5_IN;
- break;
- case 7:
- if (pAC->GIni.GIGenesis) {
- pAC->I2c.SenTable[i].SenDesc = "Speed Fan";
- pAC->I2c.SenTable[i].SenType = SK_SEN_FAN;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_FAN_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_FAN_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_FAN_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_FAN_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
- }
- else {
- pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
- pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
- pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
- pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
- pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
- pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
- pAC->I2c.SenTable[i].SenReg = LM80_VT6_IN;
- }
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_INIT | SK_ERRCL_SW,
- SKERR_I2C_E001, SKERR_I2C_E001MSG);
- break;
- }
-
- pAC->I2c.SenTable[i].SenValue = 0;
- pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_OK;
- pAC->I2c.SenTable[i].SenErrCts = 0;
- pAC->I2c.SenTable[i].SenBegErrTS = 0;
- pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE;
- pAC->I2c.SenTable[i].SenRead = SkLm80ReadSensor;
- pAC->I2c.SenTable[i].SenDev = LM80_ADDR;
- }
-
-#ifndef SK_DIAG
- pAC->I2c.DummyReads = pAC->I2c.MaxSens;
-#endif /* !SK_DIAG */
-
- /* Clear I2C IRQ */
- SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
-
- /* Now we are I/O initialized */
- pAC->I2c.InitLevel = SK_INIT_IO;
- return(0);
-} /* SkI2cInit1 */
-
-
-/*
- * Init level 2: Start first sensor read.
- */
-static int SkI2cInit2(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC) /* I/O Context */
-{
- int ReadComplete;
- SK_SENSOR *pSen;
-
- if (pAC->I2c.InitLevel != SK_INIT_IO) {
- /* ReInit not needed in I2C module */
- /* Init0 and Init2 not permitted */
- return(0);
- }
-
- pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
- ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
-
- if (ReadComplete) {
- SK_ERR_LOG(pAC, SK_ERRCL_INIT, SKERR_I2C_E008, SKERR_I2C_E008MSG);
- }
-
- /* Now we are correctly initialized */
- pAC->I2c.InitLevel = SK_INIT_RUN;
-
- return(0);
-} /* SkI2cInit2*/
-
-
-/*
- * Initialize I2C devices
- *
- * Get the first voltage value and discard it.
- * Go into temperature read mode. A default pointer is not set.
- *
- * The things to be done depend on the init level in the parameter list:
- * Level 0:
- * Initialize only the data structures. Do NOT access hardware.
- * Level 1:
- * Initialize hardware through SK_IN / SK_OUT commands. Do NOT use interrupts.
- * Level 2:
- * Everything is possible. Interrupts may be used from now on.
- *
- * return:
- * 0 = success
- * other = error.
- */
-int SkI2cInit(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context needed in levels 1 and 2 */
-int Level) /* Init Level */
-{
-
- switch (Level) {
- case SK_INIT_DATA:
- return(SkI2cInit0(pAC));
- case SK_INIT_IO:
- return(SkI2cInit1(pAC, IoC));
- case SK_INIT_RUN:
- return(SkI2cInit2(pAC, IoC));
- default:
- break;
- }
-
- return(0);
-} /* SkI2cInit */
-
-
-#ifndef SK_DIAG
-
-/*
- * Interrupt service function for the I2C Interface
- *
- * Clears the Interrupt source
- *
- * Reads the register and check it for sending a trap.
- *
- * Starts the timer if necessary.
- */
-void SkI2cIsr(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC) /* I/O Context */
-{
- SK_EVPARA Para;
-
- /* Clear I2C IRQ */
- SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
-
- Para.Para64 = 0;
- SkEventQueue(pAC, SKGE_I2C, SK_I2CEV_IRQ, Para);
-} /* SkI2cIsr */
-
-
-/*
- * Check this sensors Value against the threshold and send events.
- */
-static void SkI2cCheckSensor(
-SK_AC *pAC, /* Adapter Context */
-SK_SENSOR *pSen)
-{
- SK_EVPARA ParaLocal;
- SK_BOOL TooHigh; /* Is sensor too high? */
- SK_BOOL TooLow; /* Is sensor too low? */
- SK_U64 CurrTime; /* Current Time */
- SK_BOOL DoTrapSend; /* We need to send a trap */
- SK_BOOL DoErrLog; /* We need to log the error */
- SK_BOOL IsError; /* We need to log the error */
-
- /* Check Dummy Reads first */
- if (pAC->I2c.DummyReads > 0) {
- pAC->I2c.DummyReads--;
- return;
- }
-
- /* Get the current time */
- CurrTime = SkOsGetTime(pAC);
-
- /* Set para to the most useful setting: The current sensor. */
- ParaLocal.Para64 = (SK_U64)pAC->I2c.CurrSens;
-
- /* Check the Value against the thresholds. First: Error Thresholds */
- TooHigh = (pSen->SenValue > pSen->SenThreErrHigh);
- TooLow = (pSen->SenValue < pSen->SenThreErrLow);
-
- IsError = SK_FALSE;
- if (TooHigh || TooLow) {
- /* Error condition is satisfied */
- DoTrapSend = SK_TRUE;
- DoErrLog = SK_TRUE;
-
- /* Now error condition is satisfied */
- IsError = SK_TRUE;
-
- if (pSen->SenErrFlag == SK_SEN_ERR_ERR) {
- /* This state is the former one */
-
- /* So check first whether we have to send a trap */
- if (pSen->SenLastErrTrapTS + SK_SEN_ERR_TR_HOLD >
- CurrTime) {
- /*
- * Do NOT send the Trap. The hold back time
- * has to run out first.
- */
- DoTrapSend = SK_FALSE;
- }
-
- /* Check now whether we have to log an Error */
- if (pSen->SenLastErrLogTS + SK_SEN_ERR_LOG_HOLD >
- CurrTime) {
- /*
- * Do NOT log the error. The hold back time
- * has to run out first.
- */
- DoErrLog = SK_FALSE;
- }
- }
- else {
- /* We came from a different state -> Set Begin Time Stamp */
- pSen->SenBegErrTS = CurrTime;
- pSen->SenErrFlag = SK_SEN_ERR_ERR;
- }
-
- if (DoTrapSend) {
- /* Set current Time */
- pSen->SenLastErrTrapTS = CurrTime;
- pSen->SenErrCts++;
-
- /* Queue PNMI Event */
- SkEventQueue(pAC, SKGE_PNMI, (TooHigh ?
- SK_PNMI_EVT_SEN_ERR_UPP :
- SK_PNMI_EVT_SEN_ERR_LOW),
- ParaLocal);
- }
-
- if (DoErrLog) {
- /* Set current Time */
- pSen->SenLastErrLogTS = CurrTime;
-
- if (pSen->SenType == SK_SEN_TEMP) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E011,
- SKERR_I2C_E011MSG);
- } else if (pSen->SenType == SK_SEN_VOLT) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E012,
- SKERR_I2C_E012MSG);
- } else
- {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E015,
- SKERR_I2C_E015MSG);
- }
- }
- }
-
- /* Check the Value against the thresholds */
- /* 2nd: Warning thresholds */
- TooHigh = (pSen->SenValue > pSen->SenThreWarnHigh);
- TooLow = (pSen->SenValue < pSen->SenThreWarnLow);
-
- if (!IsError && (TooHigh || TooLow)) {
- /* Error condition is satisfied */
- DoTrapSend = SK_TRUE;
- DoErrLog = SK_TRUE;
-
- if (pSen->SenErrFlag == SK_SEN_ERR_WARN) {
- /* This state is the former one */
-
- /* So check first whether we have to send a trap */
- if (pSen->SenLastWarnTrapTS + SK_SEN_WARN_TR_HOLD >
- CurrTime) {
- /*
- * Do NOT send the Trap. The hold back time
- * has to run out first.
- */
- DoTrapSend = SK_FALSE;
- }
-
- /* Check now whether we have to log an Error */
- if (pSen->SenLastWarnLogTS + SK_SEN_WARN_LOG_HOLD >
- CurrTime) {
- /*
- * Do NOT log the error. The hold back time
- * has to run out first.
- */
- DoErrLog = SK_FALSE;
- }
- }
- else {
- /* We came from a different state -> Set Begin Time Stamp */
- pSen->SenBegWarnTS = CurrTime;
- pSen->SenErrFlag = SK_SEN_ERR_WARN;
- }
-
- if (DoTrapSend) {
- /* Set current Time */
- pSen->SenLastWarnTrapTS = CurrTime;
- pSen->SenWarnCts++;
-
- /* Queue PNMI Event */
- SkEventQueue(pAC, SKGE_PNMI, (TooHigh ?
- SK_PNMI_EVT_SEN_WAR_UPP :
- SK_PNMI_EVT_SEN_WAR_LOW),
- ParaLocal);
- }
-
- if (DoErrLog) {
- /* Set current Time */
- pSen->SenLastWarnLogTS = CurrTime;
-
- if (pSen->SenType == SK_SEN_TEMP) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E009,
- SKERR_I2C_E009MSG);
- } else if (pSen->SenType == SK_SEN_VOLT) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E010,
- SKERR_I2C_E010MSG);
- } else
- {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E014,
- SKERR_I2C_E014MSG);
- }
- }
- }
-
- /* Check for NO error at all */
- if (!IsError && !TooHigh && !TooLow) {
- /* Set o.k. Status if no error and no warning condition */
- pSen->SenErrFlag = SK_SEN_ERR_OK;
- }
-
- /* End of check against the thresholds */
-
- /* Bug fix AF: 16.Aug.2001: Correct the init base
- * of LM80 sensor.
- */
- if (pSen->SenInit == SK_SEN_DYN_INIT_PCI_IO) {
-
- pSen->SenInit = SK_SEN_DYN_INIT_NONE;
-
- if (pSen->SenValue > SK_SEN_PCI_IO_RANGE_LIMITER) {
- /* 5V PCI-IO Voltage */
- pSen->SenThreWarnLow = SK_SEN_PCI_IO_5V_LOW_WARN;
- pSen->SenThreErrLow = SK_SEN_PCI_IO_5V_LOW_ERR;
- }
- else {
- /* 3.3V PCI-IO Voltage */
- pSen->SenThreWarnHigh = SK_SEN_PCI_IO_3V3_HIGH_WARN;
- pSen->SenThreErrHigh = SK_SEN_PCI_IO_3V3_HIGH_ERR;
- }
- }
-
-#if 0
- /* Dynamic thresholds also for VAUX of LM80 sensor */
- if (pSen->SenInit == SK_SEN_DYN_INIT_VAUX) {
-
- pSen->SenInit = SK_SEN_DYN_INIT_NONE;
-
- /* 3.3V VAUX Voltage */
- if (pSen->SenValue > SK_SEN_VAUX_RANGE_LIMITER) {
- pSen->SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
- pSen->SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
- }
- /* 0V VAUX Voltage */
- else {
- pSen->SenThreWarnHigh = SK_SEN_VAUX_0V_WARN_ERR;
- pSen->SenThreErrHigh = SK_SEN_VAUX_0V_WARN_ERR;
- }
- }
-
- /*
- * Check initialization state:
- * The VIO Thresholds need adaption
- */
- if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
- pSen->SenValue > SK_SEN_WARNLOW2C &&
- pSen->SenValue < SK_SEN_WARNHIGH2) {
- pSen->SenThreErrLow = SK_SEN_ERRLOW2C;
- pSen->SenThreWarnLow = SK_SEN_WARNLOW2C;
- pSen->SenInit = SK_TRUE;
- }
-
- if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
- pSen->SenValue > SK_SEN_WARNLOW2 &&
- pSen->SenValue < SK_SEN_WARNHIGH2C) {
- pSen->SenThreErrHigh = SK_SEN_ERRHIGH2C;
- pSen->SenThreWarnHigh = SK_SEN_WARNHIGH2C;
- pSen->SenInit = SK_TRUE;
- }
-#endif
-
- if (pSen->SenInit != SK_SEN_DYN_INIT_NONE) {
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E013, SKERR_I2C_E013MSG);
- }
-} /* SkI2cCheckSensor*/
-
-
-/*
- * The only Event to be served is the timeout event
- *
- */
-int SkI2cEvent(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Event, /* Module specific Event */
-SK_EVPARA Para) /* Event specific Parameter */
-{
- int ReadComplete;
- SK_SENSOR *pSen;
- SK_U32 Time;
- SK_EVPARA ParaLocal;
- int i;
-
- /* New case: no sensors */
- if (pAC->I2c.MaxSens == 0) {
- return(0);
- }
-
- switch (Event) {
- case SK_I2CEV_IRQ:
- pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
- ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
-
- if (ReadComplete) {
- /* Check sensor against defined thresholds */
- SkI2cCheckSensor (pAC, pSen);
-
- /* Increment Current sensor and set appropriate Timeout */
- pAC->I2c.CurrSens++;
- if (pAC->I2c.CurrSens >= pAC->I2c.MaxSens) {
- pAC->I2c.CurrSens = 0;
- Time = SK_I2C_TIM_LONG;
- }
- else {
- Time = SK_I2C_TIM_SHORT;
- }
-
- /* Start Timer */
- ParaLocal.Para64 = (SK_U64)0;
-
- pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
-
- SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
- SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
- }
- else {
- /* Start Timer */
- ParaLocal.Para64 = (SK_U64)0;
-
- pAC->I2c.TimerMode = SK_TIMER_WATCH_STATEMACHINE;
-
- SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, SK_I2C_TIM_WATCH,
- SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
- }
- break;
- case SK_I2CEV_TIM:
- if (pAC->I2c.TimerMode == SK_TIMER_NEW_GAUGING) {
-
- ParaLocal.Para64 = (SK_U64)0;
- SkTimerStop(pAC, IoC, &pAC->I2c.SenTimer);
-
- pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
- ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
-
- if (ReadComplete) {
- /* Check sensor against defined thresholds */
- SkI2cCheckSensor (pAC, pSen);
-
- /* Increment Current sensor and set appropriate Timeout */
- pAC->I2c.CurrSens++;
- if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
- pAC->I2c.CurrSens = 0;
- Time = SK_I2C_TIM_LONG;
- }
- else {
- Time = SK_I2C_TIM_SHORT;
- }
-
- /* Start Timer */
- ParaLocal.Para64 = (SK_U64)0;
-
- pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
-
- SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
- SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
- }
- }
- else {
- pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
- pSen->SenErrFlag = SK_SEN_ERR_FAULTY;
- SK_I2C_STOP(IoC);
-
- /* Increment Current sensor and set appropriate Timeout */
- pAC->I2c.CurrSens++;
- if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
- pAC->I2c.CurrSens = 0;
- Time = SK_I2C_TIM_LONG;
- }
- else {
- Time = SK_I2C_TIM_SHORT;
- }
-
- /* Start Timer */
- ParaLocal.Para64 = (SK_U64)0;
-
- pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
-
- SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
- SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
- }
- break;
- case SK_I2CEV_CLEAR:
- for (i = 0; i < SK_MAX_SENSORS; i++) {
- pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_OK;
- pAC->I2c.SenTable[i].SenErrCts = 0;
- pAC->I2c.SenTable[i].SenWarnCts = 0;
- pAC->I2c.SenTable[i].SenBegErrTS = 0;
- pAC->I2c.SenTable[i].SenBegWarnTS = 0;
- pAC->I2c.SenTable[i].SenLastErrTrapTS = (SK_U64)0;
- pAC->I2c.SenTable[i].SenLastErrLogTS = (SK_U64)0;
- pAC->I2c.SenTable[i].SenLastWarnTrapTS = (SK_U64)0;
- pAC->I2c.SenTable[i].SenLastWarnLogTS = (SK_U64)0;
- }
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E006, SKERR_I2C_E006MSG);
- }
-
- return(0);
-} /* SkI2cEvent*/
-
-#endif /* !SK_DIAG */
+++ /dev/null
-/******************************************************************************
- *
- * Name: sklm80.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.20 $
- * Date: $Date: 2002/08/13 09:16:27 $
- * Purpose: Funktions to access Voltage and Temperature Sensor (LM80)
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2002 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: sklm80.c,v $
- * Revision 1.20 2002/08/13 09:16:27 rschmidt
- * Changed return value for SkLm80ReadSensor() back to 'int'
- * Editorial changes
- *
- * Revision 1.19 2002/08/06 09:43:31 jschmalz
- * Extensions and changes for Yukon
- *
- * Revision 1.18 2002/08/02 12:26:57 rschmidt
- * Editorial changes
- *
- * Revision 1.17 1999/11/22 13:35:51 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.16 1999/05/27 14:05:47 malthoff
- * Fans: Set SenVal to 0 if the fan value is 0 or 0xff. Both values
- * are outside the limits (0: div zero error, 0xff: value not in
- * range, assume 0).
- *
- * Revision 1.15 1999/05/27 13:38:51 malthoff
- * Pervent from Division by zero errors.
- *
- * Revision 1.14 1999/05/20 09:20:01 cgoos
- * Changes for 1000Base-T (Fan sensors).
- *
- * Revision 1.13 1998/10/22 09:48:14 gklug
- * fix: SysKonnectFileId typo
- *
- * Revision 1.12 1998/10/09 06:12:06 malthoff
- * Remove ID_sccs by SysKonnectFileId.
- *
- * Revision 1.11 1998/09/04 08:33:48 malthoff
- * bug fix: SenState = SK_SEN_IDLE when
- * leaving SK_SEN_VALEXT state
- *
- * Revision 1.10 1998/08/20 12:02:10 gklug
- * fix: compiler warnings type mismatch
- *
- * Revision 1.9 1998/08/20 11:37:38 gklug
- * chg: change Ioc to IoC
- *
- * Revision 1.8 1998/08/19 12:20:58 gklug
- * fix: remove struct from C files (see CCC)
- *
- * Revision 1.7 1998/08/17 07:04:57 malthoff
- * Take SkLm80RcvReg() function from ski2c.c.
- * Add IoC parameter to BREAK_OR_WAIT() macro.
- *
- * Revision 1.6 1998/08/14 07:11:28 malthoff
- * remove pAc with pAC.
- *
- * Revision 1.5 1998/08/14 06:46:55 gklug
- * fix: temperature can get negative
- *
- * Revision 1.4 1998/08/13 08:27:04 gklug
- * add: temperature reading now o.k.
- * fix: pSen declaration, SK_ERR_LOG call, ADDR macro
- *
- * Revision 1.3 1998/08/13 07:28:21 gklug
- * fix: pSen was wrong initialized
- * add: correct conversion for voltage readings
- *
- * Revision 1.2 1998/08/11 07:52:14 gklug
- * add: Lm80 read sensor function
- *
- * Revision 1.1 1998/07/17 09:57:12 gklug
- * initial version
- *
- *
- *
- ******************************************************************************/
-
-
-#include <config.h>
-
-/*
- LM80 functions
-*/
-static const char SysKonnectFileId[] =
- "$Id: sklm80.c,v 1.20 2002/08/13 09:16:27 rschmidt Exp $" ;
-
-#include "h/skdrv1st.h" /* Driver Specific Definitions */
-#include "h/lm80.h"
-#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-
-#ifdef SK_DIAG
-#define BREAK_OR_WAIT(pAC,IoC,Event) SkI2cWait(pAC,IoC,Event)
-#else /* nSK_DIAG */
-#define BREAK_OR_WAIT(pAC,IoC,Event) break
-#endif /* nSK_DIAG */
-
-#ifdef SK_DIAG
-/*
- * read the register 'Reg' from the device 'Dev'
- *
- * return read error -1
- * success the read value
- */
-int SkLm80RcvReg(
-SK_IOC IoC, /* Adapter Context */
-int Dev, /* I2C device address */
-int Reg) /* register to read */
-{
- int Val = 0;
- int TempExt;
-
- /* Signal device number */
- if (SkI2cSndDev(IoC, Dev, I2C_WRITE)) {
- return(-1);
- }
-
- if (SkI2cSndByte(IoC, Reg)) {
- return(-1);
- }
-
- /* repeat start */
- if (SkI2cSndDev(IoC, Dev, I2C_READ)) {
- return(-1);
- }
-
- switch (Reg) {
- case LM80_TEMP_IN:
- Val = (int)SkI2cRcvByte(IoC, 1);
-
- /* First: correct the value: it might be negative */
- if ((Val & 0x80) != 0) {
- /* Value is negative */
- Val = Val - 256;
- }
- Val = Val * SK_LM80_TEMP_LSB;
- SkI2cStop(IoC);
-
- TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL);
-
- if (Val > 0) {
- Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- else {
- Val -= ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- return(Val);
- break;
- case LM80_VT0_IN:
- case LM80_VT1_IN:
- case LM80_VT2_IN:
- case LM80_VT3_IN:
- Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
- break;
-
- default:
- Val = (int)SkI2cRcvByte(IoC, 1);
- break;
- }
-
- SkI2cStop(IoC);
- return(Val);
-}
-#endif /* SK_DIAG */
-
-/*
- * read a sensors value (LM80 specific)
- *
- * This function reads a sensors value from the I2C sensor chip LM80.
- * The sensor is defined by its index into the sensors database in the struct
- * pAC points to.
- *
- * Returns 1 if the read is completed
- * 0 if the read must be continued (I2C Bus still allocated)
- */
-int SkLm80ReadSensor(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context needed in level 1 and 2 */
-SK_SENSOR *pSen) /* Sensor to be read */
-{
- SK_I32 Value;
-
- switch (pSen->SenState) {
- case SK_SEN_IDLE:
- /* Send address to ADDR register */
- SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, pSen->SenReg, 0);
-
- pSen->SenState = SK_SEN_VALUE ;
- BREAK_OR_WAIT(pAC, IoC, I2C_READ);
-
- case SK_SEN_VALUE:
- /* Read value from data register */
- SK_IN32(IoC, B2_I2C_DATA, ((SK_U32 *)&Value));
-
- Value &= 0xff; /* only least significant byte is valid */
-
- /* Do NOT check the Value against the thresholds */
- /* Checking is done in the calling instance */
-
- if (pSen->SenType == SK_SEN_VOLT) {
- /* Voltage sensor */
- pSen->SenValue = Value * SK_LM80_VT_LSB;
- pSen->SenState = SK_SEN_IDLE ;
- return(1);
- }
-
- if (pSen->SenType == SK_SEN_FAN) {
- if (Value != 0 && Value != 0xff) {
- /* Fan speed counter */
- pSen->SenValue = SK_LM80_FAN_FAKTOR/Value;
- }
- else {
- /* Indicate Fan error */
- pSen->SenValue = 0;
- }
- pSen->SenState = SK_SEN_IDLE ;
- return(1);
- }
-
- /* First: correct the value: it might be negative */
- if ((Value & 0x80) != 0) {
- /* Value is negative */
- Value = Value - 256;
- }
-
- /* We have a temperature sensor and need to get the signed extension.
- * For now we get the extension from the last reading, so in the normal
- * case we won't see flickering temperatures.
- */
- pSen->SenValue = (Value * SK_LM80_TEMP_LSB) +
- (pSen->SenValue % SK_LM80_TEMP_LSB);
-
- /* Send address to ADDR register */
- SK_I2C_CTL(IoC, I2C_READ, pSen->SenDev, LM80_TEMP_CTRL, 0);
-
- pSen->SenState = SK_SEN_VALEXT ;
- BREAK_OR_WAIT(pAC, IoC, I2C_READ);
-
- case SK_SEN_VALEXT:
- /* Read value from data register */
- SK_IN32(IoC, B2_I2C_DATA, ((SK_U32 *)&Value));
- Value &= LM80_TEMP_LSB_9; /* only bit 7 is valid */
-
- /* cut the LSB bit */
- pSen->SenValue = ((pSen->SenValue / SK_LM80_TEMP_LSB) *
- SK_LM80_TEMP_LSB);
-
- if (pSen->SenValue < 0) {
- /* Value negative: The bit value must be subtracted */
- pSen->SenValue -= ((Value >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- else {
- /* Value positive: The bit value must be added */
- pSen->SenValue += ((Value >> 7) * SK_LM80_TEMPEXT_LSB);
- }
-
- pSen->SenState = SK_SEN_IDLE ;
- return(1);
-
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E007, SKERR_I2C_E007MSG);
- return(1);
- }
-
- /* Not completed */
- return(0);
-}
+++ /dev/null
-/******************************************************************************
- *
- * Name: skproc.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.4 $
- * Date: $Date: 2003/02/25 14:16:37 $
- * Purpose: Funktions to display statictic data
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Created 22-Nov-2000
- * Author: Mirko Lindner (mlindner@syskonnect.de)
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-/******************************************************************************
- *
- * History:
- *
- * $Log: skproc.c,v $
- * Revision 1.4 2003/02/25 14:16:37 mlindner
- * Fix: Copyright statement
- *
- * Revision 1.3 2002/10/02 12:59:51 mlindner
- * Add: Support for Yukon
- * Add: Speed check and setup
- * Add: Merge source for kernel 2.2.x and 2.4.x
- * Add: Read sensor names directly from VPD
- * Fix: Volt values
- *
- * Revision 1.2.2.7 2002/01/14 12:45:15 mlindner
- * Fix: Editorial changes
- *
- * Revision 1.2.2.6 2001/12/06 15:26:07 mlindner
- * Fix: Return value of proc_read
- *
- * Revision 1.2.2.5 2001/12/06 09:57:39 mlindner
- * New ProcFs entries
- *
- * Revision 1.2.2.4 2001/09/05 12:16:02 mlindner
- * Add: New ProcFs entries
- * Fix: Counter Errors (Jumbo == to long errors)
- * Fix: Kernel error compilation
- * Fix: too short counters
- *
- * Revision 1.2.2.3 2001/06/25 07:26:26 mlindner
- * Add: More error messages
- *
- * Revision 1.2.2.2 2001/03/15 12:50:13 mlindner
- * fix: ProcFS owner protection
- *
- * Revision 1.2.2.1 2001/03/12 16:43:48 mlindner
- * chg: 2.4 requirements for procfs
- *
- * Revision 1.1 2001/01/22 14:15:31 mlindner
- * added ProcFs functionality
- * Dual Net functionality integrated
- * Rlmt networks added
- *
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#include <linux/proc_fs.h>
-
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-#define ZEROPAD 1 /* pad with zero */
-#define SIGN 2 /* unsigned/signed long */
-#define PLUS 4 /* show plus */
-#define SPACE 8 /* space if plus */
-#define LEFT 16 /* left justified */
-#define SPECIALX 32 /* 0x */
-#define LARGE 64
-
-extern SK_AC *pACList;
-extern struct net_device *SkGeRootDev;
-
-extern char *SkNumber (char *str,
- long long num,
- int base,
- int size,
- int precision,
- int type);
-
-
-/*****************************************************************************
- *
- * proc_read - print "summaries" entry
- *
- * Description:
- * This function fills the proc entry with statistic data about
- * the ethernet device.
- *
- *
- * Returns: buffer with statistic data
- *
- */
-int proc_read(char *buffer,
-char **buffer_location,
-off_t offset,
-int buffer_length,
-int *eof,
-void *data)
-{
- int len = 0;
- int t;
- int i;
- DEV_NET *pNet;
- SK_AC *pAC;
- char test_buf[100];
- char sens_msg[50];
- unsigned long Flags;
- unsigned int Size;
- struct SK_NET_DEVICE *next;
- struct SK_NET_DEVICE *SkgeProcDev = SkGeRootDev;
-
- SK_PNMI_STRUCT_DATA *pPnmiStruct;
- SK_PNMI_STAT *pPnmiStat;
- struct proc_dir_entry *file = (struct proc_dir_entry*) data;
-
- while (SkgeProcDev) {
- pNet = (DEV_NET*) SkgeProcDev->priv;
- pAC = pNet->pAC;
- next = pAC->Next;
- pPnmiStruct = &pAC->PnmiStruct;
- /* NetIndex in GetStruct is now required, zero is only dummy */
-
- for (t=pAC->GIni.GIMacsFound; t > 0; t--) {
- if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 1)
- t--;
-
- spin_lock_irqsave(&pAC->SlowPathLock, Flags);
- Size = SK_PNMI_STRUCT_SIZE;
- SkPnmiGetStruct(pAC, pAC->IoBase,
- pPnmiStruct, &Size, t-1);
- spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
-
- if (strcmp(pAC->dev[t-1]->name, file->name) == 0) {
- pPnmiStat = &pPnmiStruct->Stat[0];
- len = sprintf(buffer,
- "\nDetailed statistic for device %s\n",
- pAC->dev[t-1]->name);
- len += sprintf(buffer + len,
- "=======================================\n");
-
- /* Board statistics */
- len += sprintf(buffer + len,
- "\nBoard statistics\n\n");
- len += sprintf(buffer + len,
- "Active Port %c\n",
- 'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
- Net[t-1].PrefPort]->PortNumber);
- len += sprintf(buffer + len,
- "Preferred Port %c\n",
- 'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
- Net[t-1].PrefPort]->PortNumber);
-
- len += sprintf(buffer + len,
- "Bus speed (MHz) %d\n",
- pPnmiStruct->BusSpeed);
-
- len += sprintf(buffer + len,
- "Bus width (Bit) %d\n",
- pPnmiStruct->BusWidth);
- len += sprintf(buffer + len,
- "Hardware revision v%d.%d\n",
- (pAC->GIni.GIPciHwRev >> 4) & 0x0F,
- pAC->GIni.GIPciHwRev & 0x0F);
-
- /* Print sensor informations */
- for (i=0; i < pAC->I2c.MaxSens; i ++) {
- /* Check type */
- switch (pAC->I2c.SenTable[i].SenType) {
- case 1:
- strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
- strcat(sens_msg, " (C)");
- len += sprintf(buffer + len,
- "%-25s %d.%02d\n",
- sens_msg,
- pAC->I2c.SenTable[i].SenValue / 10,
- pAC->I2c.SenTable[i].SenValue % 10);
-
- strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
- strcat(sens_msg, " (F)");
- len += sprintf(buffer + len,
- "%-25s %d.%02d\n",
- sens_msg,
- ((((pAC->I2c.SenTable[i].SenValue)
- *10)*9)/5 + 3200)/100,
- ((((pAC->I2c.SenTable[i].SenValue)
- *10)*9)/5 + 3200) % 10);
- break;
- case 2:
- strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
- strcat(sens_msg, " (V)");
- len += sprintf(buffer + len,
- "%-25s %d.%03d\n",
- sens_msg,
- pAC->I2c.SenTable[i].SenValue / 1000,
- pAC->I2c.SenTable[i].SenValue % 1000);
- break;
- case 3:
- strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
- strcat(sens_msg, " (rpm)");
- len += sprintf(buffer + len,
- "%-25s %d\n",
- sens_msg,
- pAC->I2c.SenTable[i].SenValue);
- break;
- default:
- break;
- }
- }
-
- /*Receive statistics */
- len += sprintf(buffer + len,
- "\nReceive statistics\n\n");
-
- len += sprintf(buffer + len,
- "Received bytes %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxOctetsOkCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Received packets %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxOkCts,
- 10,0,-1,0));
-#if 0
- if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC &&
- pAC->HWRevision < 12) {
- pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
- pPnmiStat->StatRxShortsCts;
- pPnmiStat->StatRxShortsCts = 0;
- }
-#endif
- if (pNet->Mtu > 1500)
- pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
- pPnmiStat->StatRxTooLongCts;
-
- len += sprintf(buffer + len,
- "Receive errors %s\n",
- SkNumber(test_buf, pPnmiStruct->InErrorsCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Receive drops %s\n",
- SkNumber(test_buf, pPnmiStruct->RxNoBufCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Received multicast %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxMulticastOkCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Receive error types\n");
- len += sprintf(buffer + len,
- " length %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxRuntCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " buffer overflow %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxFifoOverflowCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " bad crc %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxFcsCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " framing %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxFramingCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " missed frames %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxMissedCts,
- 10, 0, -1, 0));
-
- if (pNet->Mtu > 1500)
- pPnmiStat->StatRxTooLongCts = 0;
-
- len += sprintf(buffer + len,
- " too long %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxTooLongCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " carrier extension %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxCextCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " too short %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxShortsCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " symbol %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxSymbolCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " LLC MAC size %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxIRLengthCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " carrier event %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxCarrierCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " jabber %s\n",
- SkNumber(test_buf, pPnmiStat->StatRxJabberCts,
- 10, 0, -1, 0));
-
-
- /*Transmit statistics */
- len += sprintf(buffer + len,
- "\nTransmit statistics\n\n");
-
- len += sprintf(buffer + len,
- "Transmited bytes %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxOctetsOkCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Transmited packets %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxOkCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Transmit errors %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxSingleCollisionCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Transmit dropped %s\n",
- SkNumber(test_buf, pPnmiStruct->TxNoBufCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Transmit collisions %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxSingleCollisionCts,
- 10,0,-1,0));
- len += sprintf(buffer + len,
- "Transmit errors types\n");
- len += sprintf(buffer + len,
- " excessive collision %ld\n",
- pAC->stats.tx_aborted_errors);
- len += sprintf(buffer + len,
- " carrier %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxCarrierCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " fifo underrun %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxFifoUnderrunCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " heartbeat %s\n",
- SkNumber(test_buf, pPnmiStat->StatTxCarrierCts,
- 10, 0, -1, 0));
- len += sprintf(buffer + len,
- " window %ld\n",
- pAC->stats.tx_window_errors);
-
- }
- }
- SkgeProcDev = next;
- }
- if (offset >= len) {
- *eof = 1;
- return 0;
- }
-
- *buffer_location = buffer + offset;
- if (buffer_length >= len - offset) {
- *eof = 1;
- }
- return (min_t(int, buffer_length, len - offset));
-}
-
-
-/*****************************************************************************
- *
- * SkDoDiv - convert 64bit number
- *
- * Description:
- * This function "converts" a long long number.
- *
- * Returns:
- * remainder of division
- */
-static long SkDoDiv (long long Dividend, int Divisor, long long *pErg)
-{
- long Rest;
- long long Ergebnis;
- long Akku;
-
-
- Akku = Dividend >> 32;
-
- Ergebnis = ((long long) (Akku / Divisor)) << 32;
- Rest = Akku % Divisor;
-
- Akku = Rest << 16;
- Akku |= ((Dividend & 0xFFFF0000) >> 16);
-
-
- Ergebnis += ((long long) (Akku / Divisor)) << 16;
- Rest = Akku % Divisor;
-
- Akku = Rest << 16;
- Akku |= (Dividend & 0xFFFF);
-
- Ergebnis += (Akku / Divisor);
- Rest = Akku % Divisor;
-
- *pErg = Ergebnis;
- return (Rest);
-}
-
-
-#if 0
-#define do_div(n,base) ({ \
-long long __res; \
-__res = ((unsigned long long) n) % (unsigned) base; \
-n = ((unsigned long long) n) / (unsigned) base; \
-__res; })
-
-#endif
-
-
-/*****************************************************************************
- *
- * SkNumber - Print results
- *
- * Description:
- * This function converts a long long number into a string.
- *
- * Returns:
- * number as string
- */
-char * SkNumber(char * str, long long num, int base, int size, int precision
- ,int type)
-{
- char c,sign,tmp[66], *strorg = str;
- const char *digits="0123456789abcdefghijklmnopqrstuvwxyz";
- int i;
-
- if (type & LARGE)
- digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
- if (type & LEFT)
- type &= ~ZEROPAD;
- if (base < 2 || base > 36)
- return 0;
- c = (type & ZEROPAD) ? '0' : ' ';
- sign = 0;
- if (type & SIGN) {
- if (num < 0) {
- sign = '-';
- num = -num;
- size--;
- } else if (type & PLUS) {
- sign = '+';
- size--;
- } else if (type & SPACE) {
- sign = ' ';
- size--;
- }
- }
- if (type & SPECIALX) {
- if (base == 16)
- size -= 2;
- else if (base == 8)
- size--;
- }
- i = 0;
- if (num == 0)
- tmp[i++]='0';
- else while (num != 0)
- tmp[i++] = digits[SkDoDiv(num,base, &num)];
-
- if (i > precision)
- precision = i;
- size -= precision;
- if (!(type&(ZEROPAD+LEFT)))
- while(size-->0)
- *str++ = ' ';
- if (sign)
- *str++ = sign;
- if (type & SPECIALX) {
- if (base==8)
- *str++ = '0';
- else if (base==16) {
- *str++ = '0';
- *str++ = digits[33];
- }
- }
- if (!(type & LEFT))
- while (size-- > 0)
- *str++ = c;
- while (i < precision--)
- *str++ = '0';
- while (i-- > 0)
- *str++ = tmp[i];
- while (size-- > 0)
- *str++ = ' ';
-
- str[0] = '\0';
-
- return strorg;
-}
+++ /dev/null
-/******************************************************************************
- *
- * Name: skqueue.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.18 $
- * Date: $Date: 2002/05/07 14:11:11 $
- * Purpose: Management of an event queue.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skqueue.c,v $
- * Revision 1.18 2002/05/07 14:11:11 rwahl
- * Fixed Watcom Precompiler error.
- *
- * Revision 1.17 2002/03/25 10:06:41 mkunz
- * SkIgnoreEvent deleted
- *
- * Revision 1.16 2002/03/15 10:51:59 mkunz
- * Added event classes for link aggregation
- *
- * Revision 1.15 1999/11/22 13:36:29 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.14 1998/10/15 15:11:35 gklug
- * fix: ID_sccs to SysKonnectFileId
- *
- * Revision 1.13 1998/09/08 08:47:52 gklug
- * add: init level handling
- *
- * Revision 1.12 1998/09/08 07:43:20 gklug
- * fix: Sirq Event function name
- *
- * Revision 1.11 1998/09/08 05:54:34 gklug
- * chg: define SK_CSUM is replaced by SK_USE_CSUM
- *
- * Revision 1.10 1998/09/03 14:14:49 gklug
- * add: CSUM and HWAC Eventclass and function.
- *
- * Revision 1.9 1998/08/19 09:50:50 gklug
- * fix: remove struct keyword from c-code (see CCC) add typedefs
- *
- * Revision 1.8 1998/08/17 13:43:11 gklug
- * chg: Parameter will be union of 64bit para, 2 times SK_U32 or SK_PTR
- *
- * Revision 1.7 1998/08/14 07:09:11 gklug
- * fix: chg pAc -> pAC
- *
- * Revision 1.6 1998/08/11 12:13:14 gklug
- * add: return code feature of Event service routines
- * add: correct Error log calls
- *
- * Revision 1.5 1998/08/07 12:53:45 gklug
- * fix: first compiled version
- *
- * Revision 1.4 1998/08/07 09:20:48 gklug
- * adapt functions to C coding conventions.
- *
- * Revision 1.3 1998/08/05 11:29:32 gklug
- * rmv: Timer event entry. Timer will queue event directly
- *
- * Revision 1.2 1998/07/31 11:22:40 gklug
- * Initial version
- *
- * Revision 1.1 1998/07/30 15:14:01 gklug
- * Initial version. Adapted from SMT
- *
- *
- *
- ******************************************************************************/
-
-
-#include <config.h>
-
-/*
- Event queue and dispatcher
-*/
-static const char SysKonnectFileId[] =
- "$Header: /usr56/projects/ge/schedule/skqueue.c,v 1.18 2002/05/07 14:11:11 rwahl Exp $" ;
-
-#include "h/skdrv1st.h" /* Driver Specific Definitions */
-#include "h/skqueue.h" /* Queue Definitions */
-#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-
-#ifdef __C2MAN__
-/*
- Event queue management.
-
- General Description:
-
- */
-intro()
-{}
-#endif
-
-#define PRINTF(a,b,c)
-
-/*
- * init event queue management
- *
- * Must be called during init level 0.
- */
-void SkEventInit(
-SK_AC *pAC, /* Adapter context */
-SK_IOC Ioc, /* IO context */
-int Level) /* Init level */
-{
- switch (Level) {
- case SK_INIT_DATA:
- pAC->Event.EvPut = pAC->Event.EvGet = pAC->Event.EvQueue ;
- break;
- default:
- break;
- }
-}
-
-/*
- * add event to queue
- */
-void SkEventQueue(
-SK_AC *pAC, /* Adapters context */
-SK_U32 Class, /* Event Class */
-SK_U32 Event, /* Event to be queued */
-SK_EVPARA Para) /* Event parameter */
-{
- pAC->Event.EvPut->Class = Class ;
- pAC->Event.EvPut->Event = Event ;
- pAC->Event.EvPut->Para = Para ;
- if (++pAC->Event.EvPut == &pAC->Event.EvQueue[SK_MAX_EVENT])
- pAC->Event.EvPut = pAC->Event.EvQueue ;
-
- if (pAC->Event.EvPut == pAC->Event.EvGet) {
- SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E001, SKERR_Q_E001MSG) ;
- }
-}
-
-/*
- * event dispatcher
- * while event queue is not empty
- * get event from queue
- * send command to state machine
- * end
- * return error reported by individual Event function
- * 0 if no error occured.
- */
-int SkEventDispatcher(
-SK_AC *pAC, /* Adapters Context */
-SK_IOC Ioc) /* Io context */
-{
- SK_EVENTELEM *pEv ; /* pointer into queue */
- SK_U32 Class ;
- int Rtv ;
-
- pEv = pAC->Event.EvGet ;
- PRINTF("dispatch get %x put %x\n",pEv,pAC->Event.ev_put) ;
- while (pEv != pAC->Event.EvPut) {
- PRINTF("dispatch Class %d Event %d\n",pEv->Class,pEv->Event) ;
- switch(Class = pEv->Class) {
-#ifndef SK_USE_LAC_EV
- case SKGE_RLMT : /* RLMT Event */
- Rtv = SkRlmtEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
- case SKGE_I2C : /* I2C Event */
- Rtv = SkI2cEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
- case SKGE_PNMI :
- Rtv = SkPnmiEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
-#endif /* SK_USE_LAC_EV */
- case SKGE_DRV : /* Driver Event */
- Rtv = SkDrvEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
-#ifndef SK_USE_SW_TIMER
- case SKGE_HWAC :
- Rtv = SkGeSirqEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
-#else /* !SK_USE_SW_TIMER */
- case SKGE_SWT :
- Rtv = SkSwtEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
-#endif /* !SK_USE_SW_TIMER */
-#ifdef SK_USE_LAC_EV
- case SKGE_LACP :
- Rtv = SkLacpEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
- case SKGE_RSF :
- Rtv = SkRsfEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
- case SKGE_MARKER :
- Rtv = SkMarkerEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
- case SKGE_FD :
- Rtv = SkFdEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
-#endif /* SK_USE_LAC_EV */
-#ifdef SK_USE_CSUM
- case SKGE_CSUM :
- Rtv = SkCsEvent(pAC,Ioc,pEv->Event,pEv->Para);
- break ;
-#endif /* SK_USE_CSUM */
- default :
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_Q_E002,
- SKERR_Q_E002MSG) ;
- Rtv = 0;
- }
-
- if (Rtv != 0) {
- return(Rtv) ;
- }
-
- if (++pEv == &pAC->Event.EvQueue[SK_MAX_EVENT])
- pEv = pAC->Event.EvQueue ;
-
- /* Renew get: it is used in queue_events to detect overruns */
- pAC->Event.EvGet = pEv;
- }
-
- return(0) ;
-}
-
-/* End of file */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skrlmt.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.68 $
- * Date: $Date: 2003/01/31 15:26:56 $
- * Purpose: Manage links on SK-NET Adapters, esp. redundant ones.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2001 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skrlmt.c,v $
- * Revision 1.68 2003/01/31 15:26:56 rschmidt
- * Added init for local variables in RlmtInit().
- *
- * Revision 1.67 2003/01/31 14:12:41 mkunz
- * single port adapter runs now with two identical MAC addresses
- *
- * Revision 1.66 2002/09/23 15:14:19 rwahl
- * - Reset broadcast timestamp on link down.
- * - Editorial corrections.
- *
- * Revision 1.65 2002/07/22 14:29:48 rwahl
- * - Removed BRK statement from debug check.
- *
- * Revision 1.64 2001/11/28 19:36:14 rwahl
- * - RLMT Packets sent to an invalid MAC address in CLP/CLPSS mode
- * (#10650).
- * - Reworked fix for port switching in CLS mode (#10639)
- * (no dependency to RLMT module).
- * - Enabled dbg output for entry/exit of event functions.
- * - Editorial changes.
- *
- * Revision 1.63 2001/10/26 07:53:18 afischer
- * Port switching bug in `check local link` mode
- *
- * Revision 1.62 2001/07/03 12:16:30 mkunz
- * New Flag ChgBcPrio (Change priority of last broadcast received)
- *
- * Revision 1.61 2001/03/14 12:52:08 rassmann
- * Fixed reporting of active port up/down to PNMI.
- *
- * Revision 1.60 2001/02/21 16:02:25 gklug
- * fix: when RLMT starts set Active Port for PNMI
- *
- * Revision 1.59 2001/02/16 14:38:19 rassmann
- * Initializing some pointers earlier in the init phase.
- * Rx Mbufs are freed if the net which they belong to is stopped.
- *
- * Revision 1.58 2001/02/14 14:06:31 rassmann
- * Editorial changes.
- *
- * Revision 1.57 2001/02/05 14:25:26 rassmann
- * Prepared RLMT for transparent operation.
- *
- * Revision 1.56 2001/01/30 10:29:09 rassmann
- * Not checking switching befor RlmtStart.
- * Editorial changes.
- *
- * Revision 1.55 2001/01/22 13:41:38 rassmann
- * Supporting two nets on dual-port adapters.
- *
- * Revision 1.54 2000/11/30 13:25:07 rassmann
- * Setting SK_TICK_INCR to 1 by default.
- *
- * Revision 1.53 2000/11/30 10:48:07 cgoos
- * Changed definition of SK_RLMT_BC_DELTA.
- *
- * Revision 1.52 2000/11/27 12:50:03 rassmann
- * Checking ports after receiving broadcasts.
- *
- * Revision 1.51 2000/11/17 08:58:00 rassmann
- * Moved CheckSwitch from SK_RLMT_PACKET_RECEIVED to SK_RLMT_TIM event.
- *
- * Revision 1.50 2000/11/09 12:24:34 rassmann
- * Indicating that segmentation check is not running anymore after
- * SkRlmtCheckSeg().
- * Restarting segmentation timer after segmentation log.
- * Editorial changes.
- *
- * Revision 1.49 1999/11/22 13:38:02 cgoos
- * Changed license header to GPL.
- * Added initialization to some variables to avoid compiler warnings.
- *
- * Revision 1.48 1999/10/04 14:01:17 rassmann
- * Corrected reaction to reception of BPDU frames (#10441).
- *
- * Revision 1.47 1999/07/20 12:53:36 rassmann
- * Fixed documentation errors for lookahead macros.
- *
- * Revision 1.46 1999/05/28 13:29:16 rassmann
- * Replaced C++-style comment.
- *
- * Revision 1.45 1999/05/28 13:28:08 rassmann
- * Corrected syntax error (xxx).
- *
- * Revision 1.44 1999/05/28 11:15:54 rassmann
- * Changed behaviour to reflect Design Spec v1.2.
- * Controlling Link LED(s).
- * Introduced RLMT Packet Version field in RLMT Packet.
- * Newstyle lookahead macros (checking meta-information before looking at
- * the packet).
- *
- * Revision 1.43 1999/01/28 13:12:43 rassmann
- * Corrected Lookahead (bug introduced in previous Rev.).
- *
- * Revision 1.42 1999/01/28 12:50:41 rassmann
- * Not using broadcast time stamps in CheckLinkState mode.
- *
- * Revision 1.41 1999/01/27 14:13:02 rassmann
- * Monitoring broadcast traffic.
- * Switching more reliably and not too early if switch is
- * configured for spanning tree.
- *
- * Revision 1.40 1999/01/22 13:17:30 rassmann
- * Informing PNMI of NET_UP.
- * Clearing RLMT multicast addresses before setting them for the first time.
- * Reporting segmentation earlier, setting a "quiet time"
- * after a report.
- *
- * Revision 1.39 1998/12/10 15:29:53 rassmann
- * Corrected SuspectStatus in SkRlmtBuildCheckChain().
- * Corrected CHECK_SEG mode.
- *
- * Revision 1.38 1998/12/08 13:11:23 rassmann
- * Stopping SegTimer at RlmtStop.
- *
- * Revision 1.37 1998/12/07 16:51:42 rassmann
- * Corrected comments.
- *
- * Revision 1.36 1998/12/04 10:58:56 rassmann
- * Setting next pointer to NULL when receiving.
- *
- * Revision 1.35 1998/12/03 16:12:42 rassmann
- * Ignoring/correcting illegal PrefPort values.
- *
- * Revision 1.34 1998/12/01 11:45:35 rassmann
- * Code cleanup.
- *
- * Revision 1.33 1998/12/01 10:29:32 rassmann
- * Starting standby ports before getting the net up.
- * Checking if a port is started when the link comes up.
- *
- * Revision 1.32 1998/11/30 16:19:50 rassmann
- * New default for PortNoRx.
- *
- * Revision 1.31 1998/11/27 19:17:13 rassmann
- * Corrected handling of LINK_DOWN coming shortly after LINK_UP.
- *
- * Revision 1.30 1998/11/24 12:37:31 rassmann
- * Implemented segmentation check.
- *
- * Revision 1.29 1998/11/18 13:04:32 rassmann
- * Secured PortUpTimer event.
- * Waiting longer before starting standby port(s).
- *
- * Revision 1.28 1998/11/17 13:43:04 rassmann
- * Handling (logical) tx failure.
- * Sending packet on logical address after PORT_SWITCH.
- *
- * Revision 1.27 1998/11/13 17:09:50 rassmann
- * Secured some events against being called in wrong state.
- *
- * Revision 1.26 1998/11/13 16:56:54 rassmann
- * Added macro version of SkRlmtLookaheadPacket.
- *
- * Revision 1.25 1998/11/06 18:06:04 rassmann
- * Corrected timing when RLMT checks fail.
- * Clearing tx counter earlier in periodical checks.
- *
- * Revision 1.24 1998/11/05 10:37:27 rassmann
- * Checking destination address in Lookahead.
- *
- * Revision 1.23 1998/11/03 13:53:49 rassmann
- * RLMT should switch now (at least in mode 3).
- *
- * Revision 1.22 1998/10/29 14:34:49 rassmann
- * Clearing SK_RLMT struct at startup.
- * Initializing PortsUp during SK_RLMT_START.
- *
- * Revision 1.21 1998/10/28 11:30:17 rassmann
- * Default mode is now SK_RLMT_CHECK_LOC_LINK.
- *
- * Revision 1.20 1998/10/26 16:02:03 rassmann
- * Ignoring LINK_DOWN for links that are down.
- *
- * Revision 1.19 1998/10/22 15:54:01 rassmann
- * Corrected EtherLen.
- * Starting Link Check when second port comes up.
- *
- * Revision 1.18 1998/10/22 11:39:50 rassmann
- * Corrected signed/unsigned mismatches.
- * Corrected receive list handling and address recognition.
- *
- * Revision 1.17 1998/10/19 17:01:20 rassmann
- * More detailed checking of received packets.
- *
- * Revision 1.16 1998/10/15 15:16:34 rassmann
- * Finished Spanning Tree checking.
- * Checked with lint.
- *
- * Revision 1.15 1998/09/24 19:16:07 rassmann
- * Code cleanup.
- * Introduced Timer for PORT_DOWN due to no RX.
- *
- * Revision 1.14 1998/09/18 20:27:14 rassmann
- * Added address override.
- *
- * Revision 1.13 1998/09/16 11:31:48 rassmann
- * Including skdrv1st.h again. :(
- *
- * Revision 1.12 1998/09/16 11:09:50 rassmann
- * Syntax corrections.
- *
- * Revision 1.11 1998/09/15 12:32:03 rassmann
- * Syntax correction.
- *
- * Revision 1.10 1998/09/15 11:28:49 rassmann
- * Syntax corrections.
- *
- * Revision 1.9 1998/09/14 17:07:37 rassmann
- * Added code for port checking via LAN.
- * Changed Mbuf definition.
- *
- * Revision 1.8 1998/09/07 11:14:14 rassmann
- * Syntax corrections.
- *
- * Revision 1.7 1998/09/07 09:06:07 rassmann
- * Syntax corrections.
- *
- * Revision 1.6 1998/09/04 19:41:33 rassmann
- * Syntax corrections.
- * Started entering code for checking local links.
- *
- * Revision 1.5 1998/09/04 12:14:27 rassmann
- * Interface cleanup.
- *
- * Revision 1.4 1998/09/02 16:55:28 rassmann
- * Updated to reflect new DRV/HWAC/RLMT interface.
- *
- * Revision 1.3 1998/08/27 14:29:03 rassmann
- * Code cleanup.
- *
- * Revision 1.2 1998/08/27 14:26:24 rassmann
- * Updated interface.
- *
- * Revision 1.1 1998/08/21 08:26:49 rassmann
- * First public version.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * Description:
- *
- * This module contains code for Link ManagemenT (LMT) of SK-NET Adapters.
- * It is mainly intended for adapters with more than one link.
- * For such adapters, this module realizes Redundant Link ManagemenT (RLMT).
- *
- * Include File Hierarchy:
- *
- * "skdrv1st.h"
- * "skdrv2nd.h"
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#ifndef lint
-static const char SysKonnectFileId[] =
- "@(#) $Id: skrlmt.c,v 1.68 2003/01/31 15:26:56 rschmidt Exp $ (C) SysKonnect.";
-#endif /* !defined(lint) */
-
-#define __SKRLMT_C
-
-#ifdef __cplusplus
-#error C++ is not yet supported.
-extern "C" {
-#endif /* cplusplus */
-
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-
-/* defines ********************************************************************/
-
-#ifndef SK_HWAC_LINK_LED
-#define SK_HWAC_LINK_LED(a,b,c,d)
-#endif /* !defined(SK_HWAC_LINK_LED) */
-
-#ifndef DEBUG
-#define RLMT_STATIC static
-#else /* DEBUG */
-#define RLMT_STATIC
-
-#ifndef SK_LITTLE_ENDIAN
-/* First 32 bits */
-#define OFFS_LO32 1
-
-/* Second 32 bits */
-#define OFFS_HI32 0
-#else /* SK_LITTLE_ENDIAN */
-/* First 32 bits */
-#define OFFS_LO32 0
-
-/* Second 32 bits */
-#define OFFS_HI32 1
-#endif /* SK_LITTLE_ENDIAN */
-
-#endif /* DEBUG */
-
-/* ----- Private timeout values ----- */
-
-#define SK_RLMT_MIN_TO_VAL 125000 /* 1/8 sec. */
-#define SK_RLMT_DEF_TO_VAL 1000000 /* 1 sec. */
-#define SK_RLMT_PORTDOWN_TIM_VAL 900000 /* another 0.9 sec. */
-#define SK_RLMT_PORTSTART_TIM_VAL 100000 /* 0.1 sec. */
-#define SK_RLMT_PORTUP_TIM_VAL 2500000 /* 2.5 sec. */
-#define SK_RLMT_SEG_TO_VAL 900000000 /* 15 min. */
-
-/* Assume tick counter increment is 1 - may be set OS-dependent. */
-#ifndef SK_TICK_INCR
-#define SK_TICK_INCR SK_CONSTU64(1)
-#endif /* !defined(SK_TICK_INCR) */
-
-/*
- * Amount that a time stamp must be later to be recognized as "substantially
- * later". This is about 1/128 sec, but above 1 tick counter increment.
- */
-#define SK_RLMT_BC_DELTA (1 + ((SK_TICKS_PER_SEC >> 7) > SK_TICK_INCR ? \
- (SK_TICKS_PER_SEC >> 7) : SK_TICK_INCR))
-
-/* ----- Private RLMT defaults ----- */
-
-#define SK_RLMT_DEF_PREF_PORT 0 /* "Lower" port. */
-#define SK_RLMT_DEF_MODE SK_RLMT_CHECK_LINK /* Default RLMT Mode. */
-
-/* ----- Private RLMT checking states ----- */
-
-#define SK_RLMT_RCS_SEG 1 /* RLMT Check State: check seg. */
-#define SK_RLMT_RCS_START_SEG 2 /* RLMT Check State: start check seg. */
-#define SK_RLMT_RCS_SEND_SEG 4 /* RLMT Check State: send BPDU packet */
-#define SK_RLMT_RCS_REPORT_SEG 8 /* RLMT Check State: report seg. */
-
-/* ----- Private PORT checking states ----- */
-
-#define SK_RLMT_PCS_TX 1 /* Port Check State: check tx. */
-#define SK_RLMT_PCS_RX 2 /* Port Check State: check rx. */
-
-/* ----- Private PORT events ----- */
-
-/* Note: Update simulation when changing these. */
-#define SK_RLMT_PORTSTART_TIM 1100 /* Port start timeout. */
-#define SK_RLMT_PORTUP_TIM 1101 /* Port can now go up. */
-#define SK_RLMT_PORTDOWN_RX_TIM 1102 /* Port did not receive once ... */
-#define SK_RLMT_PORTDOWN 1103 /* Port went down. */
-#define SK_RLMT_PORTDOWN_TX_TIM 1104 /* Partner did not receive ... */
-
-/* ----- Private RLMT events ----- */
-
-/* Note: Update simulation when changing these. */
-#define SK_RLMT_TIM 2100 /* RLMT timeout. */
-#define SK_RLMT_SEG_TIM 2101 /* RLMT segmentation check timeout. */
-
-#define TO_SHORTEN(tim) ((tim) / 2)
-
-/* Error numbers and messages. */
-#define SKERR_RLMT_E001 (SK_ERRBASE_RLMT + 0)
-#define SKERR_RLMT_E001_MSG "No Packet."
-#define SKERR_RLMT_E002 (SKERR_RLMT_E001 + 1)
-#define SKERR_RLMT_E002_MSG "Short Packet."
-#define SKERR_RLMT_E003 (SKERR_RLMT_E002 + 1)
-#define SKERR_RLMT_E003_MSG "Unknown RLMT event."
-#define SKERR_RLMT_E004 (SKERR_RLMT_E003 + 1)
-#define SKERR_RLMT_E004_MSG "PortsUp incorrect."
-#define SKERR_RLMT_E005 (SKERR_RLMT_E004 + 1)
-#define SKERR_RLMT_E005_MSG \
- "Net seems to be segmented (different root bridges are reported on the ports)."
-#define SKERR_RLMT_E006 (SKERR_RLMT_E005 + 1)
-#define SKERR_RLMT_E006_MSG "Duplicate MAC Address detected."
-#define SKERR_RLMT_E007 (SKERR_RLMT_E006 + 1)
-#define SKERR_RLMT_E007_MSG "LinksUp incorrect."
-#define SKERR_RLMT_E008 (SKERR_RLMT_E007 + 1)
-#define SKERR_RLMT_E008_MSG "Port not started but link came up."
-#define SKERR_RLMT_E009 (SKERR_RLMT_E008 + 1)
-#define SKERR_RLMT_E009_MSG "Corrected illegal setting of Preferred Port."
-#define SKERR_RLMT_E010 (SKERR_RLMT_E009 + 1)
-#define SKERR_RLMT_E010_MSG "Ignored illegal Preferred Port."
-
-/* LLC field values. */
-#define LLC_COMMAND_RESPONSE_BIT 1
-#define LLC_TEST_COMMAND 0xE3
-#define LLC_UI 0x03
-
-/* RLMT Packet fields. */
-#define SK_RLMT_DSAP 0
-#define SK_RLMT_SSAP 0
-#define SK_RLMT_CTRL (LLC_TEST_COMMAND)
-#define SK_RLMT_INDICATOR0 0x53 /* S */
-#define SK_RLMT_INDICATOR1 0x4B /* K */
-#define SK_RLMT_INDICATOR2 0x2D /* - */
-#define SK_RLMT_INDICATOR3 0x52 /* R */
-#define SK_RLMT_INDICATOR4 0x4C /* L */
-#define SK_RLMT_INDICATOR5 0x4D /* M */
-#define SK_RLMT_INDICATOR6 0x54 /* T */
-#define SK_RLMT_PACKET_VERSION 0
-
-/* RLMT SPT Flag values. */
-#define SK_RLMT_SPT_FLAG_CHANGE 0x01
-#define SK_RLMT_SPT_FLAG_CHANGE_ACK 0x80
-
-/* RLMT SPT Packet fields. */
-#define SK_RLMT_SPT_DSAP 0x42
-#define SK_RLMT_SPT_SSAP 0x42
-#define SK_RLMT_SPT_CTRL (LLC_UI)
-#define SK_RLMT_SPT_PROTOCOL_ID0 0x00
-#define SK_RLMT_SPT_PROTOCOL_ID1 0x00
-#define SK_RLMT_SPT_PROTOCOL_VERSION_ID 0x00
-#define SK_RLMT_SPT_BPDU_TYPE 0x00
-#define SK_RLMT_SPT_FLAGS 0x00 /* ?? */
-#define SK_RLMT_SPT_ROOT_ID0 0xFF /* Lowest possible priority. */
-#define SK_RLMT_SPT_ROOT_ID1 0xFF /* Lowest possible priority. */
-
-/* Remaining 6 bytes will be the current port address. */
-#define SK_RLMT_SPT_ROOT_PATH_COST0 0x00
-#define SK_RLMT_SPT_ROOT_PATH_COST1 0x00
-#define SK_RLMT_SPT_ROOT_PATH_COST2 0x00
-#define SK_RLMT_SPT_ROOT_PATH_COST3 0x00
-#define SK_RLMT_SPT_BRIDGE_ID0 0xFF /* Lowest possible priority. */
-#define SK_RLMT_SPT_BRIDGE_ID1 0xFF /* Lowest possible priority. */
-
-/* Remaining 6 bytes will be the current port address. */
-#define SK_RLMT_SPT_PORT_ID0 0xFF /* Lowest possible priority. */
-#define SK_RLMT_SPT_PORT_ID1 0xFF /* Lowest possible priority. */
-#define SK_RLMT_SPT_MSG_AGE0 0x00
-#define SK_RLMT_SPT_MSG_AGE1 0x00
-#define SK_RLMT_SPT_MAX_AGE0 0x00
-#define SK_RLMT_SPT_MAX_AGE1 0xFF
-#define SK_RLMT_SPT_HELLO_TIME0 0x00
-#define SK_RLMT_SPT_HELLO_TIME1 0xFF
-#define SK_RLMT_SPT_FWD_DELAY0 0x00
-#define SK_RLMT_SPT_FWD_DELAY1 0x40
-
-/* Size defines. */
-#define SK_RLMT_MIN_PACKET_SIZE 34
-#define SK_RLMT_MAX_PACKET_SIZE (SK_RLMT_MAX_TX_BUF_SIZE)
-#define SK_PACKET_DATA_LEN (SK_RLMT_MAX_PACKET_SIZE - \
- SK_RLMT_MIN_PACKET_SIZE)
-
-/* ----- RLMT packet types ----- */
-#define SK_PACKET_ANNOUNCE 1 /* Port announcement. */
-#define SK_PACKET_ALIVE 2 /* Alive packet to port. */
-#define SK_PACKET_ADDR_CHANGED 3 /* Port address changed. */
-#define SK_PACKET_CHECK_TX 4 /* Check your tx line. */
-
-#ifdef SK_LITTLE_ENDIAN
-#define SK_U16_TO_NETWORK_ORDER(Val,Addr) { \
- SK_U8 *_Addr = (SK_U8*)(Addr); \
- SK_U16 _Val = (SK_U16)(Val); \
- *_Addr++ = (SK_U8)(_Val >> 8); \
- *_Addr = (SK_U8)(_Val & 0xFF); \
-}
-#endif /* SK_LITTLE_ENDIAN */
-
-#ifdef SK_BIG_ENDIAN
-#define SK_U16_TO_NETWORK_ORDER(Val,Addr) (*(SK_U16*)(Addr) = (SK_U16)(Val))
-#endif /* SK_BIG_ENDIAN */
-
-#define AUTONEG_FAILED SK_FALSE
-#define AUTONEG_SUCCESS SK_TRUE
-
-
-/* typedefs *******************************************************************/
-
-/* RLMT packet. Length: SK_RLMT_MAX_PACKET_SIZE (60) bytes. */
-typedef struct s_RlmtPacket {
- SK_U8 DstAddr[SK_MAC_ADDR_LEN];
- SK_U8 SrcAddr[SK_MAC_ADDR_LEN];
- SK_U8 TypeLen[2];
- SK_U8 DSap;
- SK_U8 SSap;
- SK_U8 Ctrl;
- SK_U8 Indicator[7];
- SK_U8 RlmtPacketType[2];
- SK_U8 Align1[2];
- SK_U8 Random[4]; /* Random value of requesting(!) station. */
- SK_U8 RlmtPacketVersion[2]; /* RLMT Packet version. */
- SK_U8 Data[SK_PACKET_DATA_LEN];
-} SK_RLMT_PACKET;
-
-typedef struct s_SpTreeRlmtPacket {
- SK_U8 DstAddr[SK_MAC_ADDR_LEN];
- SK_U8 SrcAddr[SK_MAC_ADDR_LEN];
- SK_U8 TypeLen[2];
- SK_U8 DSap;
- SK_U8 SSap;
- SK_U8 Ctrl;
- SK_U8 ProtocolId[2];
- SK_U8 ProtocolVersionId;
- SK_U8 BpduType;
- SK_U8 Flags;
- SK_U8 RootId[8];
- SK_U8 RootPathCost[4];
- SK_U8 BridgeId[8];
- SK_U8 PortId[2];
- SK_U8 MessageAge[2];
- SK_U8 MaxAge[2];
- SK_U8 HelloTime[2];
- SK_U8 ForwardDelay[2];
-} SK_SPTREE_PACKET;
-
-/* global variables ***********************************************************/
-
-SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}};
-SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}};
-SK_MAC_ADDR BcAddr = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}};
-
-/* local variables ************************************************************/
-
-/* None. */
-
-/* functions ******************************************************************/
-
-RLMT_STATIC void SkRlmtCheckSwitch(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 NetIdx);
-RLMT_STATIC void SkRlmtCheckSeg(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 NetIdx);
-RLMT_STATIC void SkRlmtEvtSetNets(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_EVPARA Para);
-
-/******************************************************************************
- *
- * SkRlmtInit - initialize data, set state to init
- *
- * Description:
- *
- * SK_INIT_DATA
- * ============
- *
- * This routine initializes all RLMT-related variables to a known state.
- * The initial state is SK_RLMT_RS_INIT.
- * All ports are initialized to SK_RLMT_PS_INIT.
- *
- *
- * SK_INIT_IO
- * ==========
- *
- * Nothing.
- *
- *
- * SK_INIT_RUN
- * ===========
- *
- * Determine the adapter's random value.
- * Set the hw registers, the "logical MAC address", the
- * RLMT multicast address, and eventually the BPDU multicast address.
- *
- * Context:
- * init, pageable
- *
- * Returns:
- * Nothing.
- */
-void SkRlmtInit(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Level) /* Initialization Level */
-{
- SK_U32 i, j;
- SK_U64 Random;
- SK_EVPARA Para;
- SK_MAC_ADDR VirtualMacAddress;
- SK_MAC_ADDR PhysicalAMacAddress;
- SK_BOOL VirtualMacAddressSet;
- SK_BOOL PhysicalAMacAddressSet;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_INIT,
- ("RLMT Init level %d.\n", Level))
-
- switch (Level) {
- case SK_INIT_DATA: /* Initialize data structures. */
- SK_MEMSET((char *)&pAC->Rlmt, 0, sizeof(SK_RLMT));
-
- for (i = 0; i < SK_MAX_MACS; i++) {
- pAC->Rlmt.Port[i].PortState = SK_RLMT_PS_INIT;
- pAC->Rlmt.Port[i].LinkDown = SK_TRUE;
- pAC->Rlmt.Port[i].PortDown = SK_TRUE;
- pAC->Rlmt.Port[i].PortStarted = SK_FALSE;
- pAC->Rlmt.Port[i].PortNoRx = SK_FALSE;
- pAC->Rlmt.Port[i].RootIdSet = SK_FALSE;
- pAC->Rlmt.Port[i].PortNumber = i;
- pAC->Rlmt.Port[i].Net = &pAC->Rlmt.Net[0];
- pAC->Rlmt.Port[i].AddrPort = &pAC->Addr.Port[i];
- }
-
- pAC->Rlmt.NumNets = 1;
- for (i = 0; i < SK_MAX_NETS; i++) {
- pAC->Rlmt.Net[i].RlmtState = SK_RLMT_RS_INIT;
- pAC->Rlmt.Net[i].RootIdSet = SK_FALSE;
- pAC->Rlmt.Net[i].PrefPort = SK_RLMT_DEF_PREF_PORT;
- pAC->Rlmt.Net[i].Preference = 0xFFFFFFFF; /* Automatic. */
- /* Just assuming. */
- pAC->Rlmt.Net[i].ActivePort = pAC->Rlmt.Net[i].PrefPort;
- pAC->Rlmt.Net[i].RlmtMode = SK_RLMT_DEF_MODE;
- pAC->Rlmt.Net[i].TimeoutValue = SK_RLMT_DEF_TO_VAL;
- pAC->Rlmt.Net[i].NetNumber = i;
- }
-
- pAC->Rlmt.Net[0].Port[0] = &pAC->Rlmt.Port[0];
- pAC->Rlmt.Net[0].Port[1] = &pAC->Rlmt.Port[1];
-#if SK_MAX_NETS > 1
- pAC->Rlmt.Net[1].Port[0] = &pAC->Rlmt.Port[1];
-#endif /* SK_MAX_NETS > 1 */
- break;
-
- case SK_INIT_IO: /* GIMacsFound first available here. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_INIT,
- ("RLMT: %d MACs were detected.\n", pAC->GIni.GIMacsFound))
-
- pAC->Rlmt.Net[0].NumPorts = pAC->GIni.GIMacsFound;
-
- /* Initialize HW registers? */
- if (pAC->GIni.GIMacsFound == 1) {
- Para.Para32[0] = SK_RLMT_MODE_CLS;
- Para.Para32[1] = 0;
- (void)SkRlmtEvent(pAC, IoC, SK_RLMT_MODE_CHANGE, Para);
- }
- break;
-
- case SK_INIT_RUN:
- /* Ensure RLMT is set to one net. */
- if (pAC->Rlmt.NumNets > 1) {
- Para.Para32[0] = 1;
- Para.Para32[1] = -1;
- SkRlmtEvtSetNets(pAC, IoC, Para);
- }
-
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- SK_U64 *pRandom = &Random;
- Random = SkOsGetTime(pAC);
- *(SK_U32*)&pAC->Rlmt.Port[i].Random = *(SK_U32*)pRandom;
-
- for (j = 0; j < 4; j++) {
- pAC->Rlmt.Port[i].Random[j] ^= pAC->Rlmt.Port[i].AddrPort->
- CurrentMacAddress.a[SK_MAC_ADDR_LEN - 1 - j];
- }
-
- (void)SkAddrMcClear(pAC, IoC, i, SK_ADDR_PERMANENT | SK_MC_SW_ONLY);
-
- /* Add RLMT MC address. */
- (void)SkAddrMcAdd(pAC, IoC, i, &SkRlmtMcAddr, SK_ADDR_PERMANENT);
-
- if (pAC->Rlmt.Net[0].RlmtMode & SK_RLMT_CHECK_SEG) {
- /* Add BPDU MC address. */
- (void)SkAddrMcAdd(pAC, IoC, i, &BridgeMcAddr, SK_ADDR_PERMANENT);
- }
-
- (void)SkAddrMcUpdate(pAC, IoC, i);
- }
-
- VirtualMacAddressSet = SK_FALSE;
- /* Read virtual MAC address from Control Register File. */
- for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
-
- SK_IN8(IoC, B2_MAC_1 + j, &VirtualMacAddress.a[j]);
- VirtualMacAddressSet |= VirtualMacAddress.a[j];
- }
-
- PhysicalAMacAddressSet = SK_FALSE;
- /* Read physical MAC address for MAC A from Control Register File. */
- for (j = 0; j < SK_MAC_ADDR_LEN; j++) {
-
- SK_IN8(IoC, B2_MAC_2 + j, &PhysicalAMacAddress.a[j]);
- PhysicalAMacAddressSet |= PhysicalAMacAddress.a[j];
- }
-
- /* check if the two mac addresses contain reasonable values */
- if (!VirtualMacAddressSet || !PhysicalAMacAddressSet) {
-
- pAC->Rlmt.RlmtOff = SK_TRUE;
- }
-
- /* if the two mac addresses are equal switch off the RLMT_PRE_LOOKAHEAD
- and the RLMT_LOOKAHEAD macros */
- else if (SK_ADDR_EQUAL(PhysicalAMacAddress.a, VirtualMacAddress.a)) {
-
- pAC->Rlmt.RlmtOff = SK_TRUE;
- }
- else {
- pAC->Rlmt.RlmtOff = SK_FALSE;
- }
- break;
-
- default: /* error */
- break;
- }
- return;
-} /* SkRlmtInit */
-
-
-/******************************************************************************
- *
- * SkRlmtBuildCheckChain - build the check chain
- *
- * Description:
- * This routine builds the local check chain:
- * - Each port that is up checks the next port.
- * - The last port that is up checks the first port that is up.
- *
- * Notes:
- * - Currently only local ports are considered when building the chain.
- * - Currently the SuspectState is just reset;
- * it would be better to save it ...
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtBuildCheckChain(
-SK_AC *pAC, /* Adapter Context */
-SK_U32 NetIdx) /* Net Number */
-{
- SK_U32 i;
- SK_U32 NumMacsUp;
- SK_RLMT_PORT * FirstMacUp;
- SK_RLMT_PORT * PrevMacUp;
-
- FirstMacUp = NULL;
- PrevMacUp = NULL;
-
- if (!(pAC->Rlmt.Net[NetIdx].RlmtMode & SK_RLMT_CHECK_LOC_LINK)) {
- for (i = 0; i < pAC->Rlmt.Net[i].NumPorts; i++) {
- pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked = 0;
- }
- return; /* Done. */
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SkRlmtBuildCheckChain.\n"))
-
- NumMacsUp = 0;
-
- for (i = 0; i < pAC->Rlmt.Net[NetIdx].NumPorts; i++) {
- pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked = 0;
- pAC->Rlmt.Net[NetIdx].Port[i]->PortsSuspect = 0;
- pAC->Rlmt.Net[NetIdx].Port[i]->CheckingState &=
- ~(SK_RLMT_PCS_RX | SK_RLMT_PCS_TX);
-
- /*
- * If more than two links are detected we should consider
- * checking at least two other ports:
- * 1. the next port that is not LinkDown and
- * 2. the next port that is not PortDown.
- */
- if (!pAC->Rlmt.Net[NetIdx].Port[i]->LinkDown) {
- if (NumMacsUp == 0) {
- FirstMacUp = pAC->Rlmt.Net[NetIdx].Port[i];
- }
- else {
- PrevMacUp->PortCheck[
- pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked].CheckAddr =
- pAC->Rlmt.Net[NetIdx].Port[i]->AddrPort->CurrentMacAddress;
- PrevMacUp->PortCheck[
- PrevMacUp->PortsChecked].SuspectTx = SK_FALSE;
- PrevMacUp->PortsChecked++;
- }
- PrevMacUp = pAC->Rlmt.Net[NetIdx].Port[i];
- NumMacsUp++;
- }
- }
-
- if (NumMacsUp > 1) {
- PrevMacUp->PortCheck[PrevMacUp->PortsChecked].CheckAddr =
- FirstMacUp->AddrPort->CurrentMacAddress;
- PrevMacUp->PortCheck[PrevMacUp->PortsChecked].SuspectTx =
- SK_FALSE;
- PrevMacUp->PortsChecked++;
- }
-
-#ifdef DEBUG
- for (i = 0; i < pAC->Rlmt.Net[NetIdx].NumPorts; i++) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Port %d checks %d other ports: %2X.\n", i,
- pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked,
- pAC->Rlmt.Net[NetIdx].Port[i]->PortCheck[0].CheckAddr.a[5]))
- }
-#endif /* DEBUG */
-
- return;
-} /* SkRlmtBuildCheckChain */
-
-
-/******************************************************************************
- *
- * SkRlmtBuildPacket - build an RLMT packet
- *
- * Description:
- * This routine sets up an RLMT packet.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * NULL or pointer to RLMT mbuf
- */
-RLMT_STATIC SK_MBUF *SkRlmtBuildPacket(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 PortNumber, /* Sending port */
-SK_U16 PacketType, /* RLMT packet type */
-SK_MAC_ADDR *SrcAddr, /* Source address */
-SK_MAC_ADDR *DestAddr) /* Destination address */
-{
- int i;
- SK_U16 Length;
- SK_MBUF *pMb;
- SK_RLMT_PACKET *pPacket;
-
-#ifdef DEBUG
- SK_U8 CheckSrc = 0;
- SK_U8 CheckDest = 0;
-
- for (i = 0; i < SK_MAC_ADDR_LEN; ++i) {
- CheckSrc |= SrcAddr->a[i];
- CheckDest |= DestAddr->a[i];
- }
-
- if ((CheckSrc == 0) || (CheckDest == 0)) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_ERR,
- ("SkRlmtBuildPacket: Invalid %s%saddr.\n",
- (CheckSrc == 0 ? "Src" : ""), (CheckDest == 0 ? "Dest" : "")))
- }
-#endif
-
- if ((pMb = SkDrvAllocRlmtMbuf(pAC, IoC, SK_RLMT_MAX_PACKET_SIZE)) != NULL) {
- pPacket = (SK_RLMT_PACKET*)pMb->pData;
- for (i = 0; i < SK_MAC_ADDR_LEN; i++) {
- pPacket->DstAddr[i] = DestAddr->a[i];
- pPacket->SrcAddr[i] = SrcAddr->a[i];
- }
- pPacket->DSap = SK_RLMT_DSAP;
- pPacket->SSap = SK_RLMT_SSAP;
- pPacket->Ctrl = SK_RLMT_CTRL;
- pPacket->Indicator[0] = SK_RLMT_INDICATOR0;
- pPacket->Indicator[1] = SK_RLMT_INDICATOR1;
- pPacket->Indicator[2] = SK_RLMT_INDICATOR2;
- pPacket->Indicator[3] = SK_RLMT_INDICATOR3;
- pPacket->Indicator[4] = SK_RLMT_INDICATOR4;
- pPacket->Indicator[5] = SK_RLMT_INDICATOR5;
- pPacket->Indicator[6] = SK_RLMT_INDICATOR6;
-
- SK_U16_TO_NETWORK_ORDER(PacketType, &pPacket->RlmtPacketType[0]);
-
- for (i = 0; i < 4; i++) {
- pPacket->Random[i] = pAC->Rlmt.Port[PortNumber].Random[i];
- }
-
- SK_U16_TO_NETWORK_ORDER(
- SK_RLMT_PACKET_VERSION, &pPacket->RlmtPacketVersion[0]);
-
- for (i = 0; i < SK_PACKET_DATA_LEN; i++) {
- pPacket->Data[i] = 0x00;
- }
-
- Length = SK_RLMT_MAX_PACKET_SIZE; /* Or smaller. */
- pMb->Length = Length;
- pMb->PortIdx = PortNumber;
- Length -= 14;
- SK_U16_TO_NETWORK_ORDER(Length, &pPacket->TypeLen[0]);
-
- if (PacketType == SK_PACKET_ALIVE) {
- pAC->Rlmt.Port[PortNumber].TxHelloCts++;
- }
- }
-
- return (pMb);
-} /* SkRlmtBuildPacket */
-
-
-/******************************************************************************
- *
- * SkRlmtBuildSpanningTreePacket - build spanning tree check packet
- *
- * Description:
- * This routine sets up a BPDU packet for spanning tree check.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * NULL or pointer to RLMT mbuf
- */
-RLMT_STATIC SK_MBUF *SkRlmtBuildSpanningTreePacket(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 PortNumber) /* Sending port */
-{
- unsigned i;
- SK_U16 Length;
- SK_MBUF *pMb;
- SK_SPTREE_PACKET *pSPacket;
-
- if ((pMb = SkDrvAllocRlmtMbuf(pAC, IoC, SK_RLMT_MAX_PACKET_SIZE)) !=
- NULL) {
- pSPacket = (SK_SPTREE_PACKET*)pMb->pData;
- for (i = 0; i < SK_MAC_ADDR_LEN; i++) {
- pSPacket->DstAddr[i] = BridgeMcAddr.a[i];
- pSPacket->SrcAddr[i] =
- pAC->Addr.Port[PortNumber].CurrentMacAddress.a[i];
- }
- pSPacket->DSap = SK_RLMT_SPT_DSAP;
- pSPacket->SSap = SK_RLMT_SPT_SSAP;
- pSPacket->Ctrl = SK_RLMT_SPT_CTRL;
-
- pSPacket->ProtocolId[0] = SK_RLMT_SPT_PROTOCOL_ID0;
- pSPacket->ProtocolId[1] = SK_RLMT_SPT_PROTOCOL_ID1;
- pSPacket->ProtocolVersionId = SK_RLMT_SPT_PROTOCOL_VERSION_ID;
- pSPacket->BpduType = SK_RLMT_SPT_BPDU_TYPE;
- pSPacket->Flags = SK_RLMT_SPT_FLAGS;
- pSPacket->RootId[0] = SK_RLMT_SPT_ROOT_ID0;
- pSPacket->RootId[1] = SK_RLMT_SPT_ROOT_ID1;
- pSPacket->RootPathCost[0] = SK_RLMT_SPT_ROOT_PATH_COST0;
- pSPacket->RootPathCost[1] = SK_RLMT_SPT_ROOT_PATH_COST1;
- pSPacket->RootPathCost[2] = SK_RLMT_SPT_ROOT_PATH_COST2;
- pSPacket->RootPathCost[3] = SK_RLMT_SPT_ROOT_PATH_COST3;
- pSPacket->BridgeId[0] = SK_RLMT_SPT_BRIDGE_ID0;
- pSPacket->BridgeId[1] = SK_RLMT_SPT_BRIDGE_ID1;
-
- /*
- * Use logical MAC address as bridge ID and filter these packets
- * on receive.
- */
- for (i = 0; i < SK_MAC_ADDR_LEN; i++) {
- pSPacket->BridgeId[i + 2] = pSPacket->RootId[i + 2] =
- pAC->Addr.Net[pAC->Rlmt.Port[PortNumber].Net->NetNumber].
- CurrentMacAddress.a[i];
- }
- pSPacket->PortId[0] = SK_RLMT_SPT_PORT_ID0;
- pSPacket->PortId[1] = SK_RLMT_SPT_PORT_ID1;
- pSPacket->MessageAge[0] = SK_RLMT_SPT_MSG_AGE0;
- pSPacket->MessageAge[1] = SK_RLMT_SPT_MSG_AGE1;
- pSPacket->MaxAge[0] = SK_RLMT_SPT_MAX_AGE0;
- pSPacket->MaxAge[1] = SK_RLMT_SPT_MAX_AGE1;
- pSPacket->HelloTime[0] = SK_RLMT_SPT_HELLO_TIME0;
- pSPacket->HelloTime[1] = SK_RLMT_SPT_HELLO_TIME1;
- pSPacket->ForwardDelay[0] = SK_RLMT_SPT_FWD_DELAY0;
- pSPacket->ForwardDelay[1] = SK_RLMT_SPT_FWD_DELAY1;
-
- Length = SK_RLMT_MAX_PACKET_SIZE; /* Or smaller. */
- pMb->Length = Length;
- pMb->PortIdx = PortNumber;
- Length -= 14;
- SK_U16_TO_NETWORK_ORDER(Length, &pSPacket->TypeLen[0]);
-
- pAC->Rlmt.Port[PortNumber].TxSpHelloReqCts++;
- }
-
- return (pMb);
-} /* SkRlmtBuildSpanningTreePacket */
-
-
-/******************************************************************************
- *
- * SkRlmtSend - build and send check packets
- *
- * Description:
- * Depending on the RLMT state and the checking state, several packets
- * are sent through the indicated port.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing.
- */
-RLMT_STATIC void SkRlmtSend(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 PortNumber) /* Sending port */
-{
- unsigned j;
- SK_EVPARA Para;
- SK_RLMT_PORT *pRPort;
-
- pRPort = &pAC->Rlmt.Port[PortNumber];
- if (pAC->Rlmt.Port[PortNumber].Net->RlmtMode & SK_RLMT_CHECK_LOC_LINK) {
- if (pRPort->CheckingState & (SK_RLMT_PCS_TX | SK_RLMT_PCS_RX)) {
- /* Port is suspicious. Send the RLMT packet to the RLMT mc addr. */
- if ((Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC, PortNumber,
- SK_PACKET_ALIVE, &pAC->Addr.Port[PortNumber].CurrentMacAddress,
- &SkRlmtMcAddr)) != NULL) {
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- }
- }
- else {
- /*
- * Send a directed RLMT packet to all ports that are
- * checked by the indicated port.
- */
- for (j = 0; j < pRPort->PortsChecked; j++) {
- if ((Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC, PortNumber,
- SK_PACKET_ALIVE, &pAC->Addr.Port[PortNumber].CurrentMacAddress,
- &pRPort->PortCheck[j].CheckAddr)) != NULL) {
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- }
- }
- }
- }
-
- if ((pAC->Rlmt.Port[PortNumber].Net->RlmtMode & SK_RLMT_CHECK_SEG) &&
- (pAC->Rlmt.Port[PortNumber].Net->CheckingState & SK_RLMT_RCS_SEND_SEG)) {
- /*
- * Send a BPDU packet to make a connected switch tell us
- * the correct root bridge.
- */
- if ((Para.pParaPtr =
- SkRlmtBuildSpanningTreePacket(pAC, IoC, PortNumber)) != NULL) {
- pAC->Rlmt.Port[PortNumber].Net->CheckingState &= ~SK_RLMT_RCS_SEND_SEG;
- pRPort->RootIdSet = SK_FALSE;
-
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_TX,
- ("SkRlmtSend: BPDU Packet on Port %u.\n", PortNumber))
- }
- }
- return;
-} /* SkRlmtSend */
-
-
-/******************************************************************************
- *
- * SkRlmtPortReceives - check if port is (going) down and bring it up
- *
- * Description:
- * This routine checks if a port who received a non-BPDU packet
- * needs to go up or needs to be stopped going down.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing.
- */
-RLMT_STATIC void SkRlmtPortReceives(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 PortNumber) /* Port to check */
-{
- SK_RLMT_PORT *pRPort;
- SK_EVPARA Para;
-
- pRPort = &pAC->Rlmt.Port[PortNumber];
- pRPort->PortNoRx = SK_FALSE;
-
- if ((pRPort->PortState == SK_RLMT_PS_DOWN) &&
- !(pRPort->CheckingState & SK_RLMT_PCS_TX)) {
- /*
- * Port is marked down (rx), but received a non-BPDU packet.
- * Bring it up.
- */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Received on PortDown.\n"))
-
- pRPort->PortState = SK_RLMT_PS_GOING_UP;
- pRPort->GuTimeStamp = SkOsGetTime(pAC);
- Para.Para32[0] = PortNumber;
- Para.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->UpTimer, SK_RLMT_PORTUP_TIM_VAL,
- SKGE_RLMT, SK_RLMT_PORTUP_TIM, Para);
- pRPort->CheckingState &= ~SK_RLMT_PCS_RX;
- /* pAC->Rlmt.CheckSwitch = SK_TRUE; */
- SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
- } /* PortDown && !SuspectTx */
- else if (pRPort->CheckingState & SK_RLMT_PCS_RX) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Stop bringing port down.\n"))
- SkTimerStop(pAC, IoC, &pRPort->DownRxTimer);
- pRPort->CheckingState &= ~SK_RLMT_PCS_RX;
- /* pAC->Rlmt.CheckSwitch = SK_TRUE; */
- SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
- } /* PortGoingDown */
-
- return;
-} /* SkRlmtPortReceives */
-
-
-/******************************************************************************
- *
- * SkRlmtPacketReceive - receive a packet for closer examination
- *
- * Description:
- * This routine examines a packet more closely than SK_RLMT_LOOKAHEAD.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing.
- */
-RLMT_STATIC void SkRlmtPacketReceive(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_MBUF *pMb) /* Received packet */
-{
-#ifdef xDEBUG
- extern void DumpData(char *p, int size);
-#endif /* DEBUG */
- int i;
- unsigned j;
- SK_U16 PacketType;
- SK_U32 PortNumber;
- SK_ADDR_PORT *pAPort;
- SK_RLMT_PORT *pRPort;
- SK_RLMT_PACKET *pRPacket;
- SK_SPTREE_PACKET *pSPacket;
- SK_EVPARA Para;
-
- PortNumber = pMb->PortIdx;
- pAPort = &pAC->Addr.Port[PortNumber];
- pRPort = &pAC->Rlmt.Port[PortNumber];
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: PortNumber == %d.\n", PortNumber))
-
- pRPacket = (SK_RLMT_PACKET*)pMb->pData;
- pSPacket = (SK_SPTREE_PACKET*)pRPacket;
-
-#ifdef xDEBUG
- DumpData((char *)pRPacket, 32);
-#endif /* DEBUG */
-
- if ((pRPort->PacketsPerTimeSlot - pRPort->BpduPacketsPerTimeSlot) != 0) {
- SkRlmtPortReceives(pAC, IoC, PortNumber);
- }
-
- /* Check destination address. */
-
- if (!SK_ADDR_EQUAL(pAPort->CurrentMacAddress.a, pRPacket->DstAddr) &&
- !SK_ADDR_EQUAL(SkRlmtMcAddr.a, pRPacket->DstAddr) &&
- !SK_ADDR_EQUAL(BridgeMcAddr.a, pRPacket->DstAddr)) {
-
- /* Not sent to current MAC or registered MC address => Trash it. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Not for me.\n"))
-
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- return;
- }
- else if (SK_ADDR_EQUAL(pAPort->CurrentMacAddress.a, pRPacket->SrcAddr)) {
-
- /*
- * Was sent by same port (may happen during port switching
- * or in case of duplicate MAC addresses).
- */
-
- /*
- * Check for duplicate address here:
- * If Packet.Random != My.Random => DupAddr.
- */
- for (i = 3; i >= 0; i--) {
- if (pRPort->Random[i] != pRPacket->Random[i]) {
- break;
- }
- }
-
- /*
- * CAUTION: Do not check for duplicate MAC address in RLMT Alive Reply
- * packets (they have the LLC_COMMAND_RESPONSE_BIT set in
- * pRPacket->SSap).
- */
- if (i >= 0 && pRPacket->DSap == SK_RLMT_DSAP &&
- pRPacket->Ctrl == SK_RLMT_CTRL &&
- pRPacket->SSap == SK_RLMT_SSAP &&
- pRPacket->Indicator[0] == SK_RLMT_INDICATOR0 &&
- pRPacket->Indicator[1] == SK_RLMT_INDICATOR1 &&
- pRPacket->Indicator[2] == SK_RLMT_INDICATOR2 &&
- pRPacket->Indicator[3] == SK_RLMT_INDICATOR3 &&
- pRPacket->Indicator[4] == SK_RLMT_INDICATOR4 &&
- pRPacket->Indicator[5] == SK_RLMT_INDICATOR5 &&
- pRPacket->Indicator[6] == SK_RLMT_INDICATOR6) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Duplicate MAC Address.\n"))
-
- /* Error Log entry. */
- SK_ERR_LOG(pAC, SK_ERRCL_COMM, SKERR_RLMT_E006, SKERR_RLMT_E006_MSG);
- }
- else {
- /* Simply trash it. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Sent by me.\n"))
- }
-
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- return;
- }
-
- /* Check SuspectTx entries. */
- if (pRPort->PortsSuspect > 0) {
- for (j = 0; j < pRPort->PortsChecked; j++) {
- if (pRPort->PortCheck[j].SuspectTx &&
- SK_ADDR_EQUAL(
- pRPacket->SrcAddr, pRPort->PortCheck[j].CheckAddr.a)) {
- pRPort->PortCheck[j].SuspectTx = SK_FALSE;
- pRPort->PortsSuspect--;
- break;
- }
- }
- }
-
- /* Determine type of packet. */
- if (pRPacket->DSap == SK_RLMT_DSAP &&
- pRPacket->Ctrl == SK_RLMT_CTRL &&
- (pRPacket->SSap & ~LLC_COMMAND_RESPONSE_BIT) == SK_RLMT_SSAP &&
- pRPacket->Indicator[0] == SK_RLMT_INDICATOR0 &&
- pRPacket->Indicator[1] == SK_RLMT_INDICATOR1 &&
- pRPacket->Indicator[2] == SK_RLMT_INDICATOR2 &&
- pRPacket->Indicator[3] == SK_RLMT_INDICATOR3 &&
- pRPacket->Indicator[4] == SK_RLMT_INDICATOR4 &&
- pRPacket->Indicator[5] == SK_RLMT_INDICATOR5 &&
- pRPacket->Indicator[6] == SK_RLMT_INDICATOR6) {
-
- /* It's an RLMT packet. */
- PacketType = (SK_U16)((pRPacket->RlmtPacketType[0] << 8) |
- pRPacket->RlmtPacketType[1]);
-
- switch (PacketType) {
- case SK_PACKET_ANNOUNCE: /* Not yet used. */
-#if 0
- /* Build the check chain. */
- SkRlmtBuildCheckChain(pAC);
-#endif /* 0 */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Announce.\n"))
-
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- break;
-
- case SK_PACKET_ALIVE:
- if (pRPacket->SSap & LLC_COMMAND_RESPONSE_BIT) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Alive Reply.\n"))
-
- if (!(pAC->Addr.Port[PortNumber].PromMode & SK_PROM_MODE_LLC) ||
- SK_ADDR_EQUAL(
- pRPacket->DstAddr, pAPort->CurrentMacAddress.a)) {
- /* Obviously we could send something. */
- if (pRPort->CheckingState & SK_RLMT_PCS_TX) {
- pRPort->CheckingState &= ~SK_RLMT_PCS_TX;
- SkTimerStop(pAC, IoC, &pRPort->DownTxTimer);
- }
-
- if ((pRPort->PortState == SK_RLMT_PS_DOWN) &&
- !(pRPort->CheckingState & SK_RLMT_PCS_RX)) {
- pRPort->PortState = SK_RLMT_PS_GOING_UP;
- pRPort->GuTimeStamp = SkOsGetTime(pAC);
-
- SkTimerStop(pAC, IoC, &pRPort->DownTxTimer);
-
- Para.Para32[0] = PortNumber;
- Para.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->UpTimer,
- SK_RLMT_PORTUP_TIM_VAL, SKGE_RLMT,
- SK_RLMT_PORTUP_TIM, Para);
- }
- }
-
- /* Mark sending port as alive? */
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- }
- else { /* Alive Request Packet. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Alive Request.\n"))
-
- pRPort->RxHelloCts++;
-
- /* Answer. */
- for (i = 0; i < SK_MAC_ADDR_LEN; i++) {
- pRPacket->DstAddr[i] = pRPacket->SrcAddr[i];
- pRPacket->SrcAddr[i] =
- pAC->Addr.Port[PortNumber].CurrentMacAddress.a[i];
- }
- pRPacket->SSap |= LLC_COMMAND_RESPONSE_BIT;
-
- Para.pParaPtr = pMb;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- }
- break;
-
- case SK_PACKET_CHECK_TX:
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Check your tx line.\n"))
-
- /* A port checking us requests us to check our tx line. */
- pRPort->CheckingState |= SK_RLMT_PCS_TX;
-
- /* Start PortDownTx timer. */
- Para.Para32[0] = PortNumber;
- Para.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->DownTxTimer,
- SK_RLMT_PORTDOWN_TIM_VAL, SKGE_RLMT,
- SK_RLMT_PORTDOWN_TX_TIM, Para);
-
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
-
- if ((Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC, PortNumber,
- SK_PACKET_ALIVE, &pAC->Addr.Port[PortNumber].CurrentMacAddress,
- &SkRlmtMcAddr)) != NULL) {
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- }
- break;
-
- case SK_PACKET_ADDR_CHANGED:
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Address Change.\n"))
-
- /* Build the check chain. */
- SkRlmtBuildCheckChain(pAC, pRPort->Net->NetNumber);
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- break;
-
- default:
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Unknown RLMT packet.\n"))
-
- /* RA;:;: ??? */
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- }
- }
- else if (pSPacket->DSap == SK_RLMT_SPT_DSAP &&
- pSPacket->Ctrl == SK_RLMT_SPT_CTRL &&
- (pSPacket->SSap & ~LLC_COMMAND_RESPONSE_BIT) == SK_RLMT_SPT_SSAP) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: BPDU Packet.\n"))
-
- /* Spanning Tree packet. */
- pRPort->RxSpHelloCts++;
-
- if (!SK_ADDR_EQUAL(&pSPacket->RootId[2], &pAC->Addr.Net[pAC->Rlmt.
- Port[PortNumber].Net->NetNumber].CurrentMacAddress.a[0])) {
- /*
- * Check segmentation if a new root bridge is set and
- * the segmentation check is not currently running.
- */
- if (!SK_ADDR_EQUAL(&pSPacket->RootId[2], &pRPort->Root.Id[2]) &&
- (pAC->Rlmt.Port[PortNumber].Net->LinksUp > 1) &&
- (pAC->Rlmt.Port[PortNumber].Net->RlmtMode & SK_RLMT_CHECK_SEG)
- != 0 && (pAC->Rlmt.Port[PortNumber].Net->CheckingState &
- SK_RLMT_RCS_SEG) == 0) {
- pAC->Rlmt.Port[PortNumber].Net->CheckingState |=
- SK_RLMT_RCS_START_SEG | SK_RLMT_RCS_SEND_SEG;
- }
-
- /* Store tree view of this port. */
- for (i = 0; i < 8; i++) {
- pRPort->Root.Id[i] = pSPacket->RootId[i];
- }
- pRPort->RootIdSet = SK_TRUE;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_DUMP,
- ("Root ID %d: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
- PortNumber,
- pRPort->Root.Id[0], pRPort->Root.Id[1],
- pRPort->Root.Id[2], pRPort->Root.Id[3],
- pRPort->Root.Id[4], pRPort->Root.Id[5],
- pRPort->Root.Id[6], pRPort->Root.Id[7]))
- }
-
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- if ((pAC->Rlmt.Port[PortNumber].Net->CheckingState &
- SK_RLMT_RCS_REPORT_SEG) != 0) {
- SkRlmtCheckSeg(pAC, IoC, pAC->Rlmt.Port[PortNumber].Net->NetNumber);
- }
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
- ("SkRlmtPacketReceive: Unknown Packet Type.\n"))
-
- /* Unknown packet. */
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- }
- return;
-} /* SkRlmtPacketReceive */
-
-
-/******************************************************************************
- *
- * SkRlmtCheckPort - check if a port works
- *
- * Description:
- * This routine checks if a port whose link is up received something
- * and if it seems to transmit successfully.
- *
- * # PortState: PsInit, PsLinkDown, PsDown, PsGoingUp, PsUp
- * # PortCheckingState (Bitfield): ChkTx, ChkRx, ChkSeg
- * # RlmtCheckingState (Bitfield): ChkSeg, StartChkSeg, ReportSeg
- *
- * if (Rx - RxBpdu == 0) { # No rx.
- * if (state == PsUp) {
- * PortCheckingState |= ChkRx
- * }
- * if (ModeCheckSeg && (Timeout ==
- * TO_SHORTEN(RLMT_DEFAULT_TIMEOUT))) {
- * RlmtCheckingState |= ChkSeg)
- * PortCheckingState |= ChkSeg
- * }
- * NewTimeout = TO_SHORTEN(Timeout)
- * if (NewTimeout < RLMT_MIN_TIMEOUT) {
- * NewTimeout = RLMT_MIN_TIMEOUT
- * PortState = PsDown
- * ...
- * }
- * }
- * else { # something was received
- * # Set counter to 0 at LinkDown?
- * # No - rx may be reported after LinkDown ???
- * PortCheckingState &= ~ChkRx
- * NewTimeout = RLMT_DEFAULT_TIMEOUT
- * if (RxAck == 0) {
- * possible reasons:
- * is my tx line bad? --
- * send RLMT multicast and report
- * back internally? (only possible
- * between ports on same adapter)
- * }
- * if (RxChk == 0) {
- * possible reasons:
- * - tx line of port set to check me
- * maybe bad
- * - no other port/adapter available or set
- * to check me
- * - adapter checking me has a longer
- * timeout
- * ??? anything that can be done here?
- * }
- * }
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * New timeout value.
- */
-RLMT_STATIC SK_U32 SkRlmtCheckPort(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 PortNumber) /* Port to check */
-{
- unsigned i;
- SK_U32 NewTimeout;
- SK_RLMT_PORT *pRPort;
- SK_EVPARA Para;
-
- pRPort = &pAC->Rlmt.Port[PortNumber];
-
- if ((pRPort->PacketsPerTimeSlot - pRPort->BpduPacketsPerTimeSlot) == 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SkRlmtCheckPort %d: No (%d) receives in last time slot.\n",
- PortNumber, pRPort->PacketsPerTimeSlot))
-
- /*
- * Check segmentation if there was no receive at least twice
- * in a row (PortNoRx is already set) and the segmentation
- * check is not currently running.
- */
-
- if (pRPort->PortNoRx && (pAC->Rlmt.Port[PortNumber].Net->LinksUp > 1) &&
- (pAC->Rlmt.Port[PortNumber].Net->RlmtMode & SK_RLMT_CHECK_SEG) &&
- !(pAC->Rlmt.Port[PortNumber].Net->CheckingState & SK_RLMT_RCS_SEG)) {
- pAC->Rlmt.Port[PortNumber].Net->CheckingState |=
- SK_RLMT_RCS_START_SEG | SK_RLMT_RCS_SEND_SEG;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SkRlmtCheckPort: PortsSuspect %d, PcsRx %d.\n",
- pRPort->PortsSuspect, pRPort->CheckingState & SK_RLMT_PCS_RX))
-
- if (pRPort->PortState != SK_RLMT_PS_DOWN) {
- NewTimeout = TO_SHORTEN(pAC->Rlmt.Port[PortNumber].Net->TimeoutValue);
- if (NewTimeout < SK_RLMT_MIN_TO_VAL) {
- NewTimeout = SK_RLMT_MIN_TO_VAL;
- }
-
- if (!(pRPort->CheckingState & SK_RLMT_PCS_RX)) {
- Para.Para32[0] = PortNumber;
- pRPort->CheckingState |= SK_RLMT_PCS_RX;
-
- /*
- * What shall we do if the port checked by this one receives
- * our request frames? What's bad - our rx line or his tx line?
- */
- Para.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->DownRxTimer,
- SK_RLMT_PORTDOWN_TIM_VAL, SKGE_RLMT,
- SK_RLMT_PORTDOWN_RX_TIM, Para);
-
- for (i = 0; i < pRPort->PortsChecked; i++) {
- if (pRPort->PortCheck[i].SuspectTx) {
- continue;
- }
- pRPort->PortCheck[i].SuspectTx = SK_TRUE;
- pRPort->PortsSuspect++;
- if ((Para.pParaPtr =
- SkRlmtBuildPacket(pAC, IoC, PortNumber, SK_PACKET_CHECK_TX,
- &pAC->Addr.Port[PortNumber].CurrentMacAddress,
- &pRPort->PortCheck[i].CheckAddr)) != NULL) {
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- }
- }
- }
- }
- else { /* PortDown -- or all partners suspect. */
- NewTimeout = SK_RLMT_DEF_TO_VAL;
- }
- pRPort->PortNoRx = SK_TRUE;
- }
- else { /* A non-BPDU packet was received. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SkRlmtCheckPort %d: %d (%d) receives in last time slot.\n",
- PortNumber,
- pRPort->PacketsPerTimeSlot - pRPort->BpduPacketsPerTimeSlot,
- pRPort->PacketsPerTimeSlot))
-
- SkRlmtPortReceives(pAC, IoC, PortNumber);
- if (pAC->Rlmt.CheckSwitch) {
- SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
- }
-
- NewTimeout = SK_RLMT_DEF_TO_VAL;
- }
-
- return (NewTimeout);
-} /* SkRlmtCheckPort */
-
-
-/******************************************************************************
- *
- * SkRlmtSelectBcRx - select new active port, criteria 1 (CLP)
- *
- * Description:
- * This routine selects the port that received a broadcast frame
- * substantially later than all other ports.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * SK_BOOL
- */
-RLMT_STATIC SK_BOOL SkRlmtSelectBcRx(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Active, /* Active port */
-SK_U32 PrefPort, /* Preferred port */
-SK_U32 *pSelect) /* New active port */
-{
- SK_U64 BcTimeStamp;
- SK_U32 i;
- SK_BOOL PortFound;
-
- BcTimeStamp = 0; /* Not totally necessary, but feeling better. */
- PortFound = SK_FALSE;
-
- /* Select port with the latest TimeStamp. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("TimeStamp Port %d (Down: %d, NoRx: %d): %08x %08x.\n",
- i,
- pAC->Rlmt.Port[i].PortDown, pAC->Rlmt.Port[i].PortNoRx,
- *((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_HI32),
- *((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_LO32)))
-
- if (!pAC->Rlmt.Port[i].PortDown && !pAC->Rlmt.Port[i].PortNoRx) {
- if (!PortFound || pAC->Rlmt.Port[i].BcTimeStamp > BcTimeStamp) {
- BcTimeStamp = pAC->Rlmt.Port[i].BcTimeStamp;
- *pSelect = i;
- PortFound = SK_TRUE;
- }
- }
- }
-
- if (PortFound) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Port %d received the last broadcast.\n", *pSelect))
-
- /* Look if another port's time stamp is similar. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- if (i == *pSelect) {
- continue;
- }
- if (!pAC->Rlmt.Port[i].PortDown && !pAC->Rlmt.Port[i].PortNoRx &&
- (pAC->Rlmt.Port[i].BcTimeStamp >
- BcTimeStamp - SK_RLMT_BC_DELTA ||
- pAC->Rlmt.Port[i].BcTimeStamp +
- SK_RLMT_BC_DELTA > BcTimeStamp)) {
- PortFound = SK_FALSE;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Port %d received a broadcast at a similar time.\n", i))
- break;
- }
- }
- }
-
-#ifdef DEBUG
- if (PortFound) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SELECT_BCRX found Port %d receiving the substantially "
- "latest broadcast (%u).\n",
- *pSelect,
- BcTimeStamp - pAC->Rlmt.Port[1 - *pSelect].BcTimeStamp))
- }
-#endif /* DEBUG */
-
- return (PortFound);
-} /* SkRlmtSelectBcRx */
-
-
-/******************************************************************************
- *
- * SkRlmtSelectNotSuspect - select new active port, criteria 2 (CLP)
- *
- * Description:
- * This routine selects a good port (it is PortUp && !SuspectRx).
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * SK_BOOL
- */
-RLMT_STATIC SK_BOOL SkRlmtSelectNotSuspect(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Active, /* Active port */
-SK_U32 PrefPort, /* Preferred port */
-SK_U32 *pSelect) /* New active port */
-{
- SK_U32 i;
- SK_BOOL PortFound;
-
- PortFound = SK_FALSE;
-
- /* Select first port that is PortUp && !SuspectRx. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- if (!pAC->Rlmt.Port[i].PortDown &&
- !(pAC->Rlmt.Port[i].CheckingState & SK_RLMT_PCS_RX)) {
- *pSelect = i;
- if (!pAC->Rlmt.Port[Active].PortDown &&
- !(pAC->Rlmt.Port[Active].CheckingState & SK_RLMT_PCS_RX)) {
- *pSelect = Active;
- }
- if (!pAC->Rlmt.Port[PrefPort].PortDown &&
- !(pAC->Rlmt.Port[PrefPort].CheckingState & SK_RLMT_PCS_RX)) {
- *pSelect = PrefPort;
- }
- PortFound = SK_TRUE;
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SELECT_NOTSUSPECT found Port %d up and not check RX.\n",
- *pSelect))
- break;
- }
- }
- return (PortFound);
-} /* SkRlmtSelectNotSuspect */
-
-
-/******************************************************************************
- *
- * SkRlmtSelectUp - select new active port, criteria 3, 4 (CLP)
- *
- * Description:
- * This routine selects a port that is up.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * SK_BOOL
- */
-RLMT_STATIC SK_BOOL SkRlmtSelectUp(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Active, /* Active port */
-SK_U32 PrefPort, /* Preferred port */
-SK_U32 *pSelect, /* New active port */
-SK_BOOL AutoNegDone) /* Successfully auto-negotiated? */
-{
- SK_U32 i;
- SK_BOOL PortFound;
-
- PortFound = SK_FALSE;
-
- /* Select first port that is PortUp. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- if (pAC->Rlmt.Port[i].PortState == SK_RLMT_PS_UP &&
- pAC->GIni.GP[i].PAutoNegFail != AutoNegDone) {
- *pSelect = i;
- if (pAC->Rlmt.Port[Active].PortState == SK_RLMT_PS_UP &&
- pAC->GIni.GP[Active].PAutoNegFail != AutoNegDone) {
- *pSelect = Active;
- }
- if (pAC->Rlmt.Port[PrefPort].PortState == SK_RLMT_PS_UP &&
- pAC->GIni.GP[PrefPort].PAutoNegFail != AutoNegDone) {
- *pSelect = PrefPort;
- }
- PortFound = SK_TRUE;
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SELECT_UP found Port %d up.\n", *pSelect))
- break;
- }
- }
- return (PortFound);
-} /* SkRlmtSelectUp */
-
-
-/******************************************************************************
- *
- * SkRlmtSelectGoingUp - select new active port, criteria 5, 6 (CLP)
- *
- * Description:
- * This routine selects the port that is going up for the longest time.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * SK_BOOL
- */
-RLMT_STATIC SK_BOOL SkRlmtSelectGoingUp(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Active, /* Active port */
-SK_U32 PrefPort, /* Preferred port */
-SK_U32 *pSelect, /* New active port */
-SK_BOOL AutoNegDone) /* Successfully auto-negotiated? */
-{
- SK_U64 GuTimeStamp;
- SK_U32 i;
- SK_BOOL PortFound;
-
- GuTimeStamp = 0;
- PortFound = SK_FALSE;
-
- /* Select port that is PortGoingUp for the longest time. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- if (pAC->Rlmt.Port[i].PortState == SK_RLMT_PS_GOING_UP &&
- pAC->GIni.GP[i].PAutoNegFail != AutoNegDone) {
- GuTimeStamp = pAC->Rlmt.Port[i].GuTimeStamp;
- *pSelect = i;
- PortFound = SK_TRUE;
- break;
- }
- }
-
- if (!PortFound) {
- return (SK_FALSE);
- }
-
- for (i = *pSelect + 1; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- if (pAC->Rlmt.Port[i].PortState == SK_RLMT_PS_GOING_UP &&
- pAC->Rlmt.Port[i].GuTimeStamp < GuTimeStamp &&
- pAC->GIni.GP[i].PAutoNegFail != AutoNegDone) {
- GuTimeStamp = pAC->Rlmt.Port[i].GuTimeStamp;
- *pSelect = i;
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SELECT_GOINGUP found Port %d going up.\n", *pSelect))
- return (SK_TRUE);
-} /* SkRlmtSelectGoingUp */
-
-
-/******************************************************************************
- *
- * SkRlmtSelectDown - select new active port, criteria 7, 8 (CLP)
- *
- * Description:
- * This routine selects a port that is down.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * SK_BOOL
- */
-RLMT_STATIC SK_BOOL SkRlmtSelectDown(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Active, /* Active port */
-SK_U32 PrefPort, /* Preferred port */
-SK_U32 *pSelect, /* New active port */
-SK_BOOL AutoNegDone) /* Successfully auto-negotiated? */
-{
- SK_U32 i;
- SK_BOOL PortFound;
-
- PortFound = SK_FALSE;
-
- /* Select first port that is PortDown. */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- if (pAC->Rlmt.Port[i].PortState == SK_RLMT_PS_DOWN &&
- pAC->GIni.GP[i].PAutoNegFail != AutoNegDone) {
- *pSelect = i;
- if (pAC->Rlmt.Port[Active].PortState == SK_RLMT_PS_DOWN &&
- pAC->GIni.GP[Active].PAutoNegFail != AutoNegDone) {
- *pSelect = Active;
- }
- if (pAC->Rlmt.Port[PrefPort].PortState == SK_RLMT_PS_DOWN &&
- pAC->GIni.GP[PrefPort].PAutoNegFail != AutoNegDone) {
- *pSelect = PrefPort;
- }
- PortFound = SK_TRUE;
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SELECT_DOWN found Port %d down.\n", *pSelect))
- break;
- }
- }
- return (PortFound);
-} /* SkRlmtSelectDown */
-
-
-/******************************************************************************
- *
- * SkRlmtCheckSwitch - select new active port and switch to it
- *
- * Description:
- * This routine decides which port should be the active one and queues
- * port switching if necessary.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing.
- */
-RLMT_STATIC void SkRlmtCheckSwitch(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 NetIdx) /* Net index */
-{
- SK_EVPARA Para;
- SK_U32 Active;
- SK_U32 PrefPort;
- SK_U32 i;
- SK_BOOL PortFound;
-
- Active = pAC->Rlmt.Net[NetIdx].ActivePort; /* Index of active port. */
- PrefPort = pAC->Rlmt.Net[NetIdx].PrefPort; /* Index of preferred port. */
- PortFound = SK_FALSE;
- pAC->Rlmt.CheckSwitch = SK_FALSE;
-
-#if 0 /* RW 2001/10/18 - active port becomes always prefered one */
- if (pAC->Rlmt.Net[NetIdx].Preference == 0xFFFFFFFF) { /* Automatic */
- /* disable auto-fail back */
- PrefPort = Active;
- }
-#endif
-
- if (pAC->Rlmt.Net[NetIdx].LinksUp == 0) {
- /* Last link went down - shut down the net. */
- pAC->Rlmt.Net[NetIdx].RlmtState = SK_RLMT_RS_NET_DOWN;
- Para.Para32[0] = SK_RLMT_NET_DOWN_TEMP;
- Para.Para32[1] = NetIdx;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_NET_DOWN, Para);
-
- Para.Para32[0] = pAC->Rlmt.Net[NetIdx].
- Port[pAC->Rlmt.Net[NetIdx].ActivePort]->PortNumber;
- Para.Para32[1] = NetIdx;
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_ACTIVE_DOWN, Para);
- return;
- } /* pAC->Rlmt.LinksUp == 0 */
- else if (pAC->Rlmt.Net[NetIdx].LinksUp == 1 &&
- pAC->Rlmt.Net[NetIdx].RlmtState == SK_RLMT_RS_NET_DOWN) {
- /* First link came up - get the net up. */
- pAC->Rlmt.Net[NetIdx].RlmtState = SK_RLMT_RS_NET_UP;
-
- /*
- * If pAC->Rlmt.ActivePort != Para.Para32[0],
- * the DRV switches to the port that came up.
- */
- for (i = 0; i < pAC->Rlmt.Net[NetIdx].NumPorts; i++) {
- if (!pAC->Rlmt.Net[NetIdx].Port[i]->LinkDown) {
- if (!pAC->Rlmt.Net[NetIdx].Port[Active]->LinkDown) {
- i = Active;
- }
- if (!pAC->Rlmt.Net[NetIdx].Port[PrefPort]->LinkDown) {
- i = PrefPort;
- }
- PortFound = SK_TRUE;
- break;
- }
- }
-
- if (PortFound) {
- Para.Para32[0] = pAC->Rlmt.Net[NetIdx].Port[i]->PortNumber;
- Para.Para32[1] = NetIdx;
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_ACTIVE_UP, Para);
-
- pAC->Rlmt.Net[NetIdx].ActivePort = i;
- Para.Para32[0] = pAC->Rlmt.Net[NetIdx].Port[i]->PortNumber;
- Para.Para32[1] = NetIdx;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_NET_UP, Para);
-
- if ((pAC->Rlmt.Net[NetIdx].RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
- (Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC,
- pAC->Rlmt.Net[NetIdx].Port[i]->PortNumber,
- SK_PACKET_ANNOUNCE, &pAC->Addr.Net[NetIdx].
- CurrentMacAddress, &SkRlmtMcAddr)) != NULL) {
- /*
- * Send announce packet to RLMT multicast address to force
- * switches to learn the new location of the logical MAC address.
- */
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- }
- }
- else {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E007, SKERR_RLMT_E007_MSG);
- }
-
- return;
- } /* LinksUp == 1 && RlmtState == SK_RLMT_RS_NET_DOWN */
- else { /* Cannot be reached in dual-net mode. */
- Para.Para32[0] = Active;
-
- /*
- * Preselection:
- * If RLMT Mode != CheckLinkState
- * select port that received a broadcast frame substantially later
- * than all other ports
- * else select first port that is not SuspectRx
- * else select first port that is PortUp
- * else select port that is PortGoingUp for the longest time
- * else select first port that is PortDown
- * else stop.
- *
- * For the preselected port:
- * If ActivePort is equal in quality, select ActivePort.
- *
- * If PrefPort is equal in quality, select PrefPort.
- *
- * If ActivePort != SelectedPort,
- * If old ActivePort is LinkDown,
- * SwitchHard
- * else
- * SwitchSoft
- */
- /* check of ChgBcPrio flag added */
- if ((pAC->Rlmt.Net[0].RlmtMode != SK_RLMT_MODE_CLS) &&
- (!pAC->Rlmt.Net[0].ChgBcPrio)) {
-
- if (!PortFound) {
- PortFound = SkRlmtSelectBcRx(
- pAC, IoC, Active, PrefPort, &Para.Para32[1]);
- }
-
- if (!PortFound) {
- PortFound = SkRlmtSelectNotSuspect(
- pAC, IoC, Active, PrefPort, &Para.Para32[1]);
- }
- } /* pAC->Rlmt.RlmtMode != SK_RLMT_MODE_CLS */
-
- /* with changed priority for last broadcast received */
- if ((pAC->Rlmt.Net[0].RlmtMode != SK_RLMT_MODE_CLS) &&
- (pAC->Rlmt.Net[0].ChgBcPrio)) {
- if (!PortFound) {
- PortFound = SkRlmtSelectNotSuspect(
- pAC, IoC, Active, PrefPort, &Para.Para32[1]);
- }
-
- if (!PortFound) {
- PortFound = SkRlmtSelectBcRx(
- pAC, IoC, Active, PrefPort, &Para.Para32[1]);
- }
- } /* pAC->Rlmt.RlmtMode != SK_RLMT_MODE_CLS */
-
- if (!PortFound) {
- PortFound = SkRlmtSelectUp(
- pAC, IoC, Active, PrefPort, &Para.Para32[1], AUTONEG_SUCCESS);
- }
-
- if (!PortFound) {
- PortFound = SkRlmtSelectUp(
- pAC, IoC, Active, PrefPort, &Para.Para32[1], AUTONEG_FAILED);
- }
-
- if (!PortFound) {
- PortFound = SkRlmtSelectGoingUp(
- pAC, IoC, Active, PrefPort, &Para.Para32[1], AUTONEG_SUCCESS);
- }
-
- if (!PortFound) {
- PortFound = SkRlmtSelectGoingUp(
- pAC, IoC, Active, PrefPort, &Para.Para32[1], AUTONEG_FAILED);
- }
-
- if (pAC->Rlmt.Net[0].RlmtMode != SK_RLMT_MODE_CLS) {
- if (!PortFound) {
- PortFound = SkRlmtSelectDown(pAC, IoC,
- Active, PrefPort, &Para.Para32[1], AUTONEG_SUCCESS);
- }
-
- if (!PortFound) {
- PortFound = SkRlmtSelectDown(pAC, IoC,
- Active, PrefPort, &Para.Para32[1], AUTONEG_FAILED);
- }
- } /* pAC->Rlmt.RlmtMode != SK_RLMT_MODE_CLS */
-
- if (PortFound) {
-
- if (Para.Para32[1] != Active) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Active: %d, Para1: %d.\n", Active, Para.Para32[1]))
- pAC->Rlmt.Net[NetIdx].ActivePort = Para.Para32[1];
- Para.Para32[0] = pAC->Rlmt.Net[NetIdx].
- Port[Para.Para32[0]]->PortNumber;
- Para.Para32[1] = pAC->Rlmt.Net[NetIdx].
- Port[Para.Para32[1]]->PortNumber;
- SK_HWAC_LINK_LED(pAC, IoC, Para.Para32[1], SK_LED_ACTIVE);
- if (pAC->Rlmt.Port[Active].LinkDown) {
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_HARD, Para);
- }
- else {
- SK_HWAC_LINK_LED(pAC, IoC, Para.Para32[0], SK_LED_STANDBY);
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_SOFT, Para);
- }
- Para.Para32[1] = NetIdx;
- Para.Para32[0] =
- pAC->Rlmt.Net[NetIdx].Port[Para.Para32[0]]->PortNumber;
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_ACTIVE_DOWN, Para);
- Para.Para32[0] = pAC->Rlmt.Net[NetIdx].
- Port[pAC->Rlmt.Net[NetIdx].ActivePort]->PortNumber;
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_ACTIVE_UP, Para);
- if ((pAC->Rlmt.Net[NetIdx].RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
- (Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC, Para.Para32[0],
- SK_PACKET_ANNOUNCE, &pAC->Addr.Net[NetIdx].CurrentMacAddress,
- &SkRlmtMcAddr)) != NULL) {
- /*
- * Send announce packet to RLMT multicast address to force
- * switches to learn the new location of the logical
- * MAC address.
- */
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
- } /* (Para.pParaPtr = SkRlmtBuildPacket(...)) != NULL */
- } /* Para.Para32[1] != Active */
- } /* PortFound */
- else {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E004, SKERR_RLMT_E004_MSG);
- }
- } /* LinksUp > 1 || LinksUp == 1 && RlmtState != SK_RLMT_RS_NET_DOWN */
- return;
-} /* SkRlmtCheckSwitch */
-
-
-/******************************************************************************
- *
- * SkRlmtCheckSeg - Report if segmentation is detected
- *
- * Description:
- * This routine checks if the ports see different root bridges and reports
- * segmentation in such a case.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing.
- */
-RLMT_STATIC void SkRlmtCheckSeg(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 NetIdx) /* Net number */
-{
- SK_EVPARA Para;
- SK_RLMT_NET *pNet;
- SK_U32 i, j;
- SK_BOOL Equal;
-
- pNet = &pAC->Rlmt.Net[NetIdx];
- pNet->RootIdSet = SK_FALSE;
- Equal = SK_TRUE;
-
- for (i = 0; i < pNet->NumPorts; i++) {
- if (pNet->Port[i]->LinkDown || !pNet->Port[i]->RootIdSet) {
- continue;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_DUMP,
- ("Root ID %d: %02x %02x %02x %02x %02x %02x %02x %02x.\n", i,
- pNet->Port[i]->Root.Id[0], pNet->Port[i]->Root.Id[1],
- pNet->Port[i]->Root.Id[2], pNet->Port[i]->Root.Id[3],
- pNet->Port[i]->Root.Id[4], pNet->Port[i]->Root.Id[5],
- pNet->Port[i]->Root.Id[6], pNet->Port[i]->Root.Id[7]))
-
- if (!pNet->RootIdSet) {
- pNet->Root = pNet->Port[i]->Root;
- pNet->RootIdSet = SK_TRUE;
- continue;
- }
-
- for (j = 0; j < 8; j ++) {
- Equal &= pNet->Port[i]->Root.Id[j] == pNet->Root.Id[j];
- if (!Equal) {
- break;
- }
- }
-
- if (!Equal) {
- SK_ERR_LOG(pAC, SK_ERRCL_COMM, SKERR_RLMT_E005, SKERR_RLMT_E005_MSG);
- Para.Para32[0] = NetIdx;
- Para.Para32[1] = (SK_U32)-1;
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_SEGMENTATION, Para);
-
- pNet->CheckingState &= ~SK_RLMT_RCS_REPORT_SEG;
-
- /* 2000-03-06 RA: New. */
- Para.Para32[0] = NetIdx;
- Para.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pNet->SegTimer, SK_RLMT_SEG_TO_VAL,
- SKGE_RLMT, SK_RLMT_SEG_TIM, Para);
- break;
- }
- } /* for (i = 0; i < pNet->NumPorts; i++) */
-
- /* 2000-03-06 RA: Moved here. */
- /* Segmentation check not running anymore. */
- pNet->CheckingState &= ~SK_RLMT_RCS_SEG;
-
-} /* SkRlmtCheckSeg */
-
-
-/******************************************************************************
- *
- * SkRlmtPortStart - initialize port variables and start port
- *
- * Description:
- * This routine initializes a port's variables and issues a PORT_START
- * to the HWAC module. This handles retries if the start fails or the
- * link eventually goes down.
- *
- * Context:
- * runtime, pageable?
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtPortStart(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 PortNumber) /* Port number */
-{
- SK_EVPARA Para;
-
- pAC->Rlmt.Port[PortNumber].PortState = SK_RLMT_PS_LINK_DOWN;
- pAC->Rlmt.Port[PortNumber].PortStarted = SK_TRUE;
- pAC->Rlmt.Port[PortNumber].LinkDown = SK_TRUE;
- pAC->Rlmt.Port[PortNumber].PortDown = SK_TRUE;
- pAC->Rlmt.Port[PortNumber].CheckingState = 0;
- pAC->Rlmt.Port[PortNumber].RootIdSet = SK_FALSE;
- Para.Para32[0] = PortNumber;
- Para.Para32[1] = (SK_U32)-1;
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_START, Para);
-} /* SkRlmtPortStart */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtPortStartTim - PORT_START_TIM
- *
- * Description:
- * This routine handles PORT_START_TIM events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtPortStartTim(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 PortNumber; SK_U32 -1 */
-{
- SK_U32 i;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTSTART_TIMEOUT Port %d Event BEGIN.\n", Para.Para32[0]))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTSTART_TIMEOUT Event EMPTY.\n"))
- return;
- }
-
- /*
- * Used to start non-preferred ports if the preferred one
- * does not come up.
- * This timeout needs only be set when starting the first
- * (preferred) port.
- */
- if (pAC->Rlmt.Port[Para.Para32[0]].LinkDown) {
- /* PORT_START failed. */
- for (i = 0; i < pAC->Rlmt.Port[Para.Para32[0]].Net->NumPorts; i++) {
- if (!pAC->Rlmt.Port[Para.Para32[0]].Net->Port[i]->PortStarted) {
- SkRlmtPortStart(pAC, IoC,
- pAC->Rlmt.Port[Para.Para32[0]].Net->Port[i]->PortNumber);
- }
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTSTART_TIMEOUT Event END.\n"))
-} /* SkRlmtEvtPortStartTim */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtLinkUp - LINK_UP
- *
- * Description:
- * This routine handles LLINK_UP events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtLinkUp(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 PortNumber; SK_U32 Undefined */
-{
- SK_U32 i;
- SK_RLMT_PORT *pRPort;
- SK_EVPARA Para2;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_LINK_UP Port %d Event BEGIN.\n", Para.Para32[0]))
-
- pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
- if (!pRPort->PortStarted) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E008, SKERR_RLMT_E008_MSG);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_LINK_UP Event EMPTY.\n"))
- return;
- }
-
- if (!pRPort->LinkDown) {
- /* RA;:;: Any better solution? */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_LINK_UP Event EMPTY.\n"))
- return;
- }
-
- SkTimerStop(pAC, IoC, &pRPort->UpTimer);
- SkTimerStop(pAC, IoC, &pRPort->DownRxTimer);
- SkTimerStop(pAC, IoC, &pRPort->DownTxTimer);
-
- /* Do something if timer already fired? */
-
- pRPort->LinkDown = SK_FALSE;
- pRPort->PortState = SK_RLMT_PS_GOING_UP;
- pRPort->GuTimeStamp = SkOsGetTime(pAC);
- pRPort->BcTimeStamp = 0;
- pRPort->Net->LinksUp++;
- if (pRPort->Net->LinksUp == 1) {
- SK_HWAC_LINK_LED(pAC, IoC, Para.Para32[0], SK_LED_ACTIVE);
- }
- else {
- SK_HWAC_LINK_LED(pAC, IoC, Para.Para32[0], SK_LED_STANDBY);
- }
-
- for (i = 0; i < pRPort->Net->NumPorts; i++) {
- if (!pRPort->Net->Port[i]->PortStarted) {
- SkRlmtPortStart(pAC, IoC, pRPort->Net->Port[i]->PortNumber);
- }
- }
-
- SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
-
- if (pRPort->Net->LinksUp >= 2) {
- if (pRPort->Net->RlmtMode & SK_RLMT_CHECK_LOC_LINK) {
- /* Build the check chain. */
- SkRlmtBuildCheckChain(pAC, pRPort->Net->NetNumber);
- }
- }
-
- /* If the first link comes up, start the periodical RLMT timeout. */
- if (pRPort->Net->NumPorts > 1 && pRPort->Net->LinksUp == 1 &&
- (pRPort->Net->RlmtMode & SK_RLMT_CHECK_OTHERS) != 0) {
- Para2.Para32[0] = pRPort->Net->NetNumber;
- Para2.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->Net->LocTimer,
- pRPort->Net->TimeoutValue, SKGE_RLMT, SK_RLMT_TIM, Para2);
- }
-
- Para2 = Para;
- Para2.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->UpTimer, SK_RLMT_PORTUP_TIM_VAL,
- SKGE_RLMT, SK_RLMT_PORTUP_TIM, Para2);
-
- /* Later: if (pAC->Rlmt.RlmtMode & SK_RLMT_CHECK_LOC_LINK) && */
- if ((pRPort->Net->RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
- (pRPort->Net->RlmtMode & SK_RLMT_CHECK_LINK) != 0 &&
- (Para2.pParaPtr =
- SkRlmtBuildPacket(pAC, IoC, Para.Para32[0], SK_PACKET_ANNOUNCE,
- &pAC->Addr.Port[Para.Para32[0]].CurrentMacAddress, &SkRlmtMcAddr)
- ) != NULL) {
- /* Send "new" packet to RLMT multicast address. */
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para2);
- }
-
- if (pRPort->Net->RlmtMode & SK_RLMT_CHECK_SEG) {
- if ((Para2.pParaPtr =
- SkRlmtBuildSpanningTreePacket(pAC, IoC, Para.Para32[0])) != NULL) {
- pAC->Rlmt.Port[Para.Para32[0]].RootIdSet = SK_FALSE;
- pRPort->Net->CheckingState |=
- SK_RLMT_RCS_SEG | SK_RLMT_RCS_REPORT_SEG;
-
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para2);
-
- Para.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pRPort->Net->SegTimer,
- SK_RLMT_SEG_TO_VAL, SKGE_RLMT, SK_RLMT_SEG_TIM, Para);
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_LINK_UP Event END.\n"))
-} /* SkRlmtEvtLinkUp */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtPortUpTim - PORT_UP_TIM
- *
- * Description:
- * This routine handles PORT_UP_TIM events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtPortUpTim(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 PortNumber; SK_U32 -1 */
-{
- SK_RLMT_PORT *pRPort;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTUP_TIM Port %d Event BEGIN.\n", Para.Para32[0]))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTUP_TIM Event EMPTY.\n"))
- return;
- }
-
- pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
- if (pRPort->LinkDown || (pRPort->PortState == SK_RLMT_PS_UP)) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTUP_TIM Port %d Event EMPTY.\n", Para.Para32[0]))
- return;
- }
-
- pRPort->PortDown = SK_FALSE;
- pRPort->PortState = SK_RLMT_PS_UP;
- pRPort->Net->PortsUp++;
- if (pRPort->Net->RlmtState != SK_RLMT_RS_INIT) {
- if (pAC->Rlmt.NumNets <= 1) {
- SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
- }
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_PORT_UP, Para);
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTUP_TIM Event END.\n"))
-} /* SkRlmtEvtPortUpTim */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtPortDownTim - PORT_DOWN_*
- *
- * Description:
- * This routine handles PORT_DOWN_* events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtPortDownX(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Event, /* Event code */
-SK_EVPARA Para) /* SK_U32 PortNumber; SK_U32 -1 */
-{
- SK_RLMT_PORT *pRPort;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTDOWN* Port %d Event (%d) BEGIN.\n",
- Para.Para32[0], Event))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTDOWN* Event EMPTY.\n"))
- return;
- }
-
- pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
- if (!pRPort->PortStarted || (Event == SK_RLMT_PORTDOWN_TX_TIM &&
- !(pRPort->CheckingState & SK_RLMT_PCS_TX))) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTDOWN* Event (%d) EMPTY.\n", Event))
- return;
- }
-
- /* Stop port's timers. */
- SkTimerStop(pAC, IoC, &pRPort->UpTimer);
- SkTimerStop(pAC, IoC, &pRPort->DownRxTimer);
- SkTimerStop(pAC, IoC, &pRPort->DownTxTimer);
-
- if (pRPort->PortState != SK_RLMT_PS_LINK_DOWN) {
- pRPort->PortState = SK_RLMT_PS_DOWN;
- }
-
- if (!pRPort->PortDown) {
- pRPort->Net->PortsUp--;
- pRPort->PortDown = SK_TRUE;
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_PORT_DOWN, Para);
- }
-
- pRPort->PacketsPerTimeSlot = 0;
- /* pRPort->DataPacketsPerTimeSlot = 0; */
- pRPort->BpduPacketsPerTimeSlot = 0;
- pRPort->BcTimeStamp = 0;
-
- /*
- * RA;:;: To be checked:
- * - actions at RLMT_STOP: We should not switch anymore.
- */
- if (pRPort->Net->RlmtState != SK_RLMT_RS_INIT) {
- if (Para.Para32[0] ==
- pRPort->Net->Port[pRPort->Net->ActivePort]->PortNumber) {
- /* Active Port went down. */
- SkRlmtCheckSwitch(pAC, IoC, pRPort->Net->NetNumber);
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORTDOWN* Event (%d) END.\n", Event))
-} /* SkRlmtEvtPortDownX */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtLinkDown - LINK_DOWN
- *
- * Description:
- * This routine handles LINK_DOWN events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtLinkDown(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 PortNumber; SK_U32 Undefined */
-{
- SK_RLMT_PORT *pRPort;
-
- pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_LINK_DOWN Port %d Event BEGIN.\n", Para.Para32[0]))
-
- if (!pAC->Rlmt.Port[Para.Para32[0]].LinkDown) {
- pRPort->Net->LinksUp--;
- pRPort->LinkDown = SK_TRUE;
- pRPort->PortState = SK_RLMT_PS_LINK_DOWN;
- SK_HWAC_LINK_LED(pAC, IoC, Para.Para32[0], SK_LED_OFF);
-
- if ((pRPort->Net->RlmtMode & SK_RLMT_CHECK_LOC_LINK) != 0) {
- /* Build the check chain. */
- SkRlmtBuildCheckChain(pAC, pRPort->Net->NetNumber);
- }
-
- /* Ensure that port is marked down. */
- Para.Para32[1] = -1;
- (void)SkRlmtEvent(pAC, IoC, SK_RLMT_PORTDOWN, Para);
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_LINK_DOWN Event END.\n"))
-} /* SkRlmtEvtLinkDown */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtPortAddr - PORT_ADDR
- *
- * Description:
- * This routine handles PORT_ADDR events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtPortAddr(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 PortNumber; SK_U32 -1 */
-{
- SK_U32 i, j;
- SK_RLMT_PORT *pRPort;
- SK_MAC_ADDR *pOldMacAddr;
- SK_MAC_ADDR *pNewMacAddr;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORT_ADDR Port %d Event BEGIN.\n", Para.Para32[0]))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORT_ADDR Event EMPTY.\n"))
- return;
- }
-
- /* Port's physical MAC address changed. */
- pOldMacAddr = &pAC->Addr.Port[Para.Para32[0]].PreviousMacAddress;
- pNewMacAddr = &pAC->Addr.Port[Para.Para32[0]].CurrentMacAddress;
-
- /*
- * NOTE: This is not scalable for solutions where ports are
- * checked remotely. There, we need to send an RLMT
- * address change packet - and how do we ensure delivery?
- */
- for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
- pRPort = &pAC->Rlmt.Port[i];
- for (j = 0; j < pRPort->PortsChecked; j++) {
- if (SK_ADDR_EQUAL(
- pRPort->PortCheck[j].CheckAddr.a, pOldMacAddr->a)) {
- pRPort->PortCheck[j].CheckAddr = *pNewMacAddr;
- }
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PORT_ADDR Event END.\n"))
-} /* SkRlmtEvtPortAddr */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtStart - START
- *
- * Description:
- * This routine handles START events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtStart(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
-{
- SK_EVPARA Para2;
- SK_U32 PortIdx;
- SK_U32 PortNumber;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_START Net %d Event BEGIN.\n", Para.Para32[0]))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_START Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad NetNumber %d.\n", Para.Para32[0]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_START Event EMPTY.\n"))
- return;
- }
-
- if (pAC->Rlmt.Net[Para.Para32[0]].RlmtState != SK_RLMT_RS_INIT) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_START Event EMPTY.\n"))
- return;
- }
-
- if (pAC->Rlmt.NetsStarted >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("All nets should have been started.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_START Event EMPTY.\n"))
- return;
- }
-
- if (pAC->Rlmt.Net[Para.Para32[0]].PrefPort >=
- pAC->Rlmt.Net[Para.Para32[0]].NumPorts) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E009, SKERR_RLMT_E009_MSG);
-
- /* Change PrefPort to internal default. */
- Para2.Para32[0] = 0xFFFFFFFF;
- Para2.Para32[1] = Para.Para32[0];
- (void)SkRlmtEvent(pAC, IoC, SK_RLMT_PREFPORT_CHANGE, Para2);
- }
-
- PortIdx = pAC->Rlmt.Net[Para.Para32[0]].PrefPort;
- PortNumber = pAC->Rlmt.Net[Para.Para32[0]].Port[PortIdx]->PortNumber;
-
- pAC->Rlmt.Net[Para.Para32[0]].LinksUp = 0;
- pAC->Rlmt.Net[Para.Para32[0]].PortsUp = 0;
- pAC->Rlmt.Net[Para.Para32[0]].CheckingState = 0;
- pAC->Rlmt.Net[Para.Para32[0]].RlmtState = SK_RLMT_RS_NET_DOWN;
-
- /* Start preferred port. */
- SkRlmtPortStart(pAC, IoC, PortNumber);
-
- /* Start Timer (for first port only). */
- Para2.Para32[0] = PortNumber;
- Para2.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pAC->Rlmt.Port[PortNumber].UpTimer,
- SK_RLMT_PORTSTART_TIM_VAL, SKGE_RLMT, SK_RLMT_PORTSTART_TIM, Para2);
-
- pAC->Rlmt.NetsStarted++;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_START Event END.\n"))
-} /* SkRlmtEvtStart */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtStop - STOP
- *
- * Description:
- * This routine handles STOP events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtStop(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
-{
- SK_EVPARA Para2;
- SK_U32 PortNumber;
- SK_U32 i;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STOP Net %d Event BEGIN.\n", Para.Para32[0]))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STOP Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad NetNumber %d.\n", Para.Para32[0]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STOP Event EMPTY.\n"))
- return;
- }
-
- if (pAC->Rlmt.Net[Para.Para32[0]].RlmtState == SK_RLMT_RS_INIT) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STOP Event EMPTY.\n"))
- return;
- }
-
- if (pAC->Rlmt.NetsStarted == 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("All nets are stopped.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STOP Event EMPTY.\n"))
- return;
- }
-
- /* Stop RLMT timers. */
- SkTimerStop(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].LocTimer);
- SkTimerStop(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].SegTimer);
-
- /* Stop net. */
- pAC->Rlmt.Net[Para.Para32[0]].RlmtState = SK_RLMT_RS_INIT;
- pAC->Rlmt.Net[Para.Para32[0]].RootIdSet = SK_FALSE;
- Para2.Para32[0] = SK_RLMT_NET_DOWN_FINAL;
- Para2.Para32[1] = Para.Para32[0]; /* Net# */
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_NET_DOWN, Para2);
-
- /* Stop ports. */
- for (i = 0; i < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; i++) {
- PortNumber = pAC->Rlmt.Net[Para.Para32[0]].Port[i]->PortNumber;
- if (pAC->Rlmt.Port[PortNumber].PortState != SK_RLMT_PS_INIT) {
- SkTimerStop(pAC, IoC, &pAC->Rlmt.Port[PortNumber].UpTimer);
- SkTimerStop(pAC, IoC, &pAC->Rlmt.Port[PortNumber].DownRxTimer);
- SkTimerStop(pAC, IoC, &pAC->Rlmt.Port[PortNumber].DownTxTimer);
-
- pAC->Rlmt.Port[PortNumber].PortState = SK_RLMT_PS_INIT;
- pAC->Rlmt.Port[PortNumber].RootIdSet = SK_FALSE;
- pAC->Rlmt.Port[PortNumber].PortStarted = SK_FALSE;
- Para2.Para32[0] = PortNumber;
- Para2.Para32[1] = (SK_U32)-1;
- SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_PORT_STOP, Para2);
- }
- }
-
- pAC->Rlmt.NetsStarted--;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STOP Event END.\n"))
-} /* SkRlmtEvtStop */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtTim - TIM
- *
- * Description:
- * This routine handles TIM events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtTim(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
-{
- SK_RLMT_PORT *pRPort;
- SK_U32 Timeout;
- SK_U32 NewTimeout;
- SK_U32 PortNumber;
- SK_U32 i;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_TIM Event BEGIN.\n"))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_TIM Event EMPTY.\n"))
- return;
- }
-
- if ((pAC->Rlmt.Net[Para.Para32[0]].RlmtMode & SK_RLMT_CHECK_OTHERS) == 0 ||
- pAC->Rlmt.Net[Para.Para32[0]].LinksUp == 0) {
- /* Mode changed or all links down: No more link checking. */
- return;
- }
-
-#if 0
- pAC->Rlmt.SwitchCheckCounter--;
- if (pAC->Rlmt.SwitchCheckCounter == 0) {
- pAC->Rlmt.SwitchCheckCounter;
- }
-#endif /* 0 */
-
- NewTimeout = SK_RLMT_DEF_TO_VAL;
- for (i = 0; i < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; i++) {
- PortNumber = pAC->Rlmt.Net[Para.Para32[0]].Port[i]->PortNumber;
- pRPort = &pAC->Rlmt.Port[PortNumber];
- if (!pRPort->LinkDown) {
- Timeout = SkRlmtCheckPort(pAC, IoC, PortNumber);
- if (Timeout < NewTimeout) {
- NewTimeout = Timeout;
- }
-
- /*
- * These counters should be set to 0 for all ports before the
- * first frame is sent in the next loop.
- */
- pRPort->PacketsPerTimeSlot = 0;
- /* pRPort->DataPacketsPerTimeSlot = 0; */
- pRPort->BpduPacketsPerTimeSlot = 0;
- }
- }
- pAC->Rlmt.Net[Para.Para32[0]].TimeoutValue = NewTimeout;
-
- if (pAC->Rlmt.Net[Para.Para32[0]].LinksUp > 1) {
- /*
- * If checking remote ports, also send packets if
- * (LinksUp == 1) &&
- * this port checks at least one (remote) port.
- */
-
- /*
- * Must be new loop, as SkRlmtCheckPort can request to
- * check segmentation when e.g. checking the last port.
- */
- for (i = 0; i < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; i++) {
- if (!pAC->Rlmt.Net[Para.Para32[0]].Port[i]->LinkDown) {
- SkRlmtSend(pAC, IoC,
- pAC->Rlmt.Net[Para.Para32[0]].Port[i]->PortNumber);
- }
- }
- }
-
- SkTimerStart(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].LocTimer,
- pAC->Rlmt.Net[Para.Para32[0]].TimeoutValue, SKGE_RLMT, SK_RLMT_TIM,
- Para);
-
- if (pAC->Rlmt.Net[Para.Para32[0]].LinksUp > 1 &&
- (pAC->Rlmt.Net[Para.Para32[0]].RlmtMode & SK_RLMT_CHECK_SEG) &&
- (pAC->Rlmt.Net[Para.Para32[0]].CheckingState & SK_RLMT_RCS_START_SEG)) {
- SkTimerStart(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[0]].SegTimer,
- SK_RLMT_SEG_TO_VAL, SKGE_RLMT, SK_RLMT_SEG_TIM, Para);
- pAC->Rlmt.Net[Para.Para32[0]].CheckingState &= ~SK_RLMT_RCS_START_SEG;
- pAC->Rlmt.Net[Para.Para32[0]].CheckingState |=
- SK_RLMT_RCS_SEG | SK_RLMT_RCS_REPORT_SEG;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_TIM Event END.\n"))
-} /* SkRlmtEvtTim */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtSegTim - SEG_TIM
- *
- * Description:
- * This routine handles SEG_TIM events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtSegTim(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
-{
-#ifdef xDEBUG
- int j;
-#endif /* DEBUG */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SEG_TIM Event BEGIN.\n"))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SEG_TIM Event EMPTY.\n"))
- return;
- }
-
-#ifdef xDEBUG
- for (j = 0; j < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; j++) {
- SK_ADDR_PORT *pAPort;
- SK_U32 k;
- SK_U16 *InAddr;
- SK_U8 InAddr8[6];
-
- InAddr = (SK_U16 *)&InAddr8[0];
- pAPort = pAC->Rlmt.Net[Para.Para32[0]].Port[j]->AddrPort;
- for (k = 0; k < pAPort->NextExactMatchRlmt; k++) {
- /* Get exact match address k from port j. */
- XM_INADDR(IoC, pAC->Rlmt.Net[Para.Para32[0]].Port[j]->PortNumber,
- XM_EXM(k), InAddr);
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("MC address %d on Port %u: %02x %02x %02x %02x %02x %02x -- %02x %02x %02x %02x %02x %02x.\n",
- k, pAC->Rlmt.Net[Para.Para32[0]].Port[j]->PortNumber,
- InAddr8[0], InAddr8[1], InAddr8[2],
- InAddr8[3], InAddr8[4], InAddr8[5],
- pAPort->Exact[k].a[0], pAPort->Exact[k].a[1],
- pAPort->Exact[k].a[2], pAPort->Exact[k].a[3],
- pAPort->Exact[k].a[4], pAPort->Exact[k].a[5]))
- }
- }
-#endif /* xDEBUG */
-
- SkRlmtCheckSeg(pAC, IoC, Para.Para32[0]);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SEG_TIM Event END.\n"))
-} /* SkRlmtEvtSegTim */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtPacketRx - PACKET_RECEIVED
- *
- * Description:
- * This routine handles PACKET_RECEIVED events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtPacketRx(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_MBUF *pMb */
-{
- SK_MBUF *pMb;
- SK_MBUF *pNextMb;
- SK_U32 NetNumber;
-
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PACKET_RECEIVED Event BEGIN.\n"))
-
- /* Should we ignore frames during port switching? */
-
-#ifdef DEBUG
- pMb = Para.pParaPtr;
- if (pMb == NULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL, ("No mbuf.\n"))
- }
- else if (pMb->pNext != NULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("More than one mbuf or pMb->pNext not set.\n"))
- }
-#endif /* DEBUG */
-
- for (pMb = Para.pParaPtr; pMb != NULL; pMb = pNextMb) {
- pNextMb = pMb->pNext;
- pMb->pNext = NULL;
-
- NetNumber = pAC->Rlmt.Port[pMb->PortIdx].Net->NetNumber;
- if (pAC->Rlmt.Net[NetNumber].RlmtState == SK_RLMT_RS_INIT) {
- SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
- }
- else {
- SkRlmtPacketReceive(pAC, IoC, pMb);
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PACKET_RECEIVED Event END.\n"))
-} /* SkRlmtEvtPacketRx */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtStatsClear - STATS_CLEAR
- *
- * Description:
- * This routine handles STATS_CLEAR events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtStatsClear(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
-{
- SK_U32 i;
- SK_RLMT_PORT *pRPort;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_CLEAR Event BEGIN.\n"))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_CLEAR Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad NetNumber %d.\n", Para.Para32[0]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_CLEAR Event EMPTY.\n"))
- return;
- }
-
- /* Clear statistics for logical and physical ports. */
- for (i = 0; i < pAC->Rlmt.Net[Para.Para32[0]].NumPorts; i++) {
- pRPort =
- &pAC->Rlmt.Port[pAC->Rlmt.Net[Para.Para32[0]].Port[i]->PortNumber];
- pRPort->TxHelloCts = 0;
- pRPort->RxHelloCts = 0;
- pRPort->TxSpHelloReqCts = 0;
- pRPort->RxSpHelloCts = 0;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_CLEAR Event END.\n"))
-} /* SkRlmtEvtStatsClear */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtStatsUpdate - STATS_UPDATE
- *
- * Description:
- * This routine handles STATS_UPDATE events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtStatsUpdate(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NetNumber; SK_U32 -1 */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_UPDATE Event BEGIN.\n"))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_UPDATE Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad NetNumber %d.\n", Para.Para32[0]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_UPDATE Event EMPTY.\n"))
- return;
- }
-
- /* Update statistics - currently always up-to-date. */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_STATS_UPDATE Event END.\n"))
-} /* SkRlmtEvtStatsUpdate */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtPrefportChange - PREFPORT_CHANGE
- *
- * Description:
- * This routine handles PREFPORT_CHANGE events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtPrefportChange(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 PortIndex; SK_U32 NetNumber */
-{
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PREFPORT_CHANGE to Port %d Event BEGIN.\n", Para.Para32[0]))
-
- if (Para.Para32[1] >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad NetNumber %d.\n", Para.Para32[1]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PREFPORT_CHANGE Event EMPTY.\n"))
- return;
- }
-
- /* 0xFFFFFFFF == auto-mode. */
- if (Para.Para32[0] == 0xFFFFFFFF) {
- pAC->Rlmt.Net[Para.Para32[1]].PrefPort = SK_RLMT_DEF_PREF_PORT;
- }
- else {
- if (Para.Para32[0] >= pAC->Rlmt.Net[Para.Para32[1]].NumPorts) {
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E010, SKERR_RLMT_E010_MSG);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PREFPORT_CHANGE Event EMPTY.\n"))
- return;
- }
-
- pAC->Rlmt.Net[Para.Para32[1]].PrefPort = Para.Para32[0];
- }
-
- pAC->Rlmt.Net[Para.Para32[1]].Preference = Para.Para32[0];
-
- if (pAC->Rlmt.Net[Para.Para32[1]].RlmtState != SK_RLMT_RS_INIT) {
- SkRlmtCheckSwitch(pAC, IoC, Para.Para32[1]);
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_PREFPORT_CHANGE Event END.\n"))
-} /* SkRlmtEvtPrefportChange */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtSetNets - SET_NETS
- *
- * Description:
- * This routine handles SET_NETS events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtSetNets(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NumNets; SK_U32 -1 */
-{
- int i;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event BEGIN.\n"))
-
- if (Para.Para32[1] != (SK_U32)-1) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad Parameter.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] == 0 || Para.Para32[0] > SK_MAX_NETS ||
- Para.Para32[0] > (SK_U32)pAC->GIni.GIMacsFound) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad number of nets: %d.\n", Para.Para32[0]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] == pAC->Rlmt.NumNets) { /* No change. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event EMPTY.\n"))
- return;
- }
-
- /* Entering and leaving dual mode only allowed while nets are stopped. */
- if (pAC->Rlmt.NetsStarted > 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Changing dual mode only allowed while all nets are stopped.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event EMPTY.\n"))
- return;
- }
-
- if (Para.Para32[0] == 1) {
- if (pAC->Rlmt.NumNets > 1) {
- /* Clear logical MAC addr from second net's active port. */
- (void)SkAddrOverride(pAC, IoC, pAC->Rlmt.Net[1].Port[pAC->Addr.
- Net[1].ActivePort]->PortNumber, NULL, SK_ADDR_CLEAR_LOGICAL);
- pAC->Rlmt.Net[1].NumPorts = 0;
- }
-
- pAC->Rlmt.NumNets = Para.Para32[0];
- for (i = 0; (SK_U32)i < pAC->Rlmt.NumNets; i++) {
- pAC->Rlmt.Net[i].RlmtState = SK_RLMT_RS_INIT;
- pAC->Rlmt.Net[i].RootIdSet = SK_FALSE;
- pAC->Rlmt.Net[i].Preference = 0xFFFFFFFF; /* "Automatic" */
- pAC->Rlmt.Net[i].PrefPort = SK_RLMT_DEF_PREF_PORT;
- /* Just assuming. */
- pAC->Rlmt.Net[i].ActivePort = pAC->Rlmt.Net[i].PrefPort;
- pAC->Rlmt.Net[i].RlmtMode = SK_RLMT_DEF_MODE;
- pAC->Rlmt.Net[i].TimeoutValue = SK_RLMT_DEF_TO_VAL;
- pAC->Rlmt.Net[i].NetNumber = i;
- }
-
- pAC->Rlmt.Port[1].Net= &pAC->Rlmt.Net[0];
- pAC->Rlmt.Net[0].NumPorts = pAC->GIni.GIMacsFound;
-
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_SET_NETS, Para);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("RLMT: Changed to one net with two ports.\n"))
- }
- else if (Para.Para32[0] == 2) {
- pAC->Rlmt.Port[1].Net= &pAC->Rlmt.Net[1];
- pAC->Rlmt.Net[1].NumPorts = pAC->GIni.GIMacsFound - 1;
- pAC->Rlmt.Net[0].NumPorts =
- pAC->GIni.GIMacsFound - pAC->Rlmt.Net[1].NumPorts;
-
- pAC->Rlmt.NumNets = Para.Para32[0];
- for (i = 0; (SK_U32)i < pAC->Rlmt.NumNets; i++) {
- pAC->Rlmt.Net[i].RlmtState = SK_RLMT_RS_INIT;
- pAC->Rlmt.Net[i].RootIdSet = SK_FALSE;
- pAC->Rlmt.Net[i].Preference = 0xFFFFFFFF; /* "Automatic" */
- pAC->Rlmt.Net[i].PrefPort = SK_RLMT_DEF_PREF_PORT;
- /* Just assuming. */
- pAC->Rlmt.Net[i].ActivePort = pAC->Rlmt.Net[i].PrefPort;
- pAC->Rlmt.Net[i].RlmtMode = SK_RLMT_DEF_MODE;
- pAC->Rlmt.Net[i].TimeoutValue = SK_RLMT_DEF_TO_VAL;
-
- pAC->Rlmt.Net[i].NetNumber = i;
- }
-
- /* Set logical MAC addr on second net's active port. */
- (void)SkAddrOverride(pAC, IoC, pAC->Rlmt.Net[1].Port[pAC->Addr.
- Net[1].ActivePort]->PortNumber, NULL, SK_ADDR_SET_LOGICAL);
-
- SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_SET_NETS, Para);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("RLMT: Changed to two nets with one port each.\n"))
- }
- else {
- /* Not implemented for more than two nets. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SetNets not implemented for more than two nets.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event EMPTY.\n"))
- return;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_SET_NETS Event END.\n"))
-} /* SkRlmtSetNets */
-
-
-/******************************************************************************
- *
- * SkRlmtEvtModeChange - MODE_CHANGE
- *
- * Description:
- * This routine handles MODE_CHANGE events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * Nothing
- */
-RLMT_STATIC void SkRlmtEvtModeChange(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_EVPARA Para) /* SK_U32 NewMode; SK_U32 NetNumber */
-{
- SK_EVPARA Para2;
- SK_U32 i;
- SK_U32 PrevRlmtMode;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_MODE_CHANGE Event BEGIN.\n"))
-
- if (Para.Para32[1] >= pAC->Rlmt.NumNets) {
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Bad NetNumber %d.\n", Para.Para32[1]))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_MODE_CHANGE Event EMPTY.\n"))
- return;
- }
-
- Para.Para32[0] |= SK_RLMT_CHECK_LINK;
-
- if ((pAC->Rlmt.Net[Para.Para32[1]].NumPorts == 1) &&
- Para.Para32[0] != SK_RLMT_MODE_CLS) {
- pAC->Rlmt.Net[Para.Para32[1]].RlmtMode = SK_RLMT_MODE_CLS;
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Forced RLMT mode to CLS on single port net.\n"))
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_MODE_CHANGE Event EMPTY.\n"))
- return;
- }
-
- /* Update RLMT mode. */
- PrevRlmtMode = pAC->Rlmt.Net[Para.Para32[1]].RlmtMode;
- pAC->Rlmt.Net[Para.Para32[1]].RlmtMode = Para.Para32[0];
-
- if ((PrevRlmtMode & SK_RLMT_CHECK_LOC_LINK) !=
- (pAC->Rlmt.Net[Para.Para32[1]].RlmtMode & SK_RLMT_CHECK_LOC_LINK)) {
- /* SK_RLMT_CHECK_LOC_LINK bit changed. */
- if ((PrevRlmtMode & SK_RLMT_CHECK_OTHERS) == 0 &&
- pAC->Rlmt.Net[Para.Para32[1]].NumPorts > 1 &&
- pAC->Rlmt.Net[Para.Para32[1]].PortsUp >= 1) {
- /* 20001207 RA: Was "PortsUp == 1". */
- Para2.Para32[0] = Para.Para32[1];
- Para2.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[1]].LocTimer,
- pAC->Rlmt.Net[Para.Para32[1]].TimeoutValue,
- SKGE_RLMT, SK_RLMT_TIM, Para2);
- }
- }
-
- if ((PrevRlmtMode & SK_RLMT_CHECK_SEG) !=
- (pAC->Rlmt.Net[Para.Para32[1]].RlmtMode & SK_RLMT_CHECK_SEG)) {
- /* SK_RLMT_CHECK_SEG bit changed. */
- for (i = 0; i < pAC->Rlmt.Net[Para.Para32[1]].NumPorts; i++) {
- (void)SkAddrMcClear(pAC, IoC,
- pAC->Rlmt.Net[Para.Para32[1]].Port[i]->PortNumber,
- SK_ADDR_PERMANENT | SK_MC_SW_ONLY);
-
- /* Add RLMT MC address. */
- (void)SkAddrMcAdd(pAC, IoC,
- pAC->Rlmt.Net[Para.Para32[1]].Port[i]->PortNumber,
- &SkRlmtMcAddr, SK_ADDR_PERMANENT);
-
- if ((pAC->Rlmt.Net[Para.Para32[1]].RlmtMode &
- SK_RLMT_CHECK_SEG) != 0) {
- /* Add BPDU MC address. */
- (void)SkAddrMcAdd(pAC, IoC,
- pAC->Rlmt.Net[Para.Para32[1]].Port[i]->PortNumber,
- &BridgeMcAddr, SK_ADDR_PERMANENT);
-
- if (pAC->Rlmt.Net[Para.Para32[1]].RlmtState != SK_RLMT_RS_INIT) {
- if (!pAC->Rlmt.Net[Para.Para32[1]].Port[i]->LinkDown &&
- (Para2.pParaPtr = SkRlmtBuildSpanningTreePacket(
- pAC, IoC, i)) != NULL) {
- pAC->Rlmt.Net[Para.Para32[1]].Port[i]->RootIdSet =
- SK_FALSE;
- SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para2);
- }
- }
- }
- (void)SkAddrMcUpdate(pAC, IoC,
- pAC->Rlmt.Net[Para.Para32[1]].Port[i]->PortNumber);
- } /* for ... */
-
- if ((pAC->Rlmt.Net[Para.Para32[1]].RlmtMode & SK_RLMT_CHECK_SEG) != 0) {
- Para2.Para32[0] = Para.Para32[1];
- Para2.Para32[1] = (SK_U32)-1;
- SkTimerStart(pAC, IoC, &pAC->Rlmt.Net[Para.Para32[1]].SegTimer,
- SK_RLMT_SEG_TO_VAL, SKGE_RLMT, SK_RLMT_SEG_TIM, Para2);
- }
- } /* SK_RLMT_CHECK_SEG bit changed. */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("SK_RLMT_MODE_CHANGE Event END.\n"))
-} /* SkRlmtEvtModeChange */
-
-
-/******************************************************************************
- *
- * SkRlmtEvent - a PORT- or an RLMT-specific event happened
- *
- * Description:
- * This routine calls subroutines to handle PORT- and RLMT-specific events.
- *
- * Context:
- * runtime, pageable?
- * may be called after SK_INIT_IO
- *
- * Returns:
- * 0
- */
-int SkRlmtEvent(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-SK_U32 Event, /* Event code */
-SK_EVPARA Para) /* Event-specific parameter */
-{
- switch (Event) {
-
- /* ----- PORT events ----- */
-
- case SK_RLMT_PORTSTART_TIM: /* From RLMT via TIME. */
- SkRlmtEvtPortStartTim(pAC, IoC, Para);
- break;
- case SK_RLMT_LINK_UP: /* From SIRQ. */
- SkRlmtEvtLinkUp(pAC, IoC, Para);
- break;
- case SK_RLMT_PORTUP_TIM: /* From RLMT via TIME. */
- SkRlmtEvtPortUpTim(pAC, IoC, Para);
- break;
- case SK_RLMT_PORTDOWN: /* From RLMT. */
- case SK_RLMT_PORTDOWN_RX_TIM: /* From RLMT via TIME. */
- case SK_RLMT_PORTDOWN_TX_TIM: /* From RLMT via TIME. */
- SkRlmtEvtPortDownX(pAC, IoC, Event, Para);
- break;
- case SK_RLMT_LINK_DOWN: /* From SIRQ. */
- SkRlmtEvtLinkDown(pAC, IoC, Para);
- break;
- case SK_RLMT_PORT_ADDR: /* From ADDR. */
- SkRlmtEvtPortAddr(pAC, IoC, Para);
- break;
-
- /* ----- RLMT events ----- */
-
- case SK_RLMT_START: /* From DRV. */
- SkRlmtEvtStart(pAC, IoC, Para);
- break;
- case SK_RLMT_STOP: /* From DRV. */
- SkRlmtEvtStop(pAC, IoC, Para);
- break;
- case SK_RLMT_TIM: /* From RLMT via TIME. */
- SkRlmtEvtTim(pAC, IoC, Para);
- break;
- case SK_RLMT_SEG_TIM:
- SkRlmtEvtSegTim(pAC, IoC, Para);
- break;
- case SK_RLMT_PACKET_RECEIVED: /* From DRV. */
- SkRlmtEvtPacketRx(pAC, IoC, Para);
- break;
- case SK_RLMT_STATS_CLEAR: /* From PNMI. */
- SkRlmtEvtStatsClear(pAC, IoC, Para);
- break;
- case SK_RLMT_STATS_UPDATE: /* From PNMI. */
- SkRlmtEvtStatsUpdate(pAC, IoC, Para);
- break;
- case SK_RLMT_PREFPORT_CHANGE: /* From PNMI. */
- SkRlmtEvtPrefportChange(pAC, IoC, Para);
- break;
- case SK_RLMT_MODE_CHANGE: /* From PNMI. */
- SkRlmtEvtModeChange(pAC, IoC, Para);
- break;
- case SK_RLMT_SET_NETS: /* From DRV. */
- SkRlmtEvtSetNets(pAC, IoC, Para);
- break;
-
- /* ----- Unknown events ----- */
-
- default: /* Create error log entry. */
- SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
- ("Unknown RLMT Event %d.\n", Event))
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E003, SKERR_RLMT_E003_MSG);
- break;
- } /* switch() */
-
- return (0);
-} /* SkRlmtEvent */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
+++ /dev/null
-/******************************************************************************
- *
- * Name: sktimer.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.12 $
- * Date: $Date: 1999/11/22 13:38:51 $
- * Purpose: High level timer functions.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: sktimer.c,v $
- * Revision 1.12 1999/11/22 13:38:51 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.11 1998/12/17 13:24:13 gklug
- * fix: restart problem: do NOT destroy timer queue if init 1 is done
- *
- * Revision 1.10 1998/10/15 15:11:36 gklug
- * fix: ID_sccs to SysKonnectFileId
- *
- * Revision 1.9 1998/09/15 15:15:04 cgoos
- * Changed TRUE/FALSE to SK_TRUE/SK_FALSE
- *
- * Revision 1.8 1998/09/08 08:47:55 gklug
- * add: init level handling
- *
- * Revision 1.7 1998/08/19 09:50:53 gklug
- * fix: remove struct keyword from c-code (see CCC) add typedefs
- *
- * Revision 1.6 1998/08/17 13:43:13 gklug
- * chg: Parameter will be union of 64bit para, 2 times SK_U32 or SK_PTR
- *
- * Revision 1.5 1998/08/14 07:09:14 gklug
- * fix: chg pAc -> pAC
- *
- * Revision 1.4 1998/08/07 12:53:46 gklug
- * fix: first compiled version
- *
- * Revision 1.3 1998/08/07 09:31:53 gklug
- * fix: delta spelling
- *
- * Revision 1.2 1998/08/07 09:31:02 gklug
- * adapt functions to new c coding conventions
- * rmv: "fast" handling
- * chg: inserting of new timer in queue.
- * chg: event queue generation when timer runs out
- *
- * Revision 1.1 1998/08/05 11:27:55 gklug
- * first version: adapted from SMT
- *
- *
- *
- *
- ******************************************************************************/
-
-
-#include <config.h>
-
-/*
- Event queue and dispatcher
-*/
-static const char SysKonnectFileId[] =
- "$Header: /usr56/projects/ge/schedule/sktimer.c,v 1.12 1999/11/22 13:38:51 cgoos Exp $" ;
-
-#include "h/skdrv1st.h" /* Driver Specific Definitions */
-#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-
-#ifdef __C2MAN__
-/*
- Event queue management.
-
- General Description:
-
- */
-intro()
-{}
-#endif
-
-
-/* Forward declaration */
-static void timer_done(SK_AC *pAC,SK_IOC Ioc,int Restart);
-
-
-/*
- * Inits the software timer
- *
- * needs to be called during Init level 1.
- */
-void SkTimerInit(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc, /* IoContext */
-int Level) /* Init Level */
-{
- switch (Level) {
- case SK_INIT_DATA:
- pAC->Tim.StQueue = 0 ;
- break;
- case SK_INIT_IO:
- SkHwtInit(pAC,Ioc) ;
- SkTimerDone(pAC, Ioc);
- break;
- default:
- break;
- }
-}
-
-/*
- * Stops a high level timer
- * - If a timer is not in the queue the function returns normally, too.
- */
-void SkTimerStop(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc, /* IoContext */
-SK_TIMER *pTimer) /* Timer Pointer to be started */
-{
- SK_TIMER **ppTimPrev ;
- SK_TIMER *pTm ;
-
- /*
- * remove timer from queue
- */
- pTimer->TmActive = SK_FALSE ;
- if (pAC->Tim.StQueue == pTimer && !pTimer->TmNext) {
- SkHwtStop(pAC,Ioc) ;
- }
- for (ppTimPrev = &pAC->Tim.StQueue ; (pTm = *ppTimPrev) ;
- ppTimPrev = &pTm->TmNext ) {
- if (pTm == pTimer) {
- /*
- * Timer found in queue
- * - dequeue it and
- * - correct delta of the next timer
- */
- *ppTimPrev = pTm->TmNext ;
-
- if (pTm->TmNext) {
- /* correct delta of next timer in queue */
- pTm->TmNext->TmDelta += pTm->TmDelta ;
- }
- return ;
- }
- }
-}
-
-/*
- * Start a high level software timer
- */
-void SkTimerStart(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc, /* IoContext */
-SK_TIMER *pTimer, /* Timer Pointer to be started */
-SK_U32 Time, /* Time value */
-SK_U32 Class, /* Event Class for this timer */
-SK_U32 Event, /* Event Value for this timer */
-SK_EVPARA Para) /* Event Parameter for this timer */
-{
- SK_TIMER **ppTimPrev ;
- SK_TIMER *pTm ;
- SK_U32 Delta ;
-
- Time /= 16 ; /* input is uS, clock ticks are 16uS */
- if (!Time)
- Time = 1 ;
-
- SkTimerStop(pAC,Ioc,pTimer) ;
-
- pTimer->TmClass = Class ;
- pTimer->TmEvent = Event ;
- pTimer->TmPara = Para ;
- pTimer->TmActive = SK_TRUE ;
-
- if (!pAC->Tim.StQueue) {
- /* First Timer to be started */
- pAC->Tim.StQueue = pTimer ;
- pTimer->TmNext = 0 ;
- pTimer->TmDelta = Time ;
- SkHwtStart(pAC,Ioc,Time) ;
- return ;
- }
-
- /*
- * timer correction
- */
- timer_done(pAC,Ioc,0) ;
-
- /*
- * find position in queue
- */
- Delta = 0 ;
- for (ppTimPrev = &pAC->Tim.StQueue ; (pTm = *ppTimPrev) ;
- ppTimPrev = &pTm->TmNext ) {
- if (Delta + pTm->TmDelta > Time) {
- /* Position found */
- /* Here the timer needs to be inserted. */
- break ;
- }
- Delta += pTm->TmDelta ;
- }
-
- /* insert in queue */
- *ppTimPrev = pTimer ;
- pTimer->TmNext = pTm ;
- pTimer->TmDelta = Time - Delta ;
-
- if (pTm) {
- /* There is a next timer
- * -> correct its Delta value.
- */
- pTm->TmDelta -= pTimer->TmDelta ;
- }
-
- /*
- * start new with first
- */
- SkHwtStart(pAC,Ioc,pAC->Tim.StQueue->TmDelta) ;
-}
-
-
-void SkTimerDone(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc) /* IoContext */
-{
- timer_done(pAC,Ioc,1) ;
-}
-
-
-static void timer_done(
-SK_AC *pAC, /* Adapters context */
-SK_IOC Ioc, /* IoContext */
-int Restart) /* Do we need to restart the Hardware timer ? */
-{
- SK_U32 Delta ;
- SK_TIMER *pTm ;
- SK_TIMER *pTComp ; /* Timer completed now now */
- SK_TIMER **ppLast ; /* Next field of Last timer to be deq */
- int Done = 0 ;
-
- Delta = SkHwtRead(pAC,Ioc) ;
- ppLast = &pAC->Tim.StQueue ;
- pTm = pAC->Tim.StQueue ;
- while (pTm && !Done) {
- if (Delta >= pTm->TmDelta) {
- /* Timer ran out */
- pTm->TmActive = SK_FALSE ;
- Delta -= pTm->TmDelta ;
- ppLast = &pTm->TmNext ;
- pTm = pTm->TmNext ;
- } else {
- /* We found the first timer that did not run out */
- pTm->TmDelta -= Delta ;
- Delta = 0 ;
- Done = 1 ;
- }
- }
- *ppLast = 0 ;
- /*
- * pTm points to the first Timer that did not run out.
- * StQueue points to the first Timer that run out.
- */
-
- for ( pTComp = pAC->Tim.StQueue ; pTComp ; pTComp = pTComp->TmNext) {
- SkEventQueue(pAC,pTComp->TmClass, pTComp->TmEvent,
- pTComp->TmPara) ;
- }
-
- /* Set head of timer queue to the first timer that did not run out */
- pAC->Tim.StQueue = pTm ;
-
- if (Restart && pAC->Tim.StQueue) {
- /* Restart HW timer */
- SkHwtStart(pAC,Ioc,pAC->Tim.StQueue->TmDelta) ;
- }
-}
-
-/* End of file */
+++ /dev/null
-/******************************************************************************
- *
- * Name: skvpd.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.37 $
- * Date: $Date: 2003/01/13 10:42:45 $
- * Purpose: Shared software to read and write VPD data
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skvpd.c,v $
- * Revision 1.37 2003/01/13 10:42:45 rschmidt
- * Replaced check for PCI device Id from YUKON with GENESIS
- * to set the VPD size in VpdInit()
- * Editorial changes
- *
- * Revision 1.36 2002/11/14 15:16:56 gheinig
- * Added const specifier to key and buf parameters for VpdPara, VpdRead
- * and VpdWrite for Diag 7 GUI
- *
- * Revision 1.35 2002/10/21 14:31:59 gheinig
- * Took out CVS web garbage at head of file
- *
- * Revision 1.34 2002/10/21 11:47:24 gheinig
- * Reverted to version 1.32 due to unwanted commit
- *
- * Revision 1.32 2002/10/14 16:04:29 rschmidt
- * Added saving of VPD ROM Size from PCI_OUR_REG_2
- * Avoid reading of PCI_OUR_REG_2 in VpdTransferBlock()
- * Editorial changes
- *
- * Revision 1.31 2002/09/10 09:21:32 mkarl
- * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis
- *
- * Revision 1.30 2002/09/09 14:43:03 mkarl
- * changes for diagnostics in order to read VPD data before the adapter
- * has been initialized
- * editorial changes
- *
- * Revision 1.29 2002/07/26 13:20:43 mkarl
- * added Yukon support
- * save size of VPD in pAC->vpd.vpd_size
- *
- * Revision 1.28 2002/04/02 15:31:47 afischer
- * Bug fix in VpdWait()
- *
- * Revision 1.27 2000/08/10 11:29:06 rassmann
- * Editorial changes.
- * Preserving 32-bit alignment in structs for the adapter context.
- * Removed unused function VpdWriteDword() (#if 0).
- * Made VpdReadKeyword() available for SKDIAG only.
- *
- * Revision 1.26 2000/06/13 08:00:01 mkarl
- * additional cast to avoid compile problems in 64 bit environment
- *
- * Revision 1.25 1999/11/22 13:39:32 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.24 1999/03/11 14:25:49 malthoff
- * Replace __STDC__ with SK_KR_PROTO.
- *
- * Revision 1.23 1999/01/11 15:13:11 gklug
- * fix: syntax error
- *
- * Revision 1.22 1998/10/30 06:41:15 gklug
- * rmv: WARNING
- *
- * Revision 1.21 1998/10/29 07:15:14 gklug
- * fix: Write Stream function needs verify.
- *
- * Revision 1.20 1998/10/28 18:05:08 gklug
- * chg: no DEBUG in VpdMayWrite
- *
- * Revision 1.19 1998/10/28 15:56:11 gklug
- * fix: Return len at end of ReadStream
- * fix: Write even less than 4 bytes correctly
- *
- * Revision 1.18 1998/10/28 09:00:47 gklug
- * fix: unreferenced local vars
- *
- * Revision 1.17 1998/10/28 08:25:45 gklug
- * fix: WARNING
- *
- * Revision 1.16 1998/10/28 08:17:30 gklug
- * fix: typo
- *
- * Revision 1.15 1998/10/28 07:50:32 gklug
- * fix: typo
- *
- * Revision 1.14 1998/10/28 07:20:38 gklug
- * chg: Interface functions to use IoC as parameter as well
- * fix: VpdRead/WriteDWord now returns SK_U32
- * chg: VPD_IN/OUT names conform to SK_IN/OUT
- * add: usage of VPD_IN/OUT8 macros
- * add: VpdRead/Write Stream functions to r/w a stream of data
- * fix: VpdTransferBlock swapped illegal
- * add: VpdMayWrite
- *
- * Revision 1.13 1998/10/22 10:02:37 gklug
- * fix: SysKonnectFileId typo
- *
- * Revision 1.12 1998/10/20 10:01:01 gklug
- * fix: parameter to SkOsGetTime
- *
- * Revision 1.11 1998/10/15 12:51:48 malthoff
- * Remove unrequired parameter p in vpd_setup_para().
- *
- * Revision 1.10 1998/10/08 14:52:43 malthoff
- * Remove CvsId by SysKonnectFileId.
- *
- * Revision 1.9 1998/09/16 07:33:52 malthoff
- * replace memcmp() by SK_MEMCMP and
- * memcpy() by SK_MEMCPY() to be
- * independent from the 'C' Standard Library.
- *
- * Revision 1.8 1998/08/19 12:52:35 malthoff
- * compiler fix: use SK_VPD_KEY instead of S_VPD.
- *
- * Revision 1.7 1998/08/19 08:14:01 gklug
- * fix: remove struct keyword as much as possible from the C-code (see CCC)
- *
- * Revision 1.6 1998/08/18 13:03:58 gklug
- * SkOsGetTime now returns SK_U64
- *
- * Revision 1.5 1998/08/18 08:17:29 malthoff
- * Ensure we issue a VPD read in vpd_read_dword().
- * Discard all VPD keywords other than Vx or Yx, where
- * x is '0..9' or 'A..Z'.
- *
- * Revision 1.4 1998/07/03 14:52:19 malthoff
- * Add category SK_DBGCAT_FATAL to some debug macros.
- * bug fix: correct the keyword name check in vpd_write().
- *
- * Revision 1.3 1998/06/26 11:16:53 malthoff
- * Correct the modified File Identifier.
- *
- * Revision 1.2 1998/06/26 11:13:43 malthoff
- * Modify the File Identifier.
- *
- * Revision 1.1 1998/06/19 14:11:08 malthoff
- * Created, Tests with AIX were performed successfully
- *
- *
- ******************************************************************************/
-
-#include <config.h>
-
-/*
- Please refer skvpd.txt for infomation how to include this module
- */
-static const char SysKonnectFileId[] =
- "@(#)$Id: skvpd.c,v 1.37 2003/01/13 10:42:45 rschmidt Exp $ (C) SK";
-
-#include "h/skdrv1st.h"
-#include "h/sktypes.h"
-#include "h/skdebug.h"
-#include "h/skdrv2nd.h"
-
-/*
- * Static functions
- */
-#ifndef SK_KR_PROTO
-static SK_VPD_PARA *vpd_find_para(
- SK_AC *pAC,
- const char *key,
- SK_VPD_PARA *p);
-#else /* SK_KR_PROTO */
-static SK_VPD_PARA *vpd_find_para();
-#endif /* SK_KR_PROTO */
-
-/*
- * waits for a completion of a VPD transfer
- * The VPD transfer must complete within SK_TICKS_PER_SEC/16
- *
- * returns 0: success, transfer completes
- * error exit(9) with a error message
- */
-static int VpdWait(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-int event) /* event to wait for (VPD_READ / VPD_write) completion*/
-{
- SK_U64 start_time;
- SK_U16 state;
-
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD wait for %s\n", event?"Write":"Read"));
- start_time = SkOsGetTime(pAC);
- do {
- if (SkOsGetTime(pAC) - start_time > SK_TICKS_PER_SEC) {
-
- /* Bug fix AF: Thu Mar 28 2002
- * Do not call: VPD_STOP(pAC, IoC);
- * A pending VPD read cycle can not be aborted by writing
- * VPD_WRITE to the PCI_VPD_ADR_REG (VPD address register).
- * Although the write threshold in the OUR-register protects
- * VPD read only space from being overwritten this does not
- * protect a VPD read from being `converted` into a VPD write
- * operation (on the fly). As a consequence the VPD_STOP would
- * delete VPD read only data. In case of any problems with the
- * I2C bus we exit the loop here. The I2C read operation can
- * not be aborted except by a reset (->LR).
- */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_FATAL | SK_DBGCAT_ERR,
- ("ERROR:VPD wait timeout\n"));
- return(1);
- }
-
- VPD_IN16(pAC, IoC, PCI_VPD_ADR_REG, &state);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("state = %x, event %x\n",state,event));
- } while((int)(state & PCI_VPD_FLAG) == event);
-
- return(0);
-}
-
-#ifdef SKDIAG
-
-/*
- * Read the dword at address 'addr' from the VPD EEPROM.
- *
- * Needed Time: MIN 1,3 ms MAX 2,6 ms
- *
- * Note: The DWord is returned in the endianess of the machine the routine
- * is running on.
- *
- * Returns the data read.
- */
-SK_U32 VpdReadDWord(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-int addr) /* VPD address */
-{
- SK_U32 Rtv;
-
- /* start VPD read */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD read dword at 0x%x\n",addr));
- addr &= ~VPD_WRITE; /* ensure the R/W bit is set to read */
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)addr);
-
- /* ignore return code here */
- (void)VpdWait(pAC, IoC, VPD_READ);
-
- /* Don't swap here, it's a data stream of bytes */
- Rtv = 0;
-
- VPD_IN32(pAC, IoC, PCI_VPD_DAT_REG, &Rtv);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD read dword data = 0x%x\n",Rtv));
- return(Rtv);
-}
-
-#endif /* SKDIAG */
-
-#if 0
-
-/*
- Write the dword 'data' at address 'addr' into the VPD EEPROM, and
- verify that the data is written.
-
- Needed Time:
-
-. MIN MAX
-. -------------------------------------------------------------------
-. write 1.8 ms 3.6 ms
-. internal write cyles 0.7 ms 7.0 ms
-. -------------------------------------------------------------------
-. over all program time 2.5 ms 10.6 ms
-. read 1.3 ms 2.6 ms
-. -------------------------------------------------------------------
-. over all 3.8 ms 13.2 ms
-.
-
-
- Returns 0: success
- 1: error, I2C transfer does not terminate
- 2: error, data verify error
-
- */
-static int VpdWriteDWord(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-int addr, /* VPD address */
-SK_U32 data) /* VPD data to write */
-{
- /* start VPD write */
- /* Don't swap here, it's a data stream of bytes */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data));
- VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data);
- /* But do it here */
- addr |= VPD_WRITE;
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE));
-
- /* this may take up to 10,6 ms */
- if (VpdWait(pAC, IoC, VPD_WRITE)) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Write Timed Out\n"));
- return(1);
- };
-
- /* verify data */
- if (VpdReadDWord(pAC, IoC, addr) != data) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Data Verify Error\n"));
- return(2);
- }
- return(0);
-} /* VpdWriteDWord */
-
-#endif /* 0 */
-
-/*
- * Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
- * or to the I2C EEPROM.
- *
- * Returns number of bytes read / written.
- */
-static int VpdWriteStream(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-char *buf, /* data buffer */
-int Addr, /* VPD start address */
-int Len) /* number of bytes to read / to write */
-{
- int i;
- int j;
- SK_U16 AdrReg;
- int Rtv;
- SK_U8 * pComp; /* Compare pointer */
- SK_U8 Data; /* Input Data for Compare */
-
- /* Init Compare Pointer */
- pComp = (SK_U8 *) buf;
-
- for (i = 0; i < Len; i++, buf++) {
- if ((i%sizeof(SK_U32)) == 0) {
- /*
- * At the begin of each cycle read the Data Reg
- * So it is initialized even if only a few bytes
- * are written.
- */
- AdrReg = (SK_U16) Addr;
- AdrReg &= ~VPD_WRITE; /* READ operation */
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
-
- /* Wait for termination */
- Rtv = VpdWait(pAC, IoC, VPD_READ);
- if (Rtv != 0) {
- return(i);
- }
- }
-
- /* Write current Byte */
- VPD_OUT8(pAC, IoC, PCI_VPD_DAT_REG + (i%sizeof(SK_U32)),
- *(SK_U8*)buf);
-
- if (((i%sizeof(SK_U32)) == 3) || (i == (Len - 1))) {
- /* New Address needs to be written to VPD_ADDR reg */
- AdrReg = (SK_U16) Addr;
- Addr += sizeof(SK_U32);
- AdrReg |= VPD_WRITE; /* WRITE operation */
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
-
- /* Wait for termination */
- Rtv = VpdWait(pAC, IoC, VPD_WRITE);
- if (Rtv != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Write Timed Out\n"));
- return(i - (i%sizeof(SK_U32)));
- }
-
- /*
- * Now re-read to verify
- */
- AdrReg &= ~VPD_WRITE; /* READ operation */
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
-
- /* Wait for termination */
- Rtv = VpdWait(pAC, IoC, VPD_READ);
- if (Rtv != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Verify Timed Out\n"));
- return(i - (i%sizeof(SK_U32)));
- }
-
- for (j = 0; j <= (int)(i%sizeof(SK_U32)); j++, pComp++) {
-
- VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + j, &Data);
-
- if (Data != *pComp) {
- /* Verify Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("WriteStream Verify Error\n"));
- return(i - (i%sizeof(SK_U32)) + j);
- }
- }
- }
- }
-
- return(Len);
-}
-
-
-/*
- * Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
- * or to the I2C EEPROM.
- *
- * Returns number of bytes read / written.
- */
-static int VpdReadStream(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-char *buf, /* data buffer */
-int Addr, /* VPD start address */
-int Len) /* number of bytes to read / to write */
-{
- int i;
- SK_U16 AdrReg;
- int Rtv;
-
- for (i = 0; i < Len; i++, buf++) {
- if ((i%sizeof(SK_U32)) == 0) {
- /* New Address needs to be written to VPD_ADDR reg */
- AdrReg = (SK_U16) Addr;
- Addr += sizeof(SK_U32);
- AdrReg &= ~VPD_WRITE; /* READ operation */
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
-
- /* Wait for termination */
- Rtv = VpdWait(pAC, IoC, VPD_READ);
- if (Rtv != 0) {
- return(i);
- }
- }
- VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + (i%sizeof(SK_U32)),
- (SK_U8 *)buf);
- }
-
- return(Len);
-}
-
-/*
- * Read ore writes 'len' bytes of VPD data, starting at 'addr' from
- * or to the I2C EEPROM.
- *
- * Returns number of bytes read / written.
- */
-static int VpdTransferBlock(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC, /* IO Context */
-char *buf, /* data buffer */
-int addr, /* VPD start address */
-int len, /* number of bytes to read / to write */
-int dir) /* transfer direction may be VPD_READ or VPD_WRITE */
-{
- int Rtv; /* Return value */
- int vpd_rom_size;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD %s block, addr = 0x%x, len = %d\n",
- dir ? "write" : "read", addr, len));
-
- if (len == 0)
- return(0);
-
- vpd_rom_size = pAC->vpd.rom_size;
-
- if (addr > vpd_rom_size - 4) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Address error: 0x%x, exp. < 0x%x\n",
- addr, vpd_rom_size - 4));
- return(0);
- }
-
- if (addr + len > vpd_rom_size) {
- len = vpd_rom_size - addr;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Warning: len was cut to %d\n", len));
- }
-
- if (dir == VPD_READ) {
- Rtv = VpdReadStream(pAC, IoC, buf, addr, len);
- }
- else {
- Rtv = VpdWriteStream(pAC, IoC, buf, addr, len);
- }
-
- return(Rtv);
-}
-
-#ifdef SKDIAG
-
-/*
- * Read 'len' bytes of VPD data, starting at 'addr'.
- *
- * Returns number of bytes read.
- */
-int VpdReadBlock(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-char *buf, /* buffer were the data should be stored */
-int addr, /* start reading at the VPD address */
-int len) /* number of bytes to read */
-{
- return(VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_READ));
-}
-
-/*
- * Write 'len' bytes of *but to the VPD EEPROM, starting at 'addr'.
- *
- * Returns number of bytes writes.
- */
-int VpdWriteBlock(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-char *buf, /* buffer, holds the data to write */
-int addr, /* start writing at the VPD address */
-int len) /* number of bytes to write */
-{
- return(VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_WRITE));
-}
-#endif /* SKDIAG */
-
-/*
- * (re)initialize the VPD buffer
- *
- * Reads the VPD data from the EEPROM into the VPD buffer.
- * Get the remaining read only and read / write space.
- *
- * return 0: success
- * 1: fatal VPD error
- */
-static int VpdInit(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC) /* IO Context */
-{
- SK_VPD_PARA *r, rp; /* RW or RV */
- int i;
- unsigned char x;
- int vpd_size;
- SK_U16 dev_id;
- SK_U32 our_reg2;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_INIT, ("VpdInit .. "));
-
- VPD_IN16(pAC, IoC, PCI_DEVICE_ID, &dev_id);
-
- VPD_IN32(pAC, IoC, PCI_OUR_REG_2, &our_reg2);
-
- pAC->vpd.rom_size = 256 << ((our_reg2 & PCI_VPD_ROM_SZ) >> 14);
-
- /*
- * this function might get used before the hardware is initialized
- * therefore we cannot always trust in GIChipId
- */
- if (((pAC->vpd.v.vpd_status & VPD_VALID) == 0 &&
- dev_id != VPD_DEV_ID_GENESIS) ||
- ((pAC->vpd.v.vpd_status & VPD_VALID) != 0 &&
- !pAC->GIni.GIGenesis)) {
-
- /* for Yukon the VPD size is always 256 */
- vpd_size = VPD_SIZE_YUKON;
- }
- else {
- /* Genesis uses the maximum ROM size up to 512 for VPD */
- if (pAC->vpd.rom_size > VPD_SIZE_GENESIS) {
- vpd_size = VPD_SIZE_GENESIS;
- }
- else {
- vpd_size = pAC->vpd.rom_size;
- }
- }
-
- /* read the VPD data into the VPD buffer */
- if (VpdTransferBlock(pAC, IoC, pAC->vpd.vpd_buf, 0, vpd_size, VPD_READ)
- != vpd_size) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Block Read Error\n"));
- return(1);
- }
-
- pAC->vpd.vpd_size = vpd_size;
-
- /* find the end tag of the RO area */
- if (!(r = vpd_find_para(pAC, VPD_RV, &rp))) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: RV Tag not found\n"));
- return(1);
- }
-
- if (r->p_val + r->p_len > pAC->vpd.vpd_buf + vpd_size/2) {
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: Invalid VPD struct size\n"));
- return(1);
- }
- pAC->vpd.v.vpd_free_ro = r->p_len - 1;
-
- /* test the checksum */
- for (i = 0, x = 0; (unsigned)i <= (unsigned)vpd_size/2 - r->p_len; i++) {
- x += pAC->vpd.vpd_buf[i];
- }
-
- if (x != 0) {
- /* checksum error */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("VPD Checksum Error\n"));
- return(1);
- }
-
- /* find and check the end tag of the RW area */
- if (!(r = vpd_find_para(pAC, VPD_RW, &rp))) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: RV Tag not found\n"));
- return(1);
- }
-
- if (r->p_val < pAC->vpd.vpd_buf + vpd_size/2) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: Invalid VPD struct size\n"));
- return(1);
- }
- pAC->vpd.v.vpd_free_rw = r->p_len;
-
- /* everything seems to be ok */
- if (pAC->GIni.GIChipId != 0) {
- pAC->vpd.v.vpd_status |= VPD_VALID;
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_INIT,
- ("done. Free RO = %d, Free RW = %d\n",
- pAC->vpd.v.vpd_free_ro, pAC->vpd.v.vpd_free_rw));
-
- return(0);
-}
-
-/*
- * find the Keyword 'key' in the VPD buffer and fills the
- * parameter struct 'p' with it's values
- *
- * returns *p success
- * 0: parameter was not found or VPD encoding error
- */
-static SK_VPD_PARA *vpd_find_para(
-SK_AC *pAC, /* common data base */
-const char *key, /* keyword to find (e.g. "MN") */
-SK_VPD_PARA *p) /* parameter description struct */
-{
- char *v ; /* points to VPD buffer */
- int max; /* Maximum Number of Iterations */
-
- v = pAC->vpd.vpd_buf;
- max = 128;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD find para %s .. ",key));
-
- /* check mandatory resource type ID string (Product Name) */
- if (*v != (char)RES_ID) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Error: 0x%x missing\n", RES_ID));
- return(0);
- }
-
- if (strcmp(key, VPD_NAME) == 0) {
- p->p_len = VPD_GET_RES_LEN(v);
- p->p_val = VPD_GET_VAL(v);
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("found, len = %d\n", p->p_len));
- return(p);
- }
-
- v += 3 + VPD_GET_RES_LEN(v) + 3;
- for (;; ) {
- if (SK_MEMCMP(key,v,2) == 0) {
- p->p_len = VPD_GET_VPD_LEN(v);
- p->p_val = VPD_GET_VAL(v);
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("found, len = %d\n",p->p_len));
- return(p);
- }
-
- /* exit when reaching the "RW" Tag or the maximum of itera. */
- max--;
- if (SK_MEMCMP(VPD_RW,v,2) == 0 || max == 0) {
- break;
- }
-
- if (SK_MEMCMP(VPD_RV,v,2) == 0) {
- v += 3 + VPD_GET_VPD_LEN(v) + 3; /* skip VPD-W */
- }
- else {
- v += 3 + VPD_GET_VPD_LEN(v);
- }
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("scanning '%c%c' len = %d\n",v[0],v[1],v[2]));
- }
-
-#ifdef DEBUG
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL, ("not found\n"));
- if (max == 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Key/Len Encoding error\n"));
- }
-#endif /* DEBUG */
- return(0);
-}
-
-/*
- * Move 'n' bytes. Begin with the last byte if 'n' is > 0,
- * Start with the last byte if n is < 0.
- *
- * returns nothing
- */
-static void vpd_move_para(
-char *start, /* start of memory block */
-char *end, /* end of memory block to move */
-int n) /* number of bytes the memory block has to be moved */
-{
- char *p;
- int i; /* number of byte copied */
-
- if (n == 0)
- return;
-
- i = (int) (end - start + 1);
- if (n < 0) {
- p = start + n;
- while (i != 0) {
- *p++ = *start++;
- i--;
- }
- }
- else {
- p = end + n;
- while (i != 0) {
- *p-- = *end--;
- i--;
- }
- }
-}
-
-/*
- * setup the VPD keyword 'key' at 'ip'.
- *
- * returns nothing
- */
-static void vpd_insert_key(
-const char *key, /* keyword to insert */
-const char *buf, /* buffer with the keyword value */
-int len, /* length of the value string */
-char *ip) /* inseration point */
-{
- SK_VPD_KEY *p;
-
- p = (SK_VPD_KEY *) ip;
- p->p_key[0] = key[0];
- p->p_key[1] = key[1];
- p->p_len = (unsigned char) len;
- SK_MEMCPY(&p->p_val,buf,len);
-}
-
-/*
- * Setup the VPD end tag "RV" / "RW".
- * Also correct the remaining space variables vpd_free_ro / vpd_free_rw.
- *
- * returns 0: success
- * 1: encoding error
- */
-static int vpd_mod_endtag(
-SK_AC *pAC, /* common data base */
-char *etp) /* end pointer input position */
-{
- SK_VPD_KEY *p;
- unsigned char x;
- int i;
- int vpd_size;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD modify endtag at 0x%x = '%c%c'\n",etp,etp[0],etp[1]));
-
- vpd_size = pAC->vpd.vpd_size;
-
- p = (SK_VPD_KEY *) etp;
-
- if (p->p_key[0] != 'R' || (p->p_key[1] != 'V' && p->p_key[1] != 'W')) {
- /* something wrong here, encoding error */
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Encoding Error: invalid end tag\n"));
- return(1);
- }
- if (etp > pAC->vpd.vpd_buf + vpd_size/2) {
- /* create "RW" tag */
- p->p_len = (unsigned char)(pAC->vpd.vpd_buf+vpd_size-etp-3-1);
- pAC->vpd.v.vpd_free_rw = (int) p->p_len;
- i = pAC->vpd.v.vpd_free_rw;
- etp += 3;
- }
- else {
- /* create "RV" tag */
- p->p_len = (unsigned char)(pAC->vpd.vpd_buf+vpd_size/2-etp-3);
- pAC->vpd.v.vpd_free_ro = (int) p->p_len - 1;
-
- /* setup checksum */
- for (i = 0, x = 0; i < vpd_size/2 - p->p_len; i++) {
- x += pAC->vpd.vpd_buf[i];
- }
- p->p_val = (char) 0 - x;
- i = pAC->vpd.v.vpd_free_ro;
- etp += 4;
- }
- while (i) {
- *etp++ = 0x00;
- i--;
- }
-
- return(0);
-}
-
-/*
- * Insert a VPD keyword into the VPD buffer.
- *
- * The keyword 'key' is inserted at the position 'ip' in the
- * VPD buffer.
- * The keywords behind the input position will
- * be moved. The VPD end tag "RV" or "RW" is generated again.
- *
- * returns 0: success
- * 2: value string was cut
- * 4: VPD full, keyword was not written
- * 6: fatal VPD error
- *
- */
-int VpdSetupPara(
-SK_AC *pAC, /* common data base */
-const char *key, /* keyword to insert */
-const char *buf, /* buffer with the keyword value */
-int len, /* length of the keyword value */
-int type, /* VPD_RO_KEY or VPD_RW_KEY */
-int op) /* operation to do: ADD_KEY or OWR_KEY */
-{
- SK_VPD_PARA vp;
- char *etp; /* end tag position */
- int free; /* remaining space in selected area */
- char *ip; /* input position inside the VPD buffer */
- int rtv; /* return code */
- int head; /* additional haeder bytes to move */
- int found; /* additinoal bytes if the keyword was found */
- int vpd_size;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD setup para key = %s, val = %s\n",key,buf));
-
- vpd_size = pAC->vpd.vpd_size;
-
- rtv = 0;
- ip = 0;
- if (type == VPD_RW_KEY) {
- /* end tag is "RW" */
- free = pAC->vpd.v.vpd_free_rw;
- etp = pAC->vpd.vpd_buf + (vpd_size - free - 1 - 3);
- }
- else {
- /* end tag is "RV" */
- free = pAC->vpd.v.vpd_free_ro;
- etp = pAC->vpd.vpd_buf + (vpd_size/2 - free - 4);
- }
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("Free RO = %d, Free RW = %d\n",
- pAC->vpd.v.vpd_free_ro, pAC->vpd.v.vpd_free_rw));
-
- head = 0;
- found = 0;
- if (op == OWR_KEY) {
- if (vpd_find_para(pAC, key, &vp)) {
- found = 3;
- ip = vp.p_val - 3;
- free += vp.p_len + 3;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("Overwrite Key\n"));
- }
- else {
- op = ADD_KEY;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("Add Key\n"));
- }
- }
- if (op == ADD_KEY) {
- ip = etp;
- vp.p_len = 0;
- head = 3;
- }
-
- if (len + 3 > free) {
- if (free < 7) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD Buffer Overflow, keyword not written\n"));
- return(4);
- }
- /* cut it again */
- len = free - 3;
- rtv = 2;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD Buffer Full, Keyword was cut\n"));
- }
-
- vpd_move_para(ip + vp.p_len + found, etp+2, len-vp.p_len+head);
- vpd_insert_key(key, buf, len, ip);
- if (vpd_mod_endtag(pAC, etp + len - vp.p_len + head)) {
- pAC->vpd.v.vpd_status &= ~VPD_VALID;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD Encoding Error\n"));
- return(6);
- }
-
- return(rtv);
-}
-
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the
- * VPD buffer if not already done.
- *
- * return: A pointer to the vpd_status structure. The structure contains
- * this fields.
- */
-SK_VPD_STATUS *VpdStat(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC) /* IO Context */
-{
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- (void)VpdInit(pAC, IoC);
- }
- return(&pAC->vpd.v);
-}
-
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the VPD
- * buffer if not already done.
- * Scan the VPD buffer for VPD keywords and create the VPD
- * keyword list by copying the keywords to 'buf', all after
- * each other and terminated with a '\0'.
- *
- * Exceptions: o The Resource Type ID String (product name) is called "Name"
- * o The VPD end tags 'RV' and 'RW' are not listed
- *
- * The number of copied keywords is counted in 'elements'.
- *
- * returns 0: success
- * 2: buffer overfull, one or more keywords are missing
- * 6: fatal VPD error
- *
- * example values after returning:
- *
- * buf = "Name\0PN\0EC\0MN\0SN\0CP\0VF\0VL\0YA\0"
- * *len = 30
- * *elements = 9
- */
-int VpdKeys(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *buf, /* buffer where to copy the keywords */
-int *len, /* buffer length */
-int *elements) /* number of keywords returned */
-{
- char *v;
- int n;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX, ("list VPD keys .. "));
- *elements = 0;
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- *len = 0;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD Init Error, terminated\n"));
- return(6);
- }
- }
-
- if ((signed)strlen(VPD_NAME) + 1 <= *len) {
- v = pAC->vpd.vpd_buf;
- strcpy(buf,VPD_NAME);
- n = strlen(VPD_NAME) + 1;
- buf += n;
- *elements = 1;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
- ("'%c%c' ",v[0],v[1]));
- }
- else {
- *len = 0;
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
- ("buffer overflow\n"));
- return(2);
- }
-
- v += 3 + VPD_GET_RES_LEN(v) + 3;
- for (;; ) {
- /* exit when reaching the "RW" Tag */
- if (SK_MEMCMP(VPD_RW,v,2) == 0) {
- break;
- }
-
- if (SK_MEMCMP(VPD_RV,v,2) == 0) {
- v += 3 + VPD_GET_VPD_LEN(v) + 3; /* skip VPD-W */
- continue;
- }
-
- if (n+3 <= *len) {
- SK_MEMCPY(buf,v,2);
- buf += 2;
- *buf++ = '\0';
- n += 3;
- v += 3 + VPD_GET_VPD_LEN(v);
- *elements += 1;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
- ("'%c%c' ",v[0],v[1]));
- }
- else {
- *len = n;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("buffer overflow\n"));
- return(2);
- }
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX, ("\n"));
- *len = n;
- return(0);
-}
-
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the
- * VPD buffer if not already done. Search for the VPD keyword
- * 'key' and copy its value to 'buf'. Add a terminating '\0'.
- * If the value does not fit into the buffer cut it after
- * 'len' - 1 bytes.
- *
- * returns 0: success
- * 1: keyword not found
- * 2: value string was cut
- * 3: VPD transfer timeout
- * 6: fatal VPD error
- */
-int VpdRead(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-const char *key, /* keyword to read (e.g. "MN") */
-char *buf, /* buffer where to copy the keyword value */
-int *len) /* buffer length */
-{
- SK_VPD_PARA *p, vp;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX, ("VPD read %s .. ", key));
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- *len = 0;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD init error\n"));
- return(6);
- }
- }
-
- if ((p = vpd_find_para(pAC, key, &vp)) != NULL) {
- if (p->p_len > (*(unsigned *)len)-1) {
- p->p_len = *len - 1;
- }
- SK_MEMCPY(buf, p->p_val, p->p_len);
- buf[p->p_len] = '\0';
- *len = p->p_len;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
- ("%c%c%c%c.., len = %d\n",
- buf[0],buf[1],buf[2],buf[3],*len));
- }
- else {
- *len = 0;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR, ("not found\n"));
- return(1);
- }
- return(0);
-}
-
-
-/*
- * Check whether a given key may be written
- *
- * returns
- * SK_TRUE Yes it may be written
- * SK_FALSE No it may be written
- */
-SK_BOOL VpdMayWrite(
-char *key) /* keyword to write (allowed values "Yx", "Vx") */
-{
- if ((*key != 'Y' && *key != 'V') ||
- key[1] < '0' || key[1] > 'Z' ||
- (key[1] > '9' && key[1] < 'A') || strlen(key) != 2) {
-
- return(SK_FALSE);
- }
- return(SK_TRUE);
-}
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the VPD
- * buffer if not already done. Insert/overwrite the keyword 'key'
- * in the VPD buffer. Cut the keyword value if it does not fit
- * into the VPD read / write area.
- *
- * returns 0: success
- * 2: value string was cut
- * 3: VPD transfer timeout
- * 4: VPD full, keyword was not written
- * 5: keyword cannot be written
- * 6: fatal VPD error
- */
-int VpdWrite(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-const char *key, /* keyword to write (allowed values "Yx", "Vx") */
-const char *buf) /* buffer where the keyword value can be read from */
-{
- int len; /* length of the keyword to write */
- int rtv; /* return code */
- int rtv2;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
- ("VPD write %s = %s\n",key,buf));
-
- if ((*key != 'Y' && *key != 'V') ||
- key[1] < '0' || key[1] > 'Z' ||
- (key[1] > '9' && key[1] < 'A') || strlen(key) != 2) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("illegal key tag, keyword not written\n"));
- return(5);
- }
-
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD init error\n"));
- return(6);
- }
- }
-
- rtv = 0;
- len = strlen(buf);
- if (len > VPD_MAX_LEN) {
- /* cut it */
- len = VPD_MAX_LEN;
- rtv = 2;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("keyword too long, cut after %d bytes\n",VPD_MAX_LEN));
- }
- if ((rtv2 = VpdSetupPara(pAC, key, buf, len, VPD_RW_KEY, OWR_KEY)) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD write error\n"));
- return(rtv2);
- }
-
- return(rtv);
-}
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the
- * VPD buffer if not already done. Remove the VPD keyword
- * 'key' from the VPD buffer.
- * Only the keywords in the read/write area can be deleted.
- * Keywords in the read only area cannot be deleted.
- *
- * returns 0: success, keyword was removed
- * 1: keyword not found
- * 5: keyword cannot be deleted
- * 6: fatal VPD error
- */
-int VpdDelete(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *key) /* keyword to read (e.g. "MN") */
-{
- SK_VPD_PARA *p, vp;
- char *etp;
- int vpd_size;
-
- vpd_size = pAC->vpd.vpd_size;
-
- SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("VPD delete key %s\n",key));
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD init error\n"));
- return(6);
- }
- }
-
- if ((p = vpd_find_para(pAC, key, &vp)) != NULL) {
- if (p->p_val < pAC->vpd.vpd_buf + vpd_size/2) {
- /* try to delete read only keyword */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("cannot delete RO keyword\n"));
- return(5);
- }
-
- etp = pAC->vpd.vpd_buf + (vpd_size-pAC->vpd.v.vpd_free_rw-1-3);
-
- vpd_move_para(vp.p_val+vp.p_len, etp+2,
- - ((int)(vp.p_len + 3)));
- if (vpd_mod_endtag(pAC, etp - vp.p_len - 3)) {
- pAC->vpd.v.vpd_status &= ~VPD_VALID;
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD encoding error\n"));
- return(6);
- }
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("keyword not found\n"));
- return(1);
- }
-
- return(0);
-}
-
-/*
- * If the VPD buffer contains valid data write the VPD
- * read/write area back to the VPD EEPROM.
- *
- * returns 0: success
- * 3: VPD transfer timeout
- */
-int VpdUpdate(
-SK_AC *pAC, /* Adapters context */
-SK_IOC IoC) /* IO Context */
-{
- int vpd_size;
-
- vpd_size = pAC->vpd.vpd_size;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("VPD update .. "));
- if ((pAC->vpd.v.vpd_status & VPD_VALID) != 0) {
- if (VpdTransferBlock(pAC, IoC, pAC->vpd.vpd_buf + vpd_size/2,
- vpd_size/2, vpd_size/2, VPD_WRITE) != vpd_size/2) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("transfer timed out\n"));
- return(3);
- }
- }
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("done\n"));
- return(0);
-}
-
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the VPD buffer
- * if not already done. If the keyword "VF" is not present it will be
- * created and the error log message will be stored to this keyword.
- * If "VF" is not present the error log message will be stored to the
- * keyword "VL". "VL" will created or overwritten if "VF" is present.
- * The VPD read/write area is saved to the VPD EEPROM.
- *
- * returns nothing, errors will be ignored.
- */
-void VpdErrLog(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *msg) /* error log message */
-{
- SK_VPD_PARA *v, vf; /* VF */
- int len;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
- ("VPD error log msg %s\n", msg));
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD init error\n"));
- return;
- }
- }
-
- len = strlen(msg);
- if (len > VPD_MAX_LEN) {
- /* cut it */
- len = VPD_MAX_LEN;
- }
- if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n"));
- (void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY);
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n"));
- (void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY);
- }
-
- (void)VpdUpdate(pAC, IoC);
-}
+++ /dev/null
-/******************************************************************************
- *
- * Name: skxmac2.c
- * Project: GEnesis, PCI Gigabit Ethernet Adapter
- * Version: $Revision: 1.91 $
- * Date: $Date: 2003/02/05 15:09:34 $
- * Purpose: Contains functions to initialize the MACs and PHYs
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * (C)Copyright 1998-2003 SysKonnect GmbH.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-/******************************************************************************
- *
- * History:
- *
- * $Log: skxmac2.c,v $
- * Revision 1.91 2003/02/05 15:09:34 rschmidt
- * Removed setting of 'Collision Test'-bit in SkGmInitPhyMarv().
- * Disabled auto-update for speed, duplex and flow-control when
- * auto-negotiation is not enabled (Bug Id #10766).
- * Editorial changes.
- *
- * Revision 1.90 2003/01/29 13:35:19 rschmidt
- * Increment Rx FIFO Overflow counter only in DEBUG-mode.
- * Corrected define for blinking active LED.
- *
- * Revision 1.89 2003/01/28 16:37:45 rschmidt
- * Changed init for blinking active LED
- *
- * Revision 1.88 2003/01/28 10:09:38 rschmidt
- * Added debug outputs in SkGmInitMac().
- * Added customized init of LED registers in SkGmInitPhyMarv(),
- * for blinking active LED (#ifdef ACT_LED_BLINK) and
- * for normal duplex LED (#ifdef DUP_LED_NORMAL).
- * Editorial changes.
- *
- * Revision 1.87 2002/12/10 14:39:05 rschmidt
- * Improved initialization of GPHY in SkGmInitPhyMarv().
- * Editorial changes.
- *
- * Revision 1.86 2002/12/09 15:01:12 rschmidt
- * Added setup of Ext. PHY Specific Ctrl Reg (downshift feature).
- *
- * Revision 1.85 2002/12/05 14:09:16 rschmidt
- * Improved avoiding endless loop in SkGmPhyWrite(), SkGmPhyWrite().
- * Added additional advertising for 10Base-T when 100Base-T is selected.
- * Added case SK_PHY_MARV_FIBER for YUKON Fiber adapter.
- * Editorial changes.
- *
- * Revision 1.84 2002/11/15 12:50:09 rschmidt
- * Changed SkGmCableDiagStatus() when getting results.
- *
- * Revision 1.83 2002/11/13 10:28:29 rschmidt
- * Added some typecasts to avoid compiler warnings.
- *
- * Revision 1.82 2002/11/13 09:20:46 rschmidt
- * Replaced for(..) with do {} while (...) in SkXmUpdateStats().
- * Replaced 2 macros GM_IN16() with 1 GM_IN32() in SkGmMacStatistic().
- * Added SkGmCableDiagStatus() for Virtual Cable Test (VCT).
- * Editorial changes.
- *
- * Revision 1.81 2002/10/28 14:28:08 rschmidt
- * Changed MAC address setup for GMAC in SkGmInitMac().
- * Optimized handling of counter overflow IRQ in SkGmOverflowStatus().
- * Editorial changes.
- *
- * Revision 1.80 2002/10/14 15:29:44 rschmidt
- * Corrected disabling of all PHY IRQs.
- * Added WA for deviation #16 (address used for pause packets).
- * Set Pause Mode in SkMacRxTxEnable() only for Genesis.
- * Added IRQ and counter for Receive FIFO Overflow in DEBUG-mode.
- * SkXmTimeStamp() replaced by SkMacTimeStamp().
- * Added clearing of GMAC Tx FIFO Underrun IRQ in SkGmIrq().
- * Editorial changes.
- *
- * Revision 1.79 2002/10/10 15:55:36 mkarl
- * changes for PLinkSpeedUsed
- *
- * Revision 1.78 2002/09/12 09:39:51 rwahl
- * Removed deactivate code for SIRQ overflow event separate for TX/RX.
- *
- * Revision 1.77 2002/09/09 12:26:37 mkarl
- * added handling for Yukon to SkXmTimeStamp
- *
- * Revision 1.76 2002/08/21 16:41:16 rschmidt
- * Added bit GPC_ENA_XC (Enable MDI crossover) in HWCFG_MODE.
- * Added forced speed settings in SkGmInitPhyMarv().
- * Added settings of full/half duplex capabilities for YUKON Fiber.
- * Editorial changes.
- *
- * Revision 1.75 2002/08/16 15:12:01 rschmidt
- * Replaced all if(GIChipId == CHIP_ID_GENESIS) with new entry GIGenesis.
- * Added function SkMacHashing() for ADDR-Module.
- * Removed functions SkXmClrSrcCheck(), SkXmClrHashAddr() (calls replaced
- * with macros).
- * Removed functions SkGmGetMuxConfig().
- * Added HWCFG_MODE init for YUKON Fiber.
- * Changed initialization of GPHY in SkGmInitPhyMarv().
- * Changed check of parameter in SkXmMacStatistic().
- * Editorial changes.
- *
- * Revision 1.74 2002/08/12 14:00:17 rschmidt
- * Replaced usage of Broadcom PHY Ids with defines.
- * Corrected error messages in SkGmMacStatistic().
- * Made SkMacPromiscMode() public for ADDR-Modul.
- * Editorial changes.
- *
- * Revision 1.73 2002/08/08 16:26:24 rschmidt
- * Improved reset sequence for YUKON in SkGmHardRst() and SkGmInitMac().
- * Replaced XMAC Rx High Watermark init value with SK_XM_RX_HI_WM.
- * Editorial changes.
- *
- * Revision 1.72 2002/07/24 15:11:19 rschmidt
- * Fixed wrong placement of parenthesis.
- * Editorial changes.
- *
- * Revision 1.71 2002/07/23 16:05:18 rschmidt
- * Added global functions for PHY: SkGePhyRead(), SkGePhyWrite().
- * Fixed Tx Counter Overflow IRQ (Bug ID #10730).
- * Editorial changes.
- *
- * Revision 1.70 2002/07/18 14:27:27 rwahl
- * Fixed syntax error.
- *
- * Revision 1.69 2002/07/17 17:08:47 rwahl
- * Fixed check in SkXmMacStatistic().
- *
- * Revision 1.68 2002/07/16 07:35:24 rwahl
- * Removed check for cleared mib counter in SkGmResetCounter().
- *
- * Revision 1.67 2002/07/15 18:35:56 rwahl
- * Added SkXmUpdateStats(), SkGmUpdateStats(), SkXmMacStatistic(),
- * SkGmMacStatistic(), SkXmResetCounter(), SkGmResetCounter(),
- * SkXmOverflowStatus(), SkGmOverflowStatus().
- * Changes to SkXmIrq() & SkGmIrq(): Combined SIRQ Overflow for both
- * RX & TX.
- * Changes to SkGmInitMac(): call to SkGmResetCounter().
- * Editorial changes.
- *
- * Revision 1.66 2002/07/15 15:59:30 rschmidt
- * Added PHY Address in SkXmPhyRead(), SkXmPhyWrite().
- * Added MIB Clear Counter in SkGmInitMac().
- * Added Duplex and Flow-Control settings.
- * Reset all Multicast filtering Hash reg. in SkGmInitMac().
- * Added new function: SkGmGetMuxConfig().
- * Editorial changes.
- *
- * Revision 1.65 2002/06/10 09:35:39 rschmidt
- * Replaced C++ comments (//).
- * Added #define VCPU around VCPUwaitTime.
- * Editorial changes.
- *
- * Revision 1.64 2002/06/05 08:41:10 rschmidt
- * Added function for XMAC2: SkXmTimeStamp().
- * Added function for YUKON: SkGmSetRxCmd().
- * Changed SkGmInitMac() resp. SkGmHardRst().
- * Fixed wrong variable in SkXmAutoNegLipaXmac() (debug mode).
- * SkXmRxTxEnable() replaced by SkMacRxTxEnable().
- * Editorial changes.
- *
- * Revision 1.63 2002/04/25 13:04:44 rschmidt
- * Changes for handling YUKON.
- * Use of #ifdef OTHER_PHY to eliminate code for unused Phy types.
- * Macros for XMAC PHY access PHY_READ(), PHY_WRITE() replaced
- * by functions SkXmPhyRead(), SkXmPhyWrite();
- * Removed use of PRxCmd to setup XMAC.
- * Added define PHY_B_AS_PAUSE_MSK for BCom Pause Res.
- * Added setting of XM_RX_DIS_CEXT in SkXmInitMac().
- * Removed status parameter from MAC IRQ handler SkMacIrq(),
- * SkXmIrq() and SkGmIrq().
- * SkXmAutoNegLipa...() for ext. Phy replaced by SkMacAutoNegLipaPhy().
- * Added SkMac...() functions to handle both XMAC and GMAC.
- * Added functions for YUKON: SkGmHardRst(), SkGmSoftRst(),
- * SkGmSetRxTxEn(), SkGmIrq(), SkGmInitMac(), SkGmInitPhyMarv(),
- * SkGmAutoNegDoneMarv(), SkGmPhyRead(), SkGmPhyWrite().
- * Changes for V-CPU support.
- * Editorial changes.
- *
- * Revision 1.62 2001/08/06 09:50:14 rschmidt
- * Workaround BCOM Errata #1 for the C5 type.
- * Editorial changes.
- *
- * Revision 1.61 2001/02/09 15:40:59 rassmann
- * Editorial changes.
- *
- * Revision 1.60 2001/02/07 15:02:01 cgoos
- * Added workaround for Fujitsu switch link down.
- *
- * Revision 1.59 2001/01/10 09:38:06 cgoos
- * Fixed Broadcom C0/A1 Id check for workaround.
- *
- * Revision 1.58 2000/11/29 11:30:38 cgoos
- * Changed DEBUG sections with NW output to xDEBUG
- *
- * Revision 1.57 2000/11/27 12:40:40 rassmann
- * Suppressing preamble after first access to BCom, not before (#10556).
- *
- * Revision 1.56 2000/11/09 12:32:48 rassmann
- * Renamed variables.
- *
- * Revision 1.55 2000/11/09 11:30:10 rassmann
- * WA: Waiting after releasing reset until BCom chip is accessible.
- *
- * Revision 1.54 2000/10/02 14:10:27 rassmann
- * Reading BCOM PHY after releasing reset until it returns a valid value.
- *
- * Revision 1.53 2000/07/27 12:22:11 gklug
- * fix: possible endless loop in XmHardRst.
- *
- * Revision 1.52 2000/05/22 08:48:31 malthoff
- * Fix: #10523 errata valid for all BCOM PHYs.
- *
- * Revision 1.51 2000/05/17 12:52:18 malthoff
- * Fixes BCom link errata (#10523).
- *
- * Revision 1.50 1999/11/22 13:40:14 cgoos
- * Changed license header to GPL.
- *
- * Revision 1.49 1999/11/22 08:12:13 malthoff
- * Add workaround for power consumption feature of BCom C0 chip.
- *
- * Revision 1.48 1999/11/16 08:39:01 malthoff
- * Fix: MDIO preamble suppression is port dependent.
- *
- * Revision 1.47 1999/08/27 08:55:35 malthoff
- * 1000BT: Optimizing MDIO transfer by oppressing MDIO preamble.
- *
- * Revision 1.46 1999/08/13 11:01:12 malthoff
- * Fix for 1000BT: pFlowCtrlMode was not set correctly.
- *
- * Revision 1.45 1999/08/12 19:18:28 malthoff
- * 1000BT Fixes: Do not owerwrite XM_MMU_CMD.
- * Do not execute BCOM A1 workaround for B1 chips.
- * Fix pause frame setting.
- * Always set PHY_B_AC_TX_TST in PHY_BCOM_AUX_CTRL.
- *
- * Revision 1.44 1999/08/03 15:23:48 cgoos
- * Fixed setting of PHY interrupt mask in half duplex mode.
- *
- * Revision 1.43 1999/08/03 15:22:17 cgoos
- * Added some debug output.
- * Disabled XMac GP0 interrupt for external PHYs.
- *
- * Revision 1.42 1999/08/02 08:39:23 malthoff
- * BCOM PHY: TX LED: To get the mono flop behaviour it is required
- * to set the LED Traffic Mode bit in PHY_BCOM_P_EXT_CTRL.
- *
- * Revision 1.41 1999/07/30 06:54:31 malthoff
- * Add temp. workarounds for the BCOM Phy revision A1.
- *
- * Revision 1.40 1999/06/01 07:43:26 cgoos
- * Changed Link Mode Status in SkXmAutoNegDone... from FULL/HALF to
- * AUTOFULL/AUTOHALF.
- *
- * Revision 1.39 1999/05/19 07:29:51 cgoos
- * Changes for 1000Base-T.
- *
- * Revision 1.38 1999/04/08 14:35:10 malthoff
- * Add code for enabling signal detect. Enabling signal detect is disabled.
- *
- * Revision 1.37 1999/03/12 13:42:54 malthoff
- * Add: Jumbo Frame Support.
- * Add: Receive modes SK_LENERR_OK_ON/OFF and
- * SK_BIG_PK_OK_ON/OFF in SkXmSetRxCmd().
- *
- * Revision 1.36 1999/03/08 10:10:55 gklug
- * fix: AutoSensing did switch to next mode even if LiPa indicated offline
- *
- * Revision 1.35 1999/02/22 15:16:41 malthoff
- * Remove some compiler warnings.
- *
- * Revision 1.34 1999/01/22 09:19:59 gklug
- * fix: Init DupMode and InitPauseMd are now called in RxTxEnable
- *
- * Revision 1.33 1998/12/11 15:19:11 gklug
- * chg: lipa autoneg stati
- * chg: debug messages
- * chg: do NOT use spurious XmIrq
- *
- * Revision 1.32 1998/12/10 11:08:44 malthoff
- * bug fix: pAC has been used for IOs in SkXmHardRst().
- * SkXmInitPhy() is also called for the Diag in SkXmInitMac().
- *
- * Revision 1.31 1998/12/10 10:39:11 gklug
- * fix: do 4 RESETS of the XMAC at the beginning
- * fix: dummy read interrupt source register BEFORE initializing the Phy
- * add: debug messages
- * fix: Linkpartners autoneg capability cannot be shown by TX_PAGE interrupt
- *
- * Revision 1.30 1998/12/07 12:18:32 gklug
- * add: refinement of autosense mode: take into account the autoneg cap of LiPa
- *
- * Revision 1.29 1998/12/07 07:12:29 gklug
- * fix: if page is received the link is down.
- *
- * Revision 1.28 1998/12/01 10:12:47 gklug
- * chg: if spurious IRQ from XMAC encountered, save it
- *
- * Revision 1.27 1998/11/26 07:33:38 gklug
- * add: InitPhy call is now in XmInit function
- *
- * Revision 1.26 1998/11/18 13:38:24 malthoff
- * 'Imsk' is also unused in SkXmAutoNegDone.
- *
- * Revision 1.25 1998/11/18 13:28:01 malthoff
- * Remove unused variable 'Reg' in SkXmAutoNegDone().
- *
- * Revision 1.24 1998/11/18 13:18:45 gklug
- * add: workaround for xmac errata #1
- * add: detect Link Down also when Link partner requested config
- * chg: XMIrq is only used when link is up
- *
- * Revision 1.23 1998/11/04 07:07:04 cgoos
- * Added function SkXmRxTxEnable.
- *
- * Revision 1.22 1998/10/30 07:35:54 gklug
- * fix: serve LinkDown interrupt when link is already down
- *
- * Revision 1.21 1998/10/29 15:32:03 gklug
- * fix: Link Down signaling
- *
- * Revision 1.20 1998/10/29 11:17:27 gklug
- * fix: AutoNegDone bug
- *
- * Revision 1.19 1998/10/29 10:14:43 malthoff
- * Add endainesss comment for reading/writing MAC addresses.
- *
- * Revision 1.18 1998/10/28 07:48:55 cgoos
- * Fix: ASS somtimes signaled although link is up.
- *
- * Revision 1.17 1998/10/26 07:55:39 malthoff
- * Fix in SkXmInitPauseMd(): Pause Mode
- * was disabled and not enabled.
- * Fix in SkXmAutoNegDone(): Checking Mode bits
- * always failed, becaues of some missing braces.
- *
- * Revision 1.16 1998/10/22 09:46:52 gklug
- * fix SysKonnectFileId typo
- *
- * Revision 1.15 1998/10/21 05:51:37 gklug
- * add: para DoLoop to InitPhy function for loopback set-up
- *
- * Revision 1.14 1998/10/16 10:59:23 malthoff
- * Remove Lint warning for dummy reads.
- *
- * Revision 1.13 1998/10/15 14:01:20 malthoff
- * Fix: SkXmAutoNegDone() is (int) but does not return a value.
- *
- * Revision 1.12 1998/10/14 14:45:04 malthoff
- * Remove SKERR_SIRQ_E0xx and SKERR_SIRQ_E0xxMSG by
- * SKERR_HWI_Exx and SKERR_HWI_E0xxMSG to be independent
- * from the Sirq module.
- *
- * Revision 1.11 1998/10/14 13:59:01 gklug
- * add: InitPhy function
- *
- * Revision 1.10 1998/10/14 11:20:57 malthoff
- * Make SkXmAutoNegDone() public, because it's
- * used in diagnostics, too.
- * The Link Up event to the RLMT is issued in SkXmIrq().
- * SkXmIrq() is not available in diagnostics.
- * Use PHY_READ when reading PHY registers.
- *
- * Revision 1.9 1998/10/14 05:50:10 cgoos
- * Added definition for Para.
- *
- * Revision 1.8 1998/10/14 05:41:28 gklug
- * add: Xmac IRQ
- * add: auto-negotiation done function
- *
- * Revision 1.7 1998/10/09 06:55:20 malthoff
- * The configuration of the XMACs Tx Request Threshold
- * depends from the drivers port usage now. The port
- * usage is configured in GIPortUsage.
- *
- * Revision 1.6 1998/10/05 07:48:00 malthoff
- * minor changes
- *
- * Revision 1.5 1998/10/01 07:03:54 gklug
- * add: dummy function for XMAC ISR
- *
- * Revision 1.4 1998/09/30 12:37:44 malthoff
- * Add SkXmSetRxCmd() and related code.
- *
- * Revision 1.3 1998/09/28 13:26:40 malthoff
- * Add SkXmInitMac(), SkXmInitDupMd(), and SkXmInitPauseMd()
- *
- * Revision 1.2 1998/09/16 14:34:21 malthoff
- * Add SkXmClrExactAddr(), SkXmClrSrcCheck(),
- * SkXmClrHashAddr(), SkXmFlushTxFifo(),
- * SkXmFlushRxFifo(), and SkXmHardRst().
- * Finish Coding of SkXmSoftRst().
- * The sources may be compiled now.
- *
- * Revision 1.1 1998/09/04 10:05:56 malthoff
- * Created.
- *
- *
- ******************************************************************************/
-
-#include <config.h>
-
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-
-/* typedefs *******************************************************************/
-
-/* BCOM PHY magic pattern list */
-typedef struct s_PhyHack {
- int PhyReg; /* Phy register */
- SK_U16 PhyVal; /* Value to write */
-} BCOM_HACK;
-
-/* local variables ************************************************************/
-static const char SysKonnectFileId[] =
- "@(#)$Id: skxmac2.c,v 1.91 2003/02/05 15:09:34 rschmidt Exp $ (C) SK ";
-
-BCOM_HACK BcomRegA1Hack[] = {
- { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 },
- { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 },
- { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },
- { 0, 0 }
-};
-BCOM_HACK BcomRegC0Hack[] = {
- { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 },
- { 0x15, 0x0A04 }, { 0x18, 0x0420 },
- { 0, 0 }
-};
-
-/* function prototypes ********************************************************/
-static void SkXmInitPhyXmac(SK_AC*, SK_IOC, int, SK_BOOL);
-static void SkXmInitPhyBcom(SK_AC*, SK_IOC, int, SK_BOOL);
-static void SkGmInitPhyMarv(SK_AC*, SK_IOC, int, SK_BOOL);
-static int SkXmAutoNegDoneXmac(SK_AC*, SK_IOC, int);
-static int SkXmAutoNegDoneBcom(SK_AC*, SK_IOC, int);
-static int SkGmAutoNegDoneMarv(SK_AC*, SK_IOC, int);
-#ifdef OTHER_PHY
-static void SkXmInitPhyLone(SK_AC*, SK_IOC, int, SK_BOOL);
-static void SkXmInitPhyNat (SK_AC*, SK_IOC, int, SK_BOOL);
-static int SkXmAutoNegDoneLone(SK_AC*, SK_IOC, int);
-static int SkXmAutoNegDoneNat (SK_AC*, SK_IOC, int);
-#endif /* OTHER_PHY */
-
-
-/******************************************************************************
- *
- * SkXmPhyRead() - Read from XMAC PHY register
- *
- * Description: reads a 16-bit word from XMAC PHY or ext. PHY
- *
- * Returns:
- * nothing
- */
-void SkXmPhyRead(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Port, /* Port Index (MAC_1 + n) */
-int PhyReg, /* Register Address (Offset) */
-SK_U16 *pVal) /* Pointer to Value */
-{
- SK_U16 Mmu;
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* write the PHY register's address */
- XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
-
- /* get the PHY register's value */
- XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
-
- if (pPrt->PhyType != SK_PHY_XMAC) {
- do {
- XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
- /* wait until 'Ready' is set */
- } while ((Mmu & XM_MMU_PHY_RDY) == 0);
-
- /* get the PHY register's value */
- XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
- }
-} /* SkXmPhyRead */
-
-
-/******************************************************************************
- *
- * SkXmPhyWrite() - Write to XMAC PHY register
- *
- * Description: writes a 16-bit word to XMAC PHY or ext. PHY
- *
- * Returns:
- * nothing
- */
-void SkXmPhyWrite(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Port, /* Port Index (MAC_1 + n) */
-int PhyReg, /* Register Address (Offset) */
-SK_U16 Val) /* Value */
-{
- SK_U16 Mmu;
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PhyType != SK_PHY_XMAC) {
- do {
- XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
- /* wait until 'Busy' is cleared */
- } while ((Mmu & XM_MMU_PHY_BUSY) != 0);
- }
-
- /* write the PHY register's address */
- XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
-
- /* write the PHY register's value */
- XM_OUT16(IoC, Port, XM_PHY_DATA, Val);
-
- if (pPrt->PhyType != SK_PHY_XMAC) {
- do {
- XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
- /* wait until 'Busy' is cleared */
- } while ((Mmu & XM_MMU_PHY_BUSY) != 0);
- }
-} /* SkXmPhyWrite */
-
-
-/******************************************************************************
- *
- * SkGmPhyRead() - Read from GPHY register
- *
- * Description: reads a 16-bit word from GPHY through MDIO
- *
- * Returns:
- * nothing
- */
-void SkGmPhyRead(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Port, /* Port Index (MAC_1 + n) */
-int PhyReg, /* Register Address (Offset) */
-SK_U16 *pVal) /* Pointer to Value */
-{
- SK_U16 Ctrl;
- SK_GEPORT *pPrt;
-#ifdef VCPU
- u_long SimCyle;
- u_long SimLowTime;
-
- VCPUgetTime(&SimCyle, &SimLowTime);
- VCPUprintf(0, "SkGmPhyRead(%u), SimCyle=%u, SimLowTime=%u\n",
- PhyReg, SimCyle, SimLowTime);
-#endif /* VCPU */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* set PHY-Register offset and 'Read' OpCode (= 1) */
- *pVal = (SK_U16)(GM_SMI_CT_PHY_AD(pPrt->PhyAddr) |
- GM_SMI_CT_REG_AD(PhyReg) | GM_SMI_CT_OP_RD);
-
- GM_OUT16(IoC, Port, GM_SMI_CTRL, *pVal);
-
- GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
-
- /* additional check for MDC/MDIO activity */
- if ((Ctrl & GM_SMI_CT_BUSY) == 0) {
- *pVal = 0;
- return;
- }
-
- *pVal |= GM_SMI_CT_BUSY;
-
- do {
-#ifdef VCPU
- VCPUwaitTime(1000);
-#endif /* VCPU */
-
- GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
-
- /* wait until 'ReadValid' is set */
- } while (Ctrl == *pVal);
-
- /* get the PHY register's value */
- GM_IN16(IoC, Port, GM_SMI_DATA, pVal);
-
-#ifdef VCPU
- VCPUgetTime(&SimCyle, &SimLowTime);
- VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n",
- SimCyle, SimLowTime);
-#endif /* VCPU */
-} /* SkGmPhyRead */
-
-
-/******************************************************************************
- *
- * SkGmPhyWrite() - Write to GPHY register
- *
- * Description: writes a 16-bit word to GPHY through MDIO
- *
- * Returns:
- * nothing
- */
-void SkGmPhyWrite(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Port, /* Port Index (MAC_1 + n) */
-int PhyReg, /* Register Address (Offset) */
-SK_U16 Val) /* Value */
-{
- SK_U16 Ctrl;
- SK_GEPORT *pPrt;
-#ifdef VCPU
- SK_U32 DWord;
- u_long SimCyle;
- u_long SimLowTime;
-
- VCPUgetTime(&SimCyle, &SimLowTime);
- VCPUprintf(0, "SkGmPhyWrite(Reg=%u, Val=0x%04x), SimCyle=%u, SimLowTime=%u\n",
- PhyReg, Val, SimCyle, SimLowTime);
-#endif /* VCPU */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* write the PHY register's value */
- GM_OUT16(IoC, Port, GM_SMI_DATA, Val);
-
- /* set PHY-Register offset and 'Write' OpCode (= 0) */
- Val = GM_SMI_CT_PHY_AD(pPrt->PhyAddr) | GM_SMI_CT_REG_AD(PhyReg);
-
- GM_OUT16(IoC, Port, GM_SMI_CTRL, Val);
-
- GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
-
- /* additional check for MDC/MDIO activity */
- if ((Ctrl & GM_SMI_CT_BUSY) == 0) {
- return;
- }
-
- Val |= GM_SMI_CT_BUSY;
-
- do {
-#ifdef VCPU
- /* read Timer value */
- SK_IN32(IoC, B2_TI_VAL, &DWord);
-
- VCPUwaitTime(1000);
-#endif /* VCPU */
-
- GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
-
- /* wait until 'Busy' is cleared */
- } while (Ctrl == Val);
-
-#ifdef VCPU
- VCPUgetTime(&SimCyle, &SimLowTime);
- VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n",
- SimCyle, SimLowTime);
-#endif /* VCPU */
-} /* SkGmPhyWrite */
-
-
-/******************************************************************************
- *
- * SkGePhyRead() - Read from PHY register
- *
- * Description: calls a read PHY routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkGePhyRead(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Port, /* Port Index (MAC_1 + n) */
-int PhyReg, /* Register Address (Offset) */
-SK_U16 *pVal) /* Pointer to Value */
-{
- void (*r_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 *pVal);
-
- if (pAC->GIni.GIGenesis) {
- r_func = SkXmPhyRead;
- }
- else {
- r_func = SkGmPhyRead;
- }
-
- r_func(pAC, IoC, Port, PhyReg, pVal);
-} /* SkGePhyRead */
-
-
-/******************************************************************************
- *
- * SkGePhyWrite() - Write to PHY register
- *
- * Description: calls a write PHY routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkGePhyWrite(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* I/O Context */
-int Port, /* Port Index (MAC_1 + n) */
-int PhyReg, /* Register Address (Offset) */
-SK_U16 Val) /* Value */
-{
- void (*w_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 Val);
-
- if (pAC->GIni.GIGenesis) {
- w_func = SkXmPhyWrite;
- }
- else {
- w_func = SkGmPhyWrite;
- }
-
- w_func(pAC, IoC, Port, PhyReg, Val);
-} /* SkGePhyWrite */
-
-
-/******************************************************************************
- *
- * SkMacPromiscMode() - Enable / Disable Promiscuous Mode
- *
- * Description:
- * enables / disables promiscuous mode by setting Mode Register (XMAC) or
- * Receive Control Register (GMAC) dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacPromiscMode(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL Enable) /* Enable / Disable */
-{
- SK_U16 RcReg;
- SK_U32 MdReg;
- SK_U32 *pMdReg = &MdReg;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN32(IoC, Port, XM_MODE, pMdReg);
- /* enable or disable promiscuous mode */
- if (Enable) {
- MdReg |= XM_MD_ENA_PROM;
- }
- else {
- MdReg &= ~XM_MD_ENA_PROM;
- }
- /* setup Mode Register */
- XM_OUT32(IoC, Port, XM_MODE, MdReg);
- }
- else {
-
- GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
-
- /* enable or disable unicast and multicast filtering */
- if (Enable) {
- RcReg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
- }
- else {
- RcReg |= (GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
- }
- /* setup Receive Control Register */
- GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg);
- }
-} /* SkMacPromiscMode*/
-
-
-/******************************************************************************
- *
- * SkMacHashing() - Enable / Disable Hashing
- *
- * Description:
- * enables / disables hashing by setting Mode Register (XMAC) or
- * Receive Control Register (GMAC) dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacHashing(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL Enable) /* Enable / Disable */
-{
- SK_U16 RcReg;
- SK_U32 MdReg;
- SK_U32 *pMdReg = &MdReg;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN32(IoC, Port, XM_MODE, pMdReg);
- /* enable or disable hashing */
- if (Enable) {
- MdReg |= XM_MD_ENA_HASH;
- }
- else {
- MdReg &= ~XM_MD_ENA_HASH;
- }
- /* setup Mode Register */
- XM_OUT32(IoC, Port, XM_MODE, MdReg);
- }
- else {
-
- GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
-
- /* enable or disable multicast filtering */
- if (Enable) {
- RcReg |= GM_RXCR_MCF_ENA;
- }
- else {
- RcReg &= ~GM_RXCR_MCF_ENA;
- }
- /* setup Receive Control Register */
- GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg);
- }
-} /* SkMacHashing*/
-
-
-#ifdef SK_DIAG
-/******************************************************************************
- *
- * SkXmSetRxCmd() - Modify the value of the XMAC's Rx Command Register
- *
- * Description:
- * The features
- * - FCS stripping, SK_STRIP_FCS_ON/OFF
- * - pad byte stripping, SK_STRIP_PAD_ON/OFF
- * - don't set XMR_FS_ERR in status SK_LENERR_OK_ON/OFF
- * for inrange length error frames
- * - don't set XMR_FS_ERR in status SK_BIG_PK_OK_ON/OFF
- * for frames > 1514 bytes
- * - enable Rx of own packets SK_SELF_RX_ON/OFF
- *
- * for incoming packets may be enabled/disabled by this function.
- * Additional modes may be added later.
- * Multiple modes can be enabled/disabled at the same time.
- * The new configuration is written to the Rx Command register immediately.
- *
- * Returns:
- * nothing
- */
-static void SkXmSetRxCmd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Mode) /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF,
- SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
-{
- SK_U16 OldRxCmd;
- SK_U16 RxCmd;
-
- XM_IN16(IoC, Port, XM_RX_CMD, &OldRxCmd);
-
- RxCmd = OldRxCmd;
-
- switch (Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) {
- case SK_STRIP_FCS_ON:
- RxCmd |= XM_RX_STRIP_FCS;
- break;
- case SK_STRIP_FCS_OFF:
- RxCmd &= ~XM_RX_STRIP_FCS;
- break;
- }
-
- switch (Mode & (SK_STRIP_PAD_ON | SK_STRIP_PAD_OFF)) {
- case SK_STRIP_PAD_ON:
- RxCmd |= XM_RX_STRIP_PAD;
- break;
- case SK_STRIP_PAD_OFF:
- RxCmd &= ~XM_RX_STRIP_PAD;
- break;
- }
-
- switch (Mode & (SK_LENERR_OK_ON | SK_LENERR_OK_OFF)) {
- case SK_LENERR_OK_ON:
- RxCmd |= XM_RX_LENERR_OK;
- break;
- case SK_LENERR_OK_OFF:
- RxCmd &= ~XM_RX_LENERR_OK;
- break;
- }
-
- switch (Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) {
- case SK_BIG_PK_OK_ON:
- RxCmd |= XM_RX_BIG_PK_OK;
- break;
- case SK_BIG_PK_OK_OFF:
- RxCmd &= ~XM_RX_BIG_PK_OK;
- break;
- }
-
- switch (Mode & (SK_SELF_RX_ON | SK_SELF_RX_OFF)) {
- case SK_SELF_RX_ON:
- RxCmd |= XM_RX_SELF_RX;
- break;
- case SK_SELF_RX_OFF:
- RxCmd &= ~XM_RX_SELF_RX;
- break;
- }
-
- /* Write the new mode to the Rx command register if required */
- if (OldRxCmd != RxCmd) {
- XM_OUT16(IoC, Port, XM_RX_CMD, RxCmd);
- }
-} /* SkXmSetRxCmd */
-
-
-/******************************************************************************
- *
- * SkGmSetRxCmd() - Modify the value of the GMAC's Rx Control Register
- *
- * Description:
- * The features
- * - FCS (CRC) stripping, SK_STRIP_FCS_ON/OFF
- * - don't set GMR_FS_LONG_ERR SK_BIG_PK_OK_ON/OFF
- * for frames > 1514 bytes
- * - enable Rx of own packets SK_SELF_RX_ON/OFF
- *
- * for incoming packets may be enabled/disabled by this function.
- * Additional modes may be added later.
- * Multiple modes can be enabled/disabled at the same time.
- * The new configuration is written to the Rx Command register immediately.
- *
- * Returns:
- * nothing
- */
-static void SkGmSetRxCmd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Mode) /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF,
- SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
-{
- SK_U16 OldRxCmd;
- SK_U16 RxCmd;
-
- if ((Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) != 0) {
-
- GM_IN16(IoC, Port, GM_RX_CTRL, &OldRxCmd);
-
- RxCmd = OldRxCmd;
-
- if ((Mode & SK_STRIP_FCS_ON) != 0) {
- RxCmd |= GM_RXCR_CRC_DIS;
- }
- else {
- RxCmd &= ~GM_RXCR_CRC_DIS;
- }
- /* Write the new mode to the Rx control register if required */
- if (OldRxCmd != RxCmd) {
- GM_OUT16(IoC, Port, GM_RX_CTRL, RxCmd);
- }
- }
-
- if ((Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) != 0) {
-
- GM_IN16(IoC, Port, GM_SERIAL_MODE, &OldRxCmd);
-
- RxCmd = OldRxCmd;
-
- if ((Mode & SK_BIG_PK_OK_ON) != 0) {
- RxCmd |= GM_SMOD_JUMBO_ENA;
- }
- else {
- RxCmd &= ~GM_SMOD_JUMBO_ENA;
- }
- /* Write the new mode to the Rx control register if required */
- if (OldRxCmd != RxCmd) {
- GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd);
- }
- }
-} /* SkGmSetRxCmd */
-
-
-/******************************************************************************
- *
- * SkMacSetRxCmd() - Modify the value of the MAC's Rx Control Register
- *
- * Description: modifies the MAC's Rx Control reg. dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacSetRxCmd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Mode) /* Rx Mode */
-{
- if (pAC->GIni.GIGenesis) {
-
- SkXmSetRxCmd(pAC, IoC, Port, Mode);
- }
- else {
-
- SkGmSetRxCmd(pAC, IoC, Port, Mode);
- }
-} /* SkMacSetRxCmd */
-
-
-/******************************************************************************
- *
- * SkMacCrcGener() - Enable / Disable CRC Generation
- *
- * Description: enables / disables CRC generation dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacCrcGener(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL Enable) /* Enable / Disable */
-{
- SK_U16 Word;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN16(IoC, Port, XM_TX_CMD, &Word);
-
- if (Enable) {
- Word &= ~XM_TX_NO_CRC;
- }
- else {
- Word |= XM_TX_NO_CRC;
- }
- /* setup Tx Command Register */
- XM_OUT16(pAC, Port, XM_TX_CMD, Word);
- }
- else {
-
- GM_IN16(IoC, Port, GM_TX_CTRL, &Word);
-
- if (Enable) {
- Word &= ~GM_TXCR_CRC_DIS;
- }
- else {
- Word |= GM_TXCR_CRC_DIS;
- }
- /* setup Tx Control Register */
- GM_OUT16(IoC, Port, GM_TX_CTRL, Word);
- }
-} /* SkMacCrcGener*/
-
-#endif /* SK_DIAG */
-
-
-/******************************************************************************
- *
- * SkXmClrExactAddr() - Clear Exact Match Address Registers
- *
- * Description:
- * All Exact Match Address registers of the XMAC 'Port' will be
- * cleared starting with 'StartNum' up to (and including) the
- * Exact Match address number of 'StopNum'.
- *
- * Returns:
- * nothing
- */
-void SkXmClrExactAddr(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int StartNum, /* Begin with this Address Register Index (0..15) */
-int StopNum) /* Stop after finished with this Register Idx (0..15) */
-{
- int i;
- SK_U16 ZeroAddr[3] = {0x0000, 0x0000, 0x0000};
-
- if ((unsigned)StartNum > 15 || (unsigned)StopNum > 15 ||
- StartNum > StopNum) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E001, SKERR_HWI_E001MSG);
- return;
- }
-
- for (i = StartNum; i <= StopNum; i++) {
- XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]);
- }
-} /* SkXmClrExactAddr */
-
-
-/******************************************************************************
- *
- * SkMacFlushTxFifo() - Flush the MAC's transmit FIFO
- *
- * Description:
- * Flush the transmit FIFO of the MAC specified by the index 'Port'
- *
- * Returns:
- * nothing
- */
-void SkMacFlushTxFifo(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U32 MdReg;
- SK_U32 *pMdReg = &MdReg;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN32(IoC, Port, XM_MODE, pMdReg);
-
- XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FTF);
- }
- else {
- /* no way to flush the FIFO we have to issue a reset */
- /* TBD */
- }
-} /* SkMacFlushTxFifo */
-
-
-/******************************************************************************
- *
- * SkMacFlushRxFifo() - Flush the MAC's receive FIFO
- *
- * Description:
- * Flush the receive FIFO of the MAC specified by the index 'Port'
- *
- * Returns:
- * nothing
- */
-void SkMacFlushRxFifo(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U32 MdReg;
- SK_U32 *pMdReg = &MdReg;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN32(IoC, Port, XM_MODE, pMdReg);
-
- XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FRF);
- }
- else {
- /* no way to flush the FIFO we have to issue a reset */
- /* TBD */
- }
-} /* SkMacFlushRxFifo */
-
-
-/******************************************************************************
- *
- * SkXmSoftRst() - Do a XMAC software reset
- *
- * Description:
- * The PHY registers should not be destroyed during this
- * kind of software reset. Therefore the XMAC Software Reset
- * (XM_GP_RES_MAC bit in XM_GP_PORT) must not be used!
- *
- * The software reset is done by
- * - disabling the Rx and Tx state machine,
- * - resetting the statistics module,
- * - clear all other significant XMAC Mode,
- * Command, and Control Registers
- * - clearing the Hash Register and the
- * Exact Match Address registers, and
- * - flushing the XMAC's Rx and Tx FIFOs.
- *
- * Note:
- * Another requirement when stopping the XMAC is to
- * avoid sending corrupted frames on the network.
- * Disabling the Tx state machine will NOT interrupt
- * the currently transmitted frame. But we must take care
- * that the Tx FIFO is cleared AFTER the current frame
- * is complete sent to the network.
- *
- * It takes about 12ns to send a frame with 1538 bytes.
- * One PCI clock goes at least 15ns (66MHz). Therefore
- * after reading XM_GP_PORT back, we are sure that the
- * transmitter is disabled AND idle. And this means
- * we may flush the transmit FIFO now.
- *
- * Returns:
- * nothing
- */
-static void SkXmSoftRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U16 ZeroAddr[4] = {0x0000, 0x0000, 0x0000, 0x0000};
-
- /* reset the statistics module */
- XM_OUT32(IoC, Port, XM_GP_PORT, XM_GP_RES_STAT);
-
- /* disable all XMAC IRQs */
- XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
-
- XM_OUT32(IoC, Port, XM_MODE, 0); /* clear Mode Reg */
-
- XM_OUT16(IoC, Port, XM_TX_CMD, 0); /* reset TX CMD Reg */
- XM_OUT16(IoC, Port, XM_RX_CMD, 0); /* reset RX CMD Reg */
-
- /* disable all PHY IRQs */
- switch (pAC->GIni.GP[Port].PhyType) {
- case SK_PHY_BCOM:
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);
- break;
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);
- break;
- case SK_PHY_NAT:
- /* todo: National
- SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */
- break;
-#endif /* OTHER_PHY */
- }
-
- /* clear the Hash Register */
- XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr);
-
- /* clear the Exact Match Address registers */
- SkXmClrExactAddr(pAC, IoC, Port, 0, 15);
-
- /* clear the Source Check Address registers */
- XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr);
-
-} /* SkXmSoftRst */
-
-
-/******************************************************************************
- *
- * SkXmHardRst() - Do a XMAC hardware reset
- *
- * Description:
- * The XMAC of the specified 'Port' and all connected devices
- * (PHY and SERDES) will receive a reset signal on its *Reset pins.
- * External PHYs must be reset be clearing a bit in the GPIO register
- * (Timing requirements: Broadcom: 400ns, Level One: none, National: 80ns).
- *
- * ATTENTION:
- * It is absolutely necessary to reset the SW_RST Bit first
- * before calling this function.
- *
- * Returns:
- * nothing
- */
-static void SkXmHardRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U32 Reg;
- int i;
- int TOut;
- SK_U16 Word;
-
- for (i = 0; i < 4; i++) {
- /* TX_MFF_CTRL1 has 32 bits, but only the lowest 16 bits are used */
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
-
- TOut = 0;
- do {
- if (TOut++ > 10000) {
- /*
- * Adapter seems to be in RESET state.
- * Registers cannot be written.
- */
- return;
- }
-
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_SET_MAC_RST);
-
- SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &Word);
-
- } while ((Word & MFF_SET_MAC_RST) == 0);
- }
-
- /* For external PHYs there must be special handling */
- if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
- /* reset external PHY */
- SK_IN32(IoC, B2_GP_IO, &Reg);
- if (Port == 0) {
- Reg |= GP_DIR_0; /* set to output */
- Reg &= ~GP_IO_0;
- }
- else {
- Reg |= GP_DIR_2; /* set to output */
- Reg &= ~GP_IO_2;
- }
- SK_OUT32(IoC, B2_GP_IO, Reg);
-
- /* short delay */
- SK_IN32(IoC, B2_GP_IO, &Reg);
- }
-
-} /* SkXmHardRst */
-
-
-/******************************************************************************
- *
- * SkGmSoftRst() - Do a GMAC software reset
- *
- * Description:
- * The GPHY registers should not be destroyed during this
- * kind of software reset.
- *
- * Returns:
- * nothing
- */
-static void SkGmSoftRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U16 EmptyHash[4] = {0x0000, 0x0000, 0x0000, 0x0000};
- SK_U16 RxCtrl;
-
- /* reset the statistics module */
-
- /* disable all GMAC IRQs */
- SK_OUT8(IoC, GMAC_IRQ_MSK, 0);
-
- /* disable all PHY IRQs */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
-
- /* clear the Hash Register */
- GM_OUTHASH(IoC, Port, GM_MC_ADDR_H1, EmptyHash);
-
- /* Enable Unicast and Multicast filtering */
- GM_IN16(IoC, Port, GM_RX_CTRL, &RxCtrl);
-
- GM_OUT16(IoC, Port, GM_RX_CTRL,
- RxCtrl | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
-
-} /* SkGmSoftRst */
-
-
-/******************************************************************************
- *
- * SkGmHardRst() - Do a GMAC hardware reset
- *
- * Description:
- *
- * ATTENTION:
- * It is absolutely necessary to reset the SW_RST Bit first
- * before calling this function.
- *
- * Returns:
- * nothing
- */
-static void SkGmHardRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- /* set GPHY Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
-
- /* set GMAC Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
-
-} /* SkGmHardRst */
-
-
-/******************************************************************************
- *
- * SkMacSoftRst() - Do a MAC software reset
- *
- * Description: calls a MAC software reset routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacSoftRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* disable receiver and transmitter */
- SkMacRxTxDisable(pAC, IoC, Port);
-
- if (pAC->GIni.GIGenesis) {
-
- SkXmSoftRst(pAC, IoC, Port);
- }
- else {
-
- SkGmSoftRst(pAC, IoC, Port);
- }
-
- /* flush the MAC's Rx and Tx FIFOs */
- SkMacFlushTxFifo(pAC, IoC, Port);
-
- SkMacFlushRxFifo(pAC, IoC, Port);
-
- pPrt->PState = SK_PRT_STOP;
-
-} /* SkMacSoftRst */
-
-
-/******************************************************************************
- *
- * SkMacHardRst() - Do a MAC hardware reset
- *
- * Description: calls a MAC hardware reset routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacHardRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
-
- if (pAC->GIni.GIGenesis) {
-
- SkXmHardRst(pAC, IoC, Port);
- }
- else {
-
- SkGmHardRst(pAC, IoC, Port);
- }
-
- pAC->GIni.GP[Port].PState = SK_PRT_RESET;
-
-} /* SkMacHardRst */
-
-
-/******************************************************************************
- *
- * SkXmInitMac() - Initialize the XMAC II
- *
- * Description:
- * Initialize the XMAC of the specified port.
- * The XMAC must be reset or stopped before calling this function.
- *
- * Note:
- * The XMAC's Rx and Tx state machine is still disabled when returning.
- *
- * Returns:
- * nothing
- */
-void SkXmInitMac(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U32 Reg;
- int i;
- SK_U16 SWord;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PState == SK_PRT_STOP) {
- /* Port State: SK_PRT_STOP */
- /* Verify that the reset bit is cleared */
- SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
-
- if ((SWord & MFF_SET_MAC_RST) != 0) {
- /* PState does not match HW state */
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E006MSG);
- /* Correct it */
- pPrt->PState = SK_PRT_RESET;
- }
- }
-
- if (pPrt->PState == SK_PRT_RESET) {
- /*
- * clear HW reset
- * Note: The SW reset is self clearing, therefore there is
- * nothing to do here.
- */
- SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
-
- /* Ensure that XMAC reset release is done (errata from LReinbold?) */
- SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
-
- /* Clear PHY reset */
- if (pPrt->PhyType != SK_PHY_XMAC) {
-
- SK_IN32(IoC, B2_GP_IO, &Reg);
-
- if (Port == 0) {
- Reg |= (GP_DIR_0 | GP_IO_0); /* set to output */
- }
- else {
- Reg |= (GP_DIR_2 | GP_IO_2); /* set to output */
- }
- SK_OUT32(IoC, B2_GP_IO, Reg);
-
- /* Enable GMII interface */
- XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD);
-
- /* read Id from external PHY (all have the same address) */
- SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_ID1, &pPrt->PhyId1);
-
- /*
- * Optimize MDIO transfer by suppressing preamble.
- * Must be done AFTER first access to BCOM chip.
- */
- XM_IN16(IoC, Port, XM_MMU_CMD, &SWord);
-
- XM_OUT16(IoC, Port, XM_MMU_CMD, SWord | XM_MMU_NO_PRE);
-
- if (pPrt->PhyId1 == PHY_BCOM_ID1_C0) {
- /*
- * Workaround BCOM Errata for the C0 type.
- * Write magic patterns to reserved registers.
- */
- i = 0;
- while (BcomRegC0Hack[i].PhyReg != 0) {
- SkXmPhyWrite(pAC, IoC, Port, BcomRegC0Hack[i].PhyReg,
- BcomRegC0Hack[i].PhyVal);
- i++;
- }
- }
- else if (pPrt->PhyId1 == PHY_BCOM_ID1_A1) {
- /*
- * Workaround BCOM Errata for the A1 type.
- * Write magic patterns to reserved registers.
- */
- i = 0;
- while (BcomRegA1Hack[i].PhyReg != 0) {
- SkXmPhyWrite(pAC, IoC, Port, BcomRegA1Hack[i].PhyReg,
- BcomRegA1Hack[i].PhyVal);
- i++;
- }
- }
-
- /*
- * Workaround BCOM Errata (#10523) for all BCom PHYs.
- * Disable Power Management after reset.
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
-
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
- (SK_U16)(SWord | PHY_B_AC_DIS_PM));
-
- /* PHY LED initialization is done in SkGeXmitLED() */
- }
-
- /* Dummy read the Interrupt source register */
- XM_IN16(IoC, Port, XM_ISRC, &SWord);
-
- /*
- * The auto-negotiation process starts immediately after
- * clearing the reset. The auto-negotiation process should be
- * started by the SIRQ, therefore stop it here immediately.
- */
- SkMacInitPhy(pAC, IoC, Port, SK_FALSE);
-
-#if 0
- /* temp. code: enable signal detect */
- /* WARNING: do not override GMII setting above */
- XM_OUT16(pAC, Port, XM_HW_CFG, XM_HW_COM4SIG);
-#endif
- }
-
- /*
- * configure the XMACs Station Address
- * B2_MAC_2 = xx xx xx xx xx x1 is programmed to XMAC A
- * B2_MAC_3 = xx xx xx xx xx x2 is programmed to XMAC B
- */
- for (i = 0; i < 3; i++) {
- /*
- * The following 2 statements are together endianess
- * independent. Remember this when changing.
- */
- SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
-
- XM_OUT16(IoC, Port, (XM_SA + i * 2), SWord);
- }
-
- /* Tx Inter Packet Gap (XM_TX_IPG): use default */
- /* Tx High Water Mark (XM_TX_HI_WM): use default */
- /* Tx Low Water Mark (XM_TX_LO_WM): use default */
- /* Host Request Threshold (XM_HT_THR): use default */
- /* Rx Request Threshold (XM_RX_THR): use default */
- /* Rx Low Water Mark (XM_RX_LO_WM): use default */
-
- /* configure Rx High Water Mark (XM_RX_HI_WM) */
- XM_OUT16(IoC, Port, XM_RX_HI_WM, SK_XM_RX_HI_WM);
-
- /* Configure Tx Request Threshold */
- SWord = SK_XM_THR_SL; /* for single port */
-
- if (pAC->GIni.GIMacsFound > 1) {
- switch (pAC->GIni.GIPortUsage) {
- case SK_RED_LINK:
- SWord = SK_XM_THR_REDL; /* redundant link */
- break;
- case SK_MUL_LINK:
- SWord = SK_XM_THR_MULL; /* load balancing */
- break;
- case SK_JUMBO_LINK:
- SWord = SK_XM_THR_JUMBO; /* jumbo frames */
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E014, SKERR_HWI_E014MSG);
- break;
- }
- }
- XM_OUT16(IoC, Port, XM_TX_THR, SWord);
-
- /* setup register defaults for the Tx Command Register */
- XM_OUT16(IoC, Port, XM_TX_CMD, XM_TX_AUTO_PAD);
-
- /* setup register defaults for the Rx Command Register */
- SWord = XM_RX_STRIP_FCS | XM_RX_LENERR_OK;
-
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- SWord |= XM_RX_BIG_PK_OK;
- }
-
- if (pPrt->PLinkModeConf == SK_LMODE_HALF) {
- /*
- * If in manual half duplex mode the other side might be in
- * full duplex mode, so ignore if a carrier extension is not seen
- * on frames received
- */
- SWord |= XM_RX_DIS_CEXT;
- }
-
- XM_OUT16(IoC, Port, XM_RX_CMD, SWord);
-
- /*
- * setup register defaults for the Mode Register
- * - Don't strip error frames to avoid Store & Forward
- * on the Rx side.
- * - Enable 'Check Station Address' bit
- * - Enable 'Check Address Array' bit
- */
- XM_OUT32(IoC, Port, XM_MODE, XM_DEF_MODE);
-
- /*
- * Initialize the Receive Counter Event Mask (XM_RX_EV_MSK)
- * - Enable all bits excepting 'Octets Rx OK Low CntOv'
- * and 'Octets Rx OK Hi Cnt Ov'.
- */
- XM_OUT32(IoC, Port, XM_RX_EV_MSK, XMR_DEF_MSK);
-
- /*
- * Initialize the Transmit Counter Event Mask (XM_TX_EV_MSK)
- * - Enable all bits excepting 'Octets Tx OK Low CntOv'
- * and 'Octets Tx OK Hi Cnt Ov'.
- */
- XM_OUT32(IoC, Port, XM_TX_EV_MSK, XMT_DEF_MSK);
-
- /*
- * Do NOT init XMAC interrupt mask here.
- * All interrupts remain disable until link comes up!
- */
-
- /*
- * Any additional configuration changes may be done now.
- * The last action is to enable the Rx and Tx state machine.
- * This should be done after the auto-negotiation process
- * has been completed successfully.
- */
-} /* SkXmInitMac */
-
-/******************************************************************************
- *
- * SkGmInitMac() - Initialize the GMAC
- *
- * Description:
- * Initialize the GMAC of the specified port.
- * The GMAC must be reset or stopped before calling this function.
- *
- * Note:
- * The GMAC's Rx and Tx state machine is still disabled when returning.
- *
- * Returns:
- * nothing
- */
-void SkGmInitMac(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- int i;
- SK_U16 SWord;
- SK_U32 DWord;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PState == SK_PRT_STOP) {
- /* Port State: SK_PRT_STOP */
- /* Verify that the reset bit is cleared */
- SK_IN32(IoC, MR_ADDR(Port, GMAC_CTRL), &DWord);
-
- if ((DWord & GMC_RST_SET) != 0) {
- /* PState does not match HW state */
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E006MSG);
- /* Correct it */
- pPrt->PState = SK_PRT_RESET;
- }
- }
-
- if (pPrt->PState == SK_PRT_RESET) {
- /* set GPHY Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
-
- /* set GMAC Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
-
- /* clear GMAC Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR);
-
- /* set GMAC Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
-
- /* set HWCFG_MODE */
- DWord = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP |
- GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE |
- (pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP :
- GPC_HWCFG_GMII_FIB);
-
- /* set GPHY Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
-
- /* release GPHY Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
-
- /* clear GMAC Control reset */
- SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
-
- /* Dummy read the Interrupt source register */
- SK_IN16(IoC, GMAC_IRQ_SRC, &SWord);
-
-#ifndef VCPU
- /* read Id from PHY */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_ID1, &pPrt->PhyId1);
-
- SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
-#endif /* VCPU */
- }
-
- (void)SkGmResetCounter(pAC, IoC, Port);
-
- SWord = 0;
-
- /* speed settings */
- switch (pPrt->PLinkSpeed) {
- case SK_LSPEED_AUTO:
- case SK_LSPEED_1000MBPS:
- SWord |= GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100;
- break;
- case SK_LSPEED_100MBPS:
- SWord |= GM_GPCR_SPEED_100;
- break;
- case SK_LSPEED_10MBPS:
- break;
- }
-
- /* duplex settings */
- if (pPrt->PLinkMode != SK_LMODE_HALF) {
- /* set full duplex */
- SWord |= GM_GPCR_DUP_FULL;
- }
-
- /* flow control settings */
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- /* disable auto-negotiation for flow-control */
- SWord |= GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS;
- break;
- case SK_FLOW_MODE_LOC_SEND:
- SWord |= GM_GPCR_FC_RX_DIS;
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- /* TBD */
- case SK_FLOW_MODE_SYM_OR_REM:
- /* enable auto-negotiation for flow-control and */
- /* enable Rx and Tx of pause frames */
- break;
- }
-
- /* Auto-negotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- /* disable auto-update for speed, duplex and flow-control */
- SWord |= GM_GPCR_AU_ALL_DIS;
- }
-
- /* setup General Purpose Control Register */
- GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
-
- /* setup Transmit Control Register */
- GM_OUT16(IoC, Port, GM_TX_CTRL, GM_TXCR_COL_THR);
-
- /* setup Receive Control Register */
- GM_OUT16(IoC, Port, GM_RX_CTRL, GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA |
- GM_RXCR_CRC_DIS);
-
- /* setup Transmit Flow Control Register */
- GM_OUT16(IoC, Port, GM_TX_FLOW_CTRL, 0xffff);
-
- /* setup Transmit Parameter Register */
-#ifdef VCPU
- GM_IN16(IoC, Port, GM_TX_PARAM, &SWord);
-#endif /* VCPU */
-
- SWord = JAM_LEN_VAL(3) | JAM_IPG_VAL(11) | IPG_JAM_DATA(26);
-
- GM_OUT16(IoC, Port, GM_TX_PARAM, SWord);
-
- /* configure the Serial Mode Register */
-#ifdef VCPU
- GM_IN16(IoC, Port, GM_SERIAL_MODE, &SWord);
-#endif /* VCPU */
-
- SWord = GM_SMOD_VLAN_ENA | IPG_VAL_FAST_ETH;
-
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- /* enable jumbo mode (Max. Frame Length = 9018) */
- SWord |= GM_SMOD_JUMBO_ENA;
- }
-
- GM_OUT16(IoC, Port, GM_SERIAL_MODE, SWord);
-
- /*
- * configure the GMACs Station Addresses
- * in PROM you can find our addresses at:
- * B2_MAC_1 = xx xx xx xx xx x0 virtual address
- * B2_MAC_2 = xx xx xx xx xx x1 is programmed to GMAC A
- * B2_MAC_3 = xx xx xx xx xx x2 is reserved for DualPort
- */
-
- for (i = 0; i < 3; i++) {
- /*
- * The following 2 statements are together endianess
- * independent. Remember this when changing.
- */
- /* physical address: will be used for pause frames */
- SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
-
-#ifdef WA_DEV_16
- /* WA for deviation #16 */
- if (pAC->GIni.GIChipRev == 0) {
- /* swap the address bytes */
- SWord = ((SWord & 0xff00) >> 8) | ((SWord & 0x00ff) << 8);
-
- /* write to register in reversed order */
- GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + (2 - i) * 4), SWord);
- }
- else {
- GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
- }
-#else
- GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
-#endif /* WA_DEV_16 */
-
- /* virtual address: will be used for data */
- SK_IN16(IoC, (B2_MAC_1 + Port * 8 + i * 2), &SWord);
-
- GM_OUT16(IoC, Port, (GM_SRC_ADDR_2L + i * 4), SWord);
-
- /* reset Multicast filtering Hash registers 1-3 */
- GM_OUT16(IoC, Port, GM_MC_ADDR_H1 + 4*i, 0);
- }
-
- /* reset Multicast filtering Hash register 4 */
- GM_OUT16(IoC, Port, GM_MC_ADDR_H4, 0);
-
- /* enable interrupt mask for counter overflows */
- GM_OUT16(IoC, Port, GM_TX_IRQ_MSK, 0);
- GM_OUT16(IoC, Port, GM_RX_IRQ_MSK, 0);
- GM_OUT16(IoC, Port, GM_TR_IRQ_MSK, 0);
-
- /* read General Purpose Status */
- GM_IN16(IoC, Port, GM_GP_STAT, &SWord);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("MAC Stat Reg=0x%04X\n", SWord));
-
-#ifdef SK_DIAG
- c_print("MAC Stat Reg=0x%04X\n", SWord);
-#endif /* SK_DIAG */
-
-} /* SkGmInitMac */
-
-
-/******************************************************************************
- *
- * SkXmInitDupMd() - Initialize the XMACs Duplex Mode
- *
- * Description:
- * This function initializes the XMACs Duplex Mode.
- * It should be called after successfully finishing
- * the Auto-negotiation Process
- *
- * Returns:
- * nothing
- */
-void SkXmInitDupMd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- switch (pAC->GIni.GP[Port].PLinkModeStatus) {
- case SK_LMODE_STAT_AUTOHALF:
- case SK_LMODE_STAT_HALF:
- /* Configuration Actions for Half Duplex Mode */
- /*
- * XM_BURST = default value. We are probable not quick
- * enough at the 'XMAC' bus to burst 8kB.
- * The XMAC stops bursting if no transmit frames
- * are available or the burst limit is exceeded.
- */
- /* XM_TX_RT_LIM = default value (15) */
- /* XM_TX_STIME = default value (0xff = 4096 bit times) */
- break;
- case SK_LMODE_STAT_AUTOFULL:
- case SK_LMODE_STAT_FULL:
- /* Configuration Actions for Full Duplex Mode */
- /*
- * The duplex mode is configured by the PHY,
- * therefore it seems to be that there is nothing
- * to do here.
- */
- break;
- case SK_LMODE_STAT_UNKNOWN:
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E007, SKERR_HWI_E007MSG);
- break;
- }
-} /* SkXmInitDupMd */
-
-
-/******************************************************************************
- *
- * SkXmInitPauseMd() - initialize the Pause Mode to be used for this port
- *
- * Description:
- * This function initializes the Pause Mode which should
- * be used for this port.
- * It should be called after successfully finishing
- * the Auto-negotiation Process
- *
- * Returns:
- * nothing
- */
-void SkXmInitPauseMd(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U32 DWord;
- SK_U32 *pDWord = &DWord;
- SK_U16 Word;
-
- pPrt = &pAC->GIni.GP[Port];
-
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
- if (pPrt->PFlowCtrlStatus == SK_FLOW_STAT_NONE ||
- pPrt->PFlowCtrlStatus == SK_FLOW_STAT_LOC_SEND) {
-
- /* Disable Pause Frame Reception */
- Word |= XM_MMU_IGN_PF;
- }
- else {
- /*
- * enabling pause frame reception is required for 1000BT
- * because the XMAC is not reset if the link is going down
- */
- /* Enable Pause Frame Reception */
- Word &= ~XM_MMU_IGN_PF;
- }
-
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word);
-
- XM_IN32(IoC, Port, XM_MODE, pDWord);
-
- if (pPrt->PFlowCtrlStatus == SK_FLOW_STAT_SYMMETRIC ||
- pPrt->PFlowCtrlStatus == SK_FLOW_STAT_LOC_SEND) {
-
- /*
- * Configure Pause Frame Generation
- * Use internal and external Pause Frame Generation.
- * Sending pause frames is edge triggered.
- * Send a Pause frame with the maximum pause time if
- * internal oder external FIFO full condition occurs.
- * Send a zero pause time frame to re-start transmission.
- */
-
- /* XM_PAUSE_DA = '010000C28001' (default) */
-
- /* XM_MAC_PTIME = 0xffff (maximum) */
- /* remember this value is defined in big endian (!) */
- XM_OUT16(IoC, Port, XM_MAC_PTIME, 0xffff);
-
- /* Set Pause Mode in Mode Register */
- DWord |= XM_PAUSE_MODE;
-
- /* Set Pause Mode in MAC Rx FIFO */
- SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_PAUSE);
- }
- else {
- /*
- * disable pause frame generation is required for 1000BT
- * because the XMAC is not reset if the link is going down
- */
- /* Disable Pause Mode in Mode Register */
- DWord &= ~XM_PAUSE_MODE;
-
- /* Disable Pause Mode in MAC Rx FIFO */
- SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_DIS_PAUSE);
- }
-
- XM_OUT32(IoC, Port, XM_MODE, DWord);
-} /* SkXmInitPauseMd*/
-
-
-/******************************************************************************
- *
- * SkXmInitPhyXmac() - Initialize the XMAC Phy registers
- *
- * Description: initializes all the XMACs Phy registers
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-static void SkXmInitPhyXmac(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
-{
- SK_GEPORT *pPrt;
- SK_U16 Ctrl;
-
- pPrt = &pAC->GIni.GP[Port];
- Ctrl = 0;
-
- /* Auto-negotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyXmac: no auto-negotiation Port %d\n", Port));
- /* Set DuplexMode in Config register */
- if (pPrt->PLinkMode == SK_LMODE_FULL) {
- Ctrl |= PHY_CT_DUP_MD;
- }
-
- /*
- * Do NOT enable Auto-negotiation here. This would hold
- * the link down because no IDLEs are transmitted
- */
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyXmac: with auto-negotiation Port %d\n", Port));
- /* Set Auto-negotiation advertisement */
-
- /* Set Full/half duplex capabilities */
- switch (pPrt->PLinkMode) {
- case SK_LMODE_AUTOHALF:
- Ctrl |= PHY_X_AN_HD;
- break;
- case SK_LMODE_AUTOFULL:
- Ctrl |= PHY_X_AN_FD;
- break;
- case SK_LMODE_AUTOBOTH:
- Ctrl |= PHY_X_AN_FD | PHY_X_AN_HD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
- SKERR_HWI_E015MSG);
- }
-
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- Ctrl |= PHY_X_P_NO_PAUSE;
- break;
- case SK_FLOW_MODE_LOC_SEND:
- Ctrl |= PHY_X_P_ASYM_MD;
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- Ctrl |= PHY_X_P_SYM_MD;
- break;
- case SK_FLOW_MODE_SYM_OR_REM:
- Ctrl |= PHY_X_P_BOTH_MD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
- SKERR_HWI_E016MSG);
- }
-
- /* Write AutoNeg Advertisement Register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_XMAC_AUNE_ADV, Ctrl);
-
- /* Restart Auto-negotiation */
- Ctrl = PHY_CT_ANE | PHY_CT_RE_CFG;
- }
-
- if (DoLoop) {
- /* Set the Phy Loopback bit, too */
- Ctrl |= PHY_CT_LOOP;
- }
-
- /* Write to the Phy control register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_XMAC_CTRL, Ctrl);
-} /* SkXmInitPhyXmac */
-
-
-/******************************************************************************
- *
- * SkXmInitPhyBcom() - Initialize the Broadcom Phy registers
- *
- * Description: initializes all the Broadcom Phy registers
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-static void SkXmInitPhyBcom(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
-{
- SK_GEPORT *pPrt;
- SK_U16 Ctrl1;
- SK_U16 Ctrl2;
- SK_U16 Ctrl3;
- SK_U16 Ctrl4;
- SK_U16 Ctrl5;
-
- Ctrl1 = PHY_CT_SP1000;
- Ctrl2 = 0;
- Ctrl3 = PHY_SEL_TYPE;
- Ctrl4 = PHY_B_PEC_EN_LTR;
- Ctrl5 = PHY_B_AC_TX_TST;
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* manually Master/Slave ? */
- if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
- Ctrl2 |= PHY_B_1000C_MSE;
-
- if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
- Ctrl2 |= PHY_B_1000C_MSC;
- }
- }
- /* Auto-negotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyBcom: no auto-negotiation Port %d\n", Port));
- /* Set DuplexMode in Config register */
- Ctrl1 |= (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
-
- /* Determine Master/Slave manually if not already done */
- if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
- Ctrl2 |= PHY_B_1000C_MSE; /* set it to Slave */
- }
-
- /*
- * Do NOT enable Auto-negotiation here. This would hold
- * the link down because no IDLES are transmitted
- */
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyBcom: with auto-negotiation Port %d\n", Port));
- /* Set Auto-negotiation advertisement */
-
- /*
- * Workaround BCOM Errata #1 for the C5 type.
- * 1000Base-T Link Acquisition Failure in Slave Mode
- * Set Repeater/DTE bit 10 of the 1000Base-T Control Register
- */
- Ctrl2 |= PHY_B_1000C_RD;
-
- /* Set Full/half duplex capabilities */
- switch (pPrt->PLinkMode) {
- case SK_LMODE_AUTOHALF:
- Ctrl2 |= PHY_B_1000C_AHD;
- break;
- case SK_LMODE_AUTOFULL:
- Ctrl2 |= PHY_B_1000C_AFD;
- break;
- case SK_LMODE_AUTOBOTH:
- Ctrl2 |= PHY_B_1000C_AFD | PHY_B_1000C_AHD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
- SKERR_HWI_E015MSG);
- }
-
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- Ctrl3 |= PHY_B_P_NO_PAUSE;
- break;
- case SK_FLOW_MODE_LOC_SEND:
- Ctrl3 |= PHY_B_P_ASYM_MD;
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- Ctrl3 |= PHY_B_P_SYM_MD;
- break;
- case SK_FLOW_MODE_SYM_OR_REM:
- Ctrl3 |= PHY_B_P_BOTH_MD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
- SKERR_HWI_E016MSG);
- }
-
- /* Restart Auto-negotiation */
- Ctrl1 |= PHY_CT_ANE | PHY_CT_RE_CFG;
- }
-
- /* Initialize LED register here? */
- /* No. Please do it in SkDgXmitLed() (if required) and swap
- init order of LEDs and XMAC. (MAl) */
-
- /* Write 1000Base-T Control Register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, Ctrl2);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
-
- /* Write AutoNeg Advertisement Register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, Ctrl3);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Auto-Neg. Adv. Reg=0x%04X\n", Ctrl3));
-
- if (DoLoop) {
- /* Set the Phy Loopback bit, too */
- Ctrl1 |= PHY_CT_LOOP;
- }
-
- if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
- /* configure FIFO to high latency for transmission of ext. packets */
- Ctrl4 |= PHY_B_PEC_HIGH_LA;
-
- /* configure reception of extended packets */
- Ctrl5 |= PHY_B_AC_LONG_PACK;
-
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, Ctrl5);
- }
-
- /* Configure LED Traffic Mode and Jumbo Frame usage if specified */
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, Ctrl4);
-
- /* Write to the Phy control register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL, Ctrl1);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Control Reg=0x%04X\n", Ctrl1));
-} /* SkXmInitPhyBcom */
-
-
-/******************************************************************************
- *
- * SkGmInitPhyMarv() - Initialize the Marvell Phy registers
- *
- * Description: initializes all the Marvell Phy registers
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-static void SkGmInitPhyMarv(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
-{
- SK_GEPORT *pPrt;
- SK_U16 PhyCtrl;
- SK_U16 C1000BaseT;
- SK_U16 AutoNegAdv;
- SK_U16 ExtPhyCtrl;
- SK_U16 PhyStat;
- SK_U16 PhyStat1;
- SK_U16 PhySpecStat;
- SK_U16 LedCtrl;
- SK_BOOL AutoNeg;
-
-#ifdef VCPU
- VCPUprintf(0, "SkGmInitPhyMarv(), Port=%u, DoLoop=%u\n",
- Port, DoLoop);
-#else /* VCPU */
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Auto-negotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- AutoNeg = SK_FALSE;
- }
- else {
- AutoNeg = SK_TRUE;
- }
-
- if (!DoLoop) {
- /* Read Ext. PHY Specific Control */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
-
- ExtPhyCtrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
- PHY_M_EC_MAC_S_MSK);
-
- ExtPhyCtrl |= PHY_M_EC_M_DSC(1) | PHY_M_EC_S_DSC(1) |
- PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
-
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL, ExtPhyCtrl);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Ext.PHYCtrl=0x%04X\n", ExtPhyCtrl));
-
- /* Read PHY Control */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
-
- /* Assert software reset */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL,
- (SK_U16)(PhyCtrl | PHY_CT_RESET));
- }
-#endif /* VCPU */
-
- PhyCtrl = 0 /* PHY_CT_COL_TST */;
- C1000BaseT = 0;
- AutoNegAdv = PHY_SEL_TYPE;
-
- /* manually Master/Slave ? */
- if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
- /* enable Manual Master/Slave */
- C1000BaseT |= PHY_M_1000C_MSE;
-
- if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
- C1000BaseT |= PHY_M_1000C_MSC; /* set it to Master */
- }
- }
-
- /* Auto-negotiation ? */
- if (!AutoNeg) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyMarv: no auto-negotiation Port %d\n", Port));
-
- if (pPrt->PLinkMode == SK_LMODE_FULL) {
- /* Set Full Duplex Mode */
- PhyCtrl |= PHY_CT_DUP_MD;
- }
-
- /* Set Master/Slave manually if not already done */
- if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
- C1000BaseT |= PHY_M_1000C_MSE; /* set it to Slave */
- }
-
- /* Set Speed */
- switch (pPrt->PLinkSpeed) {
- case SK_LSPEED_AUTO:
- case SK_LSPEED_1000MBPS:
- PhyCtrl |= PHY_CT_SP1000;
- break;
- case SK_LSPEED_100MBPS:
- PhyCtrl |= PHY_CT_SP100;
- break;
- case SK_LSPEED_10MBPS:
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
- SKERR_HWI_E019MSG);
- }
-
- if (!DoLoop) {
- PhyCtrl |= PHY_CT_RESET;
- }
- /*
- * Do NOT enable Auto-negotiation here. This would hold
- * the link down because no IDLES are transmitted
- */
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyMarv: with auto-negotiation Port %d\n", Port));
-
- PhyCtrl |= PHY_CT_ANE;
-
- if (pAC->GIni.GICopperType) {
- /* Set Speed capabilities */
- switch (pPrt->PLinkSpeed) {
- case SK_LSPEED_AUTO:
- C1000BaseT |= PHY_M_1000C_AHD | PHY_M_1000C_AFD;
- AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
- PHY_M_AN_10_FD | PHY_M_AN_10_HD;
- break;
- case SK_LSPEED_1000MBPS:
- C1000BaseT |= PHY_M_1000C_AHD | PHY_M_1000C_AFD;
- break;
- case SK_LSPEED_100MBPS:
- AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
- PHY_M_AN_10_FD | PHY_M_AN_10_HD;
- break;
- case SK_LSPEED_10MBPS:
- AutoNegAdv |= PHY_M_AN_10_FD | PHY_M_AN_10_HD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
- SKERR_HWI_E019MSG);
- }
-
- /* Set Full/half duplex capabilities */
- switch (pPrt->PLinkMode) {
- case SK_LMODE_AUTOHALF:
- C1000BaseT &= ~PHY_M_1000C_AFD;
- AutoNegAdv &= ~(PHY_M_AN_100_FD | PHY_M_AN_10_FD);
- break;
- case SK_LMODE_AUTOFULL:
- C1000BaseT &= ~PHY_M_1000C_AHD;
- AutoNegAdv &= ~(PHY_M_AN_100_HD | PHY_M_AN_10_HD);
- break;
- case SK_LMODE_AUTOBOTH:
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
- SKERR_HWI_E015MSG);
- }
-
- /* Set Auto-negotiation advertisement */
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- AutoNegAdv |= PHY_B_P_NO_PAUSE;
- break;
- case SK_FLOW_MODE_LOC_SEND:
- AutoNegAdv |= PHY_B_P_ASYM_MD;
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- AutoNegAdv |= PHY_B_P_SYM_MD;
- break;
- case SK_FLOW_MODE_SYM_OR_REM:
- AutoNegAdv |= PHY_B_P_BOTH_MD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
- SKERR_HWI_E016MSG);
- }
- }
- else { /* special defines for FIBER (88E1011S only) */
-
- /* Set Full/half duplex capabilities */
- switch (pPrt->PLinkMode) {
- case SK_LMODE_AUTOHALF:
- AutoNegAdv |= PHY_M_AN_1000X_AHD;
- break;
- case SK_LMODE_AUTOFULL:
- AutoNegAdv |= PHY_M_AN_1000X_AFD;
- break;
- case SK_LMODE_AUTOBOTH:
- AutoNegAdv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
- SKERR_HWI_E015MSG);
- }
-
- /* Set Auto-negotiation advertisement */
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- AutoNegAdv |= PHY_M_P_NO_PAUSE_X;
- break;
- case SK_FLOW_MODE_LOC_SEND:
- AutoNegAdv |= PHY_M_P_ASYM_MD_X;
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- AutoNegAdv |= PHY_M_P_SYM_MD_X;
- break;
- case SK_FLOW_MODE_SYM_OR_REM:
- AutoNegAdv |= PHY_M_P_BOTH_MD_X;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
- SKERR_HWI_E016MSG);
- }
- }
-
- if (!DoLoop) {
- /* Restart Auto-negotiation */
- PhyCtrl |= PHY_CT_RE_CFG;
- }
- }
-
-#ifdef VCPU
- /*
- * E-mail from Gu Lin (08-03-2002):
- */
-
- /* Program PHY register 30 as 16'h0708 for simulation speed up */
- SkGmPhyWrite(pAC, IoC, Port, 30, 0x0708);
-
- VCpuWait(2000);
-
-#else /* VCPU */
-
- /* Write 1000Base-T Control Register */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("1000B-T Ctrl=0x%04X\n", C1000BaseT));
-
- /* Write AutoNeg Advertisement Register */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV, AutoNegAdv);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Auto-Neg.Ad.=0x%04X\n", AutoNegAdv));
-#endif /* VCPU */
-
- if (DoLoop) {
- /* Set the PHY Loopback bit */
- PhyCtrl |= PHY_CT_LOOP;
-
- /* Program PHY register 16 as 16'h0400 to force link good */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PHY_M_PC_FL_GOOD);
-
-#if 0
- if (pPrt->PLinkSpeed != SK_LSPEED_AUTO) {
- /* Write Ext. PHY Specific Control */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL,
- (SK_U16)((pPrt->PLinkSpeed + 2) << 4));
- }
- }
- else if (pPrt->PLinkSpeed == SK_LSPEED_10MBPS) {
- /* Write PHY Specific Control */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PHY_M_PC_EN_DET_MSK);
- }
-#endif /* 0 */
- }
-
- /* Write to the PHY Control register */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
-
-#ifdef VCPU
- VCpuWait(2000);
-#else
-
- LedCtrl = PHY_M_LED_PULS_DUR(PULS_170MS) | PHY_M_LED_BLINK_RT(BLINK_84MS);
-
-#ifdef ACT_LED_BLINK
- LedCtrl |= PHY_M_LEDC_RX_CTRL | PHY_M_LEDC_TX_CTRL;
-#endif /* ACT_LED_BLINK */
-
-#ifdef DUP_LED_NORMAL
- LedCtrl |= PHY_M_LEDC_DP_CTRL;
-#endif /* DUP_LED_NORMAL */
-
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_CTRL, LedCtrl);
-
-#endif /* VCPU */
-
-#ifdef SK_DIAG
- c_print("Set PHY Ctrl=0x%04X\n", PhyCtrl);
- c_print("Set 1000 B-T=0x%04X\n", C1000BaseT);
- c_print("Set Auto-Neg=0x%04X\n", AutoNegAdv);
- c_print("Set Ext Ctrl=0x%04X\n", ExtPhyCtrl);
-#endif /* SK_DIAG */
-
-#ifndef xDEBUG
- /* Read PHY Control */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Ctrl Reg.=0x%04X\n", PhyCtrl));
-
- /* Read 1000Base-T Control Register */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_CTRL, &C1000BaseT);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("1000B-T Ctrl =0x%04X\n", C1000BaseT));
-
- /* Read AutoNeg Advertisement Register */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &AutoNegAdv);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Auto-Neg. Ad.=0x%04X\n", AutoNegAdv));
-
- /* Read Ext. PHY Specific Control */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Ext PHY Ctrl=0x%04X\n", ExtPhyCtrl));
-
- /* Read PHY Status */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Stat Reg.=0x%04X\n", PhyStat));
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat1);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Stat Reg.=0x%04X\n", PhyStat1));
-
- /* Read PHY Specific Status */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Spec Stat=0x%04X\n", PhySpecStat));
-#endif /* DEBUG */
-
-#ifdef SK_DIAG
- c_print("PHY Ctrl Reg=0x%04X\n", PhyCtrl);
- c_print("PHY 1000 Reg=0x%04X\n", C1000BaseT);
- c_print("PHY AnAd Reg=0x%04X\n", AutoNegAdv);
- c_print("Ext Ctrl Reg=0x%04X\n", ExtPhyCtrl);
- c_print("PHY Stat Reg=0x%04X\n", PhyStat);
- c_print("PHY Stat Reg=0x%04X\n", PhyStat1);
- c_print("PHY Spec Reg=0x%04X\n", PhySpecStat);
-#endif /* SK_DIAG */
-
-} /* SkGmInitPhyMarv */
-
-
-#ifdef OTHER_PHY
-/******************************************************************************
- *
- * SkXmInitPhyLone() - Initialize the Level One Phy registers
- *
- * Description: initializes all the Level One Phy registers
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-static void SkXmInitPhyLone(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
-{
- SK_GEPORT *pPrt;
- SK_U16 Ctrl1;
- SK_U16 Ctrl2;
- SK_U16 Ctrl3;
-
- Ctrl1 = PHY_CT_SP1000;
- Ctrl2 = 0;
- Ctrl3 = PHY_SEL_TYPE;
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* manually Master/Slave ? */
- if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
- Ctrl2 |= PHY_L_1000C_MSE;
-
- if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
- Ctrl2 |= PHY_L_1000C_MSC;
- }
- }
- /* Auto-negotiation ? */
- if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
- /*
- * level one spec say: "1000Mbps: manual mode not allowed"
- * but lets see what happens...
- */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyLone: no auto-negotiation Port %d\n", Port));
- /* Set DuplexMode in Config register */
- Ctrl1 = (pPrt->PLinkMode == SK_LMODE_FULL ? PHY_CT_DUP_MD : 0);
-
- /* Determine Master/Slave manually if not already done */
- if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
- Ctrl2 |= PHY_L_1000C_MSE; /* set it to Slave */
- }
-
- /*
- * Do NOT enable Auto-negotiation here. This would hold
- * the link down because no IDLES are transmitted
- */
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("InitPhyLone: with auto-negotiation Port %d\n", Port));
- /* Set Auto-negotiation advertisement */
-
- /* Set Full/half duplex capabilities */
- switch (pPrt->PLinkMode) {
- case SK_LMODE_AUTOHALF:
- Ctrl2 |= PHY_L_1000C_AHD;
- break;
- case SK_LMODE_AUTOFULL:
- Ctrl2 |= PHY_L_1000C_AFD;
- break;
- case SK_LMODE_AUTOBOTH:
- Ctrl2 |= PHY_L_1000C_AFD | PHY_L_1000C_AHD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
- SKERR_HWI_E015MSG);
- }
-
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- Ctrl3 |= PHY_L_P_NO_PAUSE;
- break;
- case SK_FLOW_MODE_LOC_SEND:
- Ctrl3 |= PHY_L_P_ASYM_MD;
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- Ctrl3 |= PHY_L_P_SYM_MD;
- break;
- case SK_FLOW_MODE_SYM_OR_REM:
- Ctrl3 |= PHY_L_P_BOTH_MD;
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
- SKERR_HWI_E016MSG);
- }
-
- /* Restart Auto-negotiation */
- Ctrl1 = PHY_CT_ANE | PHY_CT_RE_CFG;
-
- }
-
- /* Initialize LED register here ? */
- /* No. Please do it in SkDgXmitLed() (if required) and swap
- init order of LEDs and XMAC. (MAl) */
-
- /* Write 1000Base-T Control Register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_1000T_CTRL, Ctrl2);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
-
- /* Write AutoNeg Advertisement Register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_AUNE_ADV, Ctrl3);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Auto-Neg. Adv. Reg=0x%04X\n", Ctrl3));
-
-
- if (DoLoop) {
- /* Set the Phy Loopback bit, too */
- Ctrl1 |= PHY_CT_LOOP;
- }
-
- /* Write to the Phy control register */
- SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_CTRL, Ctrl1);
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Control Reg=0x%04X\n", Ctrl1));
-} /* SkXmInitPhyLone */
-
-
-/******************************************************************************
- *
- * SkXmInitPhyNat() - Initialize the National Phy registers
- *
- * Description: initializes all the National Phy registers
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-static void SkXmInitPhyNat(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
-{
-/* todo: National */
-} /* SkXmInitPhyNat */
-#endif /* OTHER_PHY */
-
-
-/******************************************************************************
- *
- * SkMacInitPhy() - Initialize the PHY registers
- *
- * Description: calls the Init PHY routines dep. on board type
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-void SkMacInitPhy(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- switch (pPrt->PhyType) {
- case SK_PHY_XMAC:
- SkXmInitPhyXmac(pAC, IoC, Port, DoLoop);
- break;
- case SK_PHY_BCOM:
- SkXmInitPhyBcom(pAC, IoC, Port, DoLoop);
- break;
- case SK_PHY_MARV_COPPER:
- case SK_PHY_MARV_FIBER:
- SkGmInitPhyMarv(pAC, IoC, Port, DoLoop);
- break;
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- SkXmInitPhyLone(pAC, IoC, Port, DoLoop);
- break;
- case SK_PHY_NAT:
- SkXmInitPhyNat(pAC, IoC, Port, DoLoop);
- break;
-#endif /* OTHER_PHY */
- }
-} /* SkMacInitPhy */
-
-
-#ifndef SK_DIAG
-/******************************************************************************
- *
- * SkXmAutoNegLipaXmac() - Decides whether Link Partner could do auto-neg
- *
- * This function analyses the Interrupt status word. If any of the
- * Auto-negotiating interrupt bits are set, the PLipaAutoNeg variable
- * is set true.
- */
-void SkXmAutoNegLipaXmac(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U16 IStatus) /* Interrupt Status word to analyse */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
- (IStatus & (XM_IS_LIPA_RC | XM_IS_RX_PAGE | XM_IS_AND)) != 0) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegLipa: AutoNeg detected on Port %d, IStatus=0x%04x\n",
- Port, IStatus));
- pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
- }
-} /* SkXmAutoNegLipaXmac */
-
-
-/******************************************************************************
- *
- * SkMacAutoNegLipaPhy() - Decides whether Link Partner could do auto-neg
- *
- * This function analyses the PHY status word.
- * If any of the Auto-negotiating bits are set, the PLipaAutoNeg variable
- * is set true.
- */
-void SkMacAutoNegLipaPhy(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_U16 PhyStat) /* PHY Status word to analyse */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PLipaAutoNeg != SK_LIPA_AUTO &&
- (PhyStat & PHY_ST_AN_OVER) != 0) {
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegLipa: AutoNeg detected on Port %d, PhyStat=0x%04x\n",
- Port, PhyStat));
- pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
- }
-} /* SkMacAutoNegLipaPhy */
-#endif /* SK_DIAG */
-
-
-/******************************************************************************
- *
- * SkXmAutoNegDoneXmac() - Auto-negotiation handling
- *
- * Description:
- * This function handles the auto-negotiation if the Done bit is set.
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-static int SkXmAutoNegDoneXmac(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 ResAb; /* Resolved Ability */
- SK_U16 LPAb; /* Link Partner Ability */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegDoneXmac, Port %d\n",Port));
-
- pPrt = &pAC->GIni.GP[Port];
-
- /* Get PHY parameters */
- SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_LP, &LPAb);
- SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_RES_ABI, &ResAb);
-
- if ((LPAb & PHY_X_AN_RFB) != 0) {
- /* At least one of the remote fault bit is set */
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Remote fault bit set Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- return(SK_AND_OTHER);
- }
-
- /* Check Duplex mismatch */
- if ((ResAb & (PHY_X_RS_HD | PHY_X_RS_FD)) == PHY_X_RS_FD) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
- }
- else if ((ResAb & (PHY_X_RS_HD | PHY_X_RS_FD)) == PHY_X_RS_HD) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
- }
- else {
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- return(SK_AND_DUP_CAP);
- }
-
- /* Check PAUSE mismatch */
- /* We are NOT using chapter 4.23 of the Xaqti manual */
- /* We are using IEEE 802.3z/D5.0 Table 37-4 */
- if ((pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYMMETRIC ||
- pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) &&
- (LPAb & PHY_X_P_SYM_MD) != 0) {
- /* Symmetric PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
- }
- else if (pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM &&
- (LPAb & PHY_X_RS_PAUSE) == PHY_X_P_ASYM_MD) {
- /* Enable PAUSE receive, disable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
- }
- else if (pPrt->PFlowCtrlMode == SK_FLOW_MODE_LOC_SEND &&
- (LPAb & PHY_X_RS_PAUSE) == PHY_X_P_BOTH_MD) {
- /* Disable PAUSE receive, enable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
- }
- else {
- /* PAUSE mismatch -> no PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- }
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
-
- return(SK_AND_OK);
-} /* SkXmAutoNegDoneXmac */
-
-
-/******************************************************************************
- *
- * SkXmAutoNegDoneBcom() - Auto-negotiation handling
- *
- * Description:
- * This function handles the auto-negotiation if the Done bit is set.
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-static int SkXmAutoNegDoneBcom(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 LPAb; /* Link Partner Ability */
- SK_U16 AuxStat; /* Auxiliary Status */
-
-#if 0
-01-Sep-2000 RA;:;:
- SK_U16 ResAb; /* Resolved Ability */
-#endif /* 0 */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegDoneBcom, Port %d\n", Port));
- pPrt = &pAC->GIni.GP[Port];
-
- /* Get PHY parameters */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &LPAb);
-#if 0
-01-Sep-2000 RA;:;:
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
-#endif /* 0 */
-
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &AuxStat);
-
- if ((LPAb & PHY_B_AN_RF) != 0) {
- /* Remote fault bit is set: Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Remote fault bit set Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- return(SK_AND_OTHER);
- }
-
- /* Check Duplex mismatch */
- if ((AuxStat & PHY_B_AS_AN_RES_MSK) == PHY_B_RES_1000FD) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
- }
- else if ((AuxStat & PHY_B_AS_AN_RES_MSK) == PHY_B_RES_1000HD) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
- }
- else {
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- return(SK_AND_DUP_CAP);
- }
-
-#if 0
-01-Sep-2000 RA;:;:
- /* Check Master/Slave resolution */
- if ((ResAb & PHY_B_1000S_MSF) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Master/Slave Fault Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- pPrt->PMSStatus = SK_MS_STAT_FAULT;
- return(SK_AND_OTHER);
- }
-
- pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
- SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
-#endif /* 0 */
-
- /* Check PAUSE mismatch */
- /* We are using IEEE 802.3z/D5.0 Table 37-4 */
- if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PAUSE_MSK) {
- /* Symmetric PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
- }
- else if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PRR) {
- /* Enable PAUSE receive, disable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
- }
- else if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PRT) {
- /* Disable PAUSE receive, enable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
- }
- else {
- /* PAUSE mismatch -> no PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- }
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
-
- return(SK_AND_OK);
-} /* SkXmAutoNegDoneBcom */
-
-
-/******************************************************************************
- *
- * SkGmAutoNegDoneMarv() - Auto-negotiation handling
- *
- * Description:
- * This function handles the auto-negotiation if the Done bit is set.
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-static int SkGmAutoNegDoneMarv(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 LPAb; /* Link Partner Ability */
- SK_U16 ResAb; /* Resolved Ability */
- SK_U16 AuxStat; /* Auxiliary Status */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegDoneMarv, Port %d\n", Port));
- pPrt = &pAC->GIni.GP[Port];
-
- /* Get PHY parameters */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_LP, &LPAb);
-
- if ((LPAb & PHY_M_AN_RF) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Remote fault bit set Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- return(SK_AND_OTHER);
- }
-
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
-
- /* Check Master/Slave resolution */
- if ((ResAb & PHY_B_1000S_MSF) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Master/Slave Fault Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- pPrt->PMSStatus = SK_MS_STAT_FAULT;
- return(SK_AND_OTHER);
- }
-
- pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
- (SK_U8)SK_MS_STAT_MASTER : (SK_U8)SK_MS_STAT_SLAVE;
-
- /* Read PHY Specific Status */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &AuxStat);
-
- /* Check Speed & Duplex resolved */
- if ((AuxStat & PHY_M_PS_SPDUP_RES) == 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Speed & Duplex not resolved Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- pPrt->PLinkModeStatus = SK_LMODE_STAT_UNKNOWN;
- return(SK_AND_DUP_CAP);
- }
-
- if ((AuxStat & PHY_M_PS_FULL_DUP) != 0) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
- }
- else {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
- }
-
- /* Check PAUSE mismatch */
- /* We are using IEEE 802.3z/D5.0 Table 37-4 */
- if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_PAUSE_MSK) {
- /* Symmetric PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
- }
- else if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_RX_P_EN) {
- /* Enable PAUSE receive, disable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
- }
- else if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_TX_P_EN) {
- /* Disable PAUSE receive, enable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
- }
- else {
- /* PAUSE mismatch -> no PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- }
-
- /* set used link speed */
- switch ((unsigned)(AuxStat & PHY_M_PS_SPEED_MSK)) {
- case (unsigned)PHY_M_PS_SPEED_1000:
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_1000MBPS;
- break;
- case PHY_M_PS_SPEED_100:
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_100MBPS;
- break;
- default:
- pPrt->PLinkSpeedUsed = SK_LSPEED_STAT_10MBPS;
- }
-
- return(SK_AND_OK);
-} /* SkGmAutoNegDoneMarv */
-
-
-#ifdef OTHER_PHY
-/******************************************************************************
- *
- * SkXmAutoNegDoneLone() - Auto-negotiation handling
- *
- * Description:
- * This function handles the auto-negotiation if the Done bit is set.
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-static int SkXmAutoNegDoneLone(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 ResAb; /* Resolved Ability */
- SK_U16 LPAb; /* Link Partner Ability */
- SK_U16 QuickStat; /* Auxiliary Status */
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegDoneLone, Port %d\n",Port));
- pPrt = &pAC->GIni.GP[Port];
-
- /* Get PHY parameters */
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_AUNE_LP, &LPAb);
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_1000T_STAT, &ResAb);
- SkXmPhyRead(pAC, IoC, Port, PHY_LONE_Q_STAT, &QuickStat);
-
- if ((LPAb & PHY_L_AN_RF) != 0) {
- /* Remote fault bit is set */
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("AutoNegFail: Remote fault bit set Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- return(SK_AND_OTHER);
- }
-
- /* Check Duplex mismatch */
- if ((QuickStat & PHY_L_QS_DUP_MOD) != 0) {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOFULL;
- }
- else {
- pPrt->PLinkModeStatus = SK_LMODE_STAT_AUTOHALF;
- }
-
- /* Check Master/Slave resolution */
- if ((ResAb & PHY_L_1000S_MSF) != 0) {
- /* Error */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("Master/Slave Fault Port %d\n", Port));
- pPrt->PAutoNegFail = SK_TRUE;
- pPrt->PMSStatus = SK_MS_STAT_FAULT;
- return(SK_AND_OTHER);
- }
- else if (ResAb & PHY_L_1000S_MSR) {
- pPrt->PMSStatus = SK_MS_STAT_MASTER;
- }
- else {
- pPrt->PMSStatus = SK_MS_STAT_SLAVE;
- }
-
- /* Check PAUSE mismatch */
- /* We are using IEEE 802.3z/D5.0 Table 37-4 */
- /* we must manually resolve the abilities here */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
- switch (pPrt->PFlowCtrlMode) {
- case SK_FLOW_MODE_NONE:
- /* default */
- break;
- case SK_FLOW_MODE_LOC_SEND:
- if ((QuickStat & (PHY_L_QS_PAUSE | PHY_L_QS_AS_PAUSE)) ==
- (PHY_L_QS_PAUSE | PHY_L_QS_AS_PAUSE)) {
- /* Disable PAUSE receive, enable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
- }
- break;
- case SK_FLOW_MODE_SYMMETRIC:
- if ((QuickStat & PHY_L_QS_PAUSE) != 0) {
- /* Symmetric PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
- }
- break;
- case SK_FLOW_MODE_SYM_OR_REM:
- if ((QuickStat & (PHY_L_QS_PAUSE | PHY_L_QS_AS_PAUSE)) ==
- PHY_L_QS_AS_PAUSE) {
- /* Enable PAUSE receive, disable PAUSE transmit */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
- }
- else if ((QuickStat & PHY_L_QS_PAUSE) != 0) {
- /* Symmetric PAUSE */
- pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
- }
- break;
- default:
- SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
- SKERR_HWI_E016MSG);
- }
-
- return(SK_AND_OK);
-} /* SkXmAutoNegDoneLone */
-
-
-/******************************************************************************
- *
- * SkXmAutoNegDoneNat() - Auto-negotiation handling
- *
- * Description:
- * This function handles the auto-negotiation if the Done bit is set.
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-static int SkXmAutoNegDoneNat(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
-/* todo: National */
- return(SK_AND_OK);
-} /* SkXmAutoNegDoneNat */
-#endif /* OTHER_PHY */
-
-
-/******************************************************************************
- *
- * SkMacAutoNegDone() - Auto-negotiation handling
- *
- * Description: calls the auto-negotiation done routines dep. on board type
- *
- * Returns:
- * SK_AND_OK o.k.
- * SK_AND_DUP_CAP Duplex capability error happened
- * SK_AND_OTHER Other error happened
- */
-int SkMacAutoNegDone(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- int Rtv;
-
- pPrt = &pAC->GIni.GP[Port];
-
- switch (pPrt->PhyType) {
- case SK_PHY_XMAC:
- Rtv = SkXmAutoNegDoneXmac(pAC, IoC, Port);
- break;
- case SK_PHY_BCOM:
- Rtv = SkXmAutoNegDoneBcom(pAC, IoC, Port);
- break;
- case SK_PHY_MARV_COPPER:
- case SK_PHY_MARV_FIBER:
- Rtv = SkGmAutoNegDoneMarv(pAC, IoC, Port);
- break;
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- Rtv = SkXmAutoNegDoneLone(pAC, IoC, Port);
- break;
- case SK_PHY_NAT:
- Rtv = SkXmAutoNegDoneNat(pAC, IoC, Port);
- break;
-#endif /* OTHER_PHY */
- default:
- return(SK_AND_OTHER);
- }
-
- if (Rtv != SK_AND_OK) {
- return(Rtv);
- }
-
- /* We checked everything and may now enable the link */
- pPrt->PAutoNegFail = SK_FALSE;
-
- SkMacRxTxEnable(pAC, IoC, Port);
-
- return(SK_AND_OK);
-} /* SkMacAutoNegDone */
-
-
-/******************************************************************************
- *
- * SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC
- *
- * Description:
- * sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg.
- * enables Rx/Tx
- *
- * Returns: N/A
- */
-static void SkXmSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
-{
- SK_U16 Word;
-
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
- switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
- case SK_MAC_LOOPB_ON:
- Word |= XM_MMU_MAC_LB;
- break;
- case SK_MAC_LOOPB_OFF:
- Word &= ~XM_MMU_MAC_LB;
- break;
- }
-
- switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) {
- case SK_PHY_LOOPB_ON:
- Word |= XM_MMU_GMII_LOOP;
- break;
- case SK_PHY_LOOPB_OFF:
- Word &= ~XM_MMU_GMII_LOOP;
- break;
- }
-
- switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
- case SK_PHY_FULLD_ON:
- Word |= XM_MMU_GMII_FD;
- break;
- case SK_PHY_FULLD_OFF:
- Word &= ~XM_MMU_GMII_FD;
- break;
- }
-
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
-
- /* dummy read to ensure writing */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
-} /* SkXmSetRxTxEn */
-
-
-/******************************************************************************
- *
- * SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC
- *
- * Description:
- * sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg.
- * enables Rx/Tx
- *
- * Returns: N/A
- */
-static void SkGmSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */
-{
- SK_U16 Ctrl;
-
- GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
-
- switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
- case SK_MAC_LOOPB_ON:
- Ctrl |= GM_GPCR_LOOP_ENA;
- break;
- case SK_MAC_LOOPB_OFF:
- Ctrl &= ~GM_GPCR_LOOP_ENA;
- break;
- }
-
- switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
- case SK_PHY_FULLD_ON:
- Ctrl |= GM_GPCR_DUP_FULL;
- break;
- case SK_PHY_FULLD_OFF:
- Ctrl &= ~GM_GPCR_DUP_FULL;
- break;
- }
-
- GM_OUT16(IoC, Port, GM_GP_CTRL, Ctrl | GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
-
- /* dummy read to ensure writing */
- GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
-
-} /* SkGmSetRxTxEn */
-
-
-/******************************************************************************
- *
- * SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters
- *
- * Description: calls the Special Set Rx/Tx Enable routines dep. on board type
- *
- * Returns: N/A
- */
-void SkMacSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para)
-{
- if (pAC->GIni.GIGenesis) {
-
- SkXmSetRxTxEn(pAC, IoC, Port, Para);
- }
- else {
-
- SkGmSetRxTxEn(pAC, IoC, Port, Para);
- }
-
-} /* SkMacSetRxTxEn */
-
-
-/******************************************************************************
- *
- * SkMacRxTxEnable() - Enable Rx/Tx activity if port is up
- *
- * Description: enables Rx/Tx dep. on board type
- *
- * Returns:
- * 0 o.k.
- * != 0 Error happened
- */
-int SkMacRxTxEnable(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 Reg; /* 16-bit register value */
- SK_U16 IntMask; /* MAC interrupt mask */
- SK_U16 SWord;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (!pPrt->PHWLinkUp) {
- /* The Hardware link is NOT up */
- return(0);
- }
-
- if ((pPrt->PLinkMode == SK_LMODE_AUTOHALF ||
- pPrt->PLinkMode == SK_LMODE_AUTOFULL ||
- pPrt->PLinkMode == SK_LMODE_AUTOBOTH) &&
- pPrt->PAutoNegFail) {
- /* Auto-negotiation is not done or failed */
- return(0);
- }
-
- if (pAC->GIni.GIGenesis) {
- /* set Duplex Mode and Pause Mode */
- SkXmInitDupMd(pAC, IoC, Port);
-
- SkXmInitPauseMd(pAC, IoC, Port);
-
- /*
- * Initialize the Interrupt Mask Register. Default IRQs are...
- * - Link Asynchronous Event
- * - Link Partner requests config
- * - Auto Negotiation Done
- * - Rx Counter Event Overflow
- * - Tx Counter Event Overflow
- * - Transmit FIFO Underrun
- */
- IntMask = XM_DEF_MSK;
-
-#ifdef DEBUG
- /* add IRQ for Receive FIFO Overflow */
- IntMask &= ~XM_IS_RXF_OV;
-#endif /* DEBUG */
-
- if (pPrt->PhyType != SK_PHY_XMAC) {
- /* disable GP0 interrupt bit */
- IntMask |= XM_IS_INP_ASS;
- }
- XM_OUT16(IoC, Port, XM_IMSK, IntMask);
-
- /* get MMU Command Reg. */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Reg);
-
- if (pPrt->PhyType != SK_PHY_XMAC &&
- (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL)) {
- /* set to Full Duplex */
- Reg |= XM_MMU_GMII_FD;
- }
-
- switch (pPrt->PhyType) {
- case SK_PHY_BCOM:
- /*
- * Workaround BCOM Errata (#10523) for all BCom Phys
- * Enable Power Management after link up
- */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
- (SK_U16)(SWord & ~PHY_B_AC_DIS_PM));
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK);
- break;
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, PHY_L_DEF_MSK);
- break;
- case SK_PHY_NAT:
- /* todo National:
- SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, PHY_N_DEF_MSK); */
- /* no interrupts possible from National ??? */
- break;
-#endif /* OTHER_PHY */
- }
-
- /* enable Rx/Tx */
- XM_OUT16(IoC, Port, XM_MMU_CMD, Reg | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
- }
- else {
- /*
- * Initialize the Interrupt Mask Register. Default IRQs are...
- * - Rx Counter Event Overflow
- * - Tx Counter Event Overflow
- * - Transmit FIFO Underrun
- */
- IntMask = GMAC_DEF_MSK;
-
-#ifdef DEBUG
- /* add IRQ for Receive FIFO Overrun */
- IntMask |= GM_IS_RX_FF_OR;
-#endif /* DEBUG */
-
- SK_OUT8(IoC, GMAC_IRQ_MSK, (SK_U8)IntMask);
-
- /* get General Purpose Control */
- GM_IN16(IoC, Port, GM_GP_CTRL, &Reg);
-
- if (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
- pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL) {
- /* set to Full Duplex */
- Reg |= GM_GPCR_DUP_FULL;
- }
-
- /* enable Rx/Tx */
- GM_OUT16(IoC, Port, GM_GP_CTRL, Reg | GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
-
-#ifndef VCPU
- /* Enable all PHY interrupts */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
-#endif /* VCPU */
- }
-
- return(0);
-
-} /* SkMacRxTxEnable */
-
-
-/******************************************************************************
- *
- * SkMacRxTxDisable() - Disable Receiver and Transmitter
- *
- * Description: disables Rx/Tx dep. on board type
- *
- * Returns: N/A
- */
-void SkMacRxTxDisable(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U16 Word;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
-
- /* dummy read to ensure writing */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
- }
- else {
-
- GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
-
- GM_OUT16(IoC, Port, GM_GP_CTRL, Word & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA));
-
- /* dummy read to ensure writing */
- GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
- }
-} /* SkMacRxTxDisable */
-
-
-/******************************************************************************
- *
- * SkMacIrqDisable() - Disable IRQ from MAC
- *
- * Description: sets the IRQ-mask to disable IRQ dep. on board type
- *
- * Returns: N/A
- */
-void SkMacIrqDisable(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 Word;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pAC->GIni.GIGenesis) {
-
- /* disable all XMAC IRQs */
- XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
-
- /* Disable all PHY interrupts */
- switch (pPrt->PhyType) {
- case SK_PHY_BCOM:
- /* Make sure that PHY is initialized */
- if (pPrt->PState != SK_PRT_RESET) {
- /* NOT allowed if BCOM is in RESET state */
- /* Workaround BCOM Errata (#10523) all BCom */
- /* Disable Power Management if link is down */
- SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Word);
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
- (SK_U16)(Word | PHY_B_AC_DIS_PM));
- SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff);
- }
- break;
-#ifdef OTHER_PHY
- case SK_PHY_LONE:
- SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0);
- break;
- case SK_PHY_NAT:
- /* todo: National
- SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */
- break;
-#endif /* OTHER_PHY */
- }
- }
- else {
- /* disable all GMAC IRQs */
- SK_OUT8(IoC, GMAC_IRQ_MSK, 0);
-
-#ifndef VCPU
- /* Disable all PHY interrupts */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
-#endif /* VCPU */
- }
-} /* SkMacIrqDisable */
-
-
-#ifdef SK_DIAG
-/******************************************************************************
- *
- * SkXmSendCont() - Enable / Disable Send Continuous Mode
- *
- * Description: enable / disable Send Continuous Mode on XMAC
- *
- * Returns:
- * nothing
- */
-void SkXmSendCont(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL Enable) /* Enable / Disable */
-{
- SK_U32 MdReg;
-
- XM_IN32(IoC, Port, XM_MODE, &MdReg);
-
- if (Enable) {
- MdReg |= XM_MD_TX_CONT;
- }
- else {
- MdReg &= ~XM_MD_TX_CONT;
- }
- /* setup Mode Register */
- XM_OUT32(IoC, Port, XM_MODE, MdReg);
-
-} /* SkXmSendCont*/
-
-/******************************************************************************
- *
- * SkMacTimeStamp() - Enable / Disable Time Stamp
- *
- * Description: enable / disable Time Stamp generation for Rx packets
- *
- * Returns:
- * nothing
- */
-void SkMacTimeStamp(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL Enable) /* Enable / Disable */
-{
- SK_U32 MdReg;
- SK_U8 TimeCtrl;
-
- if (pAC->GIni.GIGenesis) {
-
- XM_IN32(IoC, Port, XM_MODE, &MdReg);
-
- if (Enable) {
- MdReg |= XM_MD_ATS;
- }
- else {
- MdReg &= ~XM_MD_ATS;
- }
- /* setup Mode Register */
- XM_OUT32(IoC, Port, XM_MODE, MdReg);
- }
- else {
- if (Enable) {
- TimeCtrl = GMT_ST_START | GMT_ST_CLR_IRQ;
- }
- else {
- TimeCtrl = GMT_ST_STOP | GMT_ST_CLR_IRQ;
- }
- /* Start/Stop Time Stamp Timer */
- SK_OUT8(pAC, GMAC_TI_ST_CTRL, TimeCtrl);
- }
-} /* SkMacTimeStamp*/
-
-#else /* SK_DIAG */
-
-/******************************************************************************
- *
- * SkXmIrq() - Interrupt Service Routine
- *
- * Description: services an Interrupt Request of the XMAC
- *
- * Note:
- * With an external PHY, some interrupt bits are not meaningfull any more:
- * - LinkAsyncEvent (bit #14) XM_IS_LNK_AE
- * - LinkPartnerReqConfig (bit #10) XM_IS_LIPA_RC
- * - Page Received (bit #9) XM_IS_RX_PAGE
- * - NextPageLoadedForXmt (bit #8) XM_IS_TX_PAGE
- * - AutoNegDone (bit #7) XM_IS_AND
- * Also probably not valid any more is the GP0 input bit:
- * - GPRegisterBit0set XM_IS_INP_ASS
- *
- * Returns:
- * nothing
- */
-void SkXmIrq(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_EVPARA Para;
- SK_U16 IStatus; /* Interrupt status read from the XMAC */
- SK_U16 IStatus2;
-
- pPrt = &pAC->GIni.GP[Port];
-
- XM_IN16(IoC, Port, XM_ISRC, &IStatus);
-
- /* LinkPartner Auto-negable? */
- if (pPrt->PhyType == SK_PHY_XMAC) {
- SkXmAutoNegLipaXmac(pAC, IoC, Port, IStatus);
- }
- else {
- /* mask bits that are not used with ext. PHY */
- IStatus &= ~(XM_IS_LNK_AE | XM_IS_LIPA_RC |
- XM_IS_RX_PAGE | XM_IS_TX_PAGE |
- XM_IS_AND | XM_IS_INP_ASS);
- }
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("XmacIrq Port %d Isr 0x%04x\n", Port, IStatus));
-
- if (!pPrt->PHWLinkUp) {
- /* Spurious XMAC interrupt */
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("SkXmIrq: spurious interrupt on Port %d\n", Port));
- return;
- }
-
- if ((IStatus & XM_IS_INP_ASS) != 0) {
- /* Reread ISR Register if link is not in sync */
- XM_IN16(IoC, Port, XM_ISRC, &IStatus2);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("SkXmIrq: Link async. Double check Port %d 0x%04x 0x%04x\n",
- Port, IStatus, IStatus2));
- IStatus &= ~XM_IS_INP_ASS;
- IStatus |= IStatus2;
- }
-
- if ((IStatus & XM_IS_LNK_AE) != 0) {
- /* not used, GP0 is used instead */
- }
-
- if ((IStatus & XM_IS_TX_ABORT) != 0) {
- /* not used */
- }
-
- if ((IStatus & XM_IS_FRC_INT) != 0) {
- /* not used, use ASIC IRQ instead if needed */
- }
-
- if ((IStatus & (XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE)) != 0) {
- SkHWLinkDown(pAC, IoC, Port);
-
- /* Signal to RLMT */
- Para.Para32[0] = (SK_U32)Port;
- SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
-
- /* Start workaround Errata #2 timer */
- SkTimerStart(pAC, IoC, &pPrt->PWaTimer, SK_WA_INA_TIME,
- SKGE_HWAC, SK_HWEV_WATIM, Para);
- }
-
- if ((IStatus & XM_IS_RX_PAGE) != 0) {
- /* not used */
- }
-
- if ((IStatus & XM_IS_TX_PAGE) != 0) {
- /* not used */
- }
-
- if ((IStatus & XM_IS_AND) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("SkXmIrq: AND on link that is up Port %d\n", Port));
- }
-
- if ((IStatus & XM_IS_TSC_OV) != 0) {
- /* not used */
- }
-
- /* Combined Tx & Rx Counter Overflow SIRQ Event */
- if ((IStatus & (XM_IS_RXC_OV | XM_IS_TXC_OV)) != 0) {
- Para.Para32[0] = (SK_U32)Port;
- Para.Para32[1] = (SK_U32)IStatus;
- SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_SIRQ_OVERFLOW, Para);
- }
-
- if ((IStatus & XM_IS_RXF_OV) != 0) {
- /* normal situation -> no effect */
-#ifdef DEBUG
- pPrt->PRxOverCnt++;
-#endif /* DEBUG */
- }
-
- if ((IStatus & XM_IS_TXF_UR) != 0) {
- /* may NOT happen -> error log */
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E020, SKERR_SIRQ_E020MSG);
- }
-
- if ((IStatus & XM_IS_TX_COMP) != 0) {
- /* not served here */
- }
-
- if ((IStatus & XM_IS_RX_COMP) != 0) {
- /* not served here */
- }
-} /* SkXmIrq */
-
-
-/******************************************************************************
- *
- * SkGmIrq() - Interrupt Service Routine
- *
- * Description: services an Interrupt Request of the GMAC
- *
- * Note:
- *
- * Returns:
- * nothing
- */
-void SkGmIrq(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_EVPARA Para;
- SK_U8 IStatus; /* Interrupt status */
-
- pPrt = &pAC->GIni.GP[Port];
-
- SK_IN8(IoC, GMAC_IRQ_SRC, &IStatus);
-
- /* LinkPartner Auto-negable? */
- SkMacAutoNegLipaPhy(pAC, IoC, Port, IStatus);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
- ("GmacIrq Port %d Isr 0x%04x\n", Port, IStatus));
-
- /* Combined Tx & Rx Counter Overflow SIRQ Event */
- if (IStatus & (GM_IS_RX_CO_OV | GM_IS_TX_CO_OV)) {
- /* these IRQs will be cleared by reading GMACs register */
- Para.Para32[0] = (SK_U32)Port;
- Para.Para32[1] = (SK_U32)IStatus;
- SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_SIRQ_OVERFLOW, Para);
- }
-
- if (IStatus & GM_IS_RX_FF_OR) {
- /* clear GMAC Rx FIFO Overrun IRQ */
- SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_CLI_RX_FO);
-#ifdef DEBUG
- pPrt->PRxOverCnt++;
-#endif /* DEBUG */
- }
-
- if (IStatus & GM_IS_TX_FF_UR) {
- /* clear GMAC Tx FIFO Underrun IRQ */
- SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_CLI_TX_FU);
- /* may NOT happen -> error log */
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E020, SKERR_SIRQ_E020MSG);
- }
-
- if (IStatus & GM_IS_TX_COMPL) {
- /* not served here */
- }
-
- if (IStatus & GM_IS_RX_COMPL) {
- /* not served here */
- }
-} /* SkGmIrq */
-
-/******************************************************************************
- *
- * SkMacIrq() - Interrupt Service Routine for MAC
- *
- * Description: calls the Interrupt Service Routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacIrq(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
-
- if (pAC->GIni.GIGenesis) {
- /* IRQ from XMAC */
- SkXmIrq(pAC, IoC, Port);
- }
- else {
- /* IRQ from GMAC */
- SkGmIrq(pAC, IoC, Port);
- }
-} /* SkMacIrq */
-
-#endif /* !SK_DIAG */
-
-/******************************************************************************
- *
- * SkXmUpdateStats() - Force the XMAC to output the current statistic
- *
- * Description:
- * The XMAC holds its statistic internally. To obtain the current
- * values a command must be sent so that the statistic data will
- * be written to a predefined memory area on the adapter.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkXmUpdateStats(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port) /* Port Index (MAC_1 + n) */
-{
- SK_GEPORT *pPrt;
- SK_U16 StatReg;
- int WaitIndex;
-
- pPrt = &pAC->GIni.GP[Port];
- WaitIndex = 0;
-
- /* Send an update command to XMAC specified */
- XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_SNP_TXC | XM_SC_SNP_RXC);
-
- /*
- * It is an auto-clearing register. If the command bits
- * went to zero again, the statistics are transferred.
- * Normally the command should be executed immediately.
- * But just to be sure we execute a loop.
- */
- do {
-
- XM_IN16(IoC, Port, XM_STAT_CMD, &StatReg);
-
- if (++WaitIndex > 10) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E021, SKERR_HWI_E021MSG);
-
- return(1);
- }
- } while ((StatReg & (XM_SC_SNP_TXC | XM_SC_SNP_RXC)) != 0);
-
- return(0);
-} /* SkXmUpdateStats */
-
-/******************************************************************************
- *
- * SkGmUpdateStats() - Force the GMAC to output the current statistic
- *
- * Description:
- * Empty function for GMAC. Statistic data is accessible in direct way.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkGmUpdateStats(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port) /* Port Index (MAC_1 + n) */
-{
- return(0);
-}
-
-/******************************************************************************
- *
- * SkXmMacStatistic() - Get XMAC counter value
- *
- * Description:
- * Gets the 32bit counter value. Except for the octet counters
- * the lower 32bit are counted in hardware and the upper 32bit
- * must be counted in software by monitoring counter overflow interrupts.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkXmMacStatistic(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port, /* Port Index (MAC_1 + n) */
-SK_U16 StatAddr, /* MIB counter base address */
-SK_U32 *pVal) /* ptr to return statistic value */
-{
- if ((StatAddr < XM_TXF_OK) || (StatAddr > XM_RXF_MAX_SZ)) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E022, SKERR_HWI_E022MSG);
-
- return(1);
- }
-
- XM_IN32(IoC, Port, StatAddr, pVal);
-
- return(0);
-} /* SkXmMacStatistic */
-
-/******************************************************************************
- *
- * SkGmMacStatistic() - Get GMAC counter value
- *
- * Description:
- * Gets the 32bit counter value. Except for the octet counters
- * the lower 32bit are counted in hardware and the upper 32bit
- * must be counted in software by monitoring counter overflow interrupts.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkGmMacStatistic(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port, /* Port Index (MAC_1 + n) */
-SK_U16 StatAddr, /* MIB counter base address */
-SK_U32 *pVal) /* ptr to return statistic value */
-{
-
- if ((StatAddr < GM_RXF_UC_OK) || (StatAddr > GM_TXE_FIFO_UR)) {
-
- SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E022, SKERR_HWI_E022MSG);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("SkGmMacStat: wrong MIB counter 0x%04X\n", StatAddr));
- return(1);
- }
-
- GM_IN32(IoC, Port, StatAddr, pVal);
-
- return(0);
-} /* SkGmMacStatistic */
-
-/******************************************************************************
- *
- * SkXmResetCounter() - Clear MAC statistic counter
- *
- * Description:
- * Force the XMAC to clear its statistic counter.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkXmResetCounter(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port) /* Port Index (MAC_1 + n) */
-{
- XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
- /* Clear two times according to Errata #3 */
- XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
-
- return(0);
-} /* SkXmResetCounter */
-
-/******************************************************************************
- *
- * SkGmResetCounter() - Clear MAC statistic counter
- *
- * Description:
- * Force GMAC to clear its statistic counter.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkGmResetCounter(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port) /* Port Index (MAC_1 + n) */
-{
- SK_U16 Reg; /* Phy Address Register */
- SK_U16 Word;
- int i;
-
- GM_IN16(IoC, Port, GM_PHY_ADDR, &Reg);
-
-#ifndef VCPU
- /* set MIB Clear Counter Mode */
- GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg | GM_PAR_MIB_CLR);
-
- /* read all MIB Counters with Clear Mode set */
- for (i = 0; i < GM_MIB_CNT_SIZE; i++) {
- /* the reset is performed only when the lower 16 bits are read */
- GM_IN16(IoC, Port, GM_MIB_CNT_BASE + 8*i, &Word);
- }
-
- /* clear MIB Clear Counter Mode */
- GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg);
-#endif /* !VCPU */
-
- return(0);
-} /* SkGmResetCounter */
-
-/******************************************************************************
- *
- * SkXmOverflowStatus() - Gets the status of counter overflow interrupt
- *
- * Description:
- * Checks the source causing an counter overflow interrupt. On success the
- * resulting counter overflow status is written to <pStatus>, whereas the
- * upper dword stores the XMAC ReceiveCounterEvent register and the lower
- * dword the XMAC TransmitCounterEvent register.
- *
- * Note:
- * For XMAC the interrupt source is a self-clearing register, so the source
- * must be checked only once. SIRQ module does another check to be sure
- * that no interrupt get lost during process time.
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkXmOverflowStatus(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port, /* Port Index (MAC_1 + n) */
-SK_U16 IStatus, /* Interupt Status from MAC */
-SK_U64 *pStatus) /* ptr for return overflow status value */
-{
- SK_U64 Status; /* Overflow status */
- SK_U32 RegVal;
- SK_U32 *pRegVal = &RegVal;
-
- Status = 0;
-
- if ((IStatus & XM_IS_RXC_OV) != 0) {
-
- XM_IN32(IoC, Port, XM_RX_CNT_EV, pRegVal);
- Status |= (SK_U64)RegVal << 32;
- }
-
- if ((IStatus & XM_IS_TXC_OV) != 0) {
-
- XM_IN32(IoC, Port, XM_TX_CNT_EV, pRegVal);
- Status |= (SK_U64)RegVal;
- }
-
- *pStatus = Status;
-
- return(0);
-} /* SkXmOverflowStatus */
-
-
-/******************************************************************************
- *
- * SkGmOverflowStatus() - Gets the status of counter overflow interrupt
- *
- * Description:
- * Checks the source causing an counter overflow interrupt. On success the
- * resulting counter overflow status is written to <pStatus>, whereas the
- * the following bit coding is used:
- * 63:56 - unused
- * 55:48 - TxRx interrupt register bit7:0
- * 32:47 - Rx interrupt register
- * 31:24 - unused
- * 23:16 - TxRx interrupt register bit15:8
- * 15:0 - Tx interrupt register
- *
- * Returns:
- * 0: success
- * 1: something went wrong
- */
-int SkGmOverflowStatus(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-unsigned int Port, /* Port Index (MAC_1 + n) */
-SK_U16 IStatus, /* Interupt Status from MAC */
-SK_U64 *pStatus) /* ptr for return overflow status value */
-{
- SK_U64 Status; /* Overflow status */
- SK_U16 RegVal;
-
- Status = 0;
-
- if ((IStatus & GM_IS_RX_CO_OV) != 0) {
- /* this register is self-clearing after read */
- GM_IN16(IoC, Port, GM_RX_IRQ_SRC, &RegVal);
- Status |= (SK_U64)RegVal << 32;
- }
-
- if ((IStatus & GM_IS_TX_CO_OV) != 0) {
- /* this register is self-clearing after read */
- GM_IN16(IoC, Port, GM_TX_IRQ_SRC, &RegVal);
- Status |= (SK_U64)RegVal;
- }
-
- /* this register is self-clearing after read */
- GM_IN16(IoC, Port, GM_TR_IRQ_SRC, &RegVal);
- /* Rx overflow interrupt register bits (LoByte)*/
- Status |= (SK_U64)((SK_U8)RegVal) << 48;
- /* Tx overflow interrupt register bits (HiByte)*/
- Status |= (SK_U64)(RegVal >> 8) << 16;
-
- *pStatus = Status;
-
- return(0);
-} /* SkGmOverflowStatus */
-
-/******************************************************************************
- *
- * SkGmCableDiagStatus() - Starts / Gets status of cable diagnostic test
- *
- * Description:
- * starts the cable diagnostic test if 'StartTest' is true
- * gets the results if 'StartTest' is true
- *
- * NOTE: this test is meaningful only when link is down
- *
- * Returns:
- * 0: success
- * 1: no YUKON copper
- * 2: test in progress
- */
-int SkGmCableDiagStatus(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL StartTest) /* flag for start / get result */
-{
- int i;
- SK_U16 RegVal;
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
-
- return(1);
- }
-
- if (StartTest) {
- /* only start the cable test */
- if ((pPrt->PhyId1 & PHY_I1_REV_MSK) < 4) {
- /* apply TDR workaround from Marvell */
- SkGmPhyWrite(pAC, IoC, Port, 29, 0x001e);
-
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xcc00);
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xc800);
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xc400);
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xc000);
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xc100);
- }
-
- /* set address to 0 for MDI[0] */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0);
-
- /* Read Cable Diagnostic Reg */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
-
- /* start Cable Diagnostic Test */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CABLE_DIAG,
- (SK_U16)(RegVal | PHY_M_CABD_ENA_TEST));
-
- return(0);
- }
-
- /* Read Cable Diagnostic Reg */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
-
- SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
- ("PHY Cable Diag.=0x%04X\n", RegVal));
-
- if ((RegVal & PHY_M_CABD_ENA_TEST) != 0) {
- /* test is running */
- return(2);
- }
-
- /* get the test results */
- for (i = 0; i < 4; i++) {
- /* set address to i for MDI[i] */
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, (SK_U16)i);
-
- /* get Cable Diagnostic values */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
-
- pPrt->PMdiPairLen[i] = (SK_U8)(RegVal & PHY_M_CABD_DIST_MSK);
-
- pPrt->PMdiPairSts[i] = (SK_U8)((RegVal & PHY_M_CABD_STAT_MSK) >> 13);
- }
-
- return(0);
-} /* SkGmCableDiagStatus */
-
-/* End of file */
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _UBOOT_COMPAT_H__
-#define _UBOOT_COMPAT_H__
-
-
-#include <pci.h>
-#include <pci_ids.h>
-#include <common.h>
-#include <malloc.h>
-#include <net.h>
-
-#define __initdata
-#define __init
-#define __exit
-
-#define netif_stop_queue(x)
-#define netif_wake_queue(x)
-#define netif_running(x) 0
-#define unregister_netdev(x)
-#define remove_proc_entry(x,y)
-
-#define dev_addr enetaddr
-
-#define spin_lock_irqsave(x,y) y = 0;
-#define spin_lock_init(x)
-#define spin_lock(x)
-#define spin_unlock_irqrestore(x,y)
-#define spin_unlock(x)
-
-
-#define ENODEV 1
-#define EAGAIN 2
-#define EBUSY 3
-
-#define HZ CONFIG_SYS_HZ
-
-
-#define printk printf
-#define KERN_ERR
-#define KERN_WARNING
-#define KERN_INFO
-
-#define MOD_INC_USE_COUNT
-#define MOD_DEC_USE_COUNT
-
-
-#define kmalloc(x,y) malloc(x)
-#define kfree(x) free(x)
-#define GFP_ATOMIC 0
-
-#define pci_alloc_consistent(x,y,z) (void *)(*(dma_addr_t *)(z) = (dma_addr_t)malloc(y))
-#define pci_free_consistent(x,y,z,d) free(z)
-#define pci_dma_sync_single(x,y,z,d)
-#define pci_unmap_page(x,y,z,d)
-#define pci_unmap_single(x,y,z,d)
-#define pci_present() 1
-
-struct sk_buff
-{
- u8 * data;
- u32 len;
- u8 * data_unaligned;
-};
-
-struct sk_buff * alloc_skb(u32 size, int dummy);
-void dev_kfree_skb_any(struct sk_buff *skb);
-void skb_reserve(struct sk_buff *skb, unsigned int len);
-void skb_put(struct sk_buff *skb, unsigned int len);
-
-#define dev_kfree_skb dev_kfree_skb_any
-#define dev_kfree_skb_irq dev_kfree_skb_any
-
-#define eth_copy_and_sum(dest,src,len,base) memcpy(dest->data,src,len);
-
-
-#endif /* _UBOOT_COMPAT_H__ */
+++ /dev/null
-/*
- * Driver for SysKonnect Gigabit Ethernet Server Adapters.
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-
-#include "h/skdrv1st.h"
-#include "h/skdrv2nd.h"
-#include "u-boot_compat.h"
-
-
-#define SKGE_MAX_CARDS 2
-
-
-extern int skge_probe(struct eth_device **);
-extern void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
-extern void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
-extern int SkGeOpen(struct eth_device *);
-extern int SkGeClose(struct eth_device *);
-extern int SkGeXmit(struct sk_buff *skb, struct eth_device *dev);
-extern void ReceiveIrq(SK_AC *pAC, RX_PORT *pRxPort, SK_BOOL SlowPathLock);
-
-static int skge_init(struct eth_device *dev, bd_t * bis);
-static int skge_send(struct eth_device *dev, volatile void *packet, int length);
-static int skge_recv(struct eth_device *dev);
-static void skge_halt(struct eth_device *dev);
-
-int skge_initialize(bd_t * bis)
-{
- int numdev, i;
- struct eth_device *dev[SKGE_MAX_CARDS];
-
- numdev = skge_probe(&dev[0]);
-
- if (numdev > SKGE_MAX_CARDS)
- {
- printf("ERROR: numdev > SKGE_MAX_CARDS\n");
- }
-
- for (i = 0; i < numdev; i++)
- {
- sprintf (dev[i]->name, "SK98#%d", i);
-
- dev[i]->init = skge_init;
- dev[i]->halt = skge_halt;
- dev[i]->send = skge_send;
- dev[i]->recv = skge_recv;
-
- eth_register(dev[i]);
- }
-
- return ((numdev > 0) && (numdev <= SKGE_MAX_CARDS) ? 0 : -1);
-}
-
-
-static int skge_init(struct eth_device *dev, bd_t * bis)
-{
- int ret;
- SK_AC * pAC = ((DEV_NET*)dev->priv)->pAC;
- int i;
-
- ret = SkGeOpen(dev);
-
- while (pAC->Rlmt.Port[0].PortState != SK_RLMT_PS_GOING_UP)
- {
- SkGeIsrOnePort (0, pAC->dev[0], 0);
- }
-
- for (i = 0; i < 100; i ++)
- {
- udelay(1000);
- }
-
- return ret;
-}
-
-
-static void skge_halt(struct eth_device *dev)
-{
- SkGeClose(dev);
-}
-
-
-static int skge_send(struct eth_device *dev, volatile void *packet,
- int length)
-{
- int ret = -1;
- struct sk_buff * skb = alloc_skb(length, 0);
-
- if (! skb)
- {
- printf("skge_send: failed to alloc skb\n");
- goto Done;
- }
-
- memcpy(skb->data, (void*)packet, length);
- ret = SkGeXmit(skb, dev);
-
-Done:
- return ret;
-}
-
-
-static int skge_recv(struct eth_device *dev)
-{
- DEV_NET *pNet;
- SK_AC *pAC;
- int FromPort = 0;
-
- pNet = (DEV_NET*) dev->priv;
- pAC = pNet->pAC;
-
- ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
-
- return 0;
-}
+++ /dev/null
-/*
- * Definitions for the 'struct sk_buff' memory handlers in U-Boot.
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include "u-boot_compat.h"
-
-#define MAX_SKB 50
-
-static struct sk_buff *sk_table[MAX_SKB];
-
-
-struct sk_buff * alloc_skb(u32 size, int dummy)
-{
- int i;
- struct sk_buff * ret = NULL;
-
- for (i = 0; i < MAX_SKB; i++)
- {
- if (sk_table[i])
- {
- /* Already allocated.
- */
- continue;
- }
-
- sk_table[i] = malloc(sizeof(struct sk_buff));
- if (! sk_table[i])
- {
- printf("alloc_skb: malloc failed\n");
- break;
- }
-
- memset(sk_table[i], 0, sizeof(struct sk_buff));
- sk_table[i]->data = sk_table[i]->data_unaligned =
- malloc(size + 16);
- if (! sk_table[i]->data)
- {
- printf("alloc_skb: malloc failed\n");
- free(sk_table[i]);
- sk_table[i] = NULL;
- break;
- }
-
- sk_table[i]->data += 16 - ((u32)sk_table[i]->data & 15);
- sk_table[i]->len = size;
-
- break;
- }
-
- if (i < MAX_SKB)
- {
- ret = sk_table[i];
- }
-
- if (! ret)
- {
- printf("Unable to allocate skb!\n");
- }
-
- return ret;
-}
-
-void dev_kfree_skb_any(struct sk_buff *skb)
-{
- int i;
-
- for (i = 0; i < MAX_SKB; i++)
- {
- if (sk_table[i] != skb)
- {
- continue;
- }
-
- free(skb->data_unaligned);
- free(skb);
- sk_table[i] = NULL;
- break;
- }
-
- if (i == MAX_SKB)
- {
- printf("SKB allocation error!\n");
- }
-}
-
-void skb_reserve(struct sk_buff *skb, unsigned int len)
-{
- skb->data+=len;
-}
-
-void skb_put(struct sk_buff *skb, unsigned int len)
-{
- skb->len+=len;
-}
pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
- for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_5; bar += 4) {
+ for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) {
pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
pci_hose_read_config_dword (hose, dev, bar, &bar_response);
#define DA8XX_USB_VBUS_GPIO (1 << 15)
#endif /* __DA8XX_MUSB_H__ */
-
int musb_platform_init(void);
#endif /* _MUSB_OMAP3_H */
-
#define CURSOR_ON
#define CURSOR_OFF
#define CURSOR_SET video_set_hw_cursor(console_col * VIDEO_FONT_WIDTH, \
- (console_row * VIDEO_FONT_HEIGHT) + VIDEO_LOGO_HEIGHT);
+ (console_row * VIDEO_FONT_HEIGHT) + video_logo_height);
#endif /* CONFIG_VIDEO_HW_CURSOR */
#ifdef CONFIG_VIDEO_LOGO
#define VIDEO_BURST_LEN (VIDEO_COLS/8)
#ifdef CONFIG_VIDEO_LOGO
-#define CONSOLE_ROWS ((VIDEO_ROWS - VIDEO_LOGO_HEIGHT) / VIDEO_FONT_HEIGHT)
+#define CONSOLE_ROWS ((VIDEO_ROWS - video_logo_height) / VIDEO_FONT_HEIGHT)
#else
#define CONSOLE_ROWS (VIDEO_ROWS / VIDEO_FONT_HEIGHT)
#endif
static void *video_fb_address; /* frame buffer address */
static void *video_console_address; /* console buffer start address */
+static int video_logo_height = VIDEO_LOGO_HEIGHT;
+
static int console_col = 0; /* cursor col */
static int console_row = 0; /* cursor row */
static void video_putchar (int xx, int yy, unsigned char c)
{
- video_drawchars (xx, yy + VIDEO_LOGO_HEIGHT, &c, 1);
+ video_drawchars (xx, yy + video_logo_height, &c, 1);
}
/*****************************************************************************/
#ifdef VIDEO_HW_BITBLT
video_hw_bitblt (VIDEO_PIXEL_SIZE, /* bytes per pixel */
0, /* source pos x */
- VIDEO_LOGO_HEIGHT + VIDEO_FONT_HEIGHT, /* source pos y */
+ video_logo_height + VIDEO_FONT_HEIGHT, /* source pos y */
0, /* dest pos x */
- VIDEO_LOGO_HEIGHT, /* dest pos y */
+ video_logo_height, /* dest pos y */
VIDEO_VISIBLE_COLS, /* frame width */
- VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT - VIDEO_FONT_HEIGHT /* frame height */
+ VIDEO_VISIBLE_ROWS - video_logo_height - VIDEO_FONT_HEIGHT /* frame height */
);
#else
memcpyl (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND,
int xcount, i;
int skip = (width - VIDEO_LOGO_WIDTH) * VIDEO_PIXEL_SIZE;
- int ycount = VIDEO_LOGO_HEIGHT;
+ int ycount = video_logo_height;
unsigned char r, g, b, *logo_red, *logo_blue, *logo_green;
unsigned char *source;
unsigned char *dest = (unsigned char *)screen +
#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
if (video_display_bitmap (addr, x, y) == 0) {
+ video_logo_height = 0;
return ((void *) (video_fb_address));
}
}
#ifdef CONFIG_CONSOLE_EXTRA_INFO
{
- int i, n = ((VIDEO_LOGO_HEIGHT - VIDEO_FONT_HEIGHT) / VIDEO_FONT_HEIGHT);
+ int i, n = ((video_logo_height - VIDEO_FONT_HEIGHT) / VIDEO_FONT_HEIGHT);
for (i = 1; i < n; i++) {
video_get_info_str (i, info);
}
#endif
- return (video_fb_address + VIDEO_LOGO_HEIGHT * VIDEO_LINE_LEN);
+ return (video_fb_address + video_logo_height * VIDEO_LINE_LEN);
}
#endif
/82559_eeprom
/atmel_df_pow2
+/eepro100_eeprom
/hello_world
/interrupt
/mem_to_mem_idma2intr
-/test_burst
-/timer
/sched
/smc91111_eeprom
/smc911x_eeprom
+/test_burst
+/timer
*.bin
*.srec
*/
/* avoid unnecessary memcpy function */
-#define __HAVE_ARCH_MEMCPY
#define _PPC_STRING_H_
#include <common.h>
return swap16(*(volatile short *)(addr));
}
-static inline void *memcpy(void *dst, const void *src, unsigned int len)
+void *memcpy(void *dst, const void *src, unsigned int len)
{
char *ret = dst;
while (len-- > 0) {
#define CONFIG_FTRTC010_BASE 0x98600000 /* Real Time Clock*/
#endif /* __A320_H */
-
u32 mrcr; /* 0x100 Master Remap Control */
u32 reserve4[3];
#if defined(CONFIG_AT91SAM9G45)
- u32 ccr[52] /* 0x110 - 0x1E0 Chip Configuration */
+ u32 ccr[52]; /* 0x110 - 0x1E0 Chip Configuration */
u32 womr; /* 0x1E4 Write Protect Mode */
u32 wpsr; /* 0x1E8 Write Protect Status */
u32 resg45_1[10];
--- /dev/null
+#include <asm-generic/unaligned.h>
--- /dev/null
+#ifndef _GENERIC_UNALIGNED_H
+#define _GENERIC_UNALIGNED_H
+
+#include <asm/byteorder.h>
+
+#include <linux/unaligned/le_byteshift.h>
+#include <linux/unaligned/be_byteshift.h>
+#include <linux/unaligned/generic.h>
+
+/*
+ * Select endianness
+ */
+#if defined(__LITTLE_ENDIAN)
+#define get_unaligned __get_unaligned_le
+#define put_unaligned __put_unaligned_le
+#elif defined(__BIG_ENDIAN)
+#define get_unaligned __get_unaligned_be
+#define put_unaligned __put_unaligned_be
+#else
+#error invalid endian
+#endif
+
+#endif
--- /dev/null
+#ifndef _ASM_NIOS2_UNALIGNED_H
+#define _ASM_NIOS2_UNALIGNED_H
+
+#include <asm-generic/unaligned.h>
+
+#endif /* _ASM_NIOS2_UNALIGNED_H */
defined(CONFIG_SANDPOINT)
void * console_addr;
#endif
-#ifdef CONFIG_AMIGAONEG3SE
unsigned long relocaddr; /* Start address of U-Boot in RAM */
-#endif
#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
unsigned long fb_base; /* Base address of framebuffer memory */
#endif
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_SCC1_ENET
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
/* #define CONFIG_ETHPRIME "FEC ETHERNET" */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-/* new uImage format support */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
-
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
+++ /dev/null
-/*
- * (C) Copyright 2001 - 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* ------------------------------------------------------------------------- */
-/*
- * Configuration settings for the SL8245 board.
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC824X 1
-#define CONFIG_MPC8245 1
-#define CONFIG_SL8245 1
-
-
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#define CONFIG_BOOTDELAY 5
-
-#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PCI
-
-
-/*
- * Miscellaneous configurable options
- */
-#undef CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-
-/* Print Buffer Size
- */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR 0x00400000 /* Default load address */
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-
-#define CONFIG_SYS_FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank on RCS#0 */
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH_BASE0_PRELIM
-#define CONFIG_SYS_FLASH_BANKS { CONFIG_SYS_FLASH_BASE0_PRELIM }
-
-#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-
-#define CONFIG_SYS_EUMB_ADDR 0xFC000000
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
-
-#define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
-
- /* Maximum amount of RAM.
- */
-#define CONFIG_SYS_MAX_RAM_SIZE 0x10000000 /* 0 .. 256 MB of (S)DRAM */
-
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-#undef CONFIG_SYS_RAMBOOT
-#else
-#define CONFIG_SYS_RAMBOOT
-#endif
-
-/*
- * NS16550 Configuration
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-
-#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-
-#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4500)
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area
- */
-
-#define CONFIG_SYS_GBL_DATA_SIZE 128
-#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
-#define CONFIG_SYS_INIT_RAM_END 0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- * For the detail description refer to the MPC8240 user's manual.
- */
-
-#define CONFIG_SYS_CLK_FREQ 66666666 /* external frequency to pll */
-#define CONFIG_SYS_HZ 1000
-
- /* Bit-field values for MCCR1.
- */
-#define CONFIG_SYS_ROMNAL 0
-#define CONFIG_SYS_ROMFAL 7
-#define CONFIG_SYS_BANK0_ROW 2
-
- /* Bit-field values for MCCR2.
- */
-#define CONFIG_SYS_REFINT 0x400 /* Refresh interval FIXME: was 0t430 */
-
- /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
- */
-#define CONFIG_SYS_BSTOPRE 192
-
- /* Bit-field values for MCCR3.
- */
-#define CONFIG_SYS_REFREC 2 /* Refresh to activate interval */
-
- /* Bit-field values for MCCR4.
- */
-#define CONFIG_SYS_PRETOACT 2 /* Precharge to activate interval */
-#define CONFIG_SYS_ACTTOPRE 5 /* Activate to Precharge interval */
-#define CONFIG_SYS_ACTORW 3 /* FIXME was 2 */
-#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* SDMODE CAS latancy */
-#define CONFIG_SYS_SDMODE_WRAP 0 /* SDMODE wrap type */
-#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
-#define CONFIG_SYS_EXTROM 1
-#define CONFIG_SYS_REGDIMM 0
-
-#define CONFIG_SYS_ODCR 0xff /* configures line driver impedances, */
- /* see 8245 book for bit definitions */
-#define CONFIG_SYS_PGMAX 0x32 /* how long the 8245 retains the */
- /* currently accessed page in memory */
- /* see 8245 book for details */
-
-/* Memory bank settings.
- * Only bits 20-29 are actually used from these vales to set the
- * start/end addresses. The upper two bits will always be 0, and the lower
- * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
- * address. Refer to the MPC8240 book.
- */
-
-#define CONFIG_SYS_BANK0_START 0x00000000
-#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
-#define CONFIG_SYS_BANK0_ENABLE 1
-#define CONFIG_SYS_BANK1_START 0x3ff00000
-#define CONFIG_SYS_BANK1_END 0x3fffffff
-#define CONFIG_SYS_BANK1_ENABLE 0
-#define CONFIG_SYS_BANK2_START 0x3ff00000
-#define CONFIG_SYS_BANK2_END 0x3fffffff
-#define CONFIG_SYS_BANK2_ENABLE 0
-#define CONFIG_SYS_BANK3_START 0x3ff00000
-#define CONFIG_SYS_BANK3_END 0x3fffffff
-#define CONFIG_SYS_BANK3_ENABLE 0
-#define CONFIG_SYS_BANK4_START 0x3ff00000
-#define CONFIG_SYS_BANK4_END 0x3fffffff
-#define CONFIG_SYS_BANK4_ENABLE 0
-#define CONFIG_SYS_BANK5_START 0x3ff00000
-#define CONFIG_SYS_BANK5_END 0x3fffffff
-#define CONFIG_SYS_BANK5_ENABLE 0
-#define CONFIG_SYS_BANK6_START 0x3ff00000
-#define CONFIG_SYS_BANK6_END 0x3fffffff
-#define CONFIG_SYS_BANK6_ENABLE 0
-#define CONFIG_SYS_BANK7_START 0x3ff00000
-#define CONFIG_SYS_BANK7_END 0x3fffffff
-#define CONFIG_SYS_BANK7_ENABLE 0
-
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 35 /* Max number of sectors per flash */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-
- /* Warining: environment is not EMBEDDED in the U-Boot code.
- * It's stored in flash separately.
- */
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_ADDR 0xFFFF0000
-#define CONFIG_ENV_SIZE 0x00010000 /* Size of the Environment */
-#define CONFIG_ENV_SECT_SIZE 0x00010000 /* Size of the Environment Sector */
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 32
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_PCI
-#define CONFIG_PCI_PNP
-#undef CONFIG_PCI_SCAN_SHOW
-
-
-#define CONFIG_SK98
-#define CONFIG_NET_MULTI
-
-
-#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_NET_RETRY_COUNT 3
#define CONFIG_ETHPRIME "FEC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
#define CONFIG_ETHPRIME "SCC ETHERNET"
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
/* End of used area in DPRAM */
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
-
-
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE 128
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1...15 MB in DRAM */
OR_SCY_2_CLK)
#define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_PERIPHERAL_BASE & BR_BA_MSK) | BR_PS_8 | BR_V)
#define PCMCIA_CTRL (CONFIG_SYS_PERIPHERAL_BASE + 0xB00)
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_HWCONFIG 1
+
#endif /* __CONFIG_H */
--- /dev/null
+/*
+ * (C) Copyright 2006, Imagos S.a.s <www.imagos.it>
+ * Renato Andreola <renato.andreola@imagos.it>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*************************************************************************
+ * Altera NiosII YANU serial interface by Imagos
+ * please see http://www.opencores.org/project,yanu for
+ * information/downloads
+ ************************************************************************/
+
+#ifndef __NIOS2_YANU_H__
+#define __NIOS2_YANU_H__
+
+#define YANU_MAX_PRESCALER_N ((1 << 4) - 1) /* 15 */
+#define YANU_MAX_PRESCALER_M ((1 << 11) -1) /* 2047 */
+#define YANU_FIFO_SIZE (16)
+#define YANU_RXFIFO_SIZE (YANU_FIFO_SIZE)
+#define YANU_TXFIFO_SIZE (YANU_FIFO_SIZE)
+
+#define YANU_RXFIFO_DLY (10*11)
+#define YANU_TXFIFO_THR (10)
+#define YANU_DATA_CHAR_MASK (0xFF)
+
+/* data register */
+#define YANU_DATA_OFFSET (0) /* data register offset */
+
+#define YANU_CONTROL_OFFSET (4) /* control register offset */
+/* interrupt enable */
+#define YANU_CONTROL_IE_RRDY (1<<0) /* ie on received character ready */
+#define YANU_CONTROL_IE_OE (1<<1) /* ie on rx overrun */
+#define YANU_CONTROL_IE_BRK (1<<2) /* ie on break detect */
+#define YANU_CONTROL_IE_FE (1<<3) /* ie on framing error */
+#define YANU_CONTROL_IE_PE (1<<4) /* ie on parity error */
+#define YANU_CONTROL_IE_TRDY (1<<5) /* ie interrupt on tranmitter ready */
+/* control bits */
+#define YANU_CONTROL_BITS_POS (6) /* bits number pos */
+#define YANU_CONTROL_BITS (1<<YANU_CONTROL_BITS_POS) /* number of rx/tx bits per word. 3 bit unsigned integer */
+#define YANU_CONTROL_BITS_N (3) /* ... its bit filed length */
+#define YANU_CONTROL_PARENA (1<<9) /* enable parity bit transmission/reception */
+#define YANU_CONTROL_PAREVEN (1<<10) /* parity even */
+#define YANU_CONTROL_STOPS (1<<11) /* number of stop bits */
+#define YANU_CONTROL_HHENA (1<<12) /* Harware Handshake enable... */
+#define YANU_CONTROL_FORCEBRK (1<<13) /* if set than txd = active (0) */
+/* tuning part */
+#define YANU_CONTROL_RDYDLY (1<<14) /* delay from "first" before setting rrdy (in bit) */
+#define YANU_CONTROL_RDYDLY_N (8) /* ... its bit filed length */
+#define YANU_CONTROL_TXTHR (1<<22) /* tx interrupt threshold: the trdy set if txfifo_chars<= txthr (chars) */
+#define YANU_CONTROL_TXTHR_N (4) /* ... its bit field length */
+
+#define YANU_BAUD_OFFSET (8) /* baud register offset */
+#define YANU_BAUDM (1<<0) /* baud mantissa lsb */
+#define YANU_BAUDM_N (12) /* ...its bit filed length */
+#define YANU_BAUDE (1<<12) /* baud exponent lsb */
+#define YANU_BAUDE_N (4) /* ...its bit field length */
+
+#define YANU_ACTION_OFFSET (12) /* action register... write only */
+#define YANU_ACTION_RRRDY (1<<0) /* reset rrdy */
+#define YANU_ACTION_ROE (1<<1) /* reset oe */
+#define YANU_ACTION_RBRK (1<<2) /* reset brk */
+#define YANU_ACTION_RFE (1<<3) /* reset fe */
+#define YANU_ACTION_RPE (1<<4) /* reset pe */
+#define YANU_ACTION_SRRDY (1<<5) /* set rrdy */
+#define YANU_ACTION_SOE (1<<6) /* set oe */
+#define YANU_ACTION_SBRK (1<<7) /* set brk */
+#define YANU_ACTION_SFE (1<<8) /* set fe */
+#define YANU_ACTION_SPE (1<<9) /* set pe */
+#define YANU_ACTION_RFIFO_PULL (1<<10) /* pull a char from rx fifo we MUST do it before taking a char */
+#define YANU_ACTION_RFIFO_CLEAR (1<<11) /* clear rx fifo */
+#define YANU_ACTION_TFIFO_CLEAR (1<<12) /* clear tx fifo */
+#define YANU_ACTION_RTRDY (1<<13) /* clear trdy */
+#define YANU_ACTION_STRDY (1<<14) /* set trdy */
+
+#define YANU_STATUS_OFFSET (16)
+#define YANU_STATUS_RRDY (1<<0) /* rxrdy flag */
+#define YANU_STATUS_TRDY (1<<1) /* txrdy flag */
+#define YANU_STATUS_OE (1<<2) /* rx overrun error */
+#define YANU_STATUS_BRK (1<<3) /* rx break detect flag */
+#define YANU_STATUS_FE (1<<4) /* rx framing error flag */
+#define YANU_STATUS_PE (1<<5) /* rx parity erro flag */
+#define YANU_RFIFO_CHARS_POS (6)
+#define YANU_RFIFO_CHARS (1<<RFIFO_CHAR_POS) /* number of chars into rx fifo */
+#define YANU_RFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */
+#define YANU_TFIFO_CHARS_POS (11)
+#define YANU_TFIFO_CHARS (1<<TFIFO_CHAR_POS) /* number of chars into tx fifo */
+#define YANU_TFIFO_CHARS_N (5) /* ...its bit field length: 32 chars */
+
+typedef volatile struct yanu_uart_t {
+ volatile unsigned data;
+ volatile unsigned control; /* control register (RW) 32-bit */
+ volatile unsigned baud; /* baud/prescaler register (RW) 32-bit */
+ volatile unsigned action; /* action register (W) 32-bit */
+ volatile unsigned status; /* status register (R) 32-bit */
+ volatile unsigned magic; /* magic register (R) 32-bit */
+} yanu_uart_t;
+
+#endif
#define PCA_CON_CR 0x07 /* Clock Rate (MASK) */
#endif
-
#endif /* CONFIG_USB_TTY */
#endif /* __MUSB_UDC_H__ */
-
#endif
/* ========================================================================= */
-# ifdef __LITTLE_ENDIAN
+# if __BYTE_ORDER == __LITTLE_ENDIAN
# define DO_CRC(x) crc = tab[(crc ^ (x)) & 255] ^ (crc >> 8)
# else
# define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
-#ifdef CONFIG_AMIGAONEG3SE
- gd->relocaddr = addr;
-#endif
-
/*
* reserve memory for malloc() arena
*/
WATCHDOG_RESET();
+ gd->relocaddr = addr; /* Record relocation address, useful for debug */
+
memcpy (id, (void *)gd, sizeof (gd_t));
relocate_code (addr_sp, id, addr);
pkt += 5 /*strlen("octet")*/ + 1;
strcpy ((char *)pkt, "timeout");
pkt += 7 /*strlen("timeout")*/ + 1;
- sprintf((char *)pkt, "%lu", TIMEOUT / 1000);
+ sprintf((char *)pkt, "%lu", TftpTimeoutMSecs / 1000);
debug("send option \"timeout %s\"\n", (char *)pkt);
pkt += strlen((char *)pkt) + 1;
#ifdef CONFIG_TFTP_TSIZE
}
TftpLastBlock = TftpBlock;
- TftpTimeoutMSecs = TIMEOUT;
TftpTimeoutCountMax = TIMEOUT_COUNT;
NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
{
char *ep; /* Environment pointer */
- /* Allow the user to choose tftpblocksize */
+ /*
+ * Allow the user to choose TFTP blocksize and timeout.
+ * TFTP protocol has a minimal timeout of 1 second.
+ */
if ((ep = getenv("tftpblocksize")) != NULL)
TftpBlkSizeOption = simple_strtol(ep, NULL, 10);
- debug("tftp block size is %i\n", TftpBlkSizeOption);
+
+ if ((ep = getenv("tftptimeout")) != NULL)
+ TftpTimeoutMSecs = simple_strtol(ep, NULL, 10);
+
+ if (TftpTimeoutMSecs < 1000) {
+ printf("TFTP timeout (%ld ms) too low, "
+ "set minimum = 1000 ms\n",
+ TftpTimeoutMSecs);
+ TftpTimeoutMSecs = 1000;
+ }
+
+ debug("TFTP blocksize = %i, timeout = %ld ms\n",
+ TftpBlkSizeOption, TftpTimeoutMSecs);
TftpServerIP = NetServerIP;
if (BootFile[0] == '\0') {
puts ("Loading: *\b");
- TftpTimeoutMSecs = TftpRRQTimeoutMSecs;
TftpTimeoutCountMax = TftpRRQTimeoutCountMax;
NetSetTimeout (TftpTimeoutMSecs, TftpTimeout);
params.ep += tparams->header_size;
}
- /*
- * If XIP, ensure the entry point is equal to the load address plus
- * the size of the U-Boot header.
- */
- if (params.xflag) {
- if (params.ep != params.addr + tparams->header_size) {
- fprintf (stderr,
- "%s: For XIP, the entry point must be the load addr + %lu\n",
- params.cmdname,
- (unsigned long)tparams->header_size);
- exit (EXIT_FAILURE);
- }
- }
-
params.imagefile = *argv;
if (params.fflag){
projects / oweals / u-boot.git / commitdiff