armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index f75bd391e39b9109fba9fbe6ef83f31f1b5206ee..8d12d6cb93fa6137e9380e1000e52c69522907d8 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -129,6 +129,8 @@
 #define DCFG_PORSR1_RCW_SRC_NOR                0x12f00000
 #define DCFG_RCWSR13                   0x130
 #define DCFG_RCWSR13_DSPI              (0 << 8)
+#define DCFG_RCWSR15                   0x138
+#define DCFG_RCWSR15_IFCGRPABASE_QSPI  0x3
 
 #define DCFG_DCSR_BASE         0X700100000ULL
 #define DCFG_DCSR_PORCR1               0x000

diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index a07cd0a54e8dcaf6b351a96e2814493640d2b376..694b28b13ca1cbda8a1ed701eb1e7de2589a3860 100644 (file)
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -208,6 +208,15 @@ int board_init(void)
        else
                config_board_mux(MUX_TYPE_SDHC);
 
+#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+       val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
+
+       if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
+               QIXIS_WRITE(brdcfg[9],
+                           (QIXIS_READ(brdcfg[9]) & 0xf8) |
+                            FSL_QIXIS_BRDCFG9_QSPI);
+#endif
+
 #ifdef CONFIG_ENV_IS_NOWHERE
        gd->env_addr = (ulong)&default_environment[0];
 #endif

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b15acf390017a2aed1d6f3058d7ef7669a468d5d..9741be1b7b7507f2d81ae8a721751a69f23891ba 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -303,6 +303,12 @@ unsigned long get_board_ddr_clk(void);
 #define FSL_QSPI_FLASH_SIZE            (1 << 26) /* 64MB */
 #define FSL_QSPI_FLASH_NUM             4
 #endif
+/*
+ * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
+ * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
+ * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1
+ */
+#define FSL_QIXIS_BRDCFG9_QSPI         0x1
 
 #endif