MPC8349EMDS: Add PCI Agent (PCISLAVE) support

Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 9a312c37b67af0283c6bacb42bdc01c833668162..4c04f2c4dda1f46aeb56de255bc731fe62f92f12 100644 (file)
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -165,6 +165,15 @@ int fixed_sdram(void)
 
 int checkboard (void)
 {
+       /*
+        * Warning: do not read the BCSR registers here
+        *
+        * There is a timing bug in the 8349E and 8349EA BCSR code
+        * version 1.2 (read from BCSR 11) that will cause the CFI
+        * flash initialization code to overwrite BCSR 0, disabling
+        * the serial ports and gigabit ethernet
+        */
+
        puts("Board: Freescale MPC8349EMDS\n");
        return 0;
 }

diff --git a/board/freescale/mpc8349emds/pci.c b/board/freescale/mpc8349emds/pci.c
index a783bebad32a05fa3360d5d60d02b71de014c7da..9c19e303f9634d6955e457c006fafadf796a9361 100644 (file)
--- a/board/freescale/mpc8349emds/pci.c
+++ b/board/freescale/mpc8349emds/pci.c
@@ -75,6 +75,7 @@ static struct pci_region pci2_regions[] = {
 };
 #endif
 
+#ifndef CONFIG_PCISLAVE
 void pib_init(void)
 {
        u8 val8, orig_i2c_bus;
@@ -166,4 +167,52 @@ void pci_init_board(void)
 #endif
 }
 
+#else
+void pci_init_board(void)
+{
+       volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+       volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
+       volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
+       volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
+       struct pci_region *reg[] = { pci1_regions };
+
+       /* Enable all 8 PCI_CLK_OUTPUTS */
+       clk->occr = 0xff000000;
+       udelay(2000);
+
+       /* Configure PCI Local Access Windows */
+       pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+       pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
+
+       pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+       pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
+
+       udelay(2000);
+
+       mpc83xx_pci_init(1, reg, 0);
+
+       /* Configure PCI Inbound Translation Windows (3 1MB windows) */
+       pci_ctrl->pitar0 = 0x0;
+       pci_ctrl->pibar0 = 0x0;
+       pci_ctrl->piwar0 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+                          PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
+
+       pci_ctrl->pitar1  = 0x0;
+       pci_ctrl->pibar1  = 0x0;
+       pci_ctrl->piebar1 = 0x0;
+       pci_ctrl->piwar1  = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+                           PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
+
+       pci_ctrl->pitar2  = 0x0;
+       pci_ctrl->pibar2  = 0x0;
+       pci_ctrl->piebar2 = 0x0;
+       pci_ctrl->piwar2  = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+                           PIWAR_WTT_SNOOP | PIWAR_IWS_1M;
+
+       /* Unlock the configuration bit */
+       mpc83xx_pcislave_unlock(0);
+       printf("PCI:   Agent mode enabled\n");
+}
+#endif /* CONFIG_PCISLAVE */
+
 #endif /* CONFIG_PCI */

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index d659a15b6d3dfd43c74eba76a7df6ddb70682c7f..c8870b54ae10a02835e6ad22f1032d92aa44afd7 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -48,6 +48,11 @@
 #define CONFIG_83XX_CLKIN      33000000        /* in Hz */
 #endif
 
+#ifdef CONFIG_PCISLAVE
+#define CONFIG_PCI
+#define CONFIG_83XX_PCICLK     66666666        /* in Hz */
+#endif /* CONFIG_PCISLAVE */
+
 #ifndef CONFIG_SYS_CLK_FREQ
 #ifdef PCI_66M
 #define CONFIG_SYS_CLK_FREQ    66000000
@@ -575,6 +580,20 @@
        HRCWL_CORE_TO_CSB_1X1)
 #endif
 
+#ifdef CONFIG_PCISLAVE
+#define CFG_HRCW_HIGH (\
+       HRCWH_PCI_AGENT |\
+       HRCWH_64_BIT_PCI |\
+       HRCWH_PCI1_ARBITER_DISABLE |\
+       HRCWH_PCI2_ARBITER_DISABLE |\
+       HRCWH_CORE_ENABLE |\
+       HRCWH_FROM_0X00000100 |\
+       HRCWH_BOOTSEQ_DISABLE |\
+       HRCWH_SW_WATCHDOG_DISABLE |\
+       HRCWH_ROM_LOC_LOCAL_16BIT |\
+       HRCWH_TSEC1M_IN_GMII |\
+       HRCWH_TSEC2M_IN_GMII )
+#else
 #if defined(PCI_64BIT)
 #define CFG_HRCW_HIGH (\
        HRCWH_PCI_HOST |\
@@ -601,7 +620,8 @@
        HRCWH_ROM_LOC_LOCAL_16BIT |\
        HRCWH_TSEC1M_IN_GMII |\
        HRCWH_TSEC2M_IN_GMII )
-#endif
+#endif /* PCI_64BIT */
+#endif /* CONFIG_PCISLAVE */
 
 /*
  * System performance