ARM: omap: move board specific NAND configs out from ti_armv7_common.h
authorpekon gupta <pekon@ti.com>
Fri, 18 Jul 2014 12:29:42 +0000 (17:59 +0530)
committerTom Rini <trini@ti.com>
Fri, 25 Jul 2014 20:26:12 +0000 (16:26 -0400)
This patch moves some board specific NAND configs:
- FROM: generic config file 'ti_armv7_common.h'
- TO:   individual board config files using these configs.
So that each board can independently set the value as per its design.

Following configs are affected in this patch:
  CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand>
  CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon>
  CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon>
  CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon>

This patch also updates documentation for few of above NAND configs.

Signed-off-by: Pekon Gupta <pekon@ti.com>
doc/README.nand
include/configs/am335x_evm.h
include/configs/cm_t335.h
include/configs/omap3_beagle.h
include/configs/omap3_igep00x0.h
include/configs/omap3_overo.h
include/configs/omap3_zoom1.h
include/configs/pengwyn.h
include/configs/ti_armv7_common.h

index 70cf768d237056460e0bd1261a3bb0c980c4dc30..e29188f1ec0cd4dd97a38ddb4bb7ed85645f83fe 100644 (file)
@@ -89,6 +89,10 @@ Commands:
 
 Configuration Options:
 
+   CONFIG_SYS_NAND_U_BOOT_OFFS
+       NAND Offset from where SPL will read u-boot image. This is the starting
+       address of u-boot MTD partition in NAND.
+
    CONFIG_CMD_NAND
       Enables NAND support and commmands.
 
@@ -226,6 +230,14 @@ Platform specific options
        detection. However ECC calculation on such plaforms would still be
        done by GPMC controller.
 
+   CONFIG_SPL_NAND_AM33XX_BCH
+       Enables SPL-NAND driver (am335x_spl_bch.c) which supports ELM based
+        hardware ECC correction. This is useful for platforms which have ELM
+       hardware engine and use NAND boot mode.
+       Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+       so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+        SPL-NAND driver with software ECC correction support.
+
    CONFIG_NAND_OMAP_ECCSCHEME
        On OMAP platforms, this CONFIG specifies NAND ECC scheme.
        It can take following values:
index c1a6ada0a87404f3bed8e5c818542fdf3c25ffa1..f5bfd5d627b383ec8034d544aac0933089d8b6c6 100644 (file)
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS        0x00080000 /* os parameters */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x00200000 /* kernel offset */
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 #endif
 #endif
 
index 4d1dd28a9150105da2b4825be5e374d01b71ded6..a3e6452ec1d5142d26c13b2f6f6351e9cdf31b95 100644 (file)
 #define CONFIG_ENV_OFFSET              0x300000 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
 #define CONFIG_SYS_NAND_ONFI_DETECTION
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x400000 /* un-assigned: (using dtb) */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x500000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 
 /* GPIO pin + bank to pin ID mapping */
 #define GPIO_PIN(_bank, _pin)          ((_bank << 5) + _pin)
index e951389d3b5e05a7c94e37907ee6b7def995b407..fe0799064046e0ecf4de50324e72bc86efade393 100644 (file)
 #define CONFIG_SYS_NAND_ECCBYTES       3
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 
 #endif /* __CONFIG_H */
index 0bb79ab6b5cb1278b0cd547e2e6b31e1d20d4288..006c9a9c0daa29422af9485ad0b7ab1c69f29081 100644 (file)
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 #endif
 
 #endif /* __IGEP00X0_H */
index 38f8dabb2d314889dac69980fd516b9d4745627e..e66f30655d67d864a79bcf1f1f21fdffc8c637da 100644 (file)
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 
 #endif                         /* __CONFIG_H */
index 236281aa0f6737304c44086de48cbe851e8ed66e..93f4d627a14d45a4a6daf2c1f20865a6fb57c17f 100644 (file)
                                        "4m(kernel),-(fs)"
 
 #if defined(CONFIG_CMD_NAND)
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
 #endif
 
index 85104057a96465bc38befb75e03763f5aa5e61ae..4684ad68522fc731d84cdcdd32aae8c7bde4705a 100644 (file)
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET              0x260000 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000 /* un-assigned */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 
 /*
  * USB configuration.  We enable MUSB support, both for host and for
index 6e0bf090588ada998ac184c8da3bbf8718ec5053..85c027c1d27ebce2a8f6f96adad22f684391b679 100644 (file)
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x80    /* address 0x10000 */
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80    /* 64KiB */
 
-/* NAND */
-#ifdef CONFIG_NAND
-#define CONFIG_CMD_SPL_NAND_OFS                        0x240000 /* end of u-boot */
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS                0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE              0x2000
-#endif
-
 /* spl export command */
 #define CONFIG_CMD_SPL
 #endif
 #define CONFIG_SPL_NAND_ECC
 #define CONFIG_SPL_MTD_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #endif
 #endif /* !CONFIG_NOR_BOOT */