tegra: Convert CONFIG_PWM_TEGRA to Kconfig
authorSimon Glass <sjg@chromium.org>
Sat, 30 Jan 2016 23:38:00 +0000 (16:38 -0700)
committerTom Warren <twarren@nvidia.com>
Tue, 16 Feb 2016 16:17:53 +0000 (09:17 -0700)
Move this option to Kconfig and clean up the header files. Adjust the only
user (the LCD driver) to work with the new driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
17 files changed:
configs/colibri_t20_defconfig
configs/harmony_defconfig
configs/medcom-wide_defconfig
configs/nyan-big_defconfig
configs/paz00_defconfig
configs/seaboard_defconfig
configs/tec_defconfig
configs/ventana_defconfig
drivers/pwm/Kconfig
include/configs/colibri_t20.h
include/configs/harmony.h
include/configs/medcom-wide.h
include/configs/nyan-big.h
include/configs/paz00.h
include/configs/seaboard.h
include/configs/tec.h
include/configs/ventana.h

index 84e5bc580798f7124172bd37bf66e3849a8111d1..e8b3e0cb146c06bf1491dc8464c41cd0c1fe47f7 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index 8a41118be9e99fda4cec299286f37f0e202d87c8..14125b44f38ba67bfb3ca9bc745ff53a0223216b 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index 7aff258480836f8b99913d372e2e081eb0132681..49687cf8573e2330aee47b29656cbf569ddeac7c 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index 12377bde09937a280a6dd0c1f12ffc4409a5c696..1243006598e9e88f5508cad34f47f14860692509 100644 (file)
@@ -26,6 +26,7 @@ CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA114_SPI=y
 CONFIG_TPM_TIS_INFINEON=y
index ea9fe444d2063e2046a540c41f9f665f5e3b7eae..546933171c4ddb5192759243a0296251574617ac 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index 528707f4695994b6a65ef3d9dca4b7088fbbe0f9..7956670f2571249abb17b4410a0838587807f1af 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index 9ba3062908956acc8f9d3568cb6bb128ada58ab7..274fc9d8f8f33e3b290a5f69a679f3c42a6113dd 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index 08abea2be40b0a452c41197104efd671f3ae6d8c..66c9e264acebadbe08016aa711e81f7fbb44a6bf 100644 (file)
@@ -15,6 +15,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_PWM=y
+CONFIG_PWM_TEGRA=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
index cd8f3570f06df33ca21c3fb48eed123412037427..e5880ac84f680a5b5ca690d94762c8d7129abfcb 100644 (file)
@@ -17,3 +17,11 @@ config PWM_ROCKCHIP
          programmable period and duty cycle. A 32-bit counter is used.
          Various options provided in the hardware (such as capture mode and
          continuous/single-shot) are not supported by the driver.
+
+config PWM_TEGRA
+       bool "Enable support for the Tegra PWM"
+       help
+         This PWM is found on Tegra 20 and other Nvidia SoCs. It supports
+         four channels with a programmable period and duty cycle. Only a
+         32KHz clock is supported by the driver but the duty cycle is
+         configurable.
index 61d04b76e4c0c786dddadd289752fe99ebe073eb..f3a1c9609bb1654140f8b87f6dd44f024dfb82a8 100644 (file)
@@ -53,7 +53,6 @@
 #define CONFIG_TFTP_TSIZE
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES    10
 #define CONFIG_CMD_BMP
index a78f7c4db992973d1b485b591d5494f89353ec8e..353caec22f95d84e87fc78307b5929620d8ad5b8 100644 (file)
@@ -60,7 +60,6 @@
 #define CONFIG_CMD_DHCP
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES    10
 
index c3e91283c7d6fcf341965c2690de9cb26ec2a67e..cd89fa537b90775bfbff7aa9f43440dd195ccca5 100644 (file)
@@ -48,7 +48,6 @@
 #define CONFIG_CMD_DHCP
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 /* support the new (FDT-based) image format */
index eb00f2e8da0ad836b4fdfaf4fd8eb8ea4db81f43..d99d93c18ba098644ccc4d5ef57e967198592d48 100644 (file)
@@ -38,7 +38,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_AS3722_POWER
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CMD_BMP
index 04ddb1b0e8961283d7de3af32697aae4c458e4fd..6acecb1e27a13b4c483e630b3009669c10c52255 100644 (file)
@@ -48,7 +48,6 @@
 #define CONFIG_CMD_DHCP
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES    10
 
index 01650e4f6191b86c7c6a05fd37b2451fc71531a1..fb9a106da3c5914f223f6f82a6f4fbf29b4b4083 100644 (file)
@@ -66,7 +66,6 @@
 #define CONFIG_USB_KEYBOARD
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES    10
 
index 9c2311bc344264bc6b30e64f34b8889024d2635e..50b9e97fe79279e5ea6ee876068e8aa13473f976 100644 (file)
@@ -48,7 +48,6 @@
 #define CONFIG_CMD_DHCP
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 
 /* support the new (FDT-based) image format */
index 8d10ddebb14ad3a81d78375b24616d53c86a8f70..7f970d011d63a8f5a3b4f5aa4b55cc2778b4f9ac 100644 (file)
@@ -49,7 +49,6 @@
 #define CONFIG_USB_KEYBOARD
 
 /* LCD support */
-#define CONFIG_PWM_TEGRA
 #define CONFIG_SYS_WHITE_ON_BLACK
 #define CONFIG_CONSOLE_SCROLL_LINES    10