ARM: at91: clock: add a new file to handle clock
authorWenyou Yang <wenyou.yang@atmel.com>
Wed, 3 Feb 2016 02:16:48 +0000 (10:16 +0800)
committerAndreas Bießmann <andreas.devel@googlemail.com>
Thu, 18 Feb 2016 20:34:40 +0000 (21:34 +0100)
To reduce the duplicated code, add a new file to accommodate
the peripheral's and system's clock handle code, shared with
the SoCs with different ARM core.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
arch/arm/mach-at91/Makefile
arch/arm/mach-at91/arm926ejs/clock.c
arch/arm/mach-at91/armv7/clock.c
arch/arm/mach-at91/clock.c [new file with mode: 0644]
arch/arm/mach-at91/include/mach/clk.h

index abd1d13da7e1a860f5f264ab35f48e996cac1f1e..44245234ee77b0aa9f7a4a86916c818dc4fd6166 100644 (file)
@@ -15,6 +15,7 @@ obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
 obj-y += spl.o
 endif
 
+obj-y += clock.o
 obj-$(CONFIG_CPU_ARM920T)      += arm920t/
 obj-$(CONFIG_CPU_ARM926EJS)    += arm926ejs/
 obj-$(CONFIG_CPU_V7)           += armv7/
index 8d6934e32490dd44b31acddf09b54a1b2a05cdcc..c8b5e10085bc8c5a05c550b676f048c84fc3f0b7 100644 (file)
@@ -242,10 +242,3 @@ void at91_mck_init(u32 mckr)
        while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
                ;
 }
-
-void at91_periph_clk_enable(int id)
-{
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-       writel(1 << id, &pmc->pcer);
-}
index 41dbf16afdce67ed40d5b96c4d0107bd6faaa07b..81e9f69c941682f08de55bcbbab90b4286e95cb9 100644 (file)
@@ -150,32 +150,6 @@ void at91_mck_init(u32 mckr)
                ;
 }
 
-void at91_periph_clk_enable(int id)
-{
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-       u32 regval;
-
-       if (id > AT91_PMC_PCR_PID_MASK)
-               return;
-
-       regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id;
-
-       writel(regval, &pmc->pcr);
-}
-
-void at91_periph_clk_disable(int id)
-{
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-       u32 regval;
-
-       if (id > AT91_PMC_PCR_PID_MASK)
-               return;
-
-       regval = AT91_PMC_PCR_CMD_WRITE | id;
-
-       writel(regval, &pmc->pcr);
-}
-
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
 {
        struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
new file mode 100644 (file)
index 0000000..2a0308f
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *                   Wenyou Yang <wenyou.yang@atmel.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_pmc.h>
+
+void at91_periph_clk_enable(int id)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+#ifdef CPU_HAS_PCR
+       u32 regval;
+       u32 div_value;
+
+       if (id > AT91_PMC_PCR_PID_MASK)
+               return;
+
+       writel(id, &pmc->pcr);
+
+       div_value = readl(&pmc->pcr) & AT91_PMC_PCR_DIV;
+
+       regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id | div_value;
+
+       writel(regval, &pmc->pcr);
+#else
+       writel(0x01 << id, &pmc->pcer);
+#endif
+}
+
+void at91_periph_clk_disable(int id)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+#ifdef CPU_HAS_PCR
+       u32 regval;
+
+       if (id > AT91_PMC_PCR_PID_MASK)
+               return;
+
+       regval = AT91_PMC_PCR_CMD_WRITE | id;
+
+       writel(regval, &pmc->pcr);
+#else
+       writel(0x01 << id, &pmc->pcdr);
+#endif
+}
+
+void at91_system_clk_enable(int sys_clk)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+       writel(sys_clk, &pmc->scer);
+}
+
+void at91_system_clk_disable(int sys_clk)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+       writel(sys_clk, &pmc->scdr);
+}
index ad839275ec6e3571f97e90f095c1a61ff6dfacef..bef4e1c10196da42df68b4ac0008f50fee3fee7b 100644 (file)
@@ -128,5 +128,7 @@ void at91_periph_clk_enable(int id);
 void at91_periph_clk_disable(int id);
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div);
 u32 at91_get_periph_generated_clk(u32 id);
+void at91_system_clk_enable(int sys_clk);
+void at91_system_clk_disable(int sys_clk);
 
 #endif /* __ASM_ARM_ARCH_CLK_H__ */