sh: Add a flag which controls the DDR ECC mode of sh7757lcr
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Mon, 31 Oct 2011 04:16:02 +0000 (13:16 +0900)
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fri, 2 Dec 2011 04:46:21 +0000 (13:46 +0900)
When DDR-ECC is effective, the physical memory which can be used
reduces this boardby half. However, this mode can chenge to disable.
When it was disabled, user can use 512 MB of physical memory.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: "Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>
Acked-by: "Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
board/renesas/sh7757lcr/lowlevel_init.S
include/configs/sh7757lcr.h

index ab1aa494ab08472f7a7c7e82d680c8406fb47264..5090fd093c47b802f0eb7437463d20e4e108e07a 100644 (file)
@@ -326,12 +326,13 @@ PC_MASK:  .long   0x20000000
        /* step 26 */
        wait_DBCMD
 
+#if defined(CONFIG_SH7757LCR_DDR_ECC)
        /* enable DDR-ECC */
        write32 ECD_ECDEN_A, ECD_ECDEN_D
        write32 ECD_INTSR_A, ECD_INTSR_D
        write32 ECD_SPACER_A, ECD_SPACER_D
        write32 ECD_MCR_A, ECD_MCR_D
-
+#endif
        bra     exit_ddr
        nop
 
index fe11a17c1ad0a3bd508d0396badd0f33508bc5af..c1f9ce8a227b612b4e139c7f484ffe51a6256139 100644 (file)
@@ -31,6 +31,7 @@
 #define CONFIG_SH_32BIT                1
 #define CONFIG_CPU_SH7757      1
 #define CONFIG_SH7757LCR       1
+#define CONFIG_SH7757LCR_DDR_ECC       1
 
 #define CONFIG_SYS_TEXT_BASE   0x8ef80000
 #define CONFIG_SYS_LDSCRIPT    "board/renesas/sh7757lcr/u-boot.lds"