arm: freescale: Rename initdram() to fsl_initdram()
authorSimon Glass <sjg@chromium.org>
Thu, 6 Apr 2017 18:47:04 +0000 (12:47 -0600)
committerTom Rini <trini@konsulko.com>
Wed, 12 Apr 2017 17:28:32 +0000 (13:28 -0400)
This function name shadows a global name but is in fact different. This
is very confusing. Rename it to help with the following refactoring.

Signed-off-by: Simon Glass <sjg@chromium.org>
13 files changed:
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
board/freescale/ls1021aqds/ddr.c
board/freescale/ls1021aqds/ls1021aqds.c
board/freescale/ls1043aqds/ddr.c
board/freescale/ls1043aqds/ls1043aqds.c
board/freescale/ls1043ardb/ddr.c
board/freescale/ls1046aqds/ddr.c
board/freescale/ls1046aqds/ls1046aqds.c
board/freescale/ls1046ardb/ddr.c
board/freescale/ls2080a/ddr.c
board/freescale/ls2080aqds/ddr.c
board/freescale/ls2080ardb/ddr.c
include/fsl_ddr_sdram.h

index ea6c090e0bd9fb4f9d511456d3f2ab9694263414..d446527616c4bb929d6bc247be1f206917762dcf 100644 (file)
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/system.h>
@@ -876,7 +877,7 @@ void update_early_mmu_table(void)
 
 __weak int dram_init(void)
 {
-       initdram();
+       fsl_initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
        /* This will break-before-make MMU for DDR */
        update_early_mmu_table();
index 3bf2e49762902c4cabe2153fb350275d5c587909..d16a69fc981fcc6fa8fe11e88fc5ad7c39d79381 100644 (file)
@@ -164,7 +164,7 @@ void board_mem_sleep_setup(void)
 }
 #endif
 
-int initdram(void)
+int fsl_initdram(void)
 {
        phys_size_t dram_size;
 
index 909fc5627515cdecb3d7d1cd3e3ee07ee1778ba3..d81d8abc9bf37f93bf39c4995329a2bb33136d5d 100644 (file)
@@ -162,7 +162,7 @@ int dram_init(void)
         * before accessing DDR SPD.
         */
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-       return initdram();
+       return fsl_initdram();
 }
 
 #ifdef CONFIG_FSL_ESDHC
index db350e27b897353455f37970988199fa41eeecc9..2643f5bf4aa2e604d193dc25a89fdfd3f4a308ce 100644 (file)
@@ -108,7 +108,7 @@ found:
 #endif
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
        phys_size_t dram_size;
 
index 538bba53da9997de5ed53c4dd9102232d1f1b8ea..2df63e468d8b976dcb1184e99ba2157752978762 100644 (file)
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -153,7 +154,7 @@ int dram_init(void)
         * before accessing DDR SPD.
         */
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-       initdram();
+       fsl_initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
        /* This will break-before-make MMU for DDR */
        update_early_mmu_table();
index 2f133db0a6317bf8f4427f3e1998757b6d1374ca..36d27ecfae79295ae13c58661062df0e3c330da4 100644 (file)
@@ -170,7 +170,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
 }
 #endif
 
-int initdram(void)
+int fsl_initdram(void)
 {
        phys_size_t dram_size;
 
index 481ed440468e82af6b187743ffe3d9667e532489..d37af34a9c95bcde2bc2b939009dcb317f3c5541 100644 (file)
@@ -92,7 +92,7 @@ found:
        popts->cpo_sample = 0x70;
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
        phys_size_t dram_size;
 
index 6238852af55a8a7bf17c7ee54adbc8e328a5dc53..69fc15b681501144e5366a125f08ccb7a801e9cf 100644 (file)
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <fsl_ddr_sdram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -149,7 +150,7 @@ int dram_init(void)
         * before accessing DDR SPD.
         */
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-       initdram();
+       fsl_initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
        /* This will break-before-make MMU for DDR */
        update_early_mmu_table();
index d1290e27f8d65556a6138b139c5f4aaad8381bec..a16f7bc83a91a0dcf2ae061051d6d5d059423cb4 100644 (file)
@@ -96,7 +96,7 @@ found:
        popts->cpo_sample = 0x70;
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
        phys_size_t dram_size;
 
index d340c4162dc0577f620ff1929ad7e224d3ee03e9..9d176d385128bd37c68f059fdbb2bf4343cf7947 100644 (file)
@@ -158,7 +158,8 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
        return 0;
 }
 #endif
-int initdram(void)
+
+int fsl_initdram(void)
 {
        puts("Initializing DDR....");
 
index 1e9145d6ab28de1abb5c67e43c91d5ef6ad3b52a..22a2676a95ad6b17c92433dbf48e1667f9aa477b 100644 (file)
@@ -155,7 +155,7 @@ found:
        }
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
        gd->ram_size = fsl_ddr_sdram_size();
index 029ea61b959049c7589683d0f7bf0411a638b327..7002dfb236f0b6328020046475547cc02b3c11bd 100644 (file)
@@ -158,7 +158,7 @@ found:
        }
 }
 
-int initdram(void)
+int fsl_initdram(void)
 {
 #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
        gd->ram_size = fsl_ddr_sdram_size();
index b8de46bb42e8ec4e0d1af604fcdcfe909341dbb2..6a1f04b81ac400485c9f401ebba050e78502e922 100644 (file)
@@ -477,4 +477,12 @@ typedef struct fixed_ddr_parm{
        int max_freq;
        fsl_ddr_cfg_regs_t *ddr_settings;
 } fixed_ddr_parm_t;
+
+/**
+ * fsl_initdram() - Set up the SDRAM
+ *
+ * @return 0 if OK, -ve on error
+ */
+int fsl_initdram(void);
+
 #endif