Add support for TP-Link TL-WR902AC v1 (QCA9531 based)

diff --git a/Makefile b/Makefile
index 2d37fde835a0f087268505d1892eac14b1d528ab..e37bad3827cf72cfcb788a3749c09bfce6c8af39 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -236,7 +236,8 @@ COMMON_ETHS27_TARGETS = \
        tp-link_tl-wr841n_v11 \
        tp-link_tl-wr841n_v8 \
        tp-link_tl-wr841n_v9 \
-       tp-link_tl-wr842n_v3
+       tp-link_tl-wr842n_v3 \
+       tp-link_tl-wr902ac_v1
 
 $(COMMON_ETHS27_TARGETS):
        @$(call build,123,1,ETH_CONFIG=_s27)

diff --git a/README.md b/README.md
index df0e3dee612602ed7b7ca3fe5f4afe007581ffa0..cce4eb1606f1c8ebe9c7723b90b118e0dbff72e5 100644 (file)
--- a/README.md
+++ b/README.md
@@ -108,6 +108,7 @@ Currently supported devices:
   - TP-Link TL-WR820N (version for Chinese market)
   - TP-Link TL-WR841N/D v9, v10, v11
   - TP-Link TL-WR842N/D v3
+  - TP-Link TL-WR902AC v1
   - Wallys DR531
   - YunCore AP90Q
   - YunCore CPE830
@@ -155,6 +156,7 @@ More information about supported devices:
 | [TP-Link TL-WR841N/D v8](http://wiki.openwrt.org/toh/tp-link/tl-wr841nd) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
 | [TP-Link TL-WR841N/D v9/10/11](https://wiki.openwrt.org/toh/tp-link/tl-wr841nd) | QCA9533 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO |
 | TP-Link TL-WR842N/D v3 | QCA9531 | 16 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO |
+| TP-Link TL-WR902AC v1 | QCA9531 | 8 MiB | 64 MiB DDR2 | 128 KiB, LZMA | RO |
 | Village Telco Mesh Potato 2 | AR9331 | 16 MiB | 64 MiB DDR1 | 192 KiB | R/W |
 | Wallys DR531 | QCA9531 | 8 MiB | 64 MiB DDR2 | 192 KiB | R/W |
 | YunCore AP90Q | QCA9531 | 16 MiB | 128 MiB DDR2 | 256 KiB | R/W |

diff --git a/u-boot/Makefile b/u-boot/Makefile
index 57ebe95d80512e184fb4a03ba69de86003e44be3..20b4bead3c9a3e9b3f132e5a8b2dcc45d0cb0d84 100644 (file)
--- a/u-boot/Makefile
+++ b/u-boot/Makefile
@@ -630,6 +630,14 @@ tp-link_tl-wr842n_v3: qca953x_common lsdk_kernel
        @$(call define_add,CFG_ATH_GMAC_NMACS,2)
        @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
 
+tp-link_tl-wr902ac_v1: qca953x_common lsdk_kernel
+       @$(call config_init,TP-Link TL-WR902AC,tl-wr902ac,8,3,1,QCA_QCA953X_SOC)
+       @$(call define_add,CONFIG_FOR_TPLINK_WR902AC_V1,1)
+       @$(call define_add,CFG_ATHRS27_PHY,1)
+       @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+       @$(call define_add,CONFIG_PCI,1)
+       @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
 unwireddevices_unwired-one: ar933x_common
        @$(call config_init,Black Swift aka Unwired One,black-swift,16,11,1,QCA_AR933X_SOC)
        @$(call define_add,CONFIG_FOR_BLACK_SWIFT_BOARD,1)

diff --git a/u-boot/include/configs/ap143.h b/u-boot/include/configs/ap143.h
index 64a37fb1ed933a9a243abc9ad383e55312a1f855..8af3ec64e6f1848a95a3ed4dd89e974ddb6a884a 100644 (file)
--- a/u-boot/include/configs/ap143.h
+++ b/u-boot/include/configs/ap143.h
@@ -121,6 +121,18 @@
        #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1
        #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 
+#elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
+
+       #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4 | GPIO13 | GPIO15
+       #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO11 | GPIO12
+       #define CONFIG_QCA_GPIO_MASK_OUT        GPIO1 |\
+                                               CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
+                                               CONFIG_QCA_GPIO_MASK_LED_ACT_L
+       #define CONFIG_QCA_GPIO_MASK_IN         GPIO2 | GPIO3 | GPIO14 | GPIO17
+       #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO1 |\
+                                               CONFIG_QCA_GPIO_MASK_LED_ACT_L
+       #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
+
 #elif defined(CONFIG_FOR_WALLYS_DR531)
 
        #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
@@ -207,7 +219,8 @@
                                "rootfstype=squashfs init=/sbin/init "\
                                "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 
-#elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
+#elif defined(CONFIG_FOR_TPLINK_WR842N_V3) ||\
+      defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 
        #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
                                "rootfstype=jffs2 init=/sbin/init "\
@@ -237,7 +250,8 @@
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
-    defined(CONFIG_FOR_TPLINK_WR842N_V3)
+    defined(CONFIG_FOR_TPLINK_WR842N_V3)    ||\
+    defined(CONFIG_FOR_TPLINK_WR902AC_V1)
        #define CFG_LOAD_ADDR   0x9F020000
 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
       defined(CONFIG_FOR_P2W_R602N)      ||\
@@ -285,7 +299,8 @@
       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
-      defined(CONFIG_FOR_TPLINK_WR842N_V3)
+      defined(CONFIG_FOR_TPLINK_WR842N_V3)  ||\
+      defined(CONFIG_FOR_TPLINK_WR902AC_V1)
        #define CFG_ENV_ADDR            0x9F01EC00
        #define CFG_ENV_SIZE            0x1000
        #define CFG_ENV_SECT_SIZE       0x10000
@@ -340,6 +355,10 @@
        #define OFFSET_MAC_ADDRESS              0x00FC00
        #define OFFSET_ROUTER_MODEL             0x00FD00
        #define OFFSET_PIN_NUMBER               0x00FE00
+#elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
+       #define OFFSET_MAC_DATA_BLOCK           0x750000
+       #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
+       #define OFFSET_MAC_ADDRESS              0x000008
 #elif defined(CONFIG_FOR_WALLYS_DR531)
        #define OFFSET_MAC_DATA_BLOCK           0x030000
        #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
@@ -395,6 +414,8 @@
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
+#elif defined(CONFIG_FOR_TPLINK_WR902AC_V1)
+       #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (832 * 1024)
 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
       defined(CONFIG_FOR_P2W_R602N)      ||\
       defined(CONFIG_FOR_WALLYS_DR531)   ||\
@@ -429,7 +450,8 @@
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
-    defined(CONFIG_FOR_TPLINK_WR842N_V3)
+    defined(CONFIG_FOR_TPLINK_WR842N_V3)    ||\
+    defined(CONFIG_FOR_TPLINK_WR902AC_V1)
 
        #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
        #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000