ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
authorWenyou Yang <wenyou.yang@microchip.com>
Wed, 13 Sep 2017 06:58:48 +0000 (14:58 +0800)
committerTom Rini <trini@konsulko.com>
Thu, 14 Sep 2017 20:02:44 +0000 (16:02 -0400)
As said in 29.5.7 section of SAMA5D2 datasheet, before switching to
the crystal oscillator, a check must be carried out to ensure that
the oscillator is present and that its freqency is valid.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/mach-at91/include/mach/at91_pmc.h
arch/arm/mach-at91/spl_atmel.c

index 2875ff20b192954cf27c06523db6a44bbdfa5d6b..08ad1bf2d047a9ea0aeb87e3395b249f0341a94c 100644 (file)
@@ -87,6 +87,8 @@ typedef struct at91_pmc {
 
 #define AT91_PMC_MCFR_MAINRDY          0x00010000
 #define AT91_PMC_MCFR_MAINF_MASK       0x0000FFFF
+#define AT91_PMC_MCFR_RCMEAS           0x00100000
+#define AT91_PMC_MCFR_CCSS_XTAL_OSC    0x01000000
 
 #define AT91_PMC_MCKR_CSS_SLOW         0x00000000
 #define AT91_PMC_MCKR_CSS_MAIN         0x00000001
index b75c2ccefdc2a029dec8fceb243b3fb81679fa0a..ce16ef3bdb71eb376e7db24847fbd876ea6eed29 100644 (file)
@@ -32,6 +32,20 @@ static void switch_to_main_crystal_osc(void)
        while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
                ;
 
+#if defined(CONFIG_SAMA5D2)
+       /* Enable a measurement of the external oscillator */
+       tmp = readl(&pmc->mcfr);
+       tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
+       tmp |= AT91_PMC_MCFR_RCMEAS;
+       writel(tmp, &pmc->mcfr);
+
+       while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
+               ;
+
+       if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
+               hang();
+#endif
+
        tmp = readl(&pmc->mor);
        tmp &= ~AT91_PMC_MOR_OSCBYPASS;
        tmp &= ~AT91_PMC_MOR_KEY(0xff);
@@ -47,11 +61,13 @@ static void switch_to_main_crystal_osc(void)
        while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
                ;
 
+#if !defined(CONFIG_SAMA5D2)
        /* Wait until MAINRDY field is set to make sure main clock is stable */
        while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
                ;
+#endif
 
-#ifndef CONFIG_SAMA5D4
+#if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
        tmp = readl(&pmc->mor);
        tmp &= ~AT91_PMC_MOR_MOSCRCEN;
        tmp &= ~AT91_PMC_MOR_KEY(0xff);