Without this additional delay, some eMMC don't negotiate properly bus width
Tested on:
- Toshiba THGBM2G8D8FBAIB
- Toshiba THGBM4G4D1HBAR
- Micron MTFC4GMVEA (the one giving the problem)
- Hynix H26M64002BNR
- SanDisk SDIN5E1-32G
Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
*/
if (bytes_left > fifo_bytes)
dmmc_wait_fifo_status(regs, 0x4a);
- else if (bytes_left == fifo_bytes)
+ else if (bytes_left == fifo_bytes) {
dmmc_wait_fifo_status(regs, 0x40);
+ if (cmd->cmdidx == MMC_CMD_SEND_EXT_CSD)
+ udelay(600);
+ }
for (i = 0; bytes_left && (i < fifo_words); i++) {
cmddata = get_val(®s->mmcdrr);