Do the reset before clearing the MSR, otherwise it may result in a read
or write operation instead if the start condition is repeated.
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
}
writel((chip << 1) | read, priv->base + RCAR_I2C_ICMAR);
- writel(0, priv->base + RCAR_I2C_ICMSR);
+ /* Reset */
writel(RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE | RCAR_I2C_ICMCR_ESG,
priv->base + RCAR_I2C_ICMCR);
+ /* Clear Status */
+ writel(0, priv->base + RCAR_I2C_ICMSR);
ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, mask,
true, 100, true);