imx: imx6: Move gpr_init() function to soc.c

Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D,
MX6Q and MX6QP processors move it to the soc.c file.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index d94c0951180c50b5b19ca82343c7cb07cf559e13..970c4ca76028bdf3e0c731cde2a8663719d2c0b0 100644 (file)
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -90,6 +90,8 @@ static inline u8 imx6_is_bmode_from_gpr9(void)
 }
 
 u32 imx6_src_get_boot_mode(void);
+void gpr_init(void);
+
 #endif /* CONFIG_MX6 */
 
 u32 get_nr_cpus(void);

diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index 9ede1f543527e78186896f378691bc74573f2802..f8bc05e68b561efea5c5f72a0cb087a2c57dbd8c 100644 (file)
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -681,6 +681,23 @@ void imx_setup_hdmi(void)
 }
 #endif
 
+void gpr_init(void)
+{
+       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+       /* enable AXI cache for VDOA/VPU/IPU */
+       writel(0xF00000CF, &iomux->gpr[4]);
+       if (is_mx6dqp()) {
+               /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
+               writel(0x77177717, &iomux->gpr[6]);
+               writel(0x77177717, &iomux->gpr[7]);
+       } else {
+               /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+               writel(0x007F007F, &iomux->gpr[6]);
+               writel(0x007F007F, &iomux->gpr[7]);
+       }
+}
+
 #ifdef CONFIG_IMX_BOOTAUX
 int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
 {

diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
index df10d6a0d0406c1b36a764979832da11ae1952b3..9465cea72f2ce37e8e264a77d0d9d19f81ada20a 100644 (file)
--- a/board/bachmann/ot1200/ot1200.c
+++ b/board/bachmann/ot1200/ot1200.c
@@ -169,17 +169,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 int board_early_init_f(void)
 {
        ccgr_init();

diff --git a/board/barco/platinum/platinum.h b/board/barco/platinum/platinum.h
index d3ea8bda731f2b13962900b1a891ad09afae639a..3013ed9078aa4c469cbef7cc09c47b2a34dcca5c 100644 (file)
--- a/board/barco/platinum/platinum.h
+++ b/board/barco/platinum/platinum.h
@@ -75,15 +75,4 @@ static inline void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static inline void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 #endif /* _PLATINUM_H_ */

diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index 8cd0090887a82ef2f1be2ecea52ff7bfda426e4f..2ed66d3ba34aebc39318fbcd94c37090eb123c0c 100644 (file)
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -955,17 +955,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 /* Define a minimal structure so that the part number can be read via SPL */
 struct mfgdata {
        unsigned char tsize;

diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
index 6b98b5c3ebda90c4788d57ef939c3d70930a09f7..fb128f5d4cb85b03f295d54bb5baab53d8be9521 100644 (file)
--- a/board/el/el6x/el6x.c
+++ b/board/el/el6x/el6x.c
@@ -570,17 +570,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 /*
  * This section requires the differentiation between iMX6 Sabre boards, but
  * for now, it will configure only for the mx6q variant.

diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c
index a8a7cf317e8790446aa23d3a11a7729fa642fe3c..29a27ce80f7a97450bc624e6f9a2a298a0f3a924 100644 (file)
--- a/board/engicam/common/spl.c
+++ b/board/engicam/common/spl.c
@@ -332,17 +332,6 @@ static void ccgr_init(void)
 #endif
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void spl_dram_init(void)
 {
 #ifdef CONFIG_MX6QDL

diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index f8f77f616cf1ae887ea7726a14d7f4840ee5405b..15ca0294f5051bd1bf479a082342f70d7c550984 100644 (file)
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -798,23 +798,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       if (is_mx6dqp()) {
-               /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
-               writel(0x77177717, &iomux->gpr[6]);
-               writel(0x77177717, &iomux->gpr[7]);
-       } else {
-               /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-               writel(0x007F007F, &iomux->gpr[6]);
-               writel(0x007F007F, &iomux->gpr[7]);
-       }
-}
-
 static int mx6q_dcd_table[] = {
        0x020e0798, 0x000C0000,
        0x020e0758, 0x00000000,

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 9a562b3424da0d7754e9a0dfcf807c83b2e9fbb7..5b50bc815f4396a1e7270049fe6ae5abfe885845 100644 (file)
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -747,23 +747,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       if (is_mx6dqp()) {
-               /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
-               writel(0x77177717, &iomux->gpr[6]);
-               writel(0x77177717, &iomux->gpr[7]);
-       } else {
-               /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-               writel(0x007F007F, &iomux->gpr[6]);
-               writel(0x007F007F, &iomux->gpr[7]);
-       }
-}
-
 static int mx6q_dcd_table[] = {
        0x020e0798, 0x000C0000,
        0x020e0758, 0x00000000,

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 9524da7daf392166f55b9d7f5b49d526e858ccb9..c2e370ba0be7dc48f43c9a6eb370d324651c884a 100644 (file)
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -583,17 +583,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 /*
  * called from C runtime startup code (arch/arm/lib/crt0.S:_main)
  * - we have a stack and a place to store GD, both in SRAM

diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index 3645b75cb29bfa07222eec8f673862b5e3e1e1bb..512f06da76b6565fd9d6ddea0db11fa9a0f08188 100644 (file)
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -550,17 +550,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 /*
  * called from C runtime startup code (arch/arm/lib/crt0.S:_main)
  * - we have a stack and a place to store GD, both in SRAM

diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c
index 15844ef437b7b76c7e790c12c44c400619ac7daf..a2f804db8fee1f70a0468ae155f8c0177b5b21b9 100644 (file)
--- a/board/liebherr/mccmon6/spl.c
+++ b/board/liebherr/mccmon6/spl.c
@@ -260,17 +260,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void spl_dram_init(void)
 {
        if (is_cpu_type(MXC_CPU_MX6SOLO)) {

diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index 4257fbcb68b471fd64277ee2f7746ac4d497c100..1538158987aef400557c77c340c82a1658e7a777 100644 (file)
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -487,18 +487,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
-
 static void spl_dram_init(void)
 {
        struct mx6_ddr_sysinfo sysinfo = {

diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
index 8d2ce63e06bbe06bc23b7ff1626a8bf0e48c6641..ec9264d45c1e041cb39e0c9f64f633fa9558d5e8 100644 (file)
--- a/board/phytec/pfla02/pfla02.c
+++ b/board/phytec/pfla02/pfla02.c
@@ -550,17 +550,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void spl_dram_init(struct mx6_ddr3_cfg *mem_ddr)
 {
        struct mx6_ddr_sysinfo sysinfo = {

diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 7e59fb259e118fd99400261453088d0ab7231da4..986abc57720bc15327d0d5e6d2f64a1194618d71 100644 (file)
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -581,17 +581,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void spl_dram_init(int width)
 {
        struct mx6_ddr_sysinfo sysinfo = {

diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 2fd96232bdf7420e9c2c57a0151774efac9d8125..ebc6c12cbcbd2143e428f68090168ae611285f57 100644 (file)
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -1160,17 +1160,6 @@ static void ccgr_init(void)
        writel(0x000000FB, &ccm->ccosr);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void ddr_init(int *table, int size)
 {
        int i;

diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index d30391fa6363e7da0f9307659a144cdda1111ade..669d9123ca295bd3283d98b27edab4da89e857ae 100644 (file)
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -1037,17 +1037,6 @@ static void ccgr_init(void)
        writel(0x000000FB, &ccm->ccosr);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void ddr_init(int *table, int size)
 {
        int i;

diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
index e83e7c3a1b2208e0652e79bf9c95c7a0d5e0e56e..3645969e4341ecf348611496a08a97d23c96ebb3 100644 (file)
--- a/board/udoo/udoo_spl.c
+++ b/board/udoo/udoo_spl.c
@@ -211,17 +211,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000FF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void spl_dram_init(void)
 {
        if (is_cpu_type(MXC_CPU_MX6DL)) {

diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
index 47082a88d5ec45812ad079b1660a386a56e8a293..99a02865ecf63ffacab74bef188e8b50a60d0c2a 100644 (file)
--- a/board/wandboard/spl.c
+++ b/board/wandboard/spl.c
@@ -266,17 +266,6 @@ static void ccgr_init(void)
        writel(0x000003FF, &ccm->CCGR6);
 }
 
-static void gpr_init(void)
-{
-       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-       /* enable AXI cache for VDOA/VPU/IPU */
-       writel(0xF00000CF, &iomux->gpr[4]);
-       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-       writel(0x007F007F, &iomux->gpr[6]);
-       writel(0x007F007F, &iomux->gpr[7]);
-}
-
 static void spl_dram_init(void)
 {
        if (is_cpu_type(MXC_CPU_MX6SOLO)) {