#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
+#include <asm/arch/emif_defs.h>
#include <asm/io.h>
#include "../common/misc.h"
{ pinmux[7], 1, 7 }
};
+/* EMIF-A bus pins for 8-bit NAND support on CS3 */
+static const struct pinmux_config emifa_nand_pins[] = {
+ { pinmux[13], 1, 6 },
+ { pinmux[13], 1, 7 },
+ { pinmux[14], 1, 0 },
+ { pinmux[14], 1, 1 },
+ { pinmux[14], 1, 2 },
+ { pinmux[14], 1, 3 },
+ { pinmux[14], 1, 4 },
+ { pinmux[14], 1, 5 },
+ { pinmux[15], 1, 7 },
+ { pinmux[16], 1, 0 },
+ { pinmux[18], 1, 1 },
+ { pinmux[18], 1, 4 },
+ { pinmux[18], 1, 5 },
+};
+
/* UART pin muxer settings */
static const struct pinmux_config uart_pins[] = {
{ pinmux[8], 2, 7 },
#ifdef CONFIG_USB_DA8XX
PINMUX_ITEM(usb_pins),
#endif
+#ifdef CONFIG_USE_NAND
+ PINMUX_ITEM(emifa_nand_pins),
+#endif
};
int board_init(void)
writel(0xffffffff, &davinci_aintc_regs->ecr3);
#endif
+#ifdef CONFIG_NAND_DAVINCI
+ /* EMIFA 100MHz clock select */
+ writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
+ &davinci_syscfg_regs->cfgchip3);
+ /* NAND CS setup */
+ writel((DAVINCI_ABCR_WSETUP(0) |
+ DAVINCI_ABCR_WSTROBE(2) |
+ DAVINCI_ABCR_WHOLD(0) |
+ DAVINCI_ABCR_RSETUP(0) |
+ DAVINCI_ABCR_RSTROBE(2) |
+ DAVINCI_ABCR_RHOLD(0) |
+ DAVINCI_ABCR_TA(2) |
+ DAVINCI_ABCR_ASIZE_8BIT),
+ &davinci_emif_regs->AB2CR);
+#endif
+
/* arch number of the board */
gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
-#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
-#define CONFIG_ENV_SIZE (128 << 10)
+#define CONFIG_ENV_OFFSET (512 << 10)
+#define CONFIG_ENV_SIZE (512 << 10)
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
+#define CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
#define CONFIG_SYS_CLE_MASK 0x10
#define CONFIG_SYS_ALE_MASK 0x8
-#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define NAND_MAX_CHIPS 1
#define DEF_BOOTM ""
#define CONFIG_CMD_NAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_UBI
-#define CONFIG_RBTREE
+#define CONFIG_MTD_DEVICE
#endif
#ifdef CONFIG_USE_SPIFLASH
#endif /* CONFIG_MUSB_UDC */
#endif /* CONFIG_USB_DA8XX */
+
+#ifdef CONFIG_MTD_PARTITIONS
+#define MTDIDS_DEFAULT "nand0=davinci_nand.1"
+#define PART_BOOT "512k(bootloader)ro,"
+#define PART_PARAMS "512k(params)ro,"
+#define PART_KERNEL "4m(kernel),"
+#define PART_REST "-(filesystem)"
+#define MTDPARTS_DEFAULT \
+ "mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST
+#endif
+
#endif /* __CONFIG_H */