Add ATMEL LCD driver
authorStelian Pop <stelian@popies.net>
Fri, 9 May 2008 19:57:18 +0000 (21:57 +0200)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Sat, 10 May 2008 09:44:55 +0000 (11:44 +0200)
This patch adds support for the ATMEL LCDC driver which is used on some
AT91 and AVR platforms.

Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and
AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
README
common/lcd.c
drivers/video/Makefile
drivers/video/atmel_lcdfb.c [new file with mode: 0644]
include/asm-arm/arch-at91sam9/clk.h
include/atmel_lcdc.h [new file with mode: 0644]
include/lcd.h
lib_arm/board.c

diff --git a/README b/README
index 5e2bca41c1acd9b28ee7ded28e85b2b3048192bf..dca495db98e78111298757f9baa92e93d43a7221 100644 (file)
--- a/README
+++ b/README
@@ -962,6 +962,10 @@ The following options need to be configured:
                display); also select one of the supported displays
                by defining one of these:
 
+               CONFIG_ATMEL_LCD:
+
+                       HITACHI TX09D70VM1CCA, 3.5", 240x320.
+
                CONFIG_NEC_NL6448AC33:
 
                        NEC NL6448AC33-18. Active, color, single scan.
index 914dc2ef7ca5b1f30d1238317213e32650c9018d..2178f12d5af7e592b52153ae1e4e9504c8c23b81 100644 (file)
 #include <lcdvideo.h>
 #endif
 
+#if defined(CONFIG_ATMEL_LCD)
+#include <atmel_lcdc.h>
+#include <nand.h>
+extern nand_info_t nand_info[];
+#endif
+
 #ifdef CONFIG_LCD
 
 /************************************************************************/
@@ -474,14 +480,22 @@ ulong lcd_setmem (ulong addr)
 
 static void lcd_setfgcolor (int color)
 {
+#ifdef CONFIG_ATMEL_LCD
+       lcd_color_fg = color;
+#else
        lcd_color_fg = color & 0x0F;
+#endif
 }
 
 /*----------------------------------------------------------------------*/
 
 static void lcd_setbgcolor (int color)
 {
+#ifdef CONFIG_ATMEL_LCD
+       lcd_color_bg = color;
+#else
        lcd_color_bg = color & 0x0F;
+#endif
 }
 
 /*----------------------------------------------------------------------*/
@@ -508,7 +522,11 @@ static int lcd_getbgcolor (void)
 #ifdef CONFIG_LCD_LOGO
 void bitmap_plot (int x, int y)
 {
+#ifdef CONFIG_ATMEL_LCD
+       uint *cmap;
+#else
        ushort *cmap;
+#endif
        ushort i, j;
        uchar *bmap;
        uchar *fb;
@@ -533,6 +551,8 @@ void bitmap_plot (int x, int y)
                cmap = (ushort *)fbi->palette;
 #elif defined(CONFIG_MPC823)
                cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET*sizeof(ushort)]);
+#elif defined(CONFIG_ATMEL_LCD)
+               cmap = (uint *) (panel_info.mmio + ATMEL_LCDC_LUT(0));
 #endif
 
                WATCHDOG_RESET();
@@ -540,11 +560,26 @@ void bitmap_plot (int x, int y)
                /* Set color map */
                for (i=0; i<(sizeof(bmp_logo_palette)/(sizeof(ushort))); ++i) {
                        ushort colreg = bmp_logo_palette[i];
+#ifdef CONFIG_ATMEL_LCD
+                       uint lut_entry;
+#ifdef CONFIG_ATMEL_LCD_BGR555
+                       lut_entry = ((colreg & 0x000F) << 11) |
+                                   ((colreg & 0x00F0) <<  2) |
+                                   ((colreg & 0x0F00) >>  7);
+#else /* CONFIG_ATMEL_LCD_RGB565 */
+                       lut_entry = ((colreg & 0x000F) << 1) |
+                                   ((colreg & 0x00F0) << 3) |
+                                   ((colreg & 0x0F00) << 4);
+#endif
+                       *(cmap + BMP_LOGO_OFFSET) = lut_entry;
+                       cmap++;
+#else /* !CONFIG_ATMEL_LCD */
 #ifdef  CFG_INVERT_COLORS
                        *cmap++ = 0xffff - colreg;
 #else
                        *cmap++ = colreg;
 #endif
+#endif /* CONFIG_ATMEL_LCD */
                }
 
                WATCHDOG_RESET();
@@ -578,7 +613,9 @@ void bitmap_plot (int x, int y)
  */
 int lcd_display_bitmap(ulong bmp_image, int x, int y)
 {
-#if !defined(CONFIG_MCC200)
+#ifdef CONFIG_ATMEL_LCD
+       uint *cmap;
+#elif !defined(CONFIG_MCC200)
        ushort *cmap;
 #endif
        ushort i, j;
@@ -633,6 +670,8 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
                cmap = (ushort *)fbi->palette;
 #elif defined(CONFIG_MPC823)
                cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
+#elif defined(CONFIG_ATMEL_LCD)
+               cmap = (uint *) (panel_info.mmio + ATMEL_LCDC_LUT(0));
 #else
 # error "Don't know location of color map"
 #endif
@@ -708,6 +747,10 @@ static void *lcd_logo (void)
 #ifdef CONFIG_LCD_INFO
        char info[80];
        char temp[32];
+#ifdef CONFIG_ATMEL_LCD
+       int i;
+       ulong dram_size, nand_size;
+#endif
 #endif /* CONFIG_LCD_INFO */
 
 #ifdef CONFIG_SPLASH_SCREEN
@@ -765,6 +808,40 @@ static void *lcd_logo (void)
 # endif /* CONFIG_LCD_INFO */
 #endif /* CONFIG_MPC823 */
 
+#ifdef CONFIG_ATMEL_LCD
+# ifdef CONFIG_LCD_INFO
+       sprintf (info, "%s", U_BOOT_VERSION);
+       lcd_drawchars (LCD_INFO_X, LCD_INFO_Y, (uchar *)info, strlen(info));
+
+       sprintf (info, "(C) 2008 ATMEL Corp");
+       lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT,
+                                       (uchar *)info, strlen(info));
+
+       sprintf (info, "at91support@atmel.com");
+       lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT * 2,
+                                       (uchar *)info, strlen(info));
+
+       sprintf (info, "%s CPU at %s MHz",
+               AT91_CPU_NAME,
+               strmhz(temp, AT91_MAIN_CLOCK));
+       lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT * 3,
+                                       (uchar *)info, strlen(info));
+
+       dram_size = 0;
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
+               dram_size += gd->bd->bi_dram[i].size;
+       nand_size = 0;
+       for (i = 0; i < CFG_MAX_NAND_DEVICE; i++)
+               nand_size += nand_info[i].size;
+       sprintf (info, "  %ld MB SDRAM, %ld MB NAND",
+               dram_size >> 20,
+               nand_size >> 20 );
+       lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT * 4,
+                                       (uchar *)info, strlen(info));
+# endif /* CONFIG_LCD_INFO */
+#endif /* CONFIG_ATMEL_LCD */
+
+
 #if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
        return ((void *)((ulong)lcd_base + BMP_LOGO_HEIGHT * lcd_line_length));
 #else
index 0e40f2afa98811c10da5e683dbc976c6d1c10420..a07ee0ecafc6bfbfa2d9658d41dc11df71bb7a51 100644 (file)
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB    := $(obj)libvideo.a
 
 COBJS-y += ati_radeon_fb.o
+COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
 COBJS-y += cfb_console.o
 COBJS-y += ct69000.o
 COBJS-y += mb862xx.o
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
new file mode 100644 (file)
index 0000000..27df449
--- /dev/null
@@ -0,0 +1,160 @@
+/*
+ * Driver for AT91/AT32 LCD Controller
+ *
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/clk.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
+
+int lcd_line_length;
+int lcd_color_fg;
+int lcd_color_bg;
+
+void *lcd_base;                                /* Start of framebuffer memory  */
+void *lcd_console_address;             /* Start of console buffer      */
+
+short console_col;
+short console_row;
+
+/* configurable parameters */
+#define ATMEL_LCDC_CVAL_DEFAULT                0xc8
+#define ATMEL_LCDC_DMA_BURST_LEN       8
+
+#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91CAP9)
+#define ATMEL_LCDC_FIFO_SIZE           2048
+#else
+#define ATMEL_LCDC_FIFO_SIZE           512
+#endif
+
+#define lcdc_readl(mmio, reg)          __raw_readl((mmio)+(reg))
+#define lcdc_writel(mmio, reg, val)    __raw_writel((val), (mmio)+(reg))
+
+void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
+{
+#if defined(CONFIG_ATMEL_LCD_BGR555)
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno),
+                   (red >> 3) | ((green & 0xf8) << 2) | ((blue & 0xf8) << 7));
+#else
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno),
+                   (blue >> 3) | ((green & 0xfc) << 3) | ((red & 0xf8) << 8));
+#endif
+}
+
+void lcd_ctrl_init(void *lcdbase)
+{
+       unsigned long value;
+
+       /* Turn off the LCD controller and the DMA controller */
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
+                   1 << ATMEL_LCDC_GUARDT_OFFSET);
+
+       /* Wait for the LCDC core to become idle */
+       while (lcdc_readl(panel_info.mmio, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
+               udelay(10);
+
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, 0);
+
+       /* Reset LCDC DMA */
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMARST);
+
+       /* ...set frame size and burst length = 8 words (?) */
+       value = (panel_info.vl_col * panel_info.vl_row *
+                NBITS(panel_info.vl_bpix)) / 32;
+       value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMAFRMCFG, value);
+
+       /* Set pixel clock */
+       value = get_lcdc_clk_rate(0) / panel_info.vl_clk;
+       if (get_lcdc_clk_rate(0) % panel_info.vl_clk)
+               value++;
+       value = (value / 2) - 1;
+
+       if (!value) {
+               lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
+       } else
+               lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1,
+                           value << ATMEL_LCDC_CLKVAL_OFFSET);
+
+       /* Initialize control register 2 */
+       value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
+       if (panel_info.vl_tft)
+               value |= ATMEL_LCDC_DISTYPE_TFT;
+
+       if (!(panel_info.vl_sync & ATMEL_LCDC_INVLINE_INVERTED))
+               value |= ATMEL_LCDC_INVLINE_INVERTED;
+       if (!(panel_info.vl_sync & ATMEL_LCDC_INVFRAME_INVERTED))
+               value |= ATMEL_LCDC_INVFRAME_INVERTED;
+       value |= (panel_info.vl_bpix << 5);
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON2, value);
+
+       /* Vertical timing */
+       value = (panel_info.vl_vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
+       value |= panel_info.vl_upper_margin << ATMEL_LCDC_VBP_OFFSET;
+       value |= panel_info.vl_lower_margin;
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM1, value);
+
+       /* Horizontal timing */
+       value = (panel_info.vl_right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
+       value |= (panel_info.vl_hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
+       value |= (panel_info.vl_left_margin - 1);
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM2, value);
+
+       /* Display size */
+       value = (panel_info.vl_col - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
+       value |= panel_info.vl_row - 1;
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDFRMCFG, value);
+
+       /* FIFO Threshold: Use formula from data sheet */
+       value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_FIFO, value);
+
+       /* Toggle LCD_MODE every frame */
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_MVAL, 0);
+
+       /* Disable all interrupts */
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_IDR, ~0UL);
+
+       /* Set contrast */
+       value = ATMEL_LCDC_PS_DIV8 |
+               ATMEL_LCDC_POL_POSITIVE |
+               ATMEL_LCDC_ENA_PWMENABLE;
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_CTR, value);
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
+
+       /* Set framebuffer DMA base address and pixel offset */
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMABADDR1, (u_long)lcdbase);
+
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMAEN);
+       lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
+                   (1 << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
+}
+
+ulong calc_fbsize(void)
+{
+       return ((panel_info.vl_col * panel_info.vl_row *
+               NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE;
+}
index f67b4356d9b70cc623a6da278c29fe152ba61bfb..1b502c822cd7d10d16b0a1a689c4f9aa41b61a93 100644 (file)
@@ -36,4 +36,10 @@ static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
        return AT91_MASTER_CLOCK;
 }
 
+static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
+{
+       return AT91_MASTER_CLOCK;
+}
+
+
 #endif /* __ASM_ARM_ARCH_CLK_H__ */
diff --git a/include/atmel_lcdc.h b/include/atmel_lcdc.h
new file mode 100644 (file)
index 0000000..73dd8f7
--- /dev/null
@@ -0,0 +1,177 @@
+/*
+ *  Header file for AT91/AT32 LCD Controller
+ *
+ *  Data structure and register user interface
+ *
+ *  Copyright (C) 2007 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ATMEL_LCDC_H__
+#define __ATMEL_LCDC_H__
+
+#define ATMEL_LCDC_DMABADDR1   0x00
+#define ATMEL_LCDC_DMABADDR2   0x04
+#define ATMEL_LCDC_DMAFRMPT1   0x08
+#define ATMEL_LCDC_DMAFRMPT2   0x0c
+#define ATMEL_LCDC_DMAFRMADD1  0x10
+#define ATMEL_LCDC_DMAFRMADD2  0x14
+
+#define ATMEL_LCDC_DMAFRMCFG   0x18
+#define        ATMEL_LCDC_FRSIZE       (0x7fffff <<  0)
+#define        ATMEL_LCDC_BLENGTH_OFFSET       24
+#define        ATMEL_LCDC_BLENGTH      (0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)
+
+#define ATMEL_LCDC_DMACON      0x1c
+#define        ATMEL_LCDC_DMAEN        (0x1 << 0)
+#define        ATMEL_LCDC_DMARST       (0x1 << 1)
+#define        ATMEL_LCDC_DMABUSY      (0x1 << 2)
+#define                ATMEL_LCDC_DMAUPDT      (0x1 << 3)
+#define                ATMEL_LCDC_DMA2DEN      (0x1 << 4)
+
+#define ATMEL_LCDC_DMA2DCFG    0x20
+#define                ATMEL_LCDC_ADDRINC_OFFSET       0
+#define                ATMEL_LCDC_ADDRINC              (0xffff)
+#define                ATMEL_LCDC_PIXELOFF_OFFSET      24
+#define                ATMEL_LCDC_PIXELOFF             (0x1f << 24)
+
+#define ATMEL_LCDC_LCDCON1     0x0800
+#define        ATMEL_LCDC_BYPASS       (1     <<  0)
+#define        ATMEL_LCDC_CLKVAL_OFFSET        12
+#define        ATMEL_LCDC_CLKVAL       (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
+#define        ATMEL_LCDC_LINCNT       (0x7ff << 21)
+
+#define ATMEL_LCDC_LCDCON2     0x0804
+#define        ATMEL_LCDC_DISTYPE      (3 << 0)
+#define                ATMEL_LCDC_DISTYPE_STNMONO      (0 << 0)
+#define                ATMEL_LCDC_DISTYPE_STNCOLOR     (1 << 0)
+#define                ATMEL_LCDC_DISTYPE_TFT          (2 << 0)
+#define        ATMEL_LCDC_SCANMOD      (1 << 2)
+#define                ATMEL_LCDC_SCANMOD_SINGLE       (0 << 2)
+#define                ATMEL_LCDC_SCANMOD_DUAL         (1 << 2)
+#define        ATMEL_LCDC_IFWIDTH      (3 << 3)
+#define                ATMEL_LCDC_IFWIDTH_4            (0 << 3)
+#define                ATMEL_LCDC_IFWIDTH_8            (1 << 3)
+#define                ATMEL_LCDC_IFWIDTH_16           (2 << 3)
+#define        ATMEL_LCDC_PIXELSIZE    (7 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_1          (0 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_2          (1 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_4          (2 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_8          (3 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_16         (4 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_24         (5 << 5)
+#define                ATMEL_LCDC_PIXELSIZE_32         (6 << 5)
+#define        ATMEL_LCDC_INVVD        (1 << 8)
+#define                ATMEL_LCDC_INVVD_NORMAL         (0 << 8)
+#define                ATMEL_LCDC_INVVD_INVERTED       (1 << 8)
+#define        ATMEL_LCDC_INVFRAME     (1 << 9 )
+#define                ATMEL_LCDC_INVFRAME_NORMAL      (0 << 9)
+#define                ATMEL_LCDC_INVFRAME_INVERTED    (1 << 9)
+#define        ATMEL_LCDC_INVLINE      (1 << 10)
+#define                ATMEL_LCDC_INVLINE_NORMAL       (0 << 10)
+#define                ATMEL_LCDC_INVLINE_INVERTED     (1 << 10)
+#define        ATMEL_LCDC_INVCLK       (1 << 11)
+#define                ATMEL_LCDC_INVCLK_NORMAL        (0 << 11)
+#define                ATMEL_LCDC_INVCLK_INVERTED      (1 << 11)
+#define        ATMEL_LCDC_INVDVAL      (1 << 12)
+#define                ATMEL_LCDC_INVDVAL_NORMAL       (0 << 12)
+#define                ATMEL_LCDC_INVDVAL_INVERTED     (1 << 12)
+#define        ATMEL_LCDC_CLKMOD       (1 << 15)
+#define                ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
+#define                ATMEL_LCDC_CLKMOD_ALWAYSACTIVE  (1 << 15)
+#define        ATMEL_LCDC_MEMOR        (1 << 31)
+#define                ATMEL_LCDC_MEMOR_BIG            (0 << 31)
+#define                ATMEL_LCDC_MEMOR_LITTLE         (1 << 31)
+
+#define ATMEL_LCDC_TIM1                0x0808
+#define        ATMEL_LCDC_VFP          (0xffU <<  0)
+#define        ATMEL_LCDC_VBP_OFFSET           8
+#define        ATMEL_LCDC_VBP          (0xffU <<  ATMEL_LCDC_VBP_OFFSET)
+#define        ATMEL_LCDC_VPW_OFFSET           16
+#define        ATMEL_LCDC_VPW          (0x3fU << ATMEL_LCDC_VPW_OFFSET)
+#define        ATMEL_LCDC_VHDLY_OFFSET         24
+#define        ATMEL_LCDC_VHDLY        (0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
+
+#define ATMEL_LCDC_TIM2                0x080c
+#define        ATMEL_LCDC_HBP          (0xffU  <<  0)
+#define        ATMEL_LCDC_HPW_OFFSET           8
+#define        ATMEL_LCDC_HPW          (0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
+#define        ATMEL_LCDC_HFP_OFFSET           21
+#define        ATMEL_LCDC_HFP          (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
+
+#define ATMEL_LCDC_LCDFRMCFG   0x0810
+#define        ATMEL_LCDC_LINEVAL      (0x7ff <<  0)
+#define        ATMEL_LCDC_HOZVAL_OFFSET        21
+#define        ATMEL_LCDC_HOZVAL       (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
+
+#define ATMEL_LCDC_FIFO                0x0814
+#define        ATMEL_LCDC_FIFOTH       (0xffff)
+
+#define ATMEL_LCDC_MVAL                0x0818
+
+#define ATMEL_LCDC_DP1_2       0x081c
+#define ATMEL_LCDC_DP4_7       0x0820
+#define ATMEL_LCDC_DP3_5       0x0824
+#define ATMEL_LCDC_DP2_3       0x0828
+#define ATMEL_LCDC_DP5_7       0x082c
+#define ATMEL_LCDC_DP3_4       0x0830
+#define ATMEL_LCDC_DP4_5       0x0834
+#define ATMEL_LCDC_DP6_7       0x0838
+#define        ATMEL_LCDC_DP1_2_VAL    (0xff)
+#define        ATMEL_LCDC_DP4_7_VAL    (0xfffffff)
+#define        ATMEL_LCDC_DP3_5_VAL    (0xfffff)
+#define        ATMEL_LCDC_DP2_3_VAL    (0xfff)
+#define        ATMEL_LCDC_DP5_7_VAL    (0xfffffff)
+#define        ATMEL_LCDC_DP3_4_VAL    (0xffff)
+#define        ATMEL_LCDC_DP4_5_VAL    (0xfffff)
+#define        ATMEL_LCDC_DP6_7_VAL    (0xfffffff)
+
+#define ATMEL_LCDC_PWRCON      0x083c
+#define        ATMEL_LCDC_PWR          (1    <<  0)
+#define        ATMEL_LCDC_GUARDT_OFFSET        1
+#define        ATMEL_LCDC_GUARDT       (0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
+#define        ATMEL_LCDC_BUSY         (1    << 31)
+
+#define ATMEL_LCDC_CONTRAST_CTR        0x0840
+#define        ATMEL_LCDC_PS           (3 << 0)
+#define                ATMEL_LCDC_PS_DIV1              (0 << 0)
+#define                ATMEL_LCDC_PS_DIV2              (1 << 0)
+#define                ATMEL_LCDC_PS_DIV4              (2 << 0)
+#define                ATMEL_LCDC_PS_DIV8              (3 << 0)
+#define        ATMEL_LCDC_POL          (1 << 2)
+#define                ATMEL_LCDC_POL_NEGATIVE         (0 << 2)
+#define                ATMEL_LCDC_POL_POSITIVE         (1 << 2)
+#define        ATMEL_LCDC_ENA          (1 << 3)
+#define                ATMEL_LCDC_ENA_PWMDISABLE       (0 << 3)
+#define                ATMEL_LCDC_ENA_PWMENABLE        (1 << 3)
+
+#define ATMEL_LCDC_CONTRAST_VAL        0x0844
+#define        ATMEL_LCDC_CVAL (0xff)
+
+#define ATMEL_LCDC_IER         0x0848
+#define ATMEL_LCDC_IDR         0x084c
+#define ATMEL_LCDC_IMR         0x0850
+#define ATMEL_LCDC_ISR         0x0854
+#define ATMEL_LCDC_ICR         0x0858
+#define        ATMEL_LCDC_LNI          (1 << 0)
+#define        ATMEL_LCDC_LSTLNI       (1 << 1)
+#define        ATMEL_LCDC_EOFI         (1 << 2)
+#define        ATMEL_LCDC_UFLWI        (1 << 4)
+#define        ATMEL_LCDC_OWRI         (1 << 5)
+#define        ATMEL_LCDC_MERI         (1 << 6)
+
+#define ATMEL_LCDC_LUT(n)      (0x0c00 + ((n)*4))
+
+#endif /* __ATMEL_LCDC_H__ */
index 8a4273cce15d040af62b9221c741807104c2c7d0..44ac8ef8c7049c602907091b01d8e9620932ccf5 100644 (file)
@@ -155,7 +155,35 @@ typedef struct vidinfo {
 
        u_char  vl_bpix;        /* Bits per pixel, 0 = 1 */
 } vidinfo_t;
-#endif /* CONFIG_MPC823, CONFIG_PXA250 or CONFIG_MCC200 */
+
+#elif defined(CONFIG_ATMEL_LCD)
+
+typedef struct vidinfo {
+       u_long vl_col;          /* Number of columns (i.e. 640) */
+       u_long vl_row;          /* Number of rows (i.e. 480) */
+       u_long vl_clk;  /* pixel clock in ps    */
+
+       /* LCD configuration register */
+       u_long vl_sync;         /* Horizontal / vertical sync */
+       u_long vl_bpix;         /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
+       u_long vl_tft;          /* 0 = passive, 1 = TFT */
+
+       /* Horizontal control register. */
+       u_long vl_hsync_len;    /* Length of horizontal sync */
+       u_long vl_left_margin;  /* Time from sync to picture */
+       u_long vl_right_margin; /* Time from picture to sync */
+
+       /* Vertical control register. */
+       u_long vl_vsync_len;    /* Length of vertical sync */
+       u_long vl_upper_margin; /* Time from sync to picture */
+       u_long vl_lower_margin; /* Time from picture to sync */
+
+       u_long  mmio;           /* Memory mapped registers */
+} vidinfo_t;
+
+extern vidinfo_t panel_info;
+
+#endif /* CONFIG_MPC823, CONFIG_PXA250 or CONFIG_MCC200 or CONFIG_ATMEL_LCD */
 
 /* Video functions */
 
index 67506b35e1ec6fbac0d00ee000341dc97c345414..b2e6910c4965342d975d0c867eb114cf2b81649b 100644 (file)
@@ -121,6 +121,20 @@ void *sbrk (ptrdiff_t increment)
        return ((void *) old);
 }
 
+char *strmhz(char *buf, long hz)
+{
+       long l, n;
+       long m;
+
+       n = hz / 1000000L;
+       l = sprintf (buf, "%ld", n);
+       m = (hz % 1000000L) / 1000L;
+       if (m != 0)
+               sprintf (buf + l, ".%03ld", m);
+       return (buf);
+}
+
+
 /************************************************************************
  * Coloured LED functionality
  ************************************************************************
@@ -279,7 +293,7 @@ void start_armboot (void)
 {
        init_fnc_t **init_fnc_ptr;
        char *s;
-#ifndef CFG_NO_FLASH
+#if !defined(CFG_NO_FLASH) || defined (CONFIG_VFD) || defined(CONFIG_LCD)
        ulong size;
 #endif
 #if defined(CONFIG_VFD) || defined(CONFIG_LCD)
@@ -323,16 +337,19 @@ void start_armboot (void)
 #endif /* CONFIG_VFD */
 
 #ifdef CONFIG_LCD
-#      ifndef PAGE_SIZE
-#        define PAGE_SIZE 4096
-#      endif
-       /*
-        * reserve memory for LCD display (always full pages)
-        */
-       /* bss_end is defined in the board-specific linker script */
-       addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
-       size = lcd_setmem (addr);
-       gd->fb_base = addr;
+       /* board init may have inited fb_base */
+       if (!gd->fb_base) {
+#              ifndef PAGE_SIZE
+#                define PAGE_SIZE 4096
+#              endif
+               /*
+                * reserve memory for LCD display (always full pages)
+                */
+               /* bss_end is defined in the board-specific linker script */
+               addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
+               size = lcd_setmem (addr);
+               gd->fb_base = addr;
+       }
 #endif /* CONFIG_LCD */
 
        /* armboot_start is defined in the board-specific linker script */