arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL
authorVipul Kumar <vipul.kumar@xilinx.com>
Fri, 16 Feb 2018 12:32:51 +0000 (18:02 +0530)
committerTom Rini <trini@konsulko.com>
Wed, 28 Feb 2018 18:00:25 +0000 (13:00 -0500)
This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
19 files changed:
configs/syzygy_hub_defconfig
configs/topic_miami_defconfig
configs/topic_miamilite_defconfig
configs/topic_miamiplus_defconfig
configs/zynq_cc108_defconfig
configs/zynq_microzed_defconfig
configs/zynq_picozed_defconfig
configs/zynq_z_turn_defconfig
configs/zynq_zc702_defconfig
configs/zynq_zc706_defconfig
configs/zynq_zc770_xm010_defconfig
configs/zynq_zc770_xm011_defconfig
configs/zynq_zc770_xm011_x16_defconfig
configs/zynq_zc770_xm012_defconfig
configs/zynq_zc770_xm013_defconfig
configs/zynq_zed_defconfig
configs/zynq_zybo_defconfig
drivers/fpga/Kconfig
include/configs/zynq-common.h

index 996ecdb38da24e8b1a6dd46ccff0e42cbe0de701..8f06465f6e54295275da3dabf0cc5741f9e23d14 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 945431c77b514afd67437c511de04ff6891465a6..d47d6f8a6f4a374a2ccce8a63046ddb2f7fd7b27 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index c6a3f545430e211019c404ba6f0c61cf06d7269a..ae33fc445b769a42f0a6d63dfc0d3292de6de486 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 7281f7b92d4f615608e1d662ccfcc5e2e35c22f3..496c43eac823cc6733ddadd205ecbee144ec7239 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 24e9cfe915da8e5489801ad7334582c60915d38f..3a4de92e4c4af77eff7448e0f526c970b3405606 100644 (file)
@@ -26,6 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index b34520f1c96c999bd409dd23f89e432a25a3d43c..94a1a40efb7456fc2eb3403ba5a13160cad9dfb9 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 2f90918d465a17eb208e900cf5d4924a1bc5e948..f9ee904bd405e8390eb13a21da06c72fbd8a9650 100644 (file)
@@ -29,6 +29,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 68a2208ada1b925b5bbfd7012c90e2248d6bc9c3..7a51b85ac822b3f0db873c507e17bcb36ee8fd5b 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 878bc79a90818334b030215c01134c89477b5703..c6a789317df22757a55ac6206d58eaa33ea8534c 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 7b2e072581f614f026c38a87b7e5983858526f54..665b4d3fd0e2c68db25bb087470ca1f2df0d2bff 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index c5b092e3d9d76c78d8e90a86ed31727009841fe7..8db30d0818079b5d22bdea52081bfa65b2e91e16 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 59db4c5f6280e9260228cdb78dfddfa1d63ac4d8..eeff2c8260ac3197893b3c69cf0e274f145f00fe 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_BLK=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
index d67f78163e3abbf7149d1a894d5267dd2d3604db..235d39f49f387c48629c821962dcf4b574ab3f1d 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_OF_EMBED=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_DM_MMC=y
index 87823c9d086a47c6b01f5b662553a5eaee5c7881..8dbba6589deb92d7f26d9f23cb90d9e235596e66 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_BLK=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
index 0d3bcee7060f395bd90a1e656f54fc3176d5e843..f9eabb12b500dbb03281fb9545532bb5d4e60032 100644 (file)
@@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_BLK=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index 4c1c18b83a4656dcae4c0e80e6ce06abfe5662f6..7ed012833ad8f4763906563593904304b6b11ef0 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 138b249453c414a1aeb9affd7bb59c5993592f43..2a45ceeb2c9fb962f27c62b94d12daf157bd9854 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 4f9f0d1c4cb5430b1a866c41c5d5de3716fe6601..d36c4c5e2804002a0515ab4f9e945ce18d731163 100644 (file)
@@ -50,4 +50,11 @@ config FPGA_SPARTAN3
        help
          Enable Spartan3 FPGA driver for loading in BIT format.
 
+config FPGA_ZYNQPL
+       bool "Enable Xilinx FPGA for Zynq"
+       depends on ARCH_ZYNQ
+       help
+         Enable FPGA driver for loading bitstream in BIT and BIN format
+         on Xilinx Zynq devices.
+
 endmenu
index ac9663dea6ed260fec31cf8a47b29bfe778b138b..6f9c1535b0d6419a0c73fbe5934ec196968969db 100644 (file)
                                        CONFIG_SYS_INIT_RAM_SIZE - \
                                        GENERATED_GBL_DATA_SIZE)
 
-/* Enable the PL to be downloaded */
-#define CONFIG_FPGA_ZYNQPL
 
 /* FIT support */
 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */